WO2012161451A3 - 반도체 박막 구조 및 그 형성 방법 - Google Patents

반도체 박막 구조 및 그 형성 방법 Download PDF

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Publication number
WO2012161451A3
WO2012161451A3 PCT/KR2012/003782 KR2012003782W WO2012161451A3 WO 2012161451 A3 WO2012161451 A3 WO 2012161451A3 KR 2012003782 W KR2012003782 W KR 2012003782W WO 2012161451 A3 WO2012161451 A3 WO 2012161451A3
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WO
WIPO (PCT)
Prior art keywords
thin film
substrate
semiconductor thin
forming
film structure
Prior art date
Application number
PCT/KR2012/003782
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English (en)
French (fr)
Other versions
WO2012161451A2 (ko
WO2012161451A9 (ko
Inventor
윤의준
하신우
Original Assignee
서울대학교산학협력단
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 서울대학교산학협력단 filed Critical 서울대학교산학협력단
Priority to US14/114,772 priority Critical patent/US9793359B2/en
Priority to DE112012002182.7T priority patent/DE112012002182B4/de
Priority to CN201280024298.9A priority patent/CN103608897B/zh
Priority to JP2014509253A priority patent/JP5944489B2/ja
Publication of WO2012161451A2 publication Critical patent/WO2012161451A2/ko
Publication of WO2012161451A3 publication Critical patent/WO2012161451A3/ko
Publication of WO2012161451A9 publication Critical patent/WO2012161451A9/ko

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003Nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/0254Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02658Pretreatments
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0093Wafer bonding; Removal of the growth substrate

Abstract

본 발명에서는 기판과 질화물 반도체 사이의 격자상수 및 열팽창계수 차이에 의한 응력 발생과 그로 인한 기판 휘어짐 현상을 조절하기 위해서, 희생층을 기판 위에 형성하고 다양한 방법으로 패터닝한 후, 그 위에 무기물 박막을 형성하고 나서 선택적으로 희생층을 제거하여, 기판 위에 기판과 무기물 박막으로 정의되는 빈 공간(cavity)을 형성하는 반도체 박막 형성 방법 및 이러한 방법으로 형성된 반도체 박막 구조를 제안한다.
PCT/KR2012/003782 2011-05-20 2012-05-15 반도체 박막 구조 및 그 형성 방법 WO2012161451A2 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
US14/114,772 US9793359B2 (en) 2011-05-20 2012-05-15 Semiconductor thin film structure and method of forming the same
DE112012002182.7T DE112012002182B4 (de) 2011-05-20 2012-05-15 Dünnschicht-Halbleiterstruktur und Verfahren zum Bilden derselben
CN201280024298.9A CN103608897B (zh) 2011-05-20 2012-05-15 半导体薄膜结构以及其形成方法
JP2014509253A JP5944489B2 (ja) 2011-05-20 2012-05-15 半導体薄膜構造及びその形成方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020110047692A KR101235239B1 (ko) 2011-05-20 2011-05-20 반도체 박막 구조 및 그 형성 방법
KR10-2011-0047692 2011-05-20

Publications (3)

Publication Number Publication Date
WO2012161451A2 WO2012161451A2 (ko) 2012-11-29
WO2012161451A3 true WO2012161451A3 (ko) 2013-03-21
WO2012161451A9 WO2012161451A9 (ko) 2013-05-16

Family

ID=47217855

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2012/003782 WO2012161451A2 (ko) 2011-05-20 2012-05-15 반도체 박막 구조 및 그 형성 방법

Country Status (7)

Country Link
US (1) US9793359B2 (ko)
JP (2) JP5944489B2 (ko)
KR (1) KR101235239B1 (ko)
CN (1) CN103608897B (ko)
DE (1) DE112012002182B4 (ko)
TW (1) TWI557939B (ko)
WO (1) WO2012161451A2 (ko)

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DE102013105035A1 (de) * 2013-05-16 2014-11-20 Osram Opto Semiconductors Gmbh Verfahren zum Herstellen eines optoelektronischen Halbleiterchips
KR101547546B1 (ko) * 2013-09-17 2015-08-28 서울대학교산학협력단 박막 구조체 및 그 제조방법
KR101557083B1 (ko) * 2013-10-07 2015-10-05 주식회사 헥사솔루션 반도체 적층 구조 및 그 형성 방법
KR20150086127A (ko) 2014-01-17 2015-07-27 삼성디스플레이 주식회사 액정 표시 장치
KR101590475B1 (ko) * 2014-07-10 2016-02-01 주식회사 헥사솔루션 반도체 적층 구조 및 그 형성 방법
KR102232265B1 (ko) * 2014-07-14 2021-03-25 주식회사 헥사솔루션 기판 구조, 그 형성방법, 및 이를 이용한 질화물 반도체 제조방법
KR20160008382A (ko) 2014-07-14 2016-01-22 서울대학교산학협력단 반도체 적층 구조, 이를 이용한 질화물 반도체층 분리방법 및 장치
TWI550921B (zh) 2014-07-17 2016-09-21 嘉晶電子股份有限公司 氮化物半導體結構
CN105428481B (zh) * 2015-12-14 2018-03-16 厦门市三安光电科技有限公司 氮化物底层及其制作方法
JP7094558B2 (ja) * 2016-01-05 2022-07-04 スージョウ レキン セミコンダクター カンパニー リミテッド 半導体素子
KR101809252B1 (ko) 2017-02-24 2017-12-14 서울대학교산학협력단 반도체 적층 구조, 이를 이용한 질화물 반도체층 분리방법 및 장치
CN110710072B (zh) * 2017-04-12 2022-07-22 感应光子公司 具有结合光束转向的超小型垂直腔表面发射激光发射器的器件
CN107731838A (zh) * 2017-11-09 2018-02-23 长江存储科技有限责任公司 一种nand存储器及其制备方法
TWM562491U (zh) * 2018-01-09 2018-06-21 Epileds Technologies Inc 紫外光發光二極體
CN108550527B (zh) * 2018-05-16 2021-01-22 京东方科技集团股份有限公司 一种图形化方法
KR102136579B1 (ko) 2018-07-27 2020-07-22 서울대학교산학협력단 표시 장치
KR20210102739A (ko) 2020-02-12 2021-08-20 삼성전자주식회사 Led 소자 및 그 제조방법과, led 소자를 포함하는 디스플레이 장치
KR102537068B1 (ko) * 2020-11-27 2023-05-26 서울대학교산학협력단 사파이어 나노 멤브레인 상에서 산화갈륨층을 포함하는 기판의 제조방법
KR102591096B1 (ko) * 2020-12-15 2023-10-18 연세대학교 산학협력단 인장 변형을 이용한 광 검출기 제조 방법, 이에 의해 제조되는 광 검출기, 및 그 제조 장치

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Also Published As

Publication number Publication date
KR20120129439A (ko) 2012-11-28
DE112012002182T8 (de) 2014-04-10
DE112012002182T5 (de) 2014-02-13
KR101235239B1 (ko) 2013-02-21
WO2012161451A2 (ko) 2012-11-29
CN103608897B (zh) 2017-10-31
US20140070372A1 (en) 2014-03-13
TW201251111A (en) 2012-12-16
JP6219905B2 (ja) 2017-10-25
CN103608897A (zh) 2014-02-26
JP2014519188A (ja) 2014-08-07
WO2012161451A9 (ko) 2013-05-16
TWI557939B (zh) 2016-11-11
JP2016074596A (ja) 2016-05-12
US9793359B2 (en) 2017-10-17
DE112012002182B4 (de) 2023-07-27
JP5944489B2 (ja) 2016-07-05

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