WO2012096051A1 - 固体撮像装置 - Google Patents
固体撮像装置 Download PDFInfo
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- WO2012096051A1 WO2012096051A1 PCT/JP2011/076091 JP2011076091W WO2012096051A1 WO 2012096051 A1 WO2012096051 A1 WO 2012096051A1 JP 2011076091 W JP2011076091 W JP 2011076091W WO 2012096051 A1 WO2012096051 A1 WO 2012096051A1
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- region
- type semiconductor
- conductive member
- imaging device
- state imaging
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- 238000003384 imaging method Methods 0.000 title claims abstract description 45
- 239000007787 solid Substances 0.000 title abstract 2
- 238000006243 chemical reaction Methods 0.000 claims abstract description 8
- 239000012535 impurity Substances 0.000 claims description 22
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 11
- 229920005591 polysilicon Polymers 0.000 claims description 11
- 230000015572 biosynthetic process Effects 0.000 abstract description 3
- 239000004065 semiconductor Substances 0.000 description 109
- 238000010586 diagram Methods 0.000 description 10
- 238000002955 isolation Methods 0.000 description 6
- 239000000758 substrate Substances 0.000 description 5
- 239000000463 material Substances 0.000 description 3
- 238000009825 accumulation Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000001629 suppression Effects 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000000370 acceptor Substances 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/148—Charge coupled imagers
- H01L27/14806—Structural or functional details thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/148—Charge coupled imagers
- H01L27/14825—Linear CCD imagers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/148—Charge coupled imagers
- H01L27/14831—Area CCD imagers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
- H04N25/713—Transfer or readout registers; Split readout registers or multiple readout registers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
Definitions
- the present invention relates to a solid-state imaging device.
- a photoelectric conversion unit having a plurality of photosensitive regions that generate charges in response to light incidence
- a potential gradient forming unit having a conductive member arranged to face the plurality of photosensitive regions
- the potential gradient forming unit forms a potential gradient that is increased along a predetermined direction. By moving charges by this potential gradient, it is possible to speed up charge reading.
- the electric resistance value of the conductive member is set in consideration of the operation of the solid-state imaging device and the stability of characteristics.
- the electrical resistance value of the conductive member is set so that a sufficient reading speed can be obtained with respect to the amount of charge generated in the photosensitive region, and the dark current does not increase by suppressing the heat generation amount of the conductive member.
- the electrical resistance value of the conductive member is set so that a sufficient reading speed can be obtained with respect to the amount of charge generated in the photosensitive region, and the dark current does not increase by suppressing the heat generation amount of the conductive member.
- an object of the present invention is to provide a solid-state imaging device that is less likely to cause variations in the electric resistance value of the conductive member of the potential gradient forming unit and can ensure the stability of operation and characteristics.
- the present inventors have conducted research on individual differences of conductive members, particularly variations in electrical resistivity (electrical resistance value), and as a result, have come to know the following events.
- the variation in the electrical resistivity of the conductive member varies depending on the value of the electrical resistivity. For example, when a conductive member made of polysilicon is used as the conductive member, variation is less likely to occur when the electrical resistivity is set low, and variation is likely to occur when the electrical resistivity is set high. It shows the tendency. Therefore, if the electrical resistivity of the conductive member is set to a value that hardly causes variation, the variation is reduced.
- the value set in consideration of the variation is not necessarily a value that ensures the stability of the operation and characteristics of the solid-state imaging device, it is difficult to solve the above-described problems.
- the present invention is a solid-state imaging device, and generates a charge in response to light incidence and has a substantially rectangular shape in which a planar shape is formed by two long sides and two short sides.
- a photoelectric conversion unit having a plurality of photosensitive regions juxtaposed in a first direction and a conductive member disposed to face the plurality of photosensitive regions, and one short side of the photosensitive region
- a potential gradient forming unit that forms a potential gradient increased along the second direction from the first to the other short side, and the charges transferred from the plurality of photosensitive regions, respectively, and transferred in the first direction
- a charge output section for outputting, a conductive member extending in the second direction between both ends in the second direction and having a first electrical resistivity, and between the both ends in the second direction A second region extending and having a second electrical resistivity smaller than the first electrical resistivity; And Nde.
- the conductive member includes a first region having a first electrical resistivity and a second region having a second electrical resistivity smaller than the first electrical resistivity. . Since the first region and the second region have different electric resistivities, variation in electric resistivity is less likely to occur in either one of the first region and the second region than in the other. For this reason, when it sees in the whole electroconductive member, the dispersion
- the electrical resistance of the conductive member is represented by a combined resistance in which the electrical resistance of the first region and the electrical resistance of the second region are connected in parallel. Therefore, the value of the combined resistance composed of the electrical resistance in the first region and the electrical resistance in the second region may be set to a value that ensures the stability of the operation and characteristics of the solid-state imaging device. For this reason, the electrical resistance value of the conductive member can be easily set to a value that ensures the stability of the operation and characteristics of the solid-state imaging device, and does not affect the suppression of variation.
- the conductive member may be made of polysilicon doped with impurities, and the second region may have a higher impurity concentration than the first region.
- the conductive member made of polysilicon includes a first region and a second region having different electrical resistivity. Therefore, it is possible to ensure the stability of the operation and characteristics of the solid-state imaging device while suppressing variations in electrical resistivity of the conductive member.
- the conductive member includes a plurality of first regions and a plurality of second regions, and the first regions and the second regions may be alternately arranged along the first direction. In this case, the charge reading speed and the amount of heat generated by the conductive member become substantially uniform in the first direction, and the operation and characteristics of the solid-state imaging device are further stabilized.
- the second area may be arranged corresponding to each photosensitive area. In this case, the charge readout speed and the amount of heat generated by the conductive member become substantially uniform in each photosensitive region, and the operation and characteristics of the solid-state imaging device are further stabilized.
- the potential gradient forming unit may further include a pair of electrodes respectively connected to both ends over the first direction.
- the potentials at both ends of the conductive member are substantially uniform over the first direction, and the potential gradient is formed substantially uniformly over the first direction.
- the present invention it is possible to provide a solid-state imaging device in which the electric resistance value of the conductive member of the potential gradient forming portion is unlikely to vary and the stability of operation and characteristics can be ensured.
- FIG. 1 is a plan view showing the configuration of the solid-state imaging device according to the present embodiment.
- FIG. 2 is a diagram illustrating a cross-sectional configuration along the line II-II in FIG.
- FIG. 3 is a diagram illustrating a cross-sectional configuration along the line III-III in FIG.
- FIG. 4 is a timing chart of each input signal in the solid-state imaging device according to the present embodiment.
- FIG. 5 is a potential diagram for explaining charge accumulation and discharge operations at each time in FIG.
- FIG. 6 is a diagram showing the relationship between the impurity concentration and the electrical resistivity in polysilicon.
- FIG. 7 is a plan view showing a configuration of a modified example of the solid-state imaging device according to the present embodiment.
- FIG. 1 is a plan view showing the configuration of the solid-state imaging device according to the present embodiment.
- FIG. 2 is a diagram illustrating a cross-sectional configuration along the line II-II in FIG.
- FIG. 3 is a diagram illustrating a cross-sectional configuration along the line III-III in FIG.
- the solid-state imaging device 1 includes a photoelectric conversion unit 2, a potential gradient forming unit 3, a plurality of buffer gate units 4, a plurality of transfer units 5, and a shift register 6 as a charge output unit. ing.
- the solid-state imaging device 1 can be used as, for example, a light detection unit of a spectroscope.
- the photoelectric conversion unit 2 has a plurality of photosensitive regions 7 that generate charges in response to light incidence.
- the planar shape of each photosensitive region 7 has a substantially rectangular shape formed by two long sides and two short sides.
- the plurality of photosensitive regions 7 are juxtaposed in a first direction intersecting the long side (here, arranged in an array in a one-dimensional direction along the short side).
- An isolation region (not shown) is disposed between the adjacent photosensitive regions 7 to electrically isolate the photosensitive regions 7 from each other.
- the first direction is orthogonal to the long side.
- the potential gradient forming unit 3 includes a conductive member 8 and a pair of electrodes 9a and 9b.
- the potential gradient forming unit 3 forms a potential gradient that is increased along the second direction from one short side to the other short side of each photosensitive region 7.
- the conductive member 8 is disposed so as to face each photosensitive region 7.
- the electrodes 9a and 9b are disposed at both ends of the conductive member 8 in the second direction.
- the electrode 9a is disposed at the end portion on the one short side
- the electrode 9b is disposed at the end portion on the other short side.
- the electrodes 9a and 9b are disposed inside the ends of the conductive member 8 in the second direction.
- the electrodes 9a and 9b may be disposed at the ends of the conductive member 8 in the second direction.
- the conductive member 8 includes a plurality of first regions 8a and a plurality of second regions 8b.
- the first region 8a extends between the electrodes 9a and 9b in the second direction and has a first electrical resistivity.
- the second region 8b extends between the electrodes 9a and 9b in the second direction and has a second electrical resistivity lower than the first electrical resistivity.
- the first regions 8a and the second regions 8b are alternately arranged along the first direction.
- the plurality of second regions 8 b are arranged at the same pitch as the plurality of photosensitive regions 7.
- the plurality of second regions 8 b are arranged corresponding to each photosensitive region 7.
- the electrical resistance of the conductive member 8 is represented by a combined resistance in which the electrical resistance of the first region 8a and the electrical resistance of the second region 8b are connected in parallel.
- Each buffer gate portion 4 is arranged for each photosensitive region 7 on the other short side. Each buffer gate portion 4 is adjacent to the corresponding photosensitive region 7 in the second direction. That is, the plurality of buffer gate portions 4 are juxtaposed in the first direction on the other short side. Isolation regions (not shown) are arranged between the adjacent buffer gates 4 to electrically isolate the buffer gates 4 from each other. Each buffer gate unit 4 acquires the charge generated and accumulated in the corresponding photosensitive region 7 and transfers it to each transfer unit 5.
- Each transfer unit 5 is arranged for each buffer gate unit 4. Each transfer unit 5 is adjacent to the corresponding buffer gate unit 4 in the second direction. That is, the plurality of transfer units 5 are juxtaposed in the first direction on the other short side. Isolation regions (not shown) are arranged between the adjacent transfer units 5 to electrically separate the transfer units 5 from each other. Each transfer unit 5 acquires the charge transferred from the corresponding buffer gate unit 4 and transfers it to the shift register 6.
- the shift register 6 is adjacent to each transfer unit 5 in the second direction. That is, the shift register 6 is disposed on the other short side.
- the shift register 6 acquires the charges transferred from the transfer units 5, transfers them in the first direction, and sequentially outputs them to the amplifier unit 10.
- the electric charge output from the shift register 6 is converted into a voltage by the amplifier unit 10 and output to the outside of the solid-state imaging device 1 as a voltage for each photosensitive region 7.
- the photoelectric conversion unit 2, the potential gradient forming unit 3, the plurality of buffer gate units 4, the plurality of transfer units 5, and the shift register 6 are formed on the semiconductor substrate 20 as shown in FIG.
- the semiconductor substrate 20 includes a p-type semiconductor layer 21 serving as a base, a plurality of n-type semiconductor layers 22, 23, 25, and 27 formed on one side of the p-type semiconductor layer 21, and a plurality of n ⁇ -type semiconductor layers 24. , 26 and p + type semiconductor layers 28, 29.
- the semiconductor substrate 20 includes a p + type semiconductor layer 30 formed on one surface side of the p type semiconductor layer 21.
- Si is used as the substrate material.
- “High impurity concentration” means that the impurity concentration is, for example, about 1 ⁇ 10 17 cm ⁇ 3 or more. By attaching “+” to the conductivity type, “high impurity concentration” is indicated. “Low impurity concentration” means that the impurity concentration is about 1 ⁇ 10 15 cm ⁇ 3 or less, for example. By attaching “ ⁇ ” to the conductivity type, “low impurity concentration” is indicated.
- Examples of n-type impurities include arsenic and phosphorus, and examples of p-type impurities include boron.
- each n-type semiconductor layer 22 forms a pn junction with the p-type semiconductor layer 21, and each photosensitive region 7 is configured by each n-type semiconductor layer 22.
- Each photosensitive region 7 generates an electric charge in response to light incident from each n-type semiconductor layer 22 side.
- the planar shape of each n-type semiconductor layer 22 is a substantially rectangular shape formed by two long sides and two short sides, and the planar shape corresponds to the planar shape of each photosensitive region 7.
- the plurality of n-type semiconductor layers 22 are juxtaposed in the first direction.
- a p + type semiconductor layer 30 is disposed between the adjacent n type semiconductor layers 22, and an isolation region between the photosensitive regions 7 is formed by the p + type semiconductor layer 30 (see FIG. 3). ).
- the conductive member 8 is disposed on each n-type semiconductor layer 22.
- the conductive member 8 is made of a material that transmits light (here, polysilicon), and is formed on each n-type semiconductor layer 22 via an insulating layer (not shown).
- Electrodes 9a and 9b are connected to both ends of the conductive member 8 in the second direction, respectively.
- the electrodes 9a and 9b are connected to both ends of the first region 8a and the second region 8b in the second direction, respectively.
- the conductive member 8 and the electrodes 9a and 9b are formed so as to extend in the first direction and extend over each n-type semiconductor layer 22 (see FIG. 1).
- the conductive member 8 constitutes a so-called resistive gate.
- a potential difference is applied between the electrodes 9a and 9b (voltage is applied)
- the conductive member 8 is directed from one short side of the n-type semiconductor layer 22 to the other short side (along the second direction).
- A) a higher potential gradient is formed.
- the electrode 9a is supplied with a signal MGL from a control circuit (not shown), and the electrode 9b is supplied with a signal MGH from a control circuit (not shown).
- the signal MGL and the signal MGH are at the L level, no potential gradient is formed in the conductive member 8.
- the applied voltage of the signal MGL at the H level is different from the applied voltage of the signal MGH at the H level.
- the applied voltage of the signal MGH at the H level is higher than the applied voltage of the signal MGL at the H level. For this reason, when the signal MGL and the signal MGH are at the H level, a potential gradient increased along the second direction is formed in the conductive member 8.
- Each n-type semiconductor layer 23 is arranged for each n-type semiconductor layer 22 on the other short side. Each n-type semiconductor layer 23 is adjacent to the corresponding n-type semiconductor layer 22 in the second direction. That is, the plurality of n-type semiconductor layers 23 are juxtaposed in the first direction on the other short side. Each n-type semiconductor layer 23 constitutes each buffer gate portion 4. As in the case of the n-type semiconductor layer 22, ap + -type semiconductor layer 30 is disposed between the adjacent n-type semiconductor layers 23, and an isolation region between the buffer gate portions 4 is configured.
- An electrode 41 is disposed on each n-type semiconductor layer 23.
- the electrode 41 is formed on each n-type semiconductor layer 23 via an insulating layer (not shown).
- the electrode 41 extends in the first direction and is formed so as to cover each n-type semiconductor layer 23.
- the electrode 41 may be formed for each n-type semiconductor layer 23.
- the electrode 41 is supplied with the signal BG, and the buffer gate unit 4 is driven.
- Each n ⁇ type semiconductor layer 24 is arranged for each n type semiconductor layer 23.
- Each n ⁇ type semiconductor layer 24 is adjacent to the corresponding n type semiconductor layer 23 in the second direction. That is, the plurality of n ⁇ type semiconductor layers 24 are juxtaposed in the first direction on the other short side.
- the n-type semiconductor layer 25 is disposed for each n ⁇ -type semiconductor layer 24.
- Each type semiconductor layer 25 is adjacent to the corresponding n ⁇ type semiconductor layer 24 in the second direction. That is, the plurality of n-type semiconductor layers 25 are juxtaposed in the first direction on the other short side.
- Each n ⁇ type semiconductor layer 24 and each n type semiconductor layer 25 constitute each transfer unit 5.
- p + -type semiconductor layers 30 are arranged between the adjacent n ⁇ -type semiconductor layers 24 and between the adjacent n-type semiconductor layers 25, respectively.
- An isolation region is configured.
- An electrode 42 is disposed on each n ⁇ type semiconductor layer 24.
- the electrode 42 is formed on the n ⁇ type semiconductor layer 24 via an insulating layer (not shown).
- An electrode 43 is disposed on each n-type semiconductor layer 25.
- the electrode 43 is formed on the n-type semiconductor layer 25 via an insulating layer (not shown).
- the electrodes 42 and 43 extend in the first direction and are formed so as to extend over the n ⁇ type semiconductor layers 24 and the n type semiconductor layers 25.
- the electrodes 42 and 43 may be formed for each n ⁇ type semiconductor layer 24 and for each n type semiconductor layer 25.
- a signal TG is given to the electrode 42 and the electrode 43, and the transfer unit 5 is driven.
- Each n ⁇ type semiconductor layer 26 is arranged for each n type semiconductor layer 25. Each n ⁇ type semiconductor layer 26 is adjacent to the corresponding n type semiconductor layer 25 in the second direction. The plurality of n ⁇ -type semiconductor layers 26 are juxtaposed in the first direction on the other short side. Each n-type semiconductor layer 27 is arranged for each n ⁇ -type semiconductor layer 26. Each n-type semiconductor layer 27 is adjacent to the corresponding n ⁇ -type semiconductor layer 26 in the second direction. The n-type semiconductor layers 27 are juxtaposed in the first direction on the other short side. The adjacent n ⁇ type semiconductor layer 26 and the adjacent n type semiconductor layer 27 are in contact with each other. The plurality of n ⁇ type semiconductor layers 26 and the plurality of n type semiconductor layers 27 constitute the shift register 6.
- An electrode 44 is disposed on each n ⁇ type semiconductor layer 26.
- the electrode 44 is formed on the n ⁇ type semiconductor layer 26 via an insulating layer (not shown).
- An electrode 45 is disposed on each n-type semiconductor layer 27.
- the electrode 45 is formed on the n-type semiconductor layer 27 via an insulating layer (not shown).
- the electrodes 44 and 45 are formed for each n ⁇ type semiconductor layer 26 and for each n type semiconductor layer 27.
- a signal PG is supplied to each electrode 44 and each electrode 45 to drive the shift register 6.
- the p + type semiconductor layer 28 is adjacent to the n type semiconductor layer 22 in the second direction on the one short side.
- the p + type semiconductor layer 29 is adjacent to the n type semiconductor layer 27 in the second direction.
- the p + type semiconductor layers 28 and 29 electrically isolate the plurality of n type semiconductor layers 22, 23, 25 and 27 and the plurality of n ⁇ type semiconductor layers 24 and 26 from other portions of the semiconductor substrate 20. .
- Each of the insulating layers described above is made of a material that transmits light, for example, a silicon oxide film.
- Each n-type semiconductor layer 23, 25, 27, and each n ⁇ -type semiconductor layer 24, 26, except for each n-type semiconductor layer 22, may be shielded from light by arranging a light shielding member. In this case, generation of unnecessary charges is prevented.
- FIG. 4 is a timing chart of each input signal in the solid-state imaging device according to the present embodiment.
- FIGS. 5A to 5C are potential diagrams for explaining the charge accumulation and discharge operations at each time in FIG.
- the potential ⁇ 22 of the n-type semiconductor layer 22 is the p + -type semiconductor layer. 28 and the n ⁇ type semiconductor layer 24, and the potential ⁇ 23 of the n-type semiconductor layer 23 becomes deeper than the potential ⁇ 22.
- wells having potentials ⁇ 22 and ⁇ 23 are formed (see FIG. 5A). In this state, when light is incident on the n-type semiconductor layer 22 to generate charges, the generated charges are accumulated in the wells of the potentials ⁇ 22 and ⁇ 23.
- the potential ⁇ 26 of the n ⁇ -type semiconductor layer 26 becomes deeper than the potential ⁇ 25, and the potential ⁇ 27 of the n-type semiconductor layer 27 is the potential. It becomes deeper than ⁇ 26. Thereby, wells with potentials ⁇ 26 and ⁇ 27 are formed. The electric charge accumulated in the well having the potential ⁇ 25 moves to the well having the potential ⁇ 27. That is, the charge transferred from the transfer unit 5 is acquired by the shift register 6 (see FIG. 5C).
- the charges acquired in the shift register 6 are sequentially transferred in the first direction in the charge transfer period TP and output to the amplifier unit 10.
- the charge transfer in the first direction in the shift register 6 is performed using the signal PG or the like.
- FIG. 6 is a diagram showing the relationship between impurity concentration and electrical resistivity in polysilicon, where the horizontal axis represents the impurity concentration and the vertical axis represents the electrical resistivity.
- the conductive member 8 is made of polysilicon to which impurities are added.
- a curve P1 in FIG. 6 shows a change characteristic of the electrical resistivity with respect to the concentration of the impurity added to the polysilicon.
- the curve P1 shows a tendency that the electrical resistivity decreases and the slope becomes gentle as the impurity concentration increases.
- the gentle slope of the curve P1 means that even if the impurity concentration varies, the electrical resistivity hardly varies.
- the curve P1 has straight portions P1a and P1b having a constant inclination.
- the relationship between the electrical resistivity and the impurity concentration is constant, and the variability of the electrical resistivity is also constant.
- the straight line portion P1b is located in a region having a higher impurity concentration than the straight line portion P1a.
- the inclination of the straight line portion P1b is gentler than that of the straight line portion P1a, and the electric resistivity on the straight line portion P1b is less likely to vary than the electric resistivity on the straight line portion P1a.
- the electrical resistance of the conductive member 8 that is, the value of the combined resistance of the first region 8a and the second region 8b, is set to a value that ensures the stability of the operation and characteristics of the solid-state imaging device 1.
- the value of the electrical resistance of the conductive member 8 is set so that a sufficient reading speed can be obtained with respect to the amount of charge generated in the photosensitive region 7 and the amount of heat generated by the conductive member 8 is suppressed so that the dark current does not increase. ing.
- the average electrical resistivity of the entire conductive member 8 corresponding to the set value of the electrical resistance of the conductive member 8 is a predetermined value on the straight line portion P1a.
- the second electrical resistivity is set to a value smaller than the predetermined value and on the straight line portion P1b.
- the first electrical resistivity is set to a value larger than the predetermined value so that the average electrical resistivity of the entire conductive member 8 is the predetermined value.
- the set value of the first electrical resistivity is a value on the straight line portion P1a.
- the second electric resistivity is less likely to vary than the predetermined value on the straight line portion P1a. Since both the predetermined value and the value of the first electrical resistivity are on the straight line portion P1a, the ease of variation is the same between the predetermined value and the value of the first electrical resistivity. For this reason, compared with the case where the electrical resistivity of the whole conductive member 8 is uniformly set to the predetermined value, variation in the electrical resistance of the conductive member 8 is suppressed to be low.
- the conductive member 8 includes the first region 8a having the first electrical resistivity and the second region 8b having the second electrical resistivity smaller than the first electrical resistivity. Contains. Since the first region 8a and the second region 8b have different electric resistivities, their variations are also different.
- the conductive member 8 of the present embodiment is made of polysilicon to which impurities are added, and the second region 8b is unlikely to vary due to the nature of the polysilicon. For this reason, variation in electrical resistivity is suppressed to a low level when viewed as a whole of the conductive member 8.
- the electrical resistance of the conductive member 8 is represented by a combined resistance in which the electrical resistance of the first region 8a and the electrical resistance of the second region 8b are connected in parallel. Therefore, the value of the combined resistance composed of the electrical resistance of the first region 8a and the electrical resistance of the second region 8b may be set to a predetermined value that ensures the stability of the operation and characteristics of the solid-state imaging device 1. In the present embodiment, by adjusting the first electrical resistivity while setting the second electrical resistivity to a value that is unlikely to vary, the electrical resistance of the conductive member 8 is stabilized in the operation and characteristics of the solid-state imaging device 1. It is easily adjusted to a value that ensures the performance. For this reason, the constraint condition regarding the electrical resistance value of the conductive member 8 does not affect the suppression of the variation due to the second region 8b.
- the conductive member 8 includes a plurality of first regions 8a and a plurality of second regions 8b, and the first regions 8a and the second regions 8b are alternately arranged along the first direction. Yes. As a result, the charge reading speed and the amount of heat generated by the conductive member 8 become substantially uniform in the first direction, and the operation and characteristics of the solid-state imaging device 1 are further stabilized.
- the second area 8b is arranged corresponding to each photosensitive area 7. As a result, the charge readout speed and the amount of heat generated by the conductive member become substantially uniform in each photosensitive region 7, and the operation and characteristics of the solid-state imaging device 1 are further stabilized.
- the potential gradient forming unit 3 includes a pair of electrodes 9a and 9b connected to both ends of the conductive member 8 in the first direction.
- the electrodes 9a and 9b are formed so as to extend over the respective photosensitive regions 7. Yes.
- the potentials at both ends of the conductive member 8 are substantially uniform over the first direction and the potential gradient is formed substantially uniformly over the first direction, so that the operation and characteristics of the solid-state imaging device 1 are more stable.
- the second region 8b is arranged corresponding to each photosensitive region 7, but is not limited thereto.
- the second region 8 b may be arranged for each of the plurality of photosensitive regions 7.
- the electrical resistance of the conductive member 8 set so as to ensure the stability of operation and characteristics is set to be equivalent to that of the solid-state imaging device 1 shown in FIG.
- the sum of the areas of the first regions 8a and the sum of the areas of the second regions 8b are set to be equal to the respective sums in the solid-state imaging device 1 shown in FIG. Therefore, in the solid-state imaging device 1 shown in FIG.
- the individual areas of the first region 8a and the second region 8b can be set large, and the conductive member 8 can be easily formed.
- a plurality of second regions 8 b may be arranged for each photosensitive region 7. In this case, the charge reading speed and the amount of heat generated by the conductive member 8 become more uniform in the first direction.
- the conductive member 8 and the electrodes 9a and 9b are formed so as to extend in the first direction and extend over the respective photosensitive regions 7, but may be formed by being divided into a plurality of parts.
- the photosensitive regions 7 are arranged in an array in a one-dimensional direction along the short side, but are also arranged in a direction along the long side and arranged in an array in the two-dimensional direction along the short side direction and the long side direction. May be.
- the solid-state imaging device 1 is a surface incident type in which light is incident from the n-type semiconductor layer 22 side, but is not limited thereto.
- the solid-state imaging device 1 may be a back-illuminated type in which light enters from the p-type semiconductor layer 21 side.
- the present invention can be used as a light detection means of a spectroscope.
- SYMBOLS 1 Solid-state imaging device, 2 ... Photoelectric conversion part, 3 ... Potential gradient formation part, 6 ... Shift register, 7 ... Photosensitive area
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- General Physics & Mathematics (AREA)
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- Solid State Image Pick-Up Elements (AREA)
Abstract
Description
Claims (5)
- 固体撮像装置であって、
光入射に応じて電荷を発生し且つ平面形状が二つの長辺と二つの短辺とによって形作られる略矩形状をなし、前記長辺に交差する第1方向に並置された複数の光感応領域を有する光電変換部と、
前記複数の光感応領域に対向して配置された導電性部材を有し、前記光感応領域の一方の前記短辺側から他方の前記短辺側に向かう第2方向に沿って高くされた電位勾配を形成する電位勾配形成部と、
前記複数の光感応領域からそれぞれ転送された電荷を取得し、前記第1方向に転送して出力する電荷出力部と、を備え、
前記導電性部材は、前記第2方向での両端部間を前記第2方向に伸び且つ第1電気抵抗率を有する第1領域と、前記両端部間を前記第2方向に伸び且つ前記第1電気抵抗率よりも小さい第2電気抵抗率を有する第2領域と、を含んでいる。 - 請求項1に記載の固体撮像装置であって、
前記導電性部材は、不純物が添加されたポリシリコンからなり、
前記第2領域は、前記不純物の濃度が前記第1領域に比して高い。 - 請求項1又は2に記載の固体撮像装置であって、
前記導電性部材は、複数の前記第1領域及び複数の前記第2領域を含み、
前記第1領域と前記第2領域とは、前記第1方向に沿って交互に配置されている。 - 請求項3に記載の固体撮像装置であって、
前記第2領域は、前記光感応領域毎に対応して配置されている。 - 請求項1~4のいずれか一項に記載の固体撮像装置であって、
前記電位勾配形成部は、前記第1方向にわたって前記両端部にそれぞれ接続された一対の電極を更に含んでいる。
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KR1020137012884A KR101887715B1 (ko) | 2011-01-14 | 2011-11-11 | 고체 촬상 장치 |
CN201180065078.6A CN103314441B (zh) | 2011-01-14 | 2011-11-11 | 固体摄像装置 |
EP11855455.9A EP2665097B1 (en) | 2011-01-14 | 2011-11-11 | Semiconductor imaging device |
US13/979,172 US8841714B2 (en) | 2011-01-14 | 2011-11-11 | Solid state imaging device |
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JP2011005890A JP5452511B2 (ja) | 2011-01-14 | 2011-01-14 | 固体撮像装置 |
JP2011-005890 | 2011-01-14 |
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US (1) | US8841714B2 (ja) |
EP (1) | EP2665097B1 (ja) |
JP (1) | JP5452511B2 (ja) |
KR (1) | KR101887715B1 (ja) |
CN (1) | CN103314441B (ja) |
TW (1) | TW201230316A (ja) |
WO (1) | WO2012096051A1 (ja) |
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TWI583195B (zh) * | 2012-07-06 | 2017-05-11 | 新力股份有限公司 | A solid-state imaging device and a solid-state imaging device, and an electronic device |
JP6306989B2 (ja) | 2014-09-09 | 2018-04-04 | 浜松ホトニクス株式会社 | 裏面入射型固体撮像装置 |
KR20220090844A (ko) | 2020-12-23 | 2022-06-30 | 조창현 | 락커키 센서 활용 샤워용품 제공기 |
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- 2011-01-14 JP JP2011005890A patent/JP5452511B2/ja active Active
- 2011-11-11 KR KR1020137012884A patent/KR101887715B1/ko active IP Right Grant
- 2011-11-11 EP EP11855455.9A patent/EP2665097B1/en active Active
- 2011-11-11 CN CN201180065078.6A patent/CN103314441B/zh active Active
- 2011-11-11 US US13/979,172 patent/US8841714B2/en active Active
- 2011-11-11 WO PCT/JP2011/076091 patent/WO2012096051A1/ja active Application Filing
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US20130292742A1 (en) | 2013-11-07 |
EP2665097B1 (en) | 2018-05-30 |
KR101887715B1 (ko) | 2018-08-10 |
JP2012146916A (ja) | 2012-08-02 |
EP2665097A1 (en) | 2013-11-20 |
TWI563644B (ja) | 2016-12-21 |
KR20140001906A (ko) | 2014-01-07 |
CN103314441B (zh) | 2016-01-27 |
US8841714B2 (en) | 2014-09-23 |
EP2665097A4 (en) | 2014-07-30 |
JP5452511B2 (ja) | 2014-03-26 |
CN103314441A (zh) | 2013-09-18 |
TW201230316A (en) | 2012-07-16 |
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