WO2012091498A1 - Dispositif à semi-conducteur flexible/extensible comprenant une électrode en graphène, procédé de réduction de la résistance de contact entre une couche semi-conductrice et une électrode en graphène, et interconnecteur en graphène - Google Patents

Dispositif à semi-conducteur flexible/extensible comprenant une électrode en graphène, procédé de réduction de la résistance de contact entre une couche semi-conductrice et une électrode en graphène, et interconnecteur en graphène Download PDF

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WO2012091498A1
WO2012091498A1 PCT/KR2011/010326 KR2011010326W WO2012091498A1 WO 2012091498 A1 WO2012091498 A1 WO 2012091498A1 KR 2011010326 W KR2011010326 W KR 2011010326W WO 2012091498 A1 WO2012091498 A1 WO 2012091498A1
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graphene
semiconductor layer
layer
electrode
contact resistance
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Korean (ko)
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안종현
홍병희
장석재
장호욱
이원호
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성균관대학교산학협력단
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    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
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    • H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
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    • H01L29/78684—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys
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    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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    • H10K30/81—Electrodes
    • H10K30/82—Transparent electrodes, e.g. indium tin oxide [ITO] electrodes
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
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    • Y02E10/549—Organic PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
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    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present application relates to a flexible / stretchable semiconductor device comprising a graphene electrode, a method of reducing contact resistance between a semiconductor layer and a graphene electrode in the device, and a graphene interconnector.
  • TFTs Transparent and flexible thin-film transistors
  • Semiconducting materials such as organics, conductive oxides and carbon nanotubes are expected to be good candidates for potential applications [Ref .: Cao, Q; Zhu, ZT; Lemaitre, MG; Xia, MG; Shim, M .; Rogers, JA Appl. Phys. Lett. 2006, 88 , 113511.
  • ITO Indium Tin Oxide
  • the present inventors easily manufacture a graphene film having excellent electrical, optical, and mechanical properties to a large area, thereby easily manufacturing a large area graphene transparent electrode using a process such as transfer, patterning, and etching of the graphene film. And using such graphene, a flexible / stretchable substrate comprising a flexible and stretchable substrate, a semiconductor layer formed on the substrate, and a stretchable graphene electrode formed on the semiconductor layer. In the chuble semiconductor device and the device, a method of reducing contact resistance between the graphene electrode and the semiconductor layer is provided.
  • an object of the present invention is to provide a graphene interconnector and an electronic device having flexibility, flexibility, and transparency using the same.
  • a flexible (flexible) stretchable (stretchable) substrate a semiconductor layer formed on the substrate, and a stretchable graphene electrode formed on the semiconductor layer
  • a flexible / stretchable semiconductor device can be provided.
  • a method of reducing contact resistance between a semiconductor layer and a graphene electrode formed thereon (1) removing a native oxide film between the semiconductor layers before forming the graphene electrode, (2) the Forming a contact area between the graphene electrode and the semiconductor layer as wide as possible, (3) forming a buffer layer between the graphene electrode and the semiconductor layer, and (4) contact resistance on the graphene electrode
  • a method for reducing contact resistance between a semiconductor layer and a graphene electrode including one or more selected from the group consisting of forming a reduction layer.
  • a third aspect of the present application the elastic substrate; A plurality of elements formed on the elastic substrate; And a graphene interconnector interconnecting the plurality of devices.
  • the present application it is possible to provide a flexible / stretchable semiconductor device using a flexible and stretchable substrate and a stretchable graphene electrode, and in the above device, the semiconductor layer and the graphene formed thereon
  • the stretchable graphene electrode can be used to further improve the electrical characteristics of the flexible / stretchable semiconductor device.
  • the present invention can provide an electronic device having a graphene interconnect and stretch, flexibility and transparency using the same.
  • a flexible / stretchable semiconductor device having excellent flexibility in electrical and optical properties may be manufactured.
  • a large-area flexible silicon thin film semiconductor device can be easily manufactured, and in particular, the device can be easily manufactured in a flexible semi-transparent large area, and can be applied to various electric and electronic devices.
  • the flexible silicon thin film semiconductor device may be used as a thin film transistor, and thus may be applied to a liquid crystal display (LCD), a photovoltaic device, an organic light emitting device (OLED), a sensor, a memory, or an integrated circuit.
  • FIG. 1 is a schematic diagram illustrating a manufacturing process of a flexible / stretchable semiconductor device manufactured according to an exemplary embodiment of the present disclosure.
  • FIG. 2 is a schematic diagram illustrating a manufacturing process of a flexible / stretchable semiconductor device manufactured according to an exemplary embodiment of the present disclosure.
  • FIG 3 is a cross-sectional view of a flexible / stretchable semiconductor device according to an embodiment of the present disclosure.
  • FIG. 4 is a cross-sectional view of a flexible / stretchable semiconductor device according to an embodiment of the present disclosure.
  • 5A and 5B are cross-sectional views of a flexible / stretchable semiconductor device according to one embodiment of the present disclosure.
  • FIG. 6 is a schematic diagram illustrating a manufacturing process of a graphene electrode in a Si FET according to an embodiment of the present application.
  • 7A is an optical image of an array of hybrid TFTs manufactured according to one embodiment of the present application.
  • 7B is a graph showing optical light transmissivity of each portion of a device made according to one embodiment of the present disclosure.
  • FIG. 8A is a graph illustrating the performance of a device before and after BOE treatment under a 0.1 V drain voltage in a flexible / stretchable semiconductor device according to an embodiment of the present disclosure.
  • FIG. 8B is a graph showing resistance in the on- state (R on ) as a function of channel length at different gate voltages for a flexible / stretchable semiconductor device according to one embodiment of the present disclosure.
  • 9A is a graph illustrating transfer characteristics of a single crystal Si TFT using various electrodes including Cr / Au, graphene, and ITO according to an embodiment of the present disclosure.
  • FIG. 9B is a graph showing current-voltage characteristics of a device having a graphene electrode showing ohmic contact and resistance-independent current-voltage characteristics according to an embodiment of the present disclosure.
  • FIG. 10A illustrates sheet resistance before and after ITO annealing in a flexible / stretchable semiconductor device according to an exemplary embodiment of the present disclosure.
  • 10B is a graph of a probe measurement of a graphene electrode after transferring onto a SiO 2 wafer according to an embodiment of the present disclosure.
  • FIG. 11 is a graph showing on / off ratios of 10 4 , 10 5, and 10 2 in the flexible / stretchable semiconductor device manufactured in accordance with the example embodiment.
  • FIG. 11 is a graph showing on / off ratios of 10 4 , 10 5, and 10 2 in the flexible / stretchable semiconductor device manufactured in accordance with the example embodiment.
  • FIG. 12A illustrates a device before and during a bending test in a flexible / stretchable semiconductor device in accordance with one embodiment of the present application.
  • FIG. 12B illustrates a change in the performance of a transistor before bending, during bending, and after bending in a 20 mm radius corresponding to 0.4% tensile and compressive strain in a flexible / stretchable semiconductor device according to one embodiment of the present disclosure.
  • FIG. 13 is a graph showing electron transfer characteristics of a FET having a large contact area manufactured according to an embodiment of the present disclosure.
  • FIG 14 is a graph showing the transfer characteristics of the FET having a graphene electrode before and after the formation of Au nanoparticles prepared according to an embodiment of the present application.
  • FIG. 15 is a graph illustrating a transfer characteristic of a FET having graphene electrodes before and after forming an Au contact layer on a graphene thin film manufactured according to an embodiment of the present disclosure.
  • 16 is a cross-sectional view of an electronic device including a graphene interconnect in accordance with an embodiment of the present disclosure.
  • 17 is a cross-sectional view of an electronic device including a graphene interconnect in accordance with an embodiment of the present disclosure.
  • FIG. 18 is a cross-sectional view of an electronic device including a graphene interconnect in accordance with an embodiment of the present disclosure.
  • FIG. 19 is a cross-sectional view of an electronic device including a graphene interconnect in accordance with an embodiment of the present disclosure.
  • 20 is a diagram illustrating an electronic device pattern including a graphene interconnector according to an embodiment of the present disclosure.
  • 21 is a schematic diagram illustrating a method of manufacturing an electronic device including a graphene interconnector according to an embodiment of the present disclosure.
  • 22 is an image of an electronic device including a graphene interconnect according to one embodiment of the present disclosure.
  • FIG. 23 is a stretch test image of an electronic device including a graphene interconnector according to an embodiment of the present disclosure.
  • 24 is a graph showing a transfer curve of an electronic device including a graphene interconnector and a logarithmic scale according to an embodiment of the present disclosure.
  • 25 is a current-voltage curve of an electronic device including a graphene interconnect according to one embodiment of the present disclosure.
  • 26 is a graph illustrating electrical characteristics according to strain of an electronic device including a graphene interconnector according to an exemplary embodiment of the present disclosure.
  • a first aspect of the present application is a flexible / stretchable semiconductor, comprising a flexible and stretchable substrate, a semiconductor layer formed on the substrate, and a stretchable graphene electrode formed on the semiconductor layer.
  • An element can be provided.
  • the flexible and stretchable substrate may be polydimethylsiloxane (PDMS), polymethylmethacrylate (PMMA), polycarbonate, polyethylene, polypropylene (polypropylene) It may be selected from the group consisting of polyprolylene, polystyrene, polyimide, cyclo olefin copolymer (COC), parylene and combinations thereof, but is not limited thereto. no.
  • PDMS polydimethylsiloxane
  • PMMA polymethylmethacrylate
  • COC cyclo olefin copolymer
  • the semiconductor layer may be an organic semiconductor or an inorganic semiconductor, but is not limited thereto.
  • the inorganic semiconductor may be selected from, for example, Si, carbon nanotubes, graphene, compound semiconductors, oxide semiconductors, and combinations thereof, but is not limited thereto.
  • the oxide semiconductor is, for example, InGaZnO, ZnO, ZrInZnO, InZnO, ZnO, InGaZnO 4 , ZnInO, ZnSnO, In 2 O 3 , Ga 2 O 3 , HfInZnO, GaInZnO, HfO 2 , SnO 2 , WO 3 , TiO 2 , Ta 2 O 5 , In 2 O 3 SnO 2 , MgZnO, ZnSnO 3 , ZnSnO 4 , CdZnO, CuAlO 2 , CuGaO 2 , Nb 2 O 5 , TiSrO 3 and combinations thereof However, it is not limited thereto.
  • the organic semiconductor may be, for example, pentacene, alpha-6T (alpha-sexithiophene), F-CuPc (hexadecafluorcopper phthalocyanine), P3HT [poly (3-hexylthiophene)], and combinations thereof. It may include one selected from the group consisting of, but is not limited thereto.
  • the natural oxide film may be removed using a solution including one selected from the group consisting of HF, NH 4 F, standard chemical 1 (SC1), PAN, and combinations thereof, but is not limited thereto. It doesn't happen.
  • the graphene electrode may be provided as a stretchable and transparent electrode, the graphene electrode, for example, to be prepared using a large area graphene film prepared by chemical vapor deposition method May be, but is not limited thereto.
  • graphene is an excellent conducting material that can move electrons 100 times faster than silicon and carry about 100 times more current than copper.
  • graphene has the advantage that it is very easy to process one-dimensional or two-dimensional nanopattern consisting of only a relatively light element of carbon, by using this can not only control the semiconductor-conductor properties of graphene but also has a carbon
  • the variety of chemical bonds allows the manufacture of a wide range of functional devices, including sensors and memories.
  • the graphene electrode may be a transfer of a large-area graphene film synthesized by chemical vapor deposition, a large-area graphene using a process such as patterning and transfer of the large-area graphene film
  • a pin transparent electrode or a large area transparent electrode pattern can be easily manufactured, and a large area flexible, stretchable semiconductor device can be easily manufactured using such a large area graphene electrode or a transparent electrode pattern.
  • the device can be applied to various flexible, stretchable transparent electrical and electronic devices
  • the graphene electrode may be grown by chemical vapor deposition by providing a carbon source and heat to the metal catalyst layer for graphene growth, but is not limited thereto.
  • the metal catalyst layer is one selected from the group consisting of Ni, Co, Fe, Pt, Au, Al, Cr, Cu, Mg, Mn, Rh, Si, Ta, Ti, W, U, V and Zr, and stainless steel It may be to include the above, but is not limited thereto.
  • the metal catalyst layer may be in the form of a thin film, for example, about 1 nm to about 1,000 nm, about 1 nm to about 500 nm, about 1 nm to about 400 nm, or about 100 nm to about 400 nm thick It may be, but is not limited thereto.
  • the graphene film may be grown using the patterned metal catalyst layer, but is not limited thereto.
  • the transparent electrode may be made flexible by transferring the graphene film onto a transparent and / or flexible substrate or another transparent and / or flexible thin film.
  • the graphene film may be a transparent thin film having a thickness of about 0.1 nm to about 10 nm, but is not limited thereto.
  • the sheet resistance of the transparent electrode may be about 1 kW / sq to about 1,000 kW / sq, but is not limited thereto.
  • the transmittance of the transparent electrode may be about 70% or more, for example, about 70% or more to about 98% or less, but is not limited thereto.
  • the contact resistance between the semiconductor layer and the stretchable graphene electrode formed thereon may be reduced, and such contact resistance reduction may include (1) the Removing the native oxide film between the graphene electrode and the semiconductor layer, (2) forming the contact area with the semiconductor layer as wide as possible by the graphene electrode, (3) the graphene electrode and the semiconductor Forming a buffer layer between the layers, and (4) may be performed by a method comprising at least one selected from the group consisting of forming a contact resistance reducing layer on the graphene electrode, but is not limited thereto. .
  • the natural oxide film may be removed using a solution including one selected from the group consisting of HF, NH 4 F, standard chemical 1 (SC1), PAN, and combinations thereof, but is not limited thereto. It doesn't happen.
  • a method of reducing contact resistance between a semiconductor layer and a graphene electrode formed thereon (1) removing a natural oxide film between the graphene electrode and the semiconductor layer, and (2) the graphene. Forming a contact area between the pin electrode and the semiconductor layer as wide as possible, (3) forming a buffer layer between the graphene electrode and the semiconductor layer, and (4) reducing the contact resistance on the graphene electrode. It is possible to provide a method of reducing contact resistance between a semiconductor layer and a graphene electrode, including one or more selected from the group consisting of forming a layer.
  • the semiconductor layer may include an organic semiconductor or an inorganic semiconductor, but is not limited thereto.
  • each of the buffer layer and the contact resistance reducing layer in (3) and (4) may be formed including a conductive material, but is not limited thereto.
  • the conductive material may include one selected from the group consisting of ITO, IZO, Ti, Cu, Au, Pt, Ir, Cr, Mg, Ag, Ni, Al, and combinations thereof, but It is not limited.
  • an oxide film naturally generated between the semiconductor layer and the graphene electrode of the manufactured flexible / stretchable semiconductor device may be removed by treatment with a chemical solution.
  • the chemical solution for example, HF, NH 4 F, SC1 (standard chemical 1), but may be to include those selected from the group consisting of the PAN and combinations thereof, but is not limited thereto.
  • HF is used as a buffered oxide etch solution (BOE)
  • the ratio of HF and water may be used in a mixture of about 1: 200.
  • SC1 solution which is a mixture of NH 4 OH, H 2 O 2 , H 2 O, the mixture is mixed at a ratio of about 1: about 4: about 20 to about 40 ° C.
  • a buffered oxidizing solution having a ratio of NH 4 F and HF of about 7: about 1 is mixed with H 2 O at a ratio of about 1: about 5 to about 1: about 30: Can also be used.
  • the step of removing the oxide film naturally generated between the semiconductor layer and the graphene electrode of the flexible / stretchable semiconductor element by treatment with a chemical solution is as described above, after forming the graphene electrode.
  • the oxide film removing process may be performed, the oxide film formed after the semiconductor layer is formed may be removed by performing the oxide film removing process.
  • the semiconductor oxide film formed between the graphene electrode and the semiconductor layer was not removed, thereby increasing the contact resistance.
  • the resistance increase factor is caused by the removal of the natural oxide film, which is an insulating material, by the treatment with the chemical solution according to the present application. This can be removed. Therefore, the contact resistance between the graphene electrode and the semiconductor layer is reduced to improve the reliability of the device.
  • the contact resistance between the semiconductor layer and the graphene electrode may be reduced by increasing the contact area between the semiconductor layer and the graphene electrode.
  • the increase in the contact area between the semiconductor layer and the graphene electrode may be to form contact with the semiconductor layer in the widest possible area when the graphene electrode is formed, but is not limited thereto. no.
  • the source electrode and the drain electrode are formed using the graphene in the flexible / stretchable semiconductor device, the source electrode and the drain electrode are formed to cover the semiconductor layer as wide as possible. can do.
  • a buffer layer may be formed between the graphene electrode and the semiconductor layer to reduce contact resistance between the semiconductor layer and the graphene electrode.
  • the buffer layer may include a conductive material, and in particular, the conductive material may be a conductive material that is resistant to various etchant used during the device manufacturing process.
  • the conductive material may be selected from the group consisting of ITO, IZO, Ti, Cu, Au, Pt, Ir, Cr, Mg, Ag, Ni, Al, and combinations thereof, but is not limited thereto. It doesn't happen.
  • the buffer layer may have a thickness of several tens of nm. When the buffer layer including the conductive material is formed, the conductive material diffuses and penetrates into a defect of the natural vapor film between the semiconductor layer and the graphene electrode, thereby reducing contact resistance.
  • a contact resistance reduction layer may be formed on the graphene electrode to reduce the contact resistance of the graphene electrode.
  • the contact resistance reducing layer may be formed of a conductive material, and in particular, the conductive material may be a conductive material that is resistant to various etching liquids used in the device manufacturing process.
  • the conductive material may be selected from the group consisting of ITO, IZO, Ti, Cu, Au, Pt, Ir, Cr, Mg, Ag, Ni, Al, and combinations thereof, but is not limited thereto. It doesn't happen.
  • the contact resistance reducing layer may have a thickness of several tens of nm.
  • the contact resistance reduction layer formed on the graphene electrode is formed by using a conductive material resistant to an etchant that can be used in manufacturing the device, thereby adversely affecting the exposed graphene electrode by wet etching, that is, graphene. It may serve to prevent the occurrence of disconnection of the electrode due to damage to the electrode. Therefore, it is possible to compensate for the disadvantage that the characteristics of the semiconductor device decreases with time.
  • FIGS. 1 and 2 are schematic views showing a manufacturing process of a flexible, stretchable semiconductor device manufactured according to an embodiment of the present application.
  • the flexible, stretchable semiconductor device has a lower graphene electrode 21, 22, an insulator layer 31, 32 on a flexible, stretchable substrate 11, 12. ), And may include semiconductor layers 41 and 42, and may include oxide layers 41 ′ and 42 ′ that are naturally generated on the semiconductor layer 41.
  • the flexible and stretchable substrates 11 and 12 may be suitably used by those skilled in the art using materials known in the art, and may include polydimethylsiloxane (PDMS) and polymethylmethacrylate.
  • PDMS polydimethylsiloxane
  • PMMA polymethylmethacrylate
  • PMMA polycarbonate
  • polyethylene polyethylene
  • polyprolylene polystyrene
  • polyimide polyimide
  • parylene parylene
  • the semiconductor layers 41 and 42 may be organic semiconductors or inorganic semiconductors, but are not limited thereto.
  • the inorganic semiconductor may be selected from the group consisting of Si, carbon nanotubes, graphene, compound semiconductors, oxide semiconductors, and combinations thereof, wherein the oxide semiconductor is, for example, InGaZnO, ZnO.
  • the organic semiconductor may be formed of, for example, pentacene, alpha-6T (alpha-sexithiophene), F-CuPc (hexadecafluorcopper phthalocyanine), P3HT (poly (3-hexylthiophene)), and combinations thereof. It may be selected from the group.
  • the stretchable graphene electrodes 51 and 52 may be grown by chemical vapor deposition by providing a carbon source and heat to the metal catalyst layer for graphene growth, but are not limited thereto. It is not.
  • the metal catalyst layer is Ni, Co, Fe, Pt, Au, Al, Cr, Cu, Mg, Mn, Rh, Si, Ta, Ti, W, U, V and Zr, and stainless It may include one or more selected from the group consisting of steel, but is not limited thereto.
  • the metal catalyst layer may be in the form of a thin film, for example, about 1 nm to about 1,000 nm, about 1 nm to about 500 nm, about 1 nm to about 400 nm, or about 100 nm to about 400 nm thick It may be, but is not limited thereto.
  • the graphene film may be grown using the patterned metal catalyst layer, but is not limited thereto.
  • the transparent electrode may be made flexible by transferring the graphene film onto a transparent and / or flexible substrate or another transparent and / or flexible thin film.
  • the graphene film may be a transparent thin film having a thickness of about 0.1 nm to about 10 nm, but is not limited thereto.
  • the sheet resistance of the graphene electrode may be about 1 kW / sq to about 1,000 kW / sq, but is not limited thereto.
  • the permeability of the graphene electrode may be about 70% or more, for example, about 70% or more to about 98% or less, but is not limited thereto.
  • the oxide film 41 ′ naturally formed on the semiconductor layer 41 or the graphene electrode 52 of the manufactured flexible / stretchable semiconductor device is removed by a treatment using a chemical solution.
  • the chemical solution may be selected from the group consisting of HF, NH 4 F, standard chemical 1 (SC1), PAN, and combinations thereof.
  • SC1 buffered oxide etch solution
  • the ratio of HF and water may be used in a mixture of about 1: 200.
  • SC1 solution which is a mixture of NH 4 OH, H 2 O 2 , H 2 O
  • the mixture is mixed at a ratio of about 1: about 4: about 20 to about 40 ° C. to about 80 ° C.
  • H 2 O 2 is mixed at a ratio of about 19: 1 to about 65 ° C. It can be used by etching for about 30 minutes.
  • a buffered oxidizing solution (BOE) having a ratio of NH 4 F and HF of about 7: about 1 is mixed with H 2 O at a ratio of about 1: about 5 to about 1: about 30: Can also be used.
  • the process of removing the oxide film 41 ′ naturally generated on the semiconductor layer 41 of the flexible / stretchable semiconductor device by treatment with a chemical solution is shown in FIG. 1.
  • the oxide film 41 ′ formed after the formation of the 41 may be subjected to the oxide film removing process and the graphene electrode 52 may be formed, as shown in FIG. 2, the graphene electrode 52 is formed and patterned. After that, a process of removing the naturally occurring oxide film 42 'may be performed.
  • the semiconductor oxide film formed between the graphene electrode and the semiconductor layer was not removed and became a factor of increasing the contact resistance
  • the natural oxide films 41 'and 42' which are insulating films, were treated by the chemical solution according to the present application. As this is eliminated, the resistance increasing factor can be eliminated. Therefore, the contact resistance between the graphene electrodes 51 and 52 and the semiconductor layers 41 and 42 may be reduced, thereby improving reliability of the device.
  • the flexible / stretchable semiconductor device includes a lower graphene electrode 23, an insulator layer 33, a semiconductor layer 43, and an upper graphene on the flexible / stretchable substrate 13.
  • An electrode 53 may be included, and a contact area between the semiconductor layer 43 and the upper graphene electrode 53 may be increased.
  • the flexible, stretchable substrate 13 may comprise polydimethylsiloxane (PDMS), polymethylmethacrylate (PMMA), polycarbonate, polyethylene, poly It may be selected from the group consisting of propylene (polyprolylene), polystyrene, polyimide, cyclo olefin copolymer (COC), parylene and combinations thereof, but is not limited thereto. It doesn't happen.
  • PDMS polydimethylsiloxane
  • PMMA polymethylmethacrylate
  • COC cyclo olefin copolymer
  • the semiconductor layer 43 may be an organic semiconductor or an inorganic semiconductor, but is not limited thereto.
  • the contact area increase may be to form the graphene electrode in the semiconductor layer, but is not limited thereto.
  • the flexible / stretchable semiconductor device includes a lower graphene electrode 24, an insulator layer 34, a semiconductor layer 44, and an upper graphene on the flexible / stretchable substrate 14. It may include a pin electrode 54, and may include a buffer layer 44 ′ deposited between the semiconductor layer 44 and the upper graphene electrode 54.
  • the flexible / stretchable semiconductor device includes a lower graphene electrode 25, an insulator layer 35, a semiconductor layer 45, and an upper graphene on the flexible / stretchable substrate 15. It may include a pin electrode 55, it may include a contact resistance reduction layer 55 'deposited on the graphene electrode 55.
  • the lower graphene electrode 26 and the insulator layer 36 are included on the flexible / stretchable substrate 16, and the semiconductor layer 46, such as an oxide or silicon, is formed.
  • a structure in which the contact resistance reduction layer 56 ′ is deposited on the source-drain and the wiring lines may be formed to improve conductivity.
  • the contact resistance reduction layer 56 ′ may be manufactured using a metal, and the contact resistance reduction layer 56 ′ using the metal may be formed by vacuum deposition or electroplating using a solution, or a self-assembly method.
  • the advantage of this structure is that it can prevent the penetration of ions and gases into the semiconductor layer and improve the conductivity.
  • the flexible / stretchable substrates 14, 15, and 16 may be made of polydimethylsiloxane (PDMS), polymethylmethacrylate (PMMA), polycarbonate, polyethylene ( polyethylene, polyprolylene, polystyrene, polyimide, cyclo olefin copolymer (COC), parylene, and combinations thereof.
  • PDMS polydimethylsiloxane
  • PMMA polymethylmethacrylate
  • COC cyclo olefin copolymer
  • parylene parylene
  • the semiconductor layer 44, 45, 46 may be an organic semiconductor or an inorganic semiconductor, but is not limited thereto.
  • each of the buffer layer 44 ′ and the contact resistance reducing layer 55 ′ and 56 ′ may be a conductive material resistant to an etchant, but is not limited thereto.
  • the conductive material may be selected from, for example, ITO, IZO, Ti, Cu, Au, Pt, Ir, Cr, Mg, Ag, Ni, Al, and combinations thereof, but is not limited thereto. no.
  • each of the buffer layer 44 'and the contact resistance reducing layer 55', 56 ' is formed using a conductive material including a metal, between the graphene electrodes 54, 55, 56 or graphene electrode
  • the metal molecules or particles of the conductive material may be diffused on (54, 55, 56) so that metal atoms remain between the graphene electrodes or on the graphene electrodes, thereby reducing contact resistance.
  • each of the contact resistance reducing layers 55 'and 56' is formed using a conductive material resistant to an etchant, thereby adversely affecting the exposed graphene electrodes 55 and 56 by wet etching, that is, graphene. It may serve to prevent the disconnection of the electrode due to the damage of the electrodes (55, 56). Therefore, it is possible to compensate for the disadvantage that the characteristics of the semiconductor device decreases with time.
  • a third aspect of the present application the elastic substrate; A plurality of elements formed on the elastic substrate; And a graphene interconnector interconnecting the plurality of devices.
  • the plurality of elements formed on the elastic substrate of the electronic device according to the third aspect of the present application may include the flexible / stretchable semiconductor element according to the first aspect of the present application, and the flexible / stretchable
  • the semiconductor device may include, but is not limited to being formed by a method of reducing the contact resistance between the semiconductor layer and the graphene electrode according to the second aspect of the present application.
  • the graphene interconnector may be formed of a doped graphene layer, but is not limited thereto.
  • the graphene interconnector may be formed by stacking a plurality of graphene layers, but is not limited thereto.
  • the graphene interconnector may be formed including a graphene layer and metal nanoparticles deposited on the graphene layer, but is not limited thereto.
  • the metal nanoparticles are Ag, Au, Pt, Pd, Fe, Ni, Al, Sb, W, Tb, Dy, Gd, Eu, Nd, Pr, Sr, Mg, Cu, Zn, Co, Mn , Cr, V, Mo, Zr, Ba and combinations thereof may be selected from, but is not limited thereto.
  • the graphene interconnector may be formed by alternately stacking a plurality of metal nanoparticles and a graphene layer, but is not limited thereto.
  • the metal nanoparticles are Ag, Au, Pt, Pd, Fe, Ni, Al, Sb, W, Tb, Dy, Gd, Eu, Nd, Pr, Sr, Mg, Cu, Zn, Co, Mn , Cr, V, Mo, Zr, Ba and combinations thereof may be selected from, but is not limited thereto.
  • the elastomer substrate is a thermoplastic elastomer, styrenic materials, olefenic materials, polyolefins, polyurethane thermoplastic elastomers , Polyamides, synthetic rubbers, polydimethylsiloxane (PDMS), polybutadiene, polyisobutylene, poly (styrene-butadiene-styrene) (poly (styrene- butadiene-styrene)), polyurethane (polyurethanes), polychloroprene (polychloroprene), silicone and combinations thereof may be selected from the group consisting of, but is not limited thereto.
  • PDMS polydimethylsiloxane
  • PDMS polybutadiene
  • polyisobutylene poly (styrene-butadiene-styrene) (poly (styrene- butadiene-styrene)), polyurethan
  • the elastic substrate may be deformed at a strain of about 1% to about 30%, but is not limited thereto. Deforming the elastic substrate may apply an external force.
  • the elastic substrate can be deformed by bending, rolling, bending or expanding. Deformation of the elastomer substrate may also be achieved by thermal expansion caused by raising the temperature of the elastomer substrate through a thermal method.
  • the graphene interconnector connecting two devices may be formed of a doped graphene layer.
  • the dopant added to the graphene layer may be, for example, a P-type dopant or an N-type dopant, but is not limited thereto. Pure graphene does not have a bandgap, but dopant-added graphene has a bandgap, which makes it possible to control the electronic structure. Therefore, it is very useful for making devices such as field effect transistors.
  • the dopant is an ionic liquid, ionic base, and may be used at least one selected from acids compounds and the group consisting of an organic molecular compounds, the dopant may be, for example, NO 2 BF 4 , NOBF 4 , NO 2 SbF 6 , HCl, H 2 PO 4 , H 3 CCOOH, H 2 SO 4 , HNO 3 , AuCl 3, Nafion, SOCl 2 , Br 2 , polyvinylidene fluoride (PVDF), dichloro One or more selected from the group consisting of dicyanoquinone, oxone, dimyristoyl phosphatidylinositol and trifluoromethanesulfonimide may be used, but is not limited thereto.
  • PVDF polyvinylidene fluoride
  • the graphene interconnector connecting two devices may be formed by stacking graphene layers.
  • the graphene layer may be grown by chemical vapor deposition (CVD) by providing a carbon source and heat to the transition metal catalyst layer for graphene growth.
  • CVD chemical vapor deposition
  • the transition metal catalyst layer is Ni, Co, Fe, Pt, Au, Al, Cr, Cu, Mg, Mn, Rh, Si, Ta, Ti, W, U, V, Zr, stainless steel and these May be selected from the group consisting of.
  • the number of layers of graphene may be controlled by repeating the transfer process.
  • the sheet resistance increases from about 500 mW / sq to about 50 mW / sq to about 300 mW / sq to about 10 mW / sq as the number of layers of graphene increases to one, two, and three layers.
  • the transmittance may decrease from about 97.1% to about 91.2% for light with a wavelength of about 550 nm.
  • the chemical vapor deposition method may include rapid thermal chemical vapor deposition (RTCVD), inductively coupled plasma-chemical vapor deposition (ICP-CVD), low pressure chemical vapor deposition; LPCVD), atmospheric pressure chemical vapor deposition (APCVD), metal organic chemical vapor deposition (MOCVD), and plasma-enhanced chemical vapor deposition (PECVD) methods. It may include, but is not limited to now.
  • RTCVD rapid thermal chemical vapor deposition
  • ICP-CVD inductively coupled plasma-chemical vapor deposition
  • LPCVD low pressure chemical vapor deposition
  • APCVD atmospheric pressure chemical vapor deposition
  • MOCVD metal organic chemical vapor deposition
  • PECVD plasma-enhanced chemical vapor deposition
  • the graphene may grow graphene by adding a gaseous carbon source and heat treating the metal catalyst layer.
  • a metal catalyst layer is placed in a chamber and a carbon source such as carbon monoxide, ethane, ethylene, ethanol, acetylene, propane, butane, butadiene, pentane, pentene, cyclopentadiene, hexane, cyclohexane, benzene, toluene, etc.
  • a carbon source such as carbon monoxide, ethane, ethylene, ethanol, acetylene, propane, butane, butadiene, pentane, pentene, cyclopentadiene, hexane, cyclohexane, benzene, toluene, etc.
  • heat treatment is performed at a temperature of about 300 ° C. to about 2000 ° C.
  • graphene is generated while the carbon components present in the carbon source combine to form a hexagon
  • the method of forming the graphene on the metal catalyst layer is not limited to the chemical vapor deposition method, and in the exemplary embodiment of the present application, any method of forming the graphene on the metal catalyst layer may be used, and the present application may be performed on the metal catalyst layer. It will be appreciated that it is not limited to any particular method of forming graphene in.
  • the graphene interconnector connecting two devices may be formed by depositing metal nanoparticles.
  • the metal nanoparticles are Ag, Au, Pt, Pd, Fe, Ni, Al, Sb, W, Tb, Dy, Gd, Eu, Nd, Pr, Sr, Mg, Cu, Zn, Co, Mn , Cr, V, Mo, Zr, Ba and combinations thereof may be selected.
  • the graphene interconnector connecting between two devices may be formed by alternately stacking a plurality of metal nanoparticles and a graphene layer.
  • the metal nanoparticles are Ag, Au, Pt, Pd, Fe, Ni, Al, Sb, W, Tb, Dy, Gd, Eu, Nd, Pr, Sr, Mg, Cu, Zn, Co, Mn , Cr, V, Mo, Zr, Ba and combinations thereof may be selected.
  • the graphene interconnector When the length of the graphene interconnector becomes longer, there may be a problem due to the resistance generated in the graphene interconnect.
  • a dopant is added to the graphene, the graphene layer is laminated in multiple layers, The metal nanoparticles may be deposited on the graphene layer, and the metal nanoparticles and the graphene layer may be stacked a plurality of times to form a sandwich structure to reduce resistance.
  • FIG. 20 is a diagram illustrating an electronic device pattern according to an embodiment of the present disclosure.
  • a white rectangular pattern is a portion into which one element enters, and each of these elements is connected by an intermediate interconnect.
  • a circular pattern can be formed to absorb stress at the part where the pad and interconnect are connected to prevent the stress from being concentrated and broken.
  • Electronic devices according to the present invention can effectively integrate numerous functional devices and device components such as transistors, diodes, lasers, MEMS, NEMS, LEDS and OELDS.
  • the electronic device according to the invention has certain functional advantages over conventional rigid inorganic semiconductors.
  • First, electronic devices can be flexible, so they accept less structural damage caused by bending, bending and / or deformation than conventional rigid inorganic semiconductors.
  • the electronic devices herein can provide excellent thermal properties because they can freely expand and contact with device temperature cycling.
  • FIG. 6 is a schematic diagram illustrating a manufacturing process of Si FET based graphene.
  • Fabrication of TFTs forms a Ni catalyst layer of about 500 nm thickness on a SiO 2 / Si substrate having a thickness of at least 300 nm on top, and a gas mixture (CH 4 : H 2 : Ar containing a carbon source on the Ni catalyst layer). 50: 65: 200 sccm)
  • the graphene film was grown on the Ni catalyst layer in a quartz tube of 4 inches in diameter at 950 ° C under a supply.
  • the grown graphene film was about six layers, measured by optical transparency.
  • the sheet resistance of the graphene thin film was measured by 370 ⁇ 10 ⁇ / sq by a four-point probe.
  • the graphene thin film on the Ni / SiO 2 / Si wafer was transferred to PET ( ⁇ 200 ⁇ m) as a lower gate electrode.
  • Preparation of the Si channel material began by designating doped contact regions on a silicon-on-insulator (SOI) wafer (SOITEC Unibond; 100 nm thick upper single crystal silicon thin film, resistivity of 13.5-22.5 cm 3).
  • SOI silicon-on-insulator
  • the region designated as the SiO 2 mask ( ⁇ 100 nm) was coated with a phosphorus dopant such as P509 (Filmtronics) via a spin-on-dopant (SOD) method and subsequently annealed at 950 ° C. for 5 seconds.
  • P509 Fintronics
  • Doping concentration was determined to be 2 x 10 18 cm -3 by a hole measuring system.
  • the upper Si layer ⁇ 100 nm was transferred to the photosensitive epoxy layer ( ⁇ 500 nm thickness as a role of the adhesive layer and the gate electrode using a transfer printing method using a polydimethylsiloxane (PDMS) stamp. Transfer to a PET coated graphene gate electrode with a dielectric constant of ⁇ 3.1).
  • PDMS polydimethylsiloxane
  • the silicon oxide layer under the single crystal silicon thin film is removed by etching using a BOE solution, and then the single crystal silicon layer is epoxy number of the PET / graphene / epoxy resin laminate through a stamping method using a photocurable polymer material. Transcribed onto strata.
  • the single crystal silicon pattern was formed as a channel layer by removing and patterning the single crystal silicon layer in the remaining regions except for the region where the semiconductor element is formed.
  • a separate transparent graphene film prepared by the same method as described above was contacted with the PDMS stamp, and then transferred onto the epoxy resin layer by a stamping method.
  • a transparent semi-transparent silicon thin film semiconductor device was completed by forming a transparent source / drain electrode pattern electrically contacting each silicon region on the single crystal silicon thin film pattern through photolithography and etching.
  • the graphene film having a region of 1 cm x 1 cm to move the Si It was used as a source-drain electrode using a dry printing method similar to the method used to.
  • the transfer yield of Si and graphene was at least 99%.
  • the source-drain pattern was formed to a thickness of 1.2 mu m by an oxygen plasmman reactive ion etching process using a photoresist (AZ5214) mask pattern.
  • the enlarged image in FIG. 6 shows a schematic view of the manufactured device.
  • 7A shows an optical image of an array of hybrid TFTs positioned over the SKKU logo to show the level of optical translucency and mechanical flexibility.
  • 7b shows the optical light transmissivity of each part of the device between wavelengths of 400 and 800 nm.
  • the light transmittances of the Si channel region (Si / epoxy / graphene) and source / drain region (graphene / Si / epoxy / graphene) at 550 nm excluding the PET substrate influence are 52% and 38%, respectively.
  • Light transmission through the Si layer exhibits a rational fringe pattern caused by interference between the top and bottom surfaces of the silicon.
  • the light transmittance of the source / drain at 550 nm is the light in the channel region due to the graphene film corresponding to the six layers of graphene, since a single graphene layer leads to a 2.3% reduction in optical light transmittance in the visible wavelength range. 14% lower than light transmittance.
  • the quality of the graphene film was confirmed by Raman spectroscopy. Raman spectra taken from graphene films on SiO 2 substrates, such as graphene films on epoxy / PET substrates, show weak bond related D-band peaks indicating good overall graphene film quality.
  • 8A shows the performance of the device before and after BOE treatment under 0.1 V drain voltage.
  • the device shows a big difference before and after BOE treatment due to contact resistance.
  • 8B shows the resistance in the on- state R on as a function of channel length at different gate voltages. As determined from the intercept of the linear fit of R on vs L c , the contact resistance measured before BOE treatment was about 300 k ⁇ , while 2.5 k ⁇ after BOE treatment.
  • a thin film of gold was deposited in the center of the graphene electrode to find out why native oxide induces huge contact resistance when graphene is used as an S / D electrode, and why not.
  • the drastically improved device performance is due to the reduction in contact resistance.
  • This phenomenon can be explained by the change in the amount and work function of the carrier. Since graphene is an ultra-thin material, its thickness is similar to that of natural oxide, and the amount of charge carriers in graphene is not sufficient to tunnel through the native oxide. In addition, the change of the work function of graphene was observed in the natural oxide film before and after the deposition of silicon and gold.
  • FIG. 9A shows the transfer of a single crystal Si TFT using various electrodes each including Cr / Au (1), graphene (2) and ITO (3) having a channel length of 20 ⁇ m and a width of 50 ⁇ m under a drain voltage of 0.1 V.
  • FIG. A graph showing the characteristics, and the inset of FIG. 9A shows an optical microscope image of a device using graphene electrodes.
  • Devices using ITO as electrodes show mobility of 2 cm 2 / Vs and threshold voltages of 0.5 V, while devices using Cr / Au and graphene as electrodes move 350 cm 2 / Vs and 320 cm 2 / Vs
  • the diagrams show the 1 V and 2.5 V threshold voltages, respectively.
  • 10A is a view showing sheet resistance before and after ITO annealing in the flexible / stretchable semiconductor device according to this embodiment
  • FIG. 10B is a graph of probe measurement of graphene electrodes after transferring onto a SiO 2 wafer according to this embodiment. to be.
  • the device using the ITO electrode showed very low characteristics compared with the device using Cr / Au and graphene, which shows a high sheet resistance compared to the graphene (FIGS.
  • FIG. 11 is a log scale transfer curve of a device using various electrodes including Cr / Au (1), ITO (2) and graphene (3) each having a channel length of 20 ⁇ m and a width of 50 ⁇ m. Each device exhibits an on / off ratio of 10 4 , 10 2, and 10 5 .
  • graphene-based Si TFTs have excellent mechanical flexibility due to the robust bending characteristics of graphene electrodes. Bending tests were performed to verify the mechanical properties of these devices. 12A shows the device before and during the bending test. FIG. 12B shows the change in transistor performance before, during and after bending to a 20 mm radius corresponding to 0.4% tensile and compressive strain. Effective device mobility in the linear fashion was normalized to the value observed in the unfolded state ⁇ 0off as a function of deformation and bending radius. For this range of modifications, the device exhibited stable operation without significant change in ⁇ off / ⁇ 0eff . This suggests that graphene-based silicon transistors exhibit stable operation under high strain.
  • a semiconductor device was fabricated in the same manner as in Example 1 except that the graphene thin film was deposited with a 450 ⁇ m area. 13 is a graph showing the transfer characteristics of a FET having a large contact area manufactured according to the present embodiment.
  • Example 14 is a graph showing the transfer characteristics of the FET having graphene electrodes before and after the formation of Au nanoparticles prepared according to the present embodiment.
  • the semiconductor device was fabricated in the same manner as in Example 1, but by depositing Au 40 nm as a contact resistance reducing material on the graphene thin film.
  • 15 is a graph showing the transfer characteristics of the FET having graphene electrodes before and after the formation of the Au contact layer on the graphene thin film prepared according to the present embodiment.
  • FIG. 21 is a schematic view showing a method of manufacturing an electronic device according to the present embodiment.
  • the silicon layer after the doping process high temperature process
  • the base substrate using germanium and silicon oxide as a sacrificial layer using Su-8 as an adhesive layer
  • graphene is deposited on the base substrate to form an electrode and an interconnect
  • SU-8 is applied and patterned on the device as a protective layer
  • germanium which is a sacrificial layer below, is added to and removed from the water to float the device, and then peeled off with a rubber stamp (FIG. 21 (c)).
  • FIG. 21 (d) An image of the completed electronic device is shown in FIG. 22.
  • FIG. 23 is a stretching test image of the electronic device according to the present embodiment.
  • FIG. 23A At 0% strain of the rubber substrate, since the elements have a compressive strain, wrinkles are formed and compressed in the interconnect portion (FIG. 23A).
  • FIG. 23 (b) When pulled up to 10%, the tensile strain is greater than the compressive strain, and the interconnect portion is pulled tight, and the Poisson effect causes the compressive stress to be applied in a direction perpendicular to the direction in which the tensile strain is applied to further crease the inside of the pad ( Figure 23 (c)).
  • FIG. 23C It can be seen from FIG. 23C that substantial strain is applied to the interconnect. It may be possible to withstand these substantial strains because of the graphene interconnect.
  • 24 is a graph showing a transmission curve 2 of the electronic device according to the present embodiment and a log scale 1.
  • 25 is a current-voltage curve of the electronic device according to the present embodiment.
  • 26 is a graph showing electrical characteristics according to strain of the electronic device according to the present embodiment. As shown in FIG. 26, even when the strain of the rubber substrate is applied up to 10% and again down to 0%, the electrical properties hardly change.

Abstract

La présente invention concerne un dispositif à semi-conducteur flexible/extensible comprenant une électrode en graphène, un procédé de réduction de la résistance de contact entre une couche semi-conductrice et l'électrode en graphène dans le dispositif à semi-conducteur, et un interconnecteur en graphène.
PCT/KR2011/010326 2010-12-31 2011-12-29 Dispositif à semi-conducteur flexible/extensible comprenant une électrode en graphène, procédé de réduction de la résistance de contact entre une couche semi-conductrice et une électrode en graphène, et interconnecteur en graphène WO2012091498A1 (fr)

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