WO2012009998A1 - Convertisseur résonnant monté en série llc et son procédé d'excitation - Google Patents

Convertisseur résonnant monté en série llc et son procédé d'excitation Download PDF

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Publication number
WO2012009998A1
WO2012009998A1 PCT/CN2011/073148 CN2011073148W WO2012009998A1 WO 2012009998 A1 WO2012009998 A1 WO 2012009998A1 CN 2011073148 W CN2011073148 W CN 2011073148W WO 2012009998 A1 WO2012009998 A1 WO 2012009998A1
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Prior art keywords
switch
signal
transformer
turn
resonant converter
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Application number
PCT/CN2011/073148
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English (en)
Chinese (zh)
Inventor
范杰
王静
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中兴通讯股份有限公司
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Publication of WO2012009998A1 publication Critical patent/WO2012009998A1/fr

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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/337Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in push-pull configuration
    • H02M3/3376Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in push-pull configuration with automatic control of output voltage or current
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0048Circuits or arrangements for reducing losses
    • H02M1/0054Transistor switching losses
    • H02M1/0058Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P80/00Climate change mitigation technologies for sector-wide applications
    • Y02P80/10Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier

Definitions

  • FIG. 1 is a circuit diagram of a related art LLC series resonant converter composed of a synchronous rectification transistor, as shown in FIG. 1, wherein an inductor-inductor-capacitor (LLC) series resonant converter (Series-Parallel Resonance)
  • LLC inductor-inductor-capacitor
  • SPRC series-Parallel Resonance
  • the bridge circuit 110 uses a symmetrical half-bridge control method, and the upper and lower tubes are complementarily turned on, and the duty ratio is 50%;
  • the resonant circuit 120 is composed of a resonant capacitor Cr, a resonant inductor Lr, and a magnetizing inductance Lm to form a resonant body, and Lr can be used as a leakage of the transformer.
  • the sense circuit is composed of a pair of synchronous rectification transistors Q1 and Q2 connected to the output capacitor Co.
  • the converter 100 is a converter having a double resonance point. When Lr, Cr participates in resonance only, the high-frequency resonance point fr is generated, and Lm does not participate in resonance.
  • the frequency modulation controller 140 is also required.
  • the operating frequency of the converter, fin is the low frequency resonance point of the LLC series resonant converter, and fr is the high frequency resonance point of the LLC series resonant converter.
  • FIG. 2 is a schematic diagram showing the voltage and current waveforms of the main components of the prior art LLC series resonant converter operating in the fin ⁇ fs ⁇ fr region.
  • &81 and ⁇ , 82 are the gate drive signals of the two FETs S1 and S2 in the bridge circuit 110, respectively, i r , respectively the resonant inductor Lr and the magnetizing inductance
  • the current of Lm, i Q1 , i Q2 and Vg, SR1 , Vg, S R2 are the current waveform and the driving voltage waveform of the two synchronous rectifying transistors Q1 and Q2 in the rectifying circuit 130, respectively.
  • the resonant current i r increases inversely from zero, the field effect transistor S 1 begins to conduct forward, the primary side of the transformer is clamped, and the field current changes linearly.
  • the resonant current i r flows through S 1 and gradually rises in a sinusoidal form.
  • i r flows through Lm and the primary side of the transformer, transfers energy to the secondary side of the transformer, and outputs Vo.
  • the resonant current i r and the exciting current i m are equal, the current at the output is zero, that is, at time 11, the phase ends.
  • the resonant current i r and the exciting current i m are equal, and at this time, the two synchronous rectifying transistors Q1 and Q2 on the secondary side are both in an off state, and the output voltage Vo is supplied from the output capacitor Co.
  • the output voltage is no longer clamped to the primary side of the transformer, and the magnetizing inductance Lm begins to participate in resonance, forming a series resonance with Lr and Cr.
  • the period of this resonance is much larger than the period of resonance of Lr and Cr, and the slope of the resonant current is much smaller, so the primary current can be approximately constant during this process.
  • the synchronous rectifying transistor Q1 should be turned off at time t1.
  • FETs S1 and S2 are turned off and enter dead time.
  • the resonant current i r charges the parasitic capacitance of S1 and the parasitic capacitance of S2 discharges.
  • the output voltage clamps the primary side of the transformer, and the magnetizing inductance Lm is discharged at a constant voltage.
  • the diode of S2 is turned on, and the field effect transistor S2 is turned on under the condition of Zero Voltage Switching (ZVS).
  • ZVS Zero Voltage Switching
  • the same working process can be analyzed in the time interval of t3 ⁇ t ⁇ t4 and t4 ⁇ t ⁇ t5.
  • the same operating state and current waveform i Q2 as the synchronous rectification transistor Q1 also occurs on the synchronous rectification transistor Q2, and current 1 (21 and i Q2 constitute the output rectified current i rec . Because at t1 to t2 and t4 to t5, synchronization rectification transistor Q1 or Q2 the current decreases to zero, and all occurred in the FETs S1 or pre-S2 is turned off, so that their wave guide width TONGMAI Vg, Q1, Vg, Q 2 than the small FET S1 and S2.
  • the synchronous rectification drive signals V g , Q1 , Vg , Q 2 must refer to the corresponding half bridge FET control signals V & S1 , Vg , S2 , and Vg , sl , Vg , S2 behind or Cut in advance This ensures that the circuit can block the secondary side energy back to the primary side during the dead time by using the body diode inside the synchronous rectification transistor.
  • 3 is a waveform timing diagram of a prior art LLC series resonant converter in a state where a switching frequency is greater than or equal to a resonant frequency, as shown in FIG.
  • the side switch tube can realize zero voltage switch (ZVS) under any load, but the transformer magnetizing inductance Lm is clamped by the output voltage and does not participate in the whole resonance process. Therefore, the current on the secondary side synchronous rectifier of the transformer is continuous.
  • the output rectified current i rec is a quasi-sinusoidal absolute value waveform which is synchronized with the driving permanent waves of the synchronous rectifying transistors Q1 and Q2.
  • FIG. 4 is a circuit diagram of a synchronous rectification driving method of a prior art LLC series resonant converter.
  • the LLC series resonant converter 400 is provided with two reference voltages and two comparators. And 2 with the door.
  • the synchronous rectification transistor Q2 flows a current from the source to the drain, a channel resistance voltage drop is generated in its channel resistance.
  • the channel resistance voltage drop V ds ( .n ) is compared by the comparator 410 and the reference voltage V ref to generate the pulse wave signal Ve . m . V e .
  • the m signal and the drive signal V g , s2 of the FET S2 are processed by the AND gate 420 to obtain a drive signal of the synchronous rectification transistor Q2.
  • the synchronous rectifying transistors Q1 and Q2 of the rectifying circuit are driven by the same signals for driving the FETs S1, S2, respectively.
  • FIG. 5 it is a circuit diagram of another synchronous rectification driving method of the prior art LLC series resonant converter, compared with FIG.
  • the LLC series resonant converter 500 is equipped with two synchronous circuits (Syn) 510, two constant pulse width generators (ie, Forced Oscillation Technique, referred to as FOT) 520, and two OR gates 530.
  • FOT Forced Oscillation Technique
  • the synchronous circuit 510 and the fixed pulse width are generated.
  • the 520 generates a constant pulse width signal V FOT , which is determined by the resonance parameters Lr, Cr, and the rising edge of the pulse wave is synchronized with the signal V SYN through the synchronization circuit 510. Constant pulse width signal V FOT and pulse wave signal V e .
  • the FET driving signal S2 V g, s2 After treatment with the gate drive signal 420 synchronous rectification transistor Q2 is obtained.
  • the channel resistance voltage V ds (. n ) for the synchronous rectifying transistors Q1 and Q2 is compared with the reference voltage V ref .
  • the pulse wave signal V e generated after comparison is performed on the device 410. m is used to drive the synchronous rectification transistors Q1 and Q2 of the rectifier circuit.
  • the synchronous rectifying transistors Q1 and Q2 of the rectifying circuit are driven by the same signals for driving the FETs S1, S2, respectively.
  • the scheme of FIG. 5 is based on the scheme of FIG. 4, and the synchronous rectification driving device of the LLC series resonant converter at the time of light load is added, that is, when the operating frequency is less than the resonant frequency and the converter is connected to the light load, the resonance of the resonant circuit is utilized.
  • the parameter drives the synchronous rectification transistor to determine a constant pulse width signal.
  • the output rectification current of the resonant converter is intermittent at light load.
  • a primary object of the present invention is to provide an LLC series resonant converter and a driving method thereof to solve at least the above-mentioned problem of low reliability.
  • an LLC series resonant converter comprising: a bridge circuit connected to an input voltage and composed of at least two first switches; and a resonant circuit coupled to the bridge circuit, The first switch is driven; a transformer is coupled to the resonant circuit; and a rectifier circuit includes two sub-driving circuits, each of which includes: a second switch coupled to both ends of the secondary side of the transformer, configured to provide LLC series resonance a voltage output of the converter; a shutdown circuit configured to provide a shutdown signal to the second switch, comprising a current transformer connected in series between the secondary side of the transformer and the two second switches, configured to measure the flow through a current of the source-drain branch of the second switch to generate a turn-off signal; a pulse width processor configured to reduce a duty cycle of a power switch drive signal of the transformer primary side of the control terminal of the first switch to obtain an open signal Provided to the second switch.
  • a driving method of an LLC series resonant converter includes: a bridge circuit coupled to an input voltage and composed of at least two first switches; The circuit is coupled to the bridge circuit and is driven by the first switch; a transformer coupled to the resonant circuit; and a rectifier circuit including two sub-drive circuits, each comprising: a second switch coupled to the secondary side of the transformer Both ends are arranged to provide a voltage output of the LLC series resonant converter; a shutdown circuit is provided to provide a shutdown signal to the second switch, which includes a current transformer connected in series with the secondary side of the transformer and two Between the two switches, the current flowing through the source-drain branch of the second switch is measured to generate a turn-off signal; a pulse width processor is provided to reduce the primary power switch of the transformer at the control end of the first switch After the duty cycle of the signal, the turn-on signal is supplied to the second switch; the driving method includes: when the LLC series resonant converter
  • FIG. 1 A diagrammatic representation of the LLC series resonant converter of the present invention and the driving method thereof, because the current transformer is used to measure the current flowing through the source-drain branch of the second switch, so that the related art LLC series resonant converter achieves reliable current backflow.
  • the problem of lower sex improves the reliability at light loads.
  • FIG. 1 is a circuit diagram of a related art LLC series resonant converter composed of a synchronous rectification transistor
  • FIG. 2 is a prior art LLC series resonant converter operating in a fin ⁇ fs ⁇ fr region.
  • FIG. 3 is a waveform timing diagram of a prior art LLC series resonant converter in a state where a switching frequency is greater than or equal to a resonant frequency;
  • FIG. 4 is a prior art LLC series resonant converter
  • FIG. 6 is a circuit diagram of a synchronous rectification driving scheme of the LLC series resonant converter 600 according to the present invention, comprising: a bridge circuit 110 coupled to an input voltage Vin, which is composed of two first switches SI, S2; The oscillating circuit 120 is connected to the bridge circuit 110 and is driven by the first switches S1, S2; a transformer TX is coupled to the resonant circuit 120; and a rectifying circuit 60 includes two sub-driving circuits 601, 602, respectively: A second switch Q1, or Q2, coupled to both ends of the secondary side of the transformer Tx, is configured to provide a voltage output Vo of the LLC series resonant converter; a shutdown circuit configured to provide a switch to the second switch Q1 or Q2 Break signal V e .
  • m comprising a current transformer CT1 , CT2 , connected in series between the secondary side of the transformer Tx and the two second switches Q1 or Q2 , configured to measure the source-drain branch flowing through the second switch Q1 or Q2 Current to generate a turn-off signal V c . m; a pulse processor 610, to provide a reduced set transformer primary side power switch signal v driving the control terminal of the first switch S1 or S2, g, sl, v g, the duty ratio s2 to obtain Pulse ON signal v Give the second switch Q1 or Q2.
  • Method of driving the LLC series resonant converter comprising: when the LLC series resonant converter operation over the entire operating frequency range, the shutdown circuit to provide off signal V c to the second switch Q1 or Q2.
  • the pulse width processor 610 supplies an on signal V pulse to the second switch Q1 or Q2 (eg, V pulsel and V pulse2 in FIG. 6 ).
  • the rising edge of the output signal of the pulse width processor is synchronized with the rising edge of the corresponding driving signals of the power switches S1, S2.
  • the output rectified current i rec does not have a dead zone, so the on-time of the synchronous rectification transistor Q1 or Q2 corresponds to the on-time of the FETs S1 and S2, respectively.
  • the LLC series resonant converter uses the current transformers CT1 and CT2 to measure the current flowing through the source-drain branches of the second switches Q1, Q2, so that the related art LLC series resonant converter current inrush is reliable.
  • the problem of lower sex improves the reliability at light loads.
  • the bridge circuit 110 is a half bridge circuit or a full bridge circuit.
  • the resonant circuit 120 is composed of a resonant capacitor Cr, a resonant inductor Lr, and a magnetizing inductance Lm in series.
  • the resonant inductor is an independent external inductor Lr or a leakage inductance of the transformer Tx.
  • each of the shutdown circuits includes: a reference voltage source Vref, a current transformer CT1, CT2, a magnetic reset resistor R1, R3, a sample resistor R2, R4, and a diode D1.
  • a comparator 410 an OR gate 530
  • the primary input of the current transformers CT1, CT2 is connected to the input of the second switch Q1 or Q2, and the primary output is connected to the secondary side of the transformer Tx
  • the current transformer CT1, CT2 are connected with magnetic reset resistor R1 or R3 at both ends
  • magnetic reset resistors Rl, R3 are connected to the anode of diode D1 or D2 at one end, and the other end is grounded
  • parallel resistor R2 is connected between the cathode of diodes D1 and D2 and ground.
  • a reference voltage source Vref is connected in series between the first input terminal of the comparator 410 and the output terminal of the second switch Q1 or Q2, the second input terminal of the comparator 410 is connected to the negative electrode of the diode D1 or D2, and the comparator 410 is set to Comparing the voltage V c outputted by the diode D1 or D2 with the voltage Vref output by the reference voltage source Vref generates a turn-off signal
  • the pulse width processor 610 makes the duty ratio of the turn-on signal V pulse equal to or smaller than the turn-off signal V c .
  • the duty cycle of m the pulse between the first input of the OR gate 530 and the control terminal of the first switch S1 or S2
  • the wide processor 610, the second input of the OR gate 530 is coupled to the output of the comparator 410, and the output of the OR gate 530 is coupled to the control terminal of the second switch Q1 or Q2.
  • the driving mode of the second switch Q1 is: when the LLC series resonant converter operates over the entire frequency range, the current transformer CT1 (or CT2) is The current signal is converted to a voltage signal by a sample resistor R2 (or R4), and is output as a voltage V e via a diode D1 (or D2), and is compared with a voltage Vref of the reference voltage source Vref by a comparator 410 to generate a turn-off signal V e . m , turn off the signal V e . m and another turn-on signal V pu i se are processed by OR gate 530 to obtain a complete drive signal to drive second switch Q1 (or Q2).
  • the present embodiment uses two OR logic gates 530 to implement adaptive control of the synchronous rectification drive signals
  • the implementation of the specific circuit is not limited to such logic gate structures, and any logic function that can implement this OR logic function.
  • Circuit architecture is within the scope of the present invention.
  • the rectifier circuit has a simple structure and is easy to implement.
  • 7 and 8 are main waveform timing diagrams of an embodiment of the LLC series resonant converter proposed by the present invention. As shown in FIG. 7 and FIG. 8, the synchronous rectification driving timing operation diagram of the LLC series resonant converter of the present embodiment is between the frequency of fin and fr and the operating frequency is higher than fr. Wherein, the output signal V pulse of the monthly Yongkuan processor and the output signal V c of the comparator.
  • the turn-on of the drive signal is determined by the drive signal of the primary power switch, and the turn-off is determined by the output signal of the comparator.
  • the first switch S1 or S2 is a field effect transistor
  • the second switch Q1 or Q2 is a field effect transistor.
  • the input, output and control terminals of the first switch S1 (or S2) and the second switch Q1 (or Q2) are the drain, the source and the gate of the FET, respectively. FETs are low cost and easy to implement.
  • the LLC series resonant converter of the present invention and the driving method thereof have the advantages that the driving signal of the synchronous rectifier is completely synchronized with the current signal, the duty ratio is lost less, and the efficiency of the converter is improved.
  • the transformer amplifies the current signal into a large voltage signal, which is not easily disturbed by the ground voltage peak, thereby effectively avoiding the pulse converter V c at the light load.
  • An error occurs in m , which causes the switches in the synchronous rectification circuit to be driven incorrectly. Therefore, the scheme is more resistant to interference.
  • the synchronous rectification driving method uses the output current of the converter to realize the driving control of the synchronous rectification transistor, which not only simplifies the design of the conventional driving circuit, but also effectively prevents the synchronous rectifier from passing through or output voltage backflow. Further improved reliability.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Rectifiers (AREA)

Abstract

La présente invention a trait à un convertisseur résonnant monté en série LLC qui inclut : un circuit à pont qui est couplé à une tension d'entrée (Vin) et qui est constitué d'au moins deux premiers commutateurs (S1, S2), un circuit résonnant qui est couplé au circuit à pont et qui est excité par les premiers commutateurs (S1, S2), un transformateur (Tx) qui est couplé au circuit résonnant, et un circuit de redressement (60) qui comprend deux circuits d'excitation secondaires (601, 602). Les deux circuits d'excitation secondaires (601, 602) incluent respectivement : un second commutateur (Q1, Q2) qui est couplé aux deux bornes de l'enroulement secondaire du transformateur (Tx) et qui fournit la tension de sortie (Vo) du convertisseur résonnant monté en série LLC, un circuit de blocage qui fournit au second commutateur (Q1, Q2) un signal de blocage (VCOM1, VCOM2) et qui comprend un transformateur de courant (CT1, CT2), et un processeur de largeur d'impulsion (610) permettant de générer un signal d'activation (Vpulse1, Vpulse2) et de fournir le signal d'activation au second commutateur (Q1, Q2) après avoir réduit le facteur de marche du signal d'excitation de commutateur d'énergie primaire de transformateur (Vg,s1, Vg,s2) de la borne de commande du premier commutateur (S1, S2). Le transformateur de courant (CT1, CT2) est monté en série entre l'enroulement secondaire du transformateur (Tx) et le second commutateur (Q1, Q2) et mesure le courant circulant dans la branche d'électrode source-drain du second commutateur (Q1, Q2) de manière à générer le signal de blocage (VCOM1, VCOM2).
PCT/CN2011/073148 2010-07-23 2011-04-21 Convertisseur résonnant monté en série llc et son procédé d'excitation WO2012009998A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201010238057.7 2010-07-23
CN201010238057.7A CN101895201B (zh) 2010-07-23 2010-07-23 Llc串联谐振变换器及其驱动方法

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WO2012009998A1 true WO2012009998A1 (fr) 2012-01-26

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CN109586581A (zh) * 2018-12-15 2019-04-05 华南理工大学 用于全桥dc/dc变换器同步整流的数字化实现装置
TWI694670B (zh) * 2019-02-15 2020-05-21 群光電能科技股份有限公司 諧振式電源轉換裝置
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CN114337290A (zh) * 2021-02-07 2022-04-12 华为数字能源技术有限公司 功率电路中副边整流电路的驱动电路
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