WO2010116703A1 - 窒化物系半導体素子およびその製造方法 - Google Patents
窒化物系半導体素子およびその製造方法 Download PDFInfo
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- WO2010116703A1 WO2010116703A1 PCT/JP2010/002465 JP2010002465W WO2010116703A1 WO 2010116703 A1 WO2010116703 A1 WO 2010116703A1 JP 2010002465 W JP2010002465 W JP 2010002465W WO 2010116703 A1 WO2010116703 A1 WO 2010116703A1
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Definitions
- the present invention relates to a nitride semiconductor device and a method for manufacturing the same.
- the present invention relates to a GaN-based semiconductor light-emitting element such as a light-emitting diode and a laser diode in the wavelength range of the visible range such as ultraviolet to blue, green, orange and white.
- a GaN-based semiconductor light-emitting element such as a light-emitting diode and a laser diode in the wavelength range of the visible range such as ultraviolet to blue, green, orange and white.
- Such light-emitting elements are expected to be applied to display, illumination, optical information processing fields, and the like.
- the present invention also relates to a method for manufacturing an electrode used for a nitride semiconductor device.
- a nitride semiconductor having nitrogen (N) as a group V element is considered promising as a material for a short-wavelength light-emitting element because of its large band gap.
- LEDs blue light emitting diodes
- Green LEDs and semiconductor lasers made of GaN-based semiconductors have also been put into practical use (see, for example, Patent Documents 1 and 2).
- FIG. 1 schematically shows a unit cell of GaN.
- FIG. 2 shows four basic vectors a 1 , a 2 , a 3 , and c that are generally used to represent the surface of the wurtzite crystal structure in the 4-index notation (hexagonal crystal index).
- the basic vector c extends in the [0001] direction, and this direction is called “c-axis”.
- a plane perpendicular to the c-axis is called “c-plane” or “(0001) plane”.
- c-axis” and “c-plane” may be referred to as “C-axis” and “C-plane”, respectively.
- a c-plane substrate that is, a substrate having a (0001) plane on the surface is used as a substrate on which a GaN-based semiconductor crystal is grown.
- polarization electrical polarization
- the “c-plane” is also called “polar plane”.
- a piezoelectric field is generated along the c-axis direction in the InGaN quantum well in the active layer.
- a substrate having a nonpolar plane, for example, a (10-10) plane called m-plane perpendicular to the [10-10] direction is used. It is being considered.
- “-” attached to the left of the number in parentheses representing the Miller index means “bar”.
- the m-plane is a plane parallel to the c-axis (basic translation vector a 3 ) and is orthogonal to the c-plane.
- Ga atoms and nitrogen atoms exist on the same atomic plane, and therefore no polarization occurs in the direction perpendicular to the m plane.
- the semiconductor multilayer structure is formed in a direction perpendicular to the m-plane, no piezoelectric field is generated in the active layer, so that the above problem can be solved.
- the m-plane is a general term for the (10-10) plane, the (-1010) plane, the (1-100) plane, the (-1100) plane, the (01-10) plane, and the (0-110) plane.
- the X plane may be referred to as a “growth plane”, and a semiconductor layer formed by the X plane growth may be referred to as an “X plane semiconductor layer”.
- a GaN-based semiconductor element grown on an m-plane substrate can exhibit a remarkable effect as compared with that grown on a c-plane substrate, but has the following problems. That is, a GaN-based semiconductor device grown on an m-plane substrate has a higher contact resistance than that grown on a c-plane substrate, which uses a GaN-based semiconductor device grown on an m-plane substrate. It has become a major technical obstacle.
- the inventor of the present application diligently studied to solve the problem that the contact resistance of the GaN-based semiconductor element grown on the non-polar m-plane is high. And found a means to make it possible to reduce mounting stress.
- the present invention has been made in view of the above points, and its main purpose is to reduce contact resistance in a nitride-based semiconductor light-emitting device fabricated by m-plane growth and to suppress defects due to flip-chip mounting.
- the object is to provide a light emitting device.
- a first light-emitting device of the present invention is a light-emitting device comprising a mounting substrate having wiring and a nitride-based semiconductor light-emitting element flip-chip mounted on the mounting substrate, the nitride-based semiconductor light-emitting device Comprises a nitride-based semiconductor multilayer structure having a p-type semiconductor region whose surface is an m-plane, and an electrode provided on the p-type semiconductor region, and the p-type semiconductor region is made of Al x In y Ga z.
- N (x + y + z 1, x ⁇ 0, y ⁇ 0, z ⁇ 0) made of a semiconductor, and the electrode includes an Mg layer in contact with the surface of the p-type semiconductor region, and the electrode is connected to the wiring Has been.
- the electrode has a metal layer provided on the Mg layer.
- the metal layer is made of at least one metal selected from the group consisting of Pt, Mo, Pd, and Ag.
- an Mg alloy layer is formed between the Mg layer and the metal layer.
- the thickness of the Mg layer is 15 nm or more and 45 nm or less.
- the electrode includes a first metal layer provided on the Mg layer, a second Mg layer provided on the first metal layer, and a second metal provided on the second Mg layer. And a layer.
- the first metal layer is formed of at least one metal selected from the group consisting of Pt, Mo, Pd, and Ag
- the second metal layer is Pt, Mo, Pd, and It is made of at least one metal selected from the group consisting of Ag.
- the thickness of the second Mg layer is 15 nm or more.
- the thickness of the Mg layer is 2 nm or more and 15 nm or less.
- the electrode has a metal layer provided on the Mg layer.
- the electrode includes a first metal layer provided on the Mg layer, a second Mg layer provided on the first metal layer, and a second metal provided on the second Mg layer. And a layer.
- the method for manufacturing a light-emitting device of the present invention includes a step (A) of preparing a mounting substrate having wiring and a step (B) of mounting a nitride-based semiconductor light-emitting element on the mounting substrate.
- a second light-emitting device of the present invention is a light-emitting device including a mounting substrate having wiring and a nitride-based semiconductor light-emitting element flip-chip mounted on the mounting substrate, the nitride-based semiconductor light-emitting device Comprises a nitride-based semiconductor multilayer structure having a p-type semiconductor region whose surface is an m-plane, and an electrode provided on the p-type semiconductor region, and the p-type semiconductor region is made of Al x In y Ga z.
- the electrode includes a Mg alloy layer in contact with the surface of the p-type semiconductor region, the electrode is connected to the wiring It is connected.
- the electrode has a metal layer provided on the Mg alloy layer.
- the metal layer is made of at least one metal selected from the group consisting of Pt, Mo, Pd, and Ag.
- the electrode is composed only of an Mg alloy layer.
- the Mg alloy layer is made of an alloy of Mg and at least one metal selected from the group consisting of Pt, Mo, Pd, and Ag.
- the electrode has a metal layer provided on the Mg layer.
- the metal layer is made of at least one metal selected from the group consisting of Pt, Mo, Pd, and Ag.
- a fourth light emitting device of the present invention is a light emitting device comprising: a mounting substrate having wiring; and a nitride semiconductor light emitting element flip-chip mounted on the mounting substrate, the nitride semiconductor light emitting element.
- includes a nitride-based semiconductor multilayer structure including a p-type semiconductor region and an electrode provided on the p-type semiconductor region, the p-type semiconductor region, Al x in y Ga z N (x + y + z 1, x ⁇ 0, y ⁇ 0, z ⁇ 0), and the angle formed by the normal of the principal surface and the normal of the m-plane in the p-type semiconductor region is 1 ° or more and 5 ° or less, and the electrode Includes an Mg alloy layer in contact with the surface of the p-type semiconductor region, and the electrode is connected to the wiring.
- the electrode has a metal layer provided on the Mg alloy layer.
- the metal layer is made of at least one metal selected from the group consisting of Pt, Mo, Pd, and Ag.
- the electrode is composed only of an Mg alloy layer.
- the Mg alloy layer is made of an alloy of Mg and at least one metal selected from the group consisting of Pt, Mo, Pd, and Ag.
- the electrode on the semiconductor multilayer structure included in the nitride semiconductor element mounted on the mounting substrate includes the Mg layer, and the Mg layer is the surface (m plane) of the p-type semiconductor region. Contact resistance can be reduced by being in contact with.
- the present invention it is possible to solve the mounting stress problem that may occur when the nitride semiconductor light emitting element is flip-chip mounted, and thus a light emitting element with less unevenness in light emission and less variation can be realized.
- the Mg layer is p-type. The same effect as that obtained when contacting the surface of the semiconductor region is obtained.
- the m-plane p-type gallium nitride compound semiconductor is used even when a p-type gallium nitride compound semiconductor layer having a main surface inclined at an angle of 1 ° to 5 ° from the m-plane.
- the m-plane p-type gallium nitride compound semiconductor is used even when a p-type gallium nitride compound semiconductor layer having a main surface inclined at an angle of 1 ° to 5 ° from the m-plane.
- a perspective view schematically showing a unit cell of GaN Perspective view showing basic vectors a 1 , a 2 , a 3 and c of wurtzite crystal structure (A) is a cross-sectional schematic diagram of the nitride-based semiconductor light emitting device 100 according to the embodiment of the present invention, (b) is a diagram showing an m-plane crystal structure, and (c) is a diagram showing a c-plane crystal structure. (A) to (c) are graphs showing the relationship between the work function (eV) of a metal in contact with GaN and the specific contact resistance ( ⁇ ⁇ cm 2 ).
- (A) is a graph showing the relationship between the Mg layer thickness (value after heat treatment) and the specific contact resistance in the Mg / Pt electrode
- (b) is a graph showing the specific contact resistance of the Pd / Pt electrode.
- (A) to (c) are photographs showing the surface state of the electrode after heat treatment when the Mg layer thickness is 2 nm, 15 nm, and 45 nm, respectively.
- (A) And (b) is the profile figure of the depth direction of Mg in the electrode structure (Mg / Pt) by SIMS analysis (A) And (b) is the profile figure of the depth direction of Ga in the electrode structure (Mg / Pt) by SIMS analysis (A) And (b) is the profile figure of the depth direction of N in the electrode structure (Mg / Pt) by SIMS analysis (A) And (b) is a drawing substitute photograph of a cross-sectional transmission electron microscope (TEM) of an electrode structure (Mg / Pt) in which an Mg layer is formed on an m-plane GaN layer.
- TEM cross-sectional transmission electron microscope
- (A) And (b) is the profile figure of the depth direction of Pt in the electrode structure (Mg / Pt) by SIMS analysis
- (A) is a figure which shows the cross section of the electrode structure (Mg / Pt) before heat processing which formed Mg layer on the m-plane GaN layer
- (b) is the cross section of the electrode structure (Mg / Pt) after heat processing.
- Illustration (A) is a graph showing current-voltage characteristics of a light emitting diode using an electrode made of an Mg / Pt layer
- (b) is a graph showing a contact resistance value of the light emitting diode.
- (A) is a graph showing contact resistance when an electrode made of an Au layer and an Mg / Au layer is used, and (b) and (c) show the surfaces of the electrodes of the Mg / Au layer and the Au layer, respectively.
- Substitute photo of optical microscope (A) and (b) are graphs showing the hardness mapping of c-plane and m-plane GaN substrates, respectively. Sectional drawing which shows the gallium nitride type compound semiconductor light-emitting device 100a which concerns on other embodiment of this invention.
- (A) is a figure which shows typically the crystal structure (wurtzite type crystal structure) of a GaN-type compound semiconductor
- (b) is the relationship between the normal of m surface, + c-axis direction, and a-axis direction
- a perspective view showing (A) And (b) is sectional drawing which shows the arrangement
- (A) And (b) is sectional drawing which shows typically the main surface and its vicinity area
- FIG. 1 A)-(c) is a figure which shows distribution of Mg and Pt in an electrode typically Sectional drawing which shows embodiment of a white light source Graph showing the result of pop-in on the + c-plane GaN layer surface Graph showing the result of pop-in on the surface of the m-plane GaN layer
- the figure which shows embodiment of the light-emitting device by this invention (A) to (e) are diagrams showing an embodiment of a light emitting device according to the present invention.
- the graph which shows the standard deviation of the starting voltage of the light emitting element from which the thickness of Mg layer 32 differs Optical micrograph of light emitted from the light emitting device in this embodiment observed from the surface Sectional drawing which shows other embodiment of the light-emitting device by this invention.
- Optical micrograph showing the surface after flip chip mounting of a light emitting device (comparative example) in which the p-type electrode has a Pd / Pt structure Optical micrograph showing the state of light emission after flip chip mounting for another light emitting device (comparative example) in which the p-type electrode has a Pd / Pt structure
- a nitride semiconductor light emitting element mounted on a mounting substrate will be described in detail first, and then a light emitting device including the mounted nitride semiconductor light emitting element will be described.
- FIG. 3A schematically shows a cross-sectional configuration of the nitride-based semiconductor light-emitting device 100 according to the embodiment of the present invention.
- a nitride-based semiconductor light emitting device 100 shown in FIG. 3A is a semiconductor device made of a GaN-based semiconductor, and has a nitride-based semiconductor multilayer structure.
- the nitride-based semiconductor light-emitting device 100 of this embodiment is formed on a GaN-based substrate 10 having an m-plane as a surface 12, a semiconductor multilayer structure 20 formed on the GaN-based substrate 10, and the semiconductor multilayer structure 20.
- the electrode 30 is provided.
- the semiconductor multilayer structure 20 is an m-plane semiconductor multilayer structure formed by m-plane growth, and its surface is an m-plane. Since there are cases where a-plane GaN grows on an r-plane sapphire substrate, it is not always necessary that the surface of the GaN-based substrate 10 is an m-plane depending on the growth conditions.
- at least the surface of the p-type semiconductor region in contact with the electrode in the semiconductor multilayer structure 20 may be an m-plane.
- the nitride-based semiconductor light-emitting device 100 of the present embodiment includes the GaN substrate 10 that supports the semiconductor multilayer structure 20, but may include another substrate instead of the GaN substrate 10, or the substrate may be removed. It is also possible to use it in the state.
- FIG. 3B schematically shows a crystal structure in a cross section (cross section perpendicular to the substrate surface) of the nitride-based semiconductor whose surface is an m-plane. Since Ga atoms and nitrogen atoms exist on the same atomic plane parallel to the m-plane, no polarization occurs in the direction perpendicular to the m-plane. That is, the m-plane is a nonpolar plane, and no piezo electric field is generated in the active layer grown in the direction perpendicular to the m-plane.
- the added In and Al are located at the Ga site and replace Ga. Even if at least part of Ga is substituted with In or Al, no polarization occurs in the direction perpendicular to the m-plane.
- a GaN-based substrate having an m-plane on the surface is referred to as an “m-plane GaN-based substrate” in this specification.
- an m-plane GaN substrate is used and a semiconductor is grown on the m-plane of the substrate. This is because the surface orientation of the surface of the GaN-based substrate is reflected in the surface orientation of the semiconductor multilayer structure.
- the surface of the substrate does not need to be an m-plane, and the substrate does not need to remain in the final device.
- FIG. 3C schematically shows a crystal structure in a nitride semiconductor cross section (cross section perpendicular to the substrate surface) having a c-plane surface.
- Ga atoms and nitrogen atoms do not exist on the same atomic plane parallel to the c-plane.
- polarization occurs in a direction perpendicular to the c-plane.
- a GaN-based substrate having a c-plane on the surface is referred to as a “c-plane GaN-based substrate” in this specification.
- the c-plane GaN-based substrate is a general substrate for growing GaN-based semiconductor crystals. Since the positions of the Ga atomic layer and the nitrogen atomic layer parallel to the c-plane are slightly shifted in the c-axis direction, polarization is formed along the c-axis direction.
- a semiconductor multilayer structure 20 is formed on the surface (m-plane) 12 of the m-plane GaN-based substrate 10.
- the Al d Ga e N layer 26 is located on the side opposite to the m-plane 12 side with respect to the active layer 24.
- the active layer 24 is an electron injection region in the nitride semiconductor light emitting device 100.
- the Al u Ga v In w N layer 22 of the present embodiment is a first conductivity type (n-type) Al u Ga v In w N layer 22.
- an undoped GaN layer may be provided between the active layer 24 and the Al d Ga e N layer 26.
- the Al composition ratio d need not be uniform in the thickness direction.
- the Al composition ratio d may change continuously or stepwise in the thickness direction. That is, the Al d Ga e N layer 26 may have a multilayer structure in which a plurality of layers having different Al composition ratios d are stacked, and the dopant concentration may also change in the thickness direction. .
- the uppermost part of the Al d Ga e N layer 26 (upper surface part of the semiconductor multilayer structure 20) is composed of a layer (GaN layer) in which the Al composition ratio d is zero. Is preferred.
- the Mg layer 32 described later is in contact with the GaN layer.
- the Al composition d may not be zero.
- Al 0.05 Ga 0.95 N having an Al composition d of about 0.05 can also be used.
- the Mg layer 32 described later is in contact with the Al 0.05 Ga 0.95 N layer.
- An electrode 30 is formed on the semiconductor multilayer structure 20.
- the electrode 30 of this embodiment is an electrode including an Mg layer 32 made of Mg, and a Pt layer made of Pt is formed on the Mg layer 32.
- the Mg layer 32 in the electrode 30 is in contact with the p-type semiconductor region of the semiconductor multilayer structure 20 and functions as a part of the p-type electrode (p-side electrode).
- the Mg layer 32 is in contact with the Al d Ga e N layer 26 doped with the second conductivity type (p-type) dopant.
- the Al d Ga e N layer 26 is doped with Mg as a dopant, for example.
- Zn or Be may be doped as a p-type dopant other than Mg.
- a Pt layer or a metal layer that is difficult to form an alloy with Mg as compared with Au can be used.
- at least one metal selected from the group consisting of Pt, Mo, Pd, and Ag may be used.
- Au (gold) that easily forms an alloy with Mg is not preferable as the metal layer 34 that contacts the Mg layer 32.
- the Mg layer 32 is not alloyed with a metal such as Pt constituting the metal layer 34. Note that “not alloyed with a metal such as Pt” includes a state in which a metal such as Pt is mixed in Mg at a concentration of less than% order (for example, 1%).
- “alloying with a metal such as Pt” means a state in which a metal such as Pt is mixed in Mg at a concentration of% order (for example, 1%) or more.
- the Mg layer 32 and the metal layer 34 may contain impurities or the like mixed in the manufacturing process of those layers.
- an alloy layer containing Mg may be formed between the Mg layer 32 and the metal layer 34.
- Pt, Mo, Pd, and Ag are metals that are less likely to be alloyed with Mg compared to Au, but an alloy layer can be formed by reacting with a part of the Mg layer 32 by heat treatment described later.
- all of the thin metal layer may be alloyed with a part of Mg in the Mg layer after the heat treatment. In this case, only the alloy layer exists on the Mg layer.
- an electrode layer or a wiring layer made of a metal or alloy other than these metals may be formed on each of the electrodes.
- the thickness of the electrode 30 of this embodiment is, for example, 10 to 200 nm.
- the Mg layer 32 in the electrode 30 is a layer thinner than the thickness of the metal layer 34, and the thickness of the Mg layer 32 is, for example, 2 nm to 45 nm.
- the thickness of the Mg layer 32 is the thickness of the Mg layer after the heat treatment.
- the thickness of the metal layer (a layer made of at least one metal selected from the group consisting of Pt, Mo, Pd, and Ag) 34 positioned on the Mg layer 32 is, for example, 200 nm or less (or 10 nm to 200 nm).
- the Mg layer 32 is preferably thinner than the metal layer 34. The reason why the Mg layer 32 is thinner than the thickness of the metal layer 34 is that the strain between the Mg layer 32 and the metal layer 34 is out of balance between the Mg layer 32 and the Al d Ga e N layer 26. This is to prevent peeling.
- the thickness of the GaN-based substrate 10 having the m-plane surface 12 is, for example, 100 to 400 ⁇ m. This is because there is no problem in handling the wafer if the substrate thickness is about 100 ⁇ m or more.
- the substrate 10 of the present embodiment may have a laminated structure as long as it has an m-plane surface 12 made of a GaN-based material. That is, the GaN-based substrate 10 of the present embodiment includes a substrate having an m-plane at least on the surface 12, and therefore, the entire substrate may be GaN-based or a combination with other materials. It doesn't matter.
- an electrode 40 (n-type electrode) is formed on a part of an n-type Al u Ga v In w N layer (for example, a thickness of 0.2 to 2 ⁇ m) 22.
- a recess 42 is formed in the region where the electrode 40 is formed in the semiconductor multilayer structure 20 so that a part of the n-type Al u Ga v In w N layer 22 is exposed.
- An electrode 40 is provided on the surface of the n-type Al u Ga v In w N layer 22 exposed at the recess 42.
- the electrode 40 is composed of, for example, a laminated structure of a Ti layer, an Al layer, and a Pt layer, and the thickness of the electrode 40 is, for example, 100 to 200 nm.
- the active layer 24 of the present embodiment includes a GaInN / GaN multiple quantum well (MQW) in which Ga 0.9 In 0.1 N well layers (eg, 9 nm thick) and GaN barrier layers (eg, 9 nm thick) are alternately stacked. It has a structure (for example, a thickness of 81 nm).
- MQW multiple quantum well
- a p-type Al d Ga e N layer 26 is provided on the active layer 24.
- the thickness of the p-type Al d Ga e N layer 26 is, for example, 0.2 to 2 ⁇ m.
- an undoped GaN layer may be provided between the active layer 24 and the Al d Ga e N layer 26.
- a second conductivity type (for example, p-type) GaN layer may be formed on the Al d Ga e N layer 26. Then, it is possible to form a contact layer made of p + -GaN on the GaN layer, and further form an Mg layer 32 on the contact layer made of p + -GaN.
- a contact layer made of GaN instead think of the Al d Ga e N layer 26 is another layer, it can be considered to be a part of the Al d Ga e N layer 26.
- FIGS. 4 (a) and 4 (b) are graphs showing the relationship between the work function (eV) of a metal in contact with m-plane GaN and the specific contact resistance ( ⁇ ⁇ cm 2 ). More specifically, FIGS. 4 (a) and 4 (b) show various metal layers (Mg layer thickness: 2 nm) on an Mg-doped p-type GaN layer (Mg concentration: about 1 ⁇ 10 19 cm ⁇ 3 ). The other metal layer thickness (200 nm) was formed, and the contact resistance was evaluated using a TLM (Transmission Line Method) method. “1.0E-01” shown on the vertical axis means “1.0 ⁇ 10 ⁇ 1 ”, and “1.0E-02” means “1.0 ⁇ 10 ⁇ 2 ”. , “1.0E + X” means “1.0 ⁇ 10 X ”.
- the contact resistance is generally inversely proportional to the contact area S (cm 2 ).
- R Rc
- the proportional constant Rc is referred to as a specific contact resistance and corresponds to the contact resistance R when the contact area S is 1 cm 2 . That is, the magnitude of the specific contact resistance does not depend on the contact area S and is an index for evaluating the contact characteristics.
- specific contact resistance may be abbreviated as “contact resistance”.
- FIG. 4A shows a case where heat treatment is not performed after metal formation (as-depo).
- FIG. 4B shows a case where Mg was heat-treated at 600 ° C. for 10 minutes in a nitrogen atmosphere, and Al, Au, Pd, Ni and Pt were heated at 500 ° C. for 10 minutes in a nitrogen atmosphere. The results when heat treatment is performed are shown. This difference in temperature is based on the fact that the contact resistance decreases most at 500 ° C. for metals other than Mg due to the difference in the optimum heat treatment temperature.
- FIG. 5A is a graph showing the relationship between the Mg layer thickness and the specific contact resistance in the Mg / Pt electrode (Pt is formed on Mg).
- the thickness of the Pt layer (before heat treatment) is fixed at 75 nm.
- FIG. 5B is a graph showing the specific contact resistance of a Pd / Pt electrode (Pd thickness 40 nm, Pt thickness: 35 nm) for comparison.
- the horizontal axis of the graph is the heat treatment temperature.
- the thickness of the metal layer other than the Mg layer is the thickness before the heat treatment.
- the data shown in FIG. 5 (a) is obtained from a sample in which an Mg layer is deposited using a pulse vapor deposition method.
- the pulse deposition method will be described later.
- the data shown in FIG. 5 (b) is obtained from a sample in which Pd and Pt layers are deposited using a normal electron beam evaporation method.
- the Mg layer is deposited by the pulse vapor deposition method.
- the Mg layer on the c-plane GaN layer is also deposited by the pulse vapor deposition method, but any metal other than Mg (Pd, Pt, Au, Ag) is a normal electron beam vapor deposition method. It is deposited by.
- the Mg / Pt electrode and the Pd / Pt electrode are in contact with the m-plane GaN layer doped with Mg.
- Mg of 7 ⁇ 10 19 cm ⁇ 3 is doped in a region 20 nm deep from the surface (the outermost surface region having a thickness of 20 nm). Further, a region where the depth from the surface of the m-plane GaN layer exceeds 20 nm is doped with 1 ⁇ 10 19 cm ⁇ 3 of Mg.
- the concentration of the p-type impurity is locally increased in the outermost surface region of the GaN layer in contact with the p-type electrode, the contact resistance can be minimized.
- the horizontal axis in the graph of FIG. 5A indicates the thickness of the Mg layer after the heat treatment.
- the thickness of the Mg layer after the heat treatment is reduced as compared with that before the heat treatment.
- the thickness of the Mg layer before the heat treatment 600 ° C., 10 minutes
- the thickness of the Mg layer after the heat treatment was 2 nm.
- the thickness of the Mg layer before heat treatment 600 ° C., 10 minutes
- the thickness of the Mg layer after heat treatment was 45 nm and 15 nm, respectively.
- the graph of FIG. 5 (a) describes the experimental results showing the relationship between the measured value of contact resistance and the Mg thickness for a sample that has been heat-treated at 600 ° C. for 10 minutes. It was confirmed by experiment that the dependency of the contact resistance on the Mg layer thickness has the same tendency even under other heat treatment conditions.
- the contact resistance of the Mg / Pt electrode is the contact resistance of the Pd / Pt electrode with respect to the m-plane GaN layer (shown in FIG. 5B). Therefore, the advantage over the conventional example was not seen.
- the contact resistance is lower than that of the Pd / Pt electrode on the m-plane GaN, confirming the superiority of the present invention.
- the contact resistance decreased as the Mg layer thickness decreased.
- a sudden decrease in contact resistance was observed as the thickness of the Mg layer decreased from around 15 nm.
- the lowest contact resistance was obtained when the Mg layer thickness was around 2 nm.
- the thickness of the Mg layer 32 in the semiconductor element finally obtained through all the manufacturing steps including heat treatment is preferably 45 nm or less, and more preferably in the range of 2 nm to 15 nm. .
- electrode surface roughness (unevenness) was observed in the sample with the Mg layer thickness of 45 nm.
- the electrode surface roughness is considered to be a factor of increasing the contact resistance when the Mg layer thickness exceeds 45 nm.
- the Mg layer thickness exceeded 45 nm, a phenomenon that the Mg layer partially lifted was also observed. From observation with a transmission electron microscope, it was also confirmed that voids were generated at the interface between the Mg layer and the GaN layer. This is presumably because when the Mg layer thickness exceeds 45 nm, the strain of the Mg layer increases and the Mg layer peels off at the interface between Mg and GaN. From the above, it is preferable to set the thickness of the Mg layer to 45 nm or less.
- the Mg layer thickness is about 15 nm or less, the flatness of the electrode surface is extremely improved. For this reason, the Mg layer thickness is more preferably 15 nm or less.
- FIG. 7 is a graph showing the contact resistance (measured value) when the contact surface is the m-plane and the c-plane for each contact resistance of the Mg / Pt electrode and the Pd / Pt electrode.
- the electrode is in contact with the p-type GaN layer.
- This p-type GaN layer is doped with Mg having the concentration distribution described above.
- the heat treatment temperature and heat treatment time are as shown in Table 2 below.
- FIG. 8 shows a case where an Mg layer is formed on the m-plane of the p-type GaN layer (hereinafter referred to as “m-plane GaN layer”) and a Pt layer is formed thereon (that is, m-plane GaN (Mg / Pt )) Result.
- a Pd layer is formed on a p-type m-plane GaN layer and a Pt layer is formed thereon (m-plane GaN (Pd / Pt), and the c-plane of the p-type GaN layer (hereinafter, “ Also shown is the result of forming a Pd layer on top of it (denoted as “c-plane GaN”) and a Pt layer thereon (c-plane GaN (Pd / Pt)).
- Mg is doped so as to have a concentration distribution.
- the contact resistance of m-plane GaN is higher than that of c-plane GaN.
- an increase in contact resistance is observed at a heat treatment temperature exceeding 500 ° C.
- the m-plane GaN (Mg / Pt) electrode has a higher contact resistance than the Pd / Pt electrode when heat treatment is not performed. This is consistent with the common technical knowledge that a metal having a lower work function has a higher contact resistance.
- the heat treatment temperature is increased and the contact resistance is reduced.
- the contact resistance of m-plane GaN (Mg / Pt) is It becomes equal to or less than the contact resistance of m-plane GaN (Pd / Pt).
- the contact resistance of m-plane GaN (Mg / Pt) further decreases to be equivalent to the contact resistance of c-plane GaN (Mg / Pt), Even less.
- the contact resistance of m-plane GaN (Mg / Pt) becomes less than (or less than) the contact resistance of c-plane GaN (Mg / Pt).
- the contact resistance of m-plane GaN is lower than the contact resistance of both the m-plane and c-plane GaN (Mg / Pt) at a temperature of 600 ° C. Specifically, , About 1.0E-02 ⁇ cm ⁇ 2 or its periphery.
- the contact resistance of m-plane GaN (Mg / Pt) is higher than that at 600 ° C., but the m-plane and c-plane GaN (Mg / Pt) at 700 ° C. It becomes lower than any of the contact resistances.
- the heat treatment temperature of m-plane GaN is preferably, for example, 500 ° C. or higher.
- the temperature exceeds 700 ° C. and exceeds a predetermined temperature (for example, 800 ° C.) the film quality of the electrode and the GaN layer deteriorates. Therefore, the upper limit is preferably 800 ° C. or less, and the temperature range is 550 ° C. Is more preferable.
- the contact resistance is lower at 600 ° C. than at 500 ° C., and the contact resistance increases when the heat treatment temperature is further increased to 700 ° C. 600 ° C. ⁇ 50 ° C.) is a more preferable heat treatment temperature.
- FIG. 9 shows a photograph showing the surface state of the electrode after heat treatment at each temperature.
- FIG. 9 shows the results of As-depo (when no heat treatment is performed) and heat treatment temperatures of 500 ° C., 600 ° C., and 700 ° C.
- the Mg layer is formed on the p-type m-plane GaN layer and the Pt layer is formed thereon (in the case of M-GaN (Mg / Pt))
- slight unevenness is observed at a heat treatment temperature of 700 ° C.
- the surface Ra by AFM measurement was about 1.5 nm at 500 ° C., about 1.5 nm at 600 ° C., and about 4.5 nm at 700 ° C., and a good surface state was obtained.
- the Ra of the electrode surface is preferably about 4.5 nm or less, and more preferably about 1.5 nm or less.
- FIG. 10 shows the photoluminescence measurement results of the GaN layer when an Mg layer (30 nm) is formed on the GaN layer and heat-treated at 800 ° C. and 900 ° C. for 10 minutes.
- 10A shows the result of heat treatment at 800 ° C.
- FIG. 10B shows the result of heat treatment at 900 ° C.
- the PL intensity on the vertical axis in FIGS. 10A and 10B means the photoluminescence intensity.
- the PL intensity curve denoted as “Ref” obtained before the heat treatment is shown.
- the heat treatment temperature in the electrode using the Mg layer is desirably 700 ° C. or lower from the viewpoint of maintaining the quality of GaN.
- FIG. 11 shows the result of obtaining the profile of Mg atoms in the depth direction in the electrode structure (Mg / Pt) by using a secondary-ion-microprobe-mass-spectrometer (SIMS).
- FIG. 11 (a) shows the result when the heat treatment is not performed (as-depo) in the configuration in which the Mg layer is formed on the GaN layer (Mg / Pt electrode), while FIG. 11 (b) shows the heat treatment. Later results are shown.
- the temperature and time of the heat treatment are 10 minutes at 600 ° C. for c-plane GaN, 10 minutes at 600 ° C. and 10 minutes at 630 ° C. for m-plane GaN.
- the Mg layer thickness before the heat treatment is 7 nm, and the Pt layer thickness is 75 nm.
- the vertical axis represents the Mg concentration
- the horizontal axis represents the distance in the depth direction.
- the region where the numerical value on the horizontal axis is “ ⁇ ” is the electrode side, and the region “+” is the p-type GaN side.
- the origin (0 ⁇ m) on the horizontal axis is the peak position of Mg and substantially corresponds to the position of the interface between the p-type GaN layer and the Mg layer.
- ⁇ indicates data related to a sample having a heat treatment temperature of 600 ° C. formed on c-plane GaN.
- ⁇ in the graph represents data related to a sample formed on c-plane GaN with a heat treatment temperature of 600 ° C.
- ⁇ represents data related to a sample formed on m-plane GaN having a heat treatment temperature of 630 ° C. Is shown. The same applies to the graphs of FIGS. 12, 13, and 15 described later.
- the p-type GaN layer before the heat treatment is doped with 7 ⁇ 10 19 cm ⁇ 3 Mg in a region 20 nm deep from the surface of the p-type GaN layer in contact with the electrode.
- the deeper region is doped with 1 ⁇ 10 19 cm ⁇ 3 Mg.
- Mg on the c-plane GaN diffuses in the p-type GaN layer at a considerable concentration, as shown in FIG. It can also be seen that Mg is diffused in the Pt layer. On the other hand, it is confirmed that Mg on the m-plane GaN hardly diffuses in the p-type GaN layer and the Pt layer. More specifically, in the case of c-plane GaN, Mg diffuses deeply into the Pt layer after heat treatment, and also diffuses deeply into the GaN side. On the other hand, in the case of m-plane GaN, Mg slightly diffuses to the Pt layer side after heat treatment, but hardly diffuses to the GaN side.
- FIG. 12 shows the result of obtaining a profile in the depth direction of Ga atoms in the electrode structure (Mg / Pt) using SIMS.
- the Mg layer thickness before heat treatment is 7 nm
- the Pt layer thickness is 75 nm.
- the vertical axis of the graph shows the signal intensity of the SIMS detector, which is proportional to the atomic concentration.
- the distance 0 ⁇ m on the horizontal axis in FIG. 12 substantially corresponds to the position of the interface between the p-type GaN layer and the Mg layer.
- the origin (0 ⁇ m) on the horizontal axis was adjusted to the Ga peak position.
- the region where the numerical value on the horizontal axis is “ ⁇ ” is the electrode side, and the region “+” is the p-type GaN side.
- the vertical axis is normalized assuming that the Ga concentration in the as-depo GaN crystal is 1.
- the intensity of 1 ⁇ 10 ⁇ 3 on the vertical axis is approximately equivalent to 1 ⁇ 10 19 cm ⁇ 3 as the concentration.
- FIG. 12 (a) shows the result when heat treatment is not performed (as-depo) in the configuration in which the Mg layer is formed on the GaN layer (Mg / Pt electrode), while FIG. 12 (b) shows the heat treatment. Later results are shown.
- FIG. 12B two types of results with heat treatment temperatures of 600 ° C. and 630 ° C. are shown. The temperature and time of the heat treatment are 10 minutes at 600 ° C. for c-plane GaN, 10 minutes at 600 ° C. and 10 minutes at 630 ° C. for m-plane GaN.
- FIG. 12B it was confirmed that Ga was diffused in the Mg layer when heat treatment was performed.
- Ga diffusion is observed in the Mg layer, and the contact resistance is low.
- the contact resistance is low.
- Ga diffuses into the Mg layer and Pt layer, and Ga also moves into the electrode from the back in the GaN crystal.
- Ga is diffused significantly from the GaN layer into the electrode as a whole.
- m-plane GaN when the heat treatment temperature is 600 ° C., unlike c-plane GaN, Ga atoms seem to move only near the interface. It is presumed that atoms are less likely to move on the m-plane than on the c-plane.
- FIG. 13A is a graph showing a profile in the depth direction of nitrogen atoms in the Mg / Pt electrode before the heat treatment
- FIG. 13B is a profile in the depth direction of nitrogen atoms in the Mg / Pt electrode after the heat treatment. It is a graph which shows.
- the Mg layer thickness before heat treatment is 7 nm
- the Pt layer thickness is 75 nm.
- 13A and 13B the vertical axis represents the N intensity
- the horizontal axis represents the distance in the depth direction.
- N intensity of 1 ⁇ 10 -3 corresponds approximately to the N concentration of 1 ⁇ 10 19 cm -3.
- the region where the numerical value on the horizontal axis is “ ⁇ ” is the electrode side, and the region “+” is the p-type GaN side.
- the origin (0 ⁇ m) on the horizontal axis substantially corresponds to the position of the interface between the p-type GaN layer and the Mg layer.
- the electrode structure and p-type GaN doping conditions are the same as those in the sample described with reference to FIG.
- the N concentration of the Mg layer on the m-plane GaN is lower than the Ga concentration.
- the N concentration in the Mg layer on the c-plane GaN is approximately the same as the Ga concentration. That is, in m-plane GaN, only Ga atoms diffuse to the electrode side and nitrogen atoms do not diffuse, but in c-plane GaN, both Ga atoms and nitrogen atoms diffuse to the electrode side.
- Ga vacancies have acceptor properties, when Ga vacancies increase near the interface between the electrode and p-type GaN, holes easily pass through the Schottky barrier at this interface by tunneling.
- nitrogen atoms diffuse together with Ga atoms to the electrode side, a nitrogen deficient state, that is, nitrogen vacancies are also formed on the outermost surface of p-type GaN. Nitrogen vacancies have donor properties and cause charge compensation with Ga vacancies. For this reason, when not only Ga but nitrogen is diffused to the electrode side like c-plane GaN, the contact resistance is not particularly lowered.
- FIG. 14 shows a cross-sectional transmission electron microscope (TEM) photograph of an electrode structure (Mg / Pt) in which an Mg layer is formed on an m-plane GaN layer.
- FIG. 14A shows the result when no heat treatment is performed (as-depo).
- FIG. 14B shows the result after heat treatment at 600 ° C. for 10 minutes.
- a 7 nm thick Mg layer was formed on the GaN crystal.
- the Pt layer eroded into the Mg layer after the heat treatment, and the thickness of the Mg layer became 2 nm.
- the Mg layer (the layer 32 in FIG. 3A) is thin (for example, 2 nm), but the Pt layer (the layer 34 in FIG. 3A).
- the presence of an Mg layer (layer 32 in FIG. 3A) made of Mg that was not alloyed or absorbed was confirmed.
- FIG. 15 shows the result of obtaining a profile in the depth direction of Pt in the electrode structure (Mg / Pt) using SIMS.
- FIGS. 15A and 15B show the results when heat treatment is not performed (as-depo) and after the heat treatment, respectively, as in the above-described SIMS.
- the Mg layer thickness before heat treatment is 7 nm
- the Pt layer thickness is 75 nm.
- 15A and 15B the vertical axis represents the Pt intensity
- the horizontal axis represents the distance in the depth direction.
- Pt intensity of 1 ⁇ 10 -3 corresponds approximately to a Pt concentration of 1 ⁇ 10 19 cm -3.
- the region where the numerical value on the horizontal axis is “ ⁇ ” is the electrode side, and the region “+” is the p-type GaN side.
- the origin (0 ⁇ m) on the horizontal axis substantially corresponds to the position of the interface between the p-type GaN layer and the Mg layer.
- the electrode structure and p-type GaN doping conditions are the same as those in the sample described with reference to FIG.
- FIG. 16A is a schematic diagram showing the Mg / Pt electrode structure before the heat treatment.
- FIG. 16B is a schematic diagram showing the Mg / Pt electrode structure before the heat treatment. All drawings were prepared based on the cross-sectional TEM.
- the thickness of the deposited Mg layer exceeds 5 nm, the thickness of the Mg layer is reduced by the heat treatment at 600 ° C. for 10 minutes, but the Mg layer exists as a substantially continuous film even after the heat treatment.
- the thickness at the time of deposition of the Mg layer is about 2 nm, after heat treatment at 600 ° C. for 10 minutes, as shown in FIG. It was confirmed that the islands may exist.
- the thickness of the Mg layer immediately after deposition is about 2 nm, the morphology of the Mg layer finally obtained may vary depending on the conditions of the heat treatment to be performed.
- the “Mg layer” in this specification includes a collection of a large number of island-like (island-like) Mg existing on the surface of the p-type semiconductor region. Further, the “Mg layer” may be composed of a film having a plurality of openings (for example, a porous film). Thus, if Mg that is not eroded by Pt is in contact with the surface (m-plane) of the p-type semiconductor region, a contact resistance reduction effect can be sufficiently obtained.
- an m-plane GaN substrate 10 and an Al u Ga v In w N layer (u + v + w 1, u ⁇ 0, v ⁇ 0, w ⁇ 0) 22.
- the m-plane GaN substrate 10 is an n-type GaN substrate (for example, a thickness of 100 ⁇ m)
- the Al u Ga v In w N layer 22 is an n-type GaN layer (for example, a thickness of 2 ⁇ m).
- An active layer 24 is formed on the Al u Ga v In w N layer 22.
- the semiconductor multilayer structure 20 including at least the active layer 24 is formed on the m-plane GaN substrate 10.
- the active layer 24 is composed of, for example, an InGaN well layer and a GaN barrier layer having an In composition ratio of about 25%, the well layer thickness is 9 nm, the barrier layer thickness is 9 nm, and the well layer period is three periods. .
- the Al d Ga e N layer 26 of this embodiment is doped with Mg as a p-type dopant.
- Mg is doped to the Al d Ga e N layer 26 by, for example, about 10 18 cm ⁇ 3 .
- an undoped GaN layer (not shown) is formed between the active layer 24 and the Al d Ga e N layer 26.
- a second conductivity type (for example, p-type) GaN layer (not shown) is formed on the Al d Ga e N layer 26.
- an Mg layer 32 is formed on the contact layer made of p + -GaN, and a Pt layer 34 is formed thereon.
- the laminated structure of the Mg layer 32 and the Pt layer 34 becomes an electrode (p-type electrode) 30.
- the semiconductor multilayer structure 20, Al u Ga v In w recess (recess) 42 for exposing the surface of the N layer 22 is formed, it is located on the bottom surface of the recess 42 Al u Ga v In w N layer 22
- An electrode (n-type electrode) 40 is formed on the substrate.
- the size of the recess 42 is, for example, a width (or diameter) of 20 ⁇ m and a depth of 1 ⁇ m.
- the electrode 40 is, for example, an electrode having a laminated structure of a Ti layer, an Al layer, and a Pt layer (for example, the thicknesses are 5 nm, 100 nm, and 10 nm, respectively).
- the operating voltage (Vop) can be reduced by about 1.5 V compared to the case of a conventional m-plane LED using a Pd / Pt electrode, and as a result. It was found that power consumption can be reduced.
- an m-plane substrate 10 is prepared.
- a GaN substrate is used as the substrate 10.
- the GaN substrate of the present embodiment is obtained by using an HVPE (Hydride Vapor Phase Epitaxial) method.
- a thick film GaN on the order of several mm is grown on a c-plane sapphire substrate.
- an m-plane GaN substrate is obtained by cutting the thick film GaN in the direction perpendicular to the c-plane and the m-plane.
- the production method of the GaN substrate is not limited to the above, and a method of producing an ingot of bulk GaN using a liquid phase growth method such as a sodium flux method or a melt growth method such as an ammonothermal method, and cutting it in the m plane But it ’s okay.
- a gallium oxide, a SiC substrate, a Si substrate, a sapphire substrate, or the like can be used in addition to a GaN substrate.
- the plane orientation of the SiC or sapphire substrate is preferably the m-plane.
- the growth surface may not necessarily be the m-plane depending on the growth conditions. It is sufficient that at least the surface of the semiconductor multilayer structure 20 is m-plane.
- crystal layers are sequentially formed on the substrate 10 by MOCVD (Metal Organic Organic Chemical Vapor Deposition) method.
- an Al u Ga v In w N layer 22 is formed on the m-plane GaN substrate 10.
- Al u Ga v In w N layer 22 for example, AlGaN having a thickness of 3 ⁇ m is formed.
- a GaN layer is formed by supplying TMG (Ga (CH 3 ) 3 ), TMA (Al (CH 3 ) 3 ), and NH 3 on the m-plane GaN substrate 10 at 1100 ° C. accumulate.
- the active layer 24 is formed on the Al u Ga v In w N layer 22.
- the active layer 24 has a GaInN / GaN multiple quantum well (MQW) structure with a thickness of 81 nm in which a Ga 0.9 In 0.1 N well layer with a thickness of 9 nm and a GaN barrier layer with a thickness of 9 nm are alternately stacked.
- MQW multiple quantum well
- the growth temperature is preferably lowered to 800 ° C. in order to incorporate In.
- an Al d Ga e N layer 26 is formed on the undoped GaN layer.
- the Al d Ga e N layer 26 for example, by supplying TMG, NH 3 , TMA, TMI and Cp 2 Mg (cyclopentadienyl magnesium) as a p-type impurity, p-Al 0.14 Ga 0.86 having a thickness of 70 nm is provided. N is formed.
- Cp 2 Mg is supplied as a p-type impurity.
- the p-GaN contact layer, the Al d Ga e N layer 26, the undoped GaN layer, and a part of the active layer 24 are removed to form a recess 42, and Al x Ga y InzN
- the n-type electrode formation region of the layer 22 is exposed.
- a Ti / Pt layer is formed as the n-type electrode 40 on the n-type electrode formation region located at the bottom of the recess 42.
- an Mg layer 32 is formed on the p-GaN contact layer, and a Pt layer 34 is further formed on the Mg layer 32. Thereby, the p-type electrode 40 is formed.
- a technique pulse deposition method
- the Mg metal in the crucible held in vacuum is irradiated with an electron beam in a pulsed manner to evaporate the source metal in a pulsed manner.
- the source metal molecules or atoms adhere to the p-GaN contact layer, and the Mg layer 32 is formed.
- the pulse has a pulse width of 0.5 seconds and a repetition of 1 Hz.
- Mg layer 32 a dense and good quality film was formed as the Mg layer 32.
- the reason why the Mg layer becomes dense is thought to be that the kinetic energy of Mg atoms or Mg atom clusters that collide with the p-GaN contact layer is increased by performing pulse deposition.
- Mg is an element that is easily oxidized by contact with water or air.
- the pulse vapor deposition method of the present embodiment is used, an Mg layer that is hardly oxidized and excellent in water resistance and oxygen resistance can be obtained.
- the Mg layer thus formed is stable even when heat treatment is performed at a temperature of 600 ° C. or higher.
- a technique of performing vapor deposition while vaporizing the source metal (Mg metal) in a pulsed manner is adopted, but other techniques can be adopted as long as the Mg layer 32 can be formed. It is.
- a thermal CVD method or molecular beam epitaxy (MBE) can be employed as another method for forming a dense and high-quality Mg layer.
- the substrate 10 and part of the Al u Ga v In w N layer 22 may be removed by using a method such as laser lift-off, etching, and polishing. In this case, only the substrate 10 may be removed, or only a part of the substrate 10 and the Al u Ga v In w N layer 22 may be selectively removed. Of course, the substrate 10 and the Al u Ga v In w N layer 22 may be left without being removed.
- the nitride-based semiconductor light-emitting device 100 of this embodiment is formed.
- nitride-based semiconductor light emitting device 100 of the present embodiment when a voltage is applied between the n-type electrode 40 and the p-type electrode 30, holes are transferred from the p-type electrode 30 toward the active layer 24. Electrons are injected from the active layer 24 toward the active layer 24 to emit light having a wavelength of 450 nm, for example.
- FIG. 17A shows current-voltage characteristics of a light emitting diode using an electrode made of an Mg / Pt layer on m-plane GaN.
- the nitride semiconductor structure of the light emitting diode is the same, the characteristics of the light emitting diode using the electrode made of the Pd / Pt layer, and the light emitting diode using the electrode made of the Mg / Pt layer on the c-plane GaN
- the characteristics of The electrode configuration and heat treatment conditions in these three types of light emitting diodes are as shown in Table 4 below.
- This light-emitting diode has a configuration in which an n-type GaN layer, an InGaN well layer (three layers) and a GaN barrier layer (two layers) are alternately stacked on an m-plane or c-plane GaN substrate, p-type GaN Layers are stacked. Further, an Mg / Pt electrode or a Pd / Pt electrode is provided as a p-type electrode on the p-type GaN layer. The n-type electrode is formed on the n-type GaN layer by etching the p-type GaN layer and the active layer to expose the n-type GaN layer.
- the current value becomes the voltage value. It increases with the increase.
- the rising voltage is about 3.1 V in the case of an electrode (on m-plane GaN) made of a Pd / Pt layer.
- the rising voltage in the case of the electrode (on the m-plane GaN) made of the Mg / Pt layer is about 2.5 V, and a reduction is observed. It is confirmed that the operating voltage at a current value of 20 mA is reduced by 1.5 V or more in the electrode made of Mg / Pt layer as compared with the electrode made of Pd / Pt layer.
- a light-emitting diode (m-plane light-emitting diode) using an electrode made of an Mg / Pt layer on m-plane GaN and a light-emitting diode (c-plane light-emitting diode) using an electrode made of an Mg / Pt layer on c-plane GaN
- the rising voltage is lower than that of the c-plane light emitting diode, and the effect of reducing the contact resistance is confirmed.
- a current value of 20 mA is obtained at a driving voltage of 3.2 V.
- the c-surface light emitting diode has a current value of 4.8 mA at the same driving voltage. Since the light output of the light emitting diode depends on the current value, it can be seen that the m-plane light emitting diode can obtain a light output nearly four times that of the c surface light emitting diode at the driving voltage of 3.2 V.
- the value of the contact resistance of this light emitting diode was 3.8 ⁇ 10 ⁇ 4 ⁇ cm 2 for the electrode made of the Mg / Pt layer.
- Such a contact resistance value of 10 minus 4 is an extremely remarkable effect. It has been found that this can reduce power consumption.
- the value was about 1 ⁇ 10 ⁇ 2 ⁇ cm 2 .
- FIG. 18A shows the result of forming an Au layer or Mg / Au layer electrode on an m-plane GaN layer and measuring its specific contact resistance ( ⁇ ⁇ cm 2 ).
- the specific contact resistance is a value of the specific contact resistance after the electrode is formed and heat treatment is performed.
- the characteristic of the specific contact resistance is worse when the Mg / Au layer electrode is used than when the Au layer electrode is used.
- This point is significantly different from the result of the characteristic improvement in the configuration of the electrode (for example, Mg / Pt layer) of the present embodiment.
- Mg is an element that is easily oxidized by contact with water or air
- the structure used as a laminate of Mg layers (Mg / Au layer) instead of a single electrode of Mg layer is Can be one of the candidates for consideration.
- the contact resistance of the Mg / Au layer is increased as compared with the Au layer, so that the contact characteristics are poor.
- the excellent contact resistance characteristics of the configuration of the present embodiment are for those skilled in the art in view of the poor results when the Au layer is stacked on the Mg layer. It seems to have had an unpredictable effect.
- FIG. 18B is a drawing-substituting photograph showing the surface of the Mg / Au layer electrode after the heat treatment
- FIG. 18C is a drawing-substituting photograph showing the surface of the Au layer electrode after the heat treatment. It is a photograph. When both were compared, it was found that the film quality of the Mg / Au layer electrode was worse.
- FIG. 19 shows hardness mapping (5 mN, 1 ⁇ m conical) using a Conical chip.
- FIG. 19A shows the result of the c-plane GaN substrate (C-GaN)
- FIG. 19B shows the result of the m-plane GaN substrate (M-GaN).
- Patent Documents 3 and 4 have no description that the crystal plane of the gallium nitride-based semiconductor layer is the m-plane, and therefore, the disclosure of these documents discloses an electrode on the c-plane gallium nitride-based semiconductor layer. It is related to the technology that formed.
- Patent Document 3 relates to a structure in which an Au layer is laminated on an Mg layer, and even if an electrode having the laminated structure is formed on the m-plane, the effect of the electrode of this embodiment can be obtained. Not.
- Patent Document 4 refers to a metal layer made of Ni, Cr, and Mg, but the disclosed examples are only those having an electrode structure with a Ni layer as a lower layer.
- Patent Documents 3 and 4 both relate to an electrode structure formed on a c-plane gallium nitride semiconductor layer, and neither a problem nor a solution regarding contact resistance to an m-plane gallium nitride semiconductor layer is taught.
- the actual surface (main surface) of the m-plane semiconductor layer does not need to be a plane that is completely parallel to the m-plane, and is inclined at a slight angle (greater than 0 ° and less than ⁇ 1 °) from the m-plane. May be. It is difficult to form a substrate or a semiconductor layer having a surface that is completely parallel to the m-plane from the viewpoint of manufacturing technology. For this reason, when an m-plane substrate or an m-plane semiconductor layer is formed by the current manufacturing technology, the actual surface is inclined from the ideal m-plane. Since the inclination angle and orientation vary depending on the manufacturing process, it is difficult to accurately control the inclination angle and inclination orientation of the surface.
- the surface (main surface) of the substrate or semiconductor is intentionally inclined at an angle of 1 ° or more from the m-plane.
- the gallium nitride-based compound semiconductor light-emitting element in the embodiment described below includes a p-type semiconductor region having a main surface that is inclined at an angle of 1 ° or more from the m-plane.
- FIG. 20 is a cross-sectional view showing the gallium nitride compound semiconductor light emitting device 100a of this embodiment.
- the gallium nitride-based compound semiconductor light emitting device 100a In order to form a p-type semiconductor region whose main surface is a surface inclined at an angle of 1 ° or more from the m-plane, the gallium nitride-based compound semiconductor light emitting device 100a according to this embodiment has an angle of 1 ° or more from the m-plane.
- a GaN substrate 10a whose main surface is an inclined surface is used.
- a substrate whose main surface is inclined at an angle of 1 ° or more from the m-plane is generally referred to as an “off substrate”.
- the off-substrate can be manufactured by slicing the substrate from the single crystal ingot and polishing the surface of the substrate so that the main surface is intentionally inclined in a specific direction from the m-plane.
- a semiconductor multilayer structure 20a is formed on the GaN substrate 10a.
- the semiconductor layers 22a, 24a, and 26a shown in FIG. 20 are inclined at an angle of 1 ° or more from the m-plane. This is because when various semiconductor layers are stacked on the inclined main surface of the substrate, the surfaces (main surfaces) of these semiconductor layers are also inclined from the m-plane.
- a sapphire substrate or SiC substrate having a surface inclined in a specific direction from the m-plane may be used. In the configuration of the present invention, it is sufficient that at least the surface of the p-type semiconductor region is inclined at an angle of 1 ° or more from the m-plane.
- FIG. 21A is a diagram schematically showing a crystal structure (wurtzite crystal structure) of a GaN-based compound semiconductor, and shows a structure obtained by rotating the crystal structure in FIG. 2 by 90 °.
- the + c plane is a (0001) plane in which Ga atoms appear on the surface, and is referred to as a “Ga plane”.
- the ⁇ c plane is a (000-1) plane in which N (nitrogen) atoms appear on the surface, and is referred to as an “N plane”.
- the + c plane and the ⁇ c plane are parallel to each other, and both are perpendicular to the m plane.
- the c-plane Since the c-plane has polarity, the c-plane can be divided into a + c-plane and a ⁇ c-plane in this way, but there is no significance in distinguishing the non-polar a-plane into the + a-plane and the ⁇ a-plane. .
- the + c axis direction shown in FIG. 21A is a direction extending perpendicularly from the ⁇ c plane to the + c plane.
- the a-axis direction corresponds to the unit vector a 2 in FIG. 2 and faces the [-12-10] direction parallel to the m-plane.
- FIG. 21B is a perspective view showing the correlation between the normal of the m-plane, the + c-axis direction, and the a-axis direction.
- the normal of the m-plane is parallel to the [10-10] direction and is perpendicular to both the + c-axis direction and the a-axis direction, as shown in FIG.
- the fact that the main surface of the GaN-based compound semiconductor layer is inclined at an angle of 1 ° or more from the m-plane means that the normal line of the main surface of the semiconductor layer is inclined at an angle of 1 ° or more from the normal line of the m-plane. means.
- FIG. 22A and 22B are cross-sectional views showing the relationship between the main surface and the m-plane of the GaN-based compound semiconductor layer, respectively.
- This figure is a cross-sectional view perpendicular to both the m-plane and the c-plane.
- FIG. 22 shows an arrow indicating the + c-axis direction. As shown in FIG. 22, the m-plane is parallel to the + c-axis direction. Therefore, the normal vector of the m-plane is perpendicular to the + c axis direction.
- the normal vector of the main surface in the GaN-based compound semiconductor layer is inclined in the c-axis direction from the normal vector of the m-plane. More specifically, in the example of FIG. 22A, the normal vector of the principal surface is inclined toward the + c plane, but in the example of FIG. 22B, the normal vector of the principal surface is ⁇ Inclined to the c-plane side.
- the inclination angle (inclination angle ⁇ ) of the normal vector of the principal surface with respect to the normal vector of the m plane in the former case is a positive value, and the inclination angle ⁇ in the latter case is a negative value. I will decide. In either case, it can be said that “the main surface is inclined in the c-axis direction”.
- FIGS. 23A and 23B are cross-sectional views corresponding to FIGS. 22A and 22B, respectively, and show the vicinity of the main surface in the p-type semiconductor region inclined in the c-axis direction from the m-plane. Show.
- each step has a height equivalent to a monoatomic layer (2.7 mm) and is arranged in parallel at substantially equal intervals (30 mm or more).
- a main surface inclined from the m-plane as a whole is formed, but it is considered that a large number of m-plane regions are exposed microscopically.
- FIG. 24 is a cross-sectional TEM photograph of a p-type semiconductor region tilted by 1 ° from the m-plane in the ⁇ c-axis direction.
- the m-plane is clearly exposed on the surface of the p-type semiconductor region, and it is confirmed that the inclination is formed by atomic steps.
- the surface of the GaN-based compound semiconductor layer whose main surface is inclined from the m-plane has such a structure because the m-plane is originally very stable as a crystal plane.
- a similar phenomenon is considered to occur even if the inclination direction of the normal vector of the main surface is oriented to a plane orientation other than the + c plane and the ⁇ c plane. Even if the normal vector of the main surface is inclined in the a-axis direction, for example, the same can be considered if the inclination angle is in the range of 1 ° to 5 °.
- the contact resistance does not depend on the inclination angle.
- an electrode of an Mg / Pt layer is formed on a p-type semiconductor region inclined by 0 °, 2 °, or 5 ° in the ⁇ c axis direction from the m-plane, and the contact resistance ( ⁇ ⁇ cm 2 ) is shown.
- the vertical axis of the graph is the specific contact resistance
- the horizontal axis is the inclination angle (angle formed by the normal of the m-plane and the normal of the surface in the p-type semiconductor region) ⁇ .
- the specific contact resistance is a value of the specific contact resistance after the electrode is formed and heat treatment is performed. As can be seen from the results of FIG. 25, when the inclination angle ⁇ is 5 ° or less, the contact resistance has a substantially constant value.
- the absolute value of the inclination angle ⁇ is limited to 5 ° or less.
- the actual inclination angle ⁇ may be shifted from 5 ° by about ⁇ 1 ° due to manufacturing variations. It is difficult to completely eliminate such manufacturing variations, and such a small angular deviation does not hinder the effects of the present invention.
- FIG. 26 is a cross-sectional view showing the gallium nitride compound semiconductor light emitting device 100b of this embodiment.
- the basic structure of the gallium nitride-based compound semiconductor light-emitting device 100b is the same as that of the gallium nitride-based compound semiconductor light-emitting device 100 shown in FIG. 3, but the p-type electrode provided on the p-type semiconductor region includes the Mg alloy layer 61b. Characterized by points.
- a metal such as Pt is mixed in Mg at a concentration of% order (for example, 1%) or more.
- the metal layer 34 is present on the Mg alloy layer 61b. At least a part of the metal layer 34 may be alloyed.
- FIGS. 27A to 27C are views for explaining alloying between the Mg layer 32 and the metal layer 34.
- FIG. 27A shows a state in which a part of the Mg layer 32 and the metal layer 34 are alloyed.
- the electrode 30A includes an Mg layer 32 in contact with the Al d Ga e N layer 26, an Mg alloy layer 61A existing on the Mg layer 32, and an Mg alloy layer 61A. It is composed of a metal layer 34 existing above.
- the Mg alloy layer 61 ⁇ / b> A is an alloy of Mg and a metal constituting the metal layer 34.
- FIG. 27B shows a state in which the alloying of Mg and the metal constituting the metal layer has progressed to a portion in contact with the Al d Ga e N layer 26.
- the lower portion of electrode 30B (the portion of electrode 30B that contacts Al d Ga e N layer 26) is formed from Mg alloy layer 61B.
- the metal layer 34 exists on the Mg alloy layer 61B.
- FIG. 27C shows the electrode 30C in a state where the entire Mg layer and metal layer are alloyed.
- the electrode 30C is composed only of the Mg alloy layer 61C.
- the Mg alloy layers 61A, 61B, and 61C shown in FIGS. 27A to 27C are composed of Mg and a metal constituting the metal layer 34 (the main component is the Mg and the metal layer 34). Metal).
- heat treatment is performed after depositing, for example, at least one metal selected from the group consisting of Pt, Mo, Pd, and Ag on the Mg layer. It is suitably formed. By making the heat treatment temperature relatively high and the heat treatment time relatively long, the Mg layer is easily alloyed.
- the structure shown in FIG. 27C may be formed by performing heat treatment after performing vapor deposition using a mixture or compound of metal and Mg constituting the metal layer 34 as a vapor deposition source.
- the “Mg alloy layers 61 ⁇ / b> A, 61 ⁇ / b> B, 61 ⁇ / b> C” include a collection of many island-like (island-like) Mg alloys existing on the surface of the p-type semiconductor region 26. Further, the “Mg alloy layers 61A, 61B, 61C” may be composed of a film (eg, a porous film) having a plurality of openings.
- the semiconductor light emitting device according to the present invention may be used as a light source as it is.
- the nitride-based semiconductor light-emitting device according to the present invention can be suitably used as a light-emitting device (for example, a white light source) with an extended wavelength band when combined with a resin or the like that includes a fluorescent material for wavelength conversion.
- FIG. 28 is a schematic diagram showing an example of such a white light source.
- the light emitting device of FIG. 28 includes a light emitting element 100 having the configuration shown in FIG. 3A and a phosphor that converts the wavelength of light emitted from the light emitting element 100 into a longer wavelength (for example, YAG: Yttrium Aluminum Garnet). ) Is dispersed.
- the light emitting element 100 is mounted on a support member 220 having a wiring pattern formed on the surface, and a reflection member 240 is disposed on the support member 220 so as to surround the light emitting element 100.
- the resin layer 200 is formed so as to cover the light emitting element 100.
- the nitride-based semiconductor light-emitting device of the present invention is suitably mounted on the support member 220 in a state where the surface on which the electrode is formed is disposed on the support member 220 side. Fixing on the support member 220 in such an arrangement is generally referred to as “flip chip mounting”. In the flip chip mounting example, light is extracted from the back side of the substrate of the light emitting element 100.
- the present inventors performed a nanoindentation test in order to compare the hardness of the surface of the conventional + c-plane GaN layer with the hardness of the m-plane GaN layer surface. Specifically, a test (pop-in) was performed in which a diamond needle having a nano-sized tip was pushed into the surface of the GaN layer. An in-plane mapping of the measurement results was made by pushing the diamond needle into the GaN layer at different positions in the substrate plane.
- FIG. 29A is a graph showing the result of pop-in on the surface of the + c-plane GaN layer
- FIG. 29B is a graph showing the result of pop-in on the surface of the m-plane GaN layer.
- the horizontal axis represents the indentation depth [nm] of the diamond needle with respect to the GaN layer surface
- the vertical axis represents the weight [ ⁇ N (micro Newton)] of the diamond needle.
- a plurality of curves shown in the graphs of FIGS. 29A and 29B respectively show the measurement results at different positions.
- the indentation depth of the needle gradually increases as the indentation load increases after the indentation is started.
- a phenomenon is observed in which the indentation depth changes abruptly. This phenomenon is called “pop-in phenomenon”.
- the pop-in phenomenon is observed when GaN plastic deformation occurs.
- an “indentation” having a depth of about 70 to 100 nm having a needle tip size is formed on the surface of the GaN layer.
- the magnitude of the load that causes pop-in is stable, but in the case of the m-plane GaN layer surface in FIG. 29B, the load that causes pop-in varies greatly.
- the crystal structure of the + c-plane GaN layer has sixfold symmetry with respect to an axis perpendicular to the layer. For this reason, it is presumed that the mechanical force applied to the + c-plane GaN layer from the outside can be easily dispersed and has a uniform mechanical strength in the plane. On the other hand, the symmetry in the crystal structure of the m-plane GaN layer is lower than that of the + c-plane GaN layer.
- the mechanical force given to the m-plane GaN layer from the outside cannot be uniformly distributed, and it can be considered that the pop-in results vary. That is, when considered together with the result of the hardness mapping of FIG. 19, the surface of the m-plane GaN layer has a lower hardness than the + c-plane GaN layer and is easily deformed by a local mechanical load.
- the light emitting element is pressed onto a support member such as a mounting substrate while applying ultrasonic waves to the light emitting element, and therefore, an uneven force is easily applied to the m-plane GaN layer. Therefore, there is a risk that the light emitting element is cracked starting from a location where the mechanical strength of the m-plane GaN layer is low during the flip chip mounting process.
- the existence of such a low mechanical strength portion on the surface of the m-plane GaN layer has not been known so far, and is a phenomenon that has been clarified for the first time by the present inventors. Further, according to the study of the present inventor, it was found that the use of the Mg layer for at least a part of the contact electrode can suppress the breakage of the light emitting element as compared with the case where the conventional contact electrode is used. As described above, it was found that the use of the Mg layer not only can reduce the contact resistance to the m-plane GaN layer, but also can absorb mechanical stress during mounting and increase the yield of flip chip mounting. .
- This light emitting device includes a mounting substrate 260 having a metal wiring 265 and a nitride-based semiconductor light emitting element 100 flip-chip mounted on the mounting substrate 260.
- This nitride-based semiconductor light emitting device 100 includes a nitride-based semiconductor multilayer structure having a p-type semiconductor region whose surface is an m-plane, and a p-type electrode 30 provided on the p-type semiconductor region.
- the p-type electrode 30 includes an Mg layer 32 in contact with the surface of the p-type semiconductor region, and is connected to the metal wiring 265.
- the illustrated light emitting device 100 is an example of the nitride semiconductor light emitting device according to the present invention described with reference to FIG. 3, and is formed on the surface of the m-plane GaN-based substrate 10 and the m-plane GaN-based substrate 10.
- the p-type electrode 30 in this embodiment includes an Mg layer 32 and a metal layer 34.
- the n-type electrode 40 only needs to have a known configuration.
- the light emitting elements 100 a and 100 b may be used instead of the light emitting element 100.
- the light emitting device further includes a pad electrode 110 in contact with each of the p-type electrode 30 and the n-type electrode 40, and a bump 115 provided between the pad electrode 110 and the metal wiring 265. .
- Mg is especially soft among metals and has the highest vibration absorption (damping ability to absorb and dissipate vibration energy as heat) among metals, so it easily absorbs vibrations and shocks. Therefore, the Mg layer 32 of the p-type electrode 30 can absorb mechanical stress applied to the m-plane surface of the p-type nitride semiconductor layer 26 during flip-chip mounting, and can prevent substrate cracking.
- the p-type electrode 30 since Mg has a property of easily absorbing vibration and impact, the p-type electrode 30 only needs to have the Mg layer 32 in order to suppress damage to the light emitting element.
- the metal layer 34 in the electrode 30 may be made of any metal.
- an m-plane GaN-based substrate 10 is prepared.
- An n-type nitride semiconductor layer 22 made of n-type GaN having a thickness of about 4 ⁇ m, an active layer 24, and a p-type GaN layer having a thickness of about 500 nm are formed on the substrate 10 by metal organic chemical vapor deposition (MOCVD).
- An m-plane p-type nitride semiconductor layer 26 is deposited.
- the active layer 24 has a multiple quantum well structure in which InGaN quantum well layers having a thickness of about 3 to 10 nm and GaN barrier layers having a thickness of about 5 to 20 nm are alternately stacked.
- trimethylgallium can be used as the Ga material
- trimethylindium can be used as the In material
- trimethylaluminum can be used as the Al material.
- Si can be used for the n-type impurity
- Mg can be used for the p-type impurity.
- the n-type nitride semiconductor layer 22 may be an n-type AlGaN layer or a multilayer film of an n-type GaN layer and an n-type AlGaN layer in addition to the n-type GaN layer.
- the active layer 24 may have a multiple quantum well structure including InGaN quantum well layers and InGaN barrier layers having different In compositions.
- the p-type nitride semiconductor layer 26 may be a p-type AlGaN layer or a multilayer film of a p-type GaN layer and a p-type AlGaN layer.
- the p-type nitride semiconductor layer 26 and a part of the active layer 24 are removed to expose the n-electrode formation region. Specifically, after a part of the p-type nitride semiconductor layer 26 is covered with a resist mask (not shown), the p-type nitride semiconductor layer 26 and a part of the active layer 24 are removed by dry etching. Dry etching can be performed using a chlorine-based gas. The depth of etching is set to about 1 to 1.5 ⁇ m, for example.
- a p-type electrode 30 and an n-type electrode 40 are formed. Specifically, first, an n-type electrode 40 having a laminated structure of a Ti layer having a thickness of 5 to 20 nm, an Al layer having a thickness of 50 to 100 nm, and a Pt layer having a thickness of 5 to 10 nm is formed.
- the n-type electrode 40 can be formed by electron beam evaporation. A lift-off method is used for forming the electrode pattern. After the formation of the n-electrode layer 130, heat treatment is performed at a temperature in the range of 500 to 750 ° C. for about 10 minutes in a nitrogen atmosphere.
- the Mg layer 32 is deposited.
- the pulse deposition method is used to form the Mg layer 32.
- the metal layer 34 composed of a Pt layer having a thickness of about 10 to 200 nm is continuously deposited without being exposed to the atmosphere.
- a lift-off method is used for forming the electrode pattern.
- a heat treatment is performed in the range of 400 to 700 ° C. for about 10 minutes in a nitrogen atmosphere.
- the metal layer 34 is formed from Pt, but the metal layer 34 is preferably formed from at least one metal selected from the group consisting of Pt, Mo, Pd, and Ag, for example.
- the p-type electrode 30 has a high light reflectivity. Since Ag has a very high reflectivity with respect to visible light, an Ag layer is preferably used as the metal layer 34 when importance is attached to the reflectivity.
- the Mg layer 32 disposed between the p-type nitride semiconductor layer 26 and the metal layer 34 absorbs mechanical stress applied to the m-plane GaN surface during flip chip mounting, and reduces substrate cracking during mounting. can do.
- the thickness of the Mg layer 32 may be set to about 2 nm to 50 nm. However, from the viewpoint of mechanical stress absorption, the thickness of the Mg layer 32 is preferably set to 15 nm or more.
- a pad electrode 110 is formed on part of the n-type electrode 40 and the p-type electrode 30.
- the pad electrode 110 is obtained by laminating a Ti layer having a thickness of about 10 to 50 nm, a Pt layer having a thickness of about 30 to 100 nm, and an Au layer having a thickness of about 150 to 500 nm.
- the nitride semiconductor light emitting device 100 is completed.
- the pad electrode 110 can be formed using an electron beam evaporation apparatus.
- the pad electrode 110 can also be formed using a material such as W in addition to Ti, Pt, and Au.
- the light emitting element 100 is mounted on a ceramic mounting substrate 260 by flip chip mounting.
- the mounting substrate 260 is not limited to a ceramic substrate, and may be a metal substrate, a resin substrate, or the like. When using a resin substrate, it is preferable to provide a metal via that penetrates the resin substrate in order to improve heat dissipation.
- a metal wiring 265 made of a Cu layer and an Au layer is formed on the surface of the mounting substrate 260.
- the mounting process can be performed using an ultrasonic flip chip mounting method.
- the bump 115 made of Au is attached on the metal wiring 265 on the mounting substrate 260.
- the position of the bump 115 is determined according to the position of the pad electrode 110.
- the light emitting element 100 of FIG. 31D is mounted on the mounting substrate 260 with a stage temperature of about 120 to 160 ° C. and a weight during mounting of about 8 to 12 N.
- the Mg layer 32 absorbs mounting stress at the time of mounting, so that it is difficult for the substrate to crack.
- the weight during mounting can be increased, and as a result, the adhesion between the mounting substrate 260 and the light emitting element 100 can be increased.
- FIG. 32 is a graph comparing the standard deviation of the rising voltage of each light emitting device, in which nine light emitting devices having thicknesses of 2 nm, 15 nm, and 45 nm (thickness after heat treatment) are formed.
- the rising voltage is defined as a voltage value when a forward voltage is applied to the light emitting element and the current value reaches 10 mA.
- the metal layer 34 is formed of a Pt layer having a thickness of 75 nm.
- the pad electrode 110 has a laminated structure including a Ti layer having a thickness of 40 nm, a Pt layer having a thickness of 80 nm, and an Au layer having a thickness of 160 nm.
- the thickness of the m-plane GaN-based substrate 10 is 150 ⁇ m.
- the mounting substrate 260 is made of a ceramic substrate, and the bumps 102 are made of Au.
- FIG. 32 as a comparative example, the rise voltage standard when a stacked structure of Pd / Pt layers often used in a light-emitting element on the + c-plane GaN layer is used for the light-emitting element on the m-plane GaN layer is shown. The deviation is shown.
- the Mg layer 32 is replaced with Pd having a thickness of 40 nm.
- the variation in the rising voltage can be reduced as compared with the comparative example. It can also be seen that the variation in the rising voltage is reduced as the Mg layer 32 becomes thicker. In particular, when the thickness of the Mg layer 32 is about 15 nm or more, the variation in the rising voltage becomes sufficiently small.
- the variation in the rising voltage is caused by a defect or the like formed in the light emitting element due to mechanical stress during mounting. From the above, it can be seen that the mechanical stress during mounting can be more significantly suppressed by setting the thickness to 15 nm or more.
- FIG. 33 is an optical micrograph of the surface of the light emitting device according to the present embodiment during light emission. Substrate cracking of the m-plane GaN-based substrate did not occur. The current value at the time of light emission is 20 mA. Uneven light emission is not particularly observed, and uniform light emission can be realized.
- the light emitting device in the present embodiment is different from the light emitting device shown in FIG. 30 only in the configuration of the p-type electrode 30. Description of portions other than this difference will not be repeated here. Hereinafter, the configuration of the p-type electrode 30 will be described.
- the p-type electrode 30 in this embodiment has a structure in which a first Mg layer 32a, a first metal layer 34a, a second Mg layer 32b, and a second metal layer 34b are stacked from the p-type nitride semiconductor layer 26 in this order.
- the first Mg layer 32a in the present embodiment plays a role for lowering the specific contact resistance
- the second Mg layer 32b plays a role of reducing mounting stress during flip chip mounting.
- the specific contact resistance is the smallest when the thickness of the Mg layer 32 is 2 nm, and the specific contact resistance increases as the thickness of the Mg layer 32 increases (FIG. 5A).
- the contact resistance of the Mg / Pt electrode becomes almost the same as the contact resistance of the Pd / Pt electrode with respect to the m-plane GaN layer (FIG. 5B).
- the specific contact resistance decreases as the layer thickness decreases.
- the thickness of the Mg layer 32 in the light-emitting element finally obtained through all the manufacturing steps including heat treatment is preferably 45 nm or less, and is within the range of 2 nm to 15 nm. More preferably it is.
- the Mg layer is thin (for example, when the final Mg layer thickness is less than 2 nm), compared to when the Mg layer is thick (for example, when the final Mg layer thickness is 15 nm), flip chip mounting The mounting stress at the time is not reduced.
- the thickness of the first Mg layer 32a in contact with the p-type nitride semiconductor layer is set to 2 nm or more and 15 nm or less in order to reduce the specific contact resistance, and the mounting stress at the time of flip chip mounting is sufficient.
- the thickness of the second Mg layer 32b is set to 15 nm or more and 45 nm or less.
- the second metal layer 34b is preferably formed from a metal that is less likely to form an alloy with Mg than Au.
- it preferably contains at least one metal selected from the group consisting of Pt, Mo, Pd, and Ag.
- the second metal layer 34b is preferably an alloy of at least one metal selected from the group consisting of Pt, Mo, Pd, and Ag and Mg.
- Pt, Mo, Pd and Ag are metals that are difficult to alloy with Mg as compared with Au, but a part of Mg is present near the interface between the second Mg layer 32b and the second metal layer 34b by heat treatment.
- a thin alloy layer can be formed by reacting with. By forming the thin alloy layer, the adhesion between the second Mg layer 32b and the second metal layer 34b is improved.
- the number of Mg layers included in the p-type electrode 30 is not limited to two. Further, the first metal layer 34a and the second metal layer 34b may be formed of different materials.
- a light-emitting element on an m-plane GaN substrate was fabricated using a stacked structure of Pd / Pt layers often used in light-emitting elements on a + c-plane GaN layer.
- the film thickness of the Pd layer is 40 nm
- the film thickness of the Pt layer is 75 nm
- the heat treatment conditions are 500 ° C. and 10 minutes.
- FIG. 35 is an optical micrograph at the time of light emission after flip-chip mounting for the light-emitting element of this comparative example. As shown in FIG. 35, there were a large number of light-emitting elements in which some cracks occurred. The cause of substrate cracking is the force applied to the m-plane nitride semiconductor during flip-chip mounting.
- FIG. 36 is an optical micrograph of the light emitting element that was not damaged during flip-chip mounting in the comparative example described above and was caused to emit light by flowing a current of 10 mA. Among the light-emitting elements that were not cracked during mounting, there were a number of light-emitting irregularities.
- the above-described excellent effect is exhibited.
- Such an effect of reducing the contact resistance
- the contact resistance can be reduced in a nitride-based semiconductor light-emitting device in which crystals are grown on an m-plane substrate or a nitride-based semiconductor multilayer structure having an m-plane as a surface. Therefore, a nitride-based semiconductor light-emitting element (or a GaN-based semiconductor multilayer structure having an m-plane as a surface) that has been conventionally difficult to actively use due to poor contact resistance characteristics and crystal-grown on an m-plane substrate. Body).
Abstract
Description
表面がm面であるp型半導体領域を有する窒化物系半導体積層構造と、前記p型半導体領域上に設けられた電極とを備え、前記p型半導体領域は、AlxInyGazN(x+y+z=1,x≧0, y≧0, z≧0)半導体からなり、前記電極は、前記p型半導体領域の前記表面に接触したMg層を含み、前記工程(B)は、超音波を前記窒化物系半導体発光素子に印加しながら、前記窒化物系半導体発光素子の前記電極を前記実装基板の前記配線に押圧し、前記窒化物系半導体発光素子を前記実装基板上に固定する工程を含む。
I=I0exp(V/n・KT)
図20は、本実施形態の窒化ガリウム系化合物半導体発光素子100aを示す断面図である。m面から1°以上の角度で傾斜した面を主面とするp型半導体領域を形成するため、本実施形態に係る窒化ガリウム系化合物半導体発光素子100aは、m面から1°以上の角度で傾斜した面を主面とするGaN基板10aを用いている。主面がm面から1°以上の角度で傾斜している基板は、一般に「オフ基板」と称される。オフ基板は、単結晶インゴットから基板をスライスし、基板の表面を研磨する工程で、意図的にm面から特定方位に傾斜した面を主面とするように作製され得る。このGaN基板10a上に、半導体積層構造20aを形成する。図20に示す半導体層22a、24a、26aは主面がm面から1°以上の角度で傾斜している。これは傾斜した基板の主面上に、各種半導体層が積層されると、これらの半導体層の表面(主面)もm面から傾斜するからである。GaN基板10aの代わりに、例えば、m面から特定方向に傾斜した面を表面とするサファイア基板やSiC基板を用いてもよい。本発明の構成においては、少なくともp型半導体領域の表面がm面から1°以上の角度で傾斜していればよい。
図26は、本実施形態の窒化ガリウム系化合物半導体発光素子100bを示す断面図である。窒化ガリウム系化合物半導体発光素子100bは、基本構造は図3に示す窒化ガリウム系化合物半導体発光素子100と同様であるが、p型半導体領域上に設けられたp型電極がMg合金層61bを含む点に特徴を有する。
本発明に係る上記の半導体発光素子は、そのまま光源として使用されても良い。しかし、本発明に係る窒化物系半導体発光素子は、波長変換のための蛍光物質を備える樹脂などと組み合わせれば、波長帯域の拡大した発光装置(例えば白色光源)として好適に使用され得る。
図30を参照して、本発明による発光装置の実施形態を説明する。
図34を参照して、本発明による発光装置の他の実施形態を説明する。
比較例として、+c面GaN層上の発光素子で良く用いられているPd/Pt層の積層構造を用い、m面GaN基板上の発光素子を作製した。Pd層の膜厚は40nm、Pt層の膜厚は75nm、熱処理条件は500℃、10分である。
12、12a 基板の表面(m面)
20、20a 半導体積層構造
22、22a AluGavInwN層
24、24a 活性層
26、26a AldGaeN層
30、30A、30B、30C、30a、30b p型電極
32 Mg層
32a 第1Mg層
32b 第2Mg層
34 金属層(Pt層)
34a 第1金属層
34b 第2金属層
40、40a n型電極
42、42a 凹部
61A、61B、61C、61b Mg合金層
100、100a、100b 窒化物系半導体発光素子
110 パッド電極
115 バンプ
200 樹脂層
220 支持部材
240 反射部材
260 実装基板
265 金属配線
Claims (26)
- 配線を有する実装基板と、
前記実装基板上にフリップチップ実装された窒化物系半導体発光素子と、
を備える発光装置であって、
前記窒化物系半導体発光素子は、
表面がm面であるp型半導体領域を有する窒化物系半導体積層構造と、
前記p型半導体領域上に設けられた電極と
を備え、
前記p型半導体領域は、AlxInyGazN(x+y+z=1,x≧0, y≧0, z≧0)半導体からなり、
前記電極は、前記p型半導体領域の前記表面に接触したMg層を含み、
前記電極は、前記配線に接続されている発光装置。 - 前記電極は前記Mg層上に設けられた金属層を有している請求項1に記載の発光装置。
- 前記金属層は、Pt、Mo、Pd、およびAgからなる群から選択される少なくとも1種の金属から形成されている請求項2に記載の発光装置。
- 前記Mg層と前記金属層との間にはMg合金層が形成されている請求項3に記載の発光装置。
- 前記Mg層の厚さは15nm以上45nm以下である請求項1から4のいずれかに記載の発光装置。
- 前記電極は、
前記Mg層上に設けられた第1金属層と、
前記第1金属層上に設けられた第2Mg層と、
前記第2Mg層上に設けられた第2金属層と、
を有している請求項1に記載の発光装置。 - 前記第1金属層は、Pt、Mo、Pd、およびAgからなる群から選択される少なくとも1種の金属から形成され、
前記第2金属層は、Pt、Mo、Pd、およびAgからなる群から選択される少なくとも1種の金属から形成されている請求項6に記載の発光装置。 - 前記第2Mg層の厚さは15nm以上である請求項6または7に記載の発光装置。
- 前記Mg層の厚さは2nm以上15nm以下である請求項8に記載の発光装置。
- 請求項1から9のいずれかに記載の発光装置に用いられる窒化物系半導体発光素子であって、
表面がm面であるp型半導体領域を有する窒化物系半導体積層構造と、
前記p型半導体領域上に設けられた電極と
を備え、
前記p型半導体領域は、AlxInyGazN(x+y+z=1,x≧0, y≧0, z≧0)半導体からなり、
前記電極は、前記p型半導体領域の前記表面に接触する厚さ15nm以上のMg層を含む窒化物系半導体発光素子。 - 前記電極は、前記Mg層上に設けられた金属層を有している請求項10に記載の窒化物系半導体発光素子。
- 前記電極は、
前記Mg層上に設けられた第1金属層と、
前記第1金属層上に設けられた第2Mg層と、
前記第2Mg層上に設けられた第2金属層と、
を有している請求項11に記載の窒化物系半導体発光素子。 - 配線を有する実装基板を用意する工程(A)と、
窒化物系半導体発光素子を前記実装基板上に実装する工程(B)と、
を含む発光装置の製造方法であって、
前記窒化物系半導体発光素子は、
表面がm面であるp型半導体領域を有する窒化物系半導体積層構造と、
前記p型半導体領域上に設けられた電極と
を備え、
前記p型半導体領域は、AlxInyGazN(x+y+z=1,x≧0, y≧0, z≧0)半導体からなり、
前記電極は、前記p型半導体領域の前記表面に接触したMg層を含み、
前記工程(B)は、超音波を前記窒化物系半導体発光素子に印加しながら、前記窒化物系半導体発光素子の前記電極を前記実装基板の前記配線に押圧し、前記窒化物系半導体発光素子を前記実装基板上に固定する工程を含む、発光装置の製造方法。 - 配線を有する実装基板と、
前記実装基板上にフリップチップ実装された窒化物系半導体発光素子と、
を備える発光装置であって、
前記窒化物系半導体発光素子は、
表面がm面であるp型半導体領域を有する窒化物系半導体積層構造と、
前記p型半導体領域上に設けられた電極と
を備え、
前記p型半導体領域は、AlxInyGazN(x+y+z=1,x≧0, y≧0, z≧0)半導体からなり、
前記電極は、前記p型半導体領域の前記表面に接触したMg合金層を含み、
前記電極は、前記配線に接続されている発光装置。 - 前記電極は、前記Mg合金層上に設けられた金属層を有している請求項14に記載の発光装置。
- 前記金属層は、Pt、Mo、Pd、およびAgからなる群から選択される少なくとも1種の金属から形成されている請求項15に記載の発光装置。
- 前記電極は、Mg合金層のみから構成されている請求項14に記載の発光装置。
- 前記Mg合金層は、Mgと、Pt、Mo、Pd、およびAgからなる群から選択される少なくとも1種の金属との合金から形成されている請求項17に記載の発光装置。
- 配線を有する実装基板と、
前記実装基板上にフリップチップ実装された窒化物系半導体発光素子と、
を備える発光装置であって、
前記窒化物系半導体発光素子は、
p型半導体領域を有する窒化物系半導体積層構造と、
前記p型半導体領域上に設けられた電極と
を備え、
前記p型半導体領域は、AlxInyGazN(x+y+z=1,x≧0, y≧0, z≧0)半導体からなり、
前記p型半導体領域における主面の法線とm面の法線とが形成する角度が1°以上5°以下であり、
前記電極は、前記p型半導体領域の前記表面に接触したMg層を含み、
前記電極は、前記配線に接続されている発光装置。 - 前記電極は前記Mg層上に設けられた金属層を有している請求項19に記載の発光装置。
- 前記金属層は、Pt、Mo、Pd、およびAgからなる群から選択される少なくとも1種の金属から形成されている請求項20に記載の発光装置。
- 配線を有する実装基板と、
前記実装基板上にフリップチップ実装された窒化物系半導体発光素子と、
を備える発光装置であって、
前記窒化物系半導体発光素子は、
p型半導体領域を有する窒化物系半導体積層構造と、
前記p型半導体領域上に設けられた電極と
を備え、
前記p型半導体領域は、AlxInyGazN(x+y+z=1,x≧0, y≧0, z≧0)半導体からなり、
前記p型半導体領域における主面の法線とm面の法線とが形成する角度が1°以上5°以下であり、
前記電極は、前記p型半導体領域の前記表面に接触したMg合金層を含み、 前記電極は、前記配線に接続されている発光装置。 - 前記電極は、前記Mg合金層上に設けられた金属層を有している請求項22に記載の発光装置。
- 前記金属層は、Pt、Mo、Pd、およびAgからなる群から選択される少なくとも1種の金属から形成されている請求項23に記載の発光装置。
- 前記電極は、Mg合金層のみから構成されている請求項22に記載の発光装置。
- 前記Mg合金層は、Mgと、Pt、Mo、Pd、およびAgからなる群から選択される少なくとも1種の金属との合金から形成されている請求項25に記載の発光装置。
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CN102067348A (zh) | 2011-05-18 |
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US20110198568A1 (en) | 2011-08-18 |
JPWO2010116703A1 (ja) | 2012-10-18 |
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