WO2010103695A1 - Procédé de fabrication d'un module comprenant un composant intégré, et module à composant intégré - Google Patents

Procédé de fabrication d'un module comprenant un composant intégré, et module à composant intégré Download PDF

Info

Publication number
WO2010103695A1
WO2010103695A1 PCT/JP2009/069091 JP2009069091W WO2010103695A1 WO 2010103695 A1 WO2010103695 A1 WO 2010103695A1 JP 2009069091 W JP2009069091 W JP 2009069091W WO 2010103695 A1 WO2010103695 A1 WO 2010103695A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
component
interlayer connection
connection conductor
manufacturing
Prior art date
Application number
PCT/JP2009/069091
Other languages
English (en)
Japanese (ja)
Inventor
麻友子 西原
雅司 荒井
Original Assignee
株式会社村田製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Priority to JP2011503649A priority Critical patent/JP5163806B2/ja
Publication of WO2010103695A1 publication Critical patent/WO2010103695A1/fr

Links

Images

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/188—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or attaching to a structure having a conductive layer, e.g. a metal foil, such that the terminals of the component are connected to or adjacent to the conductive layer before embedding, and by using the conductive layer, which is patterned after embedding, at least partially for connecting the component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09509—Blind vias, i.e. vias having one side closed
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09563—Metal filled via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0191—Using tape or non-metallic foil in a process, e.g. during filling of a hole with conductive paste
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1461—Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
    • H05K2203/1469—Circuit made after mounting or encapsulation of the components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a method for manufacturing a component built-in module having a resin layer in which circuit components are embedded and a component built-in module.
  • circuit components are embedded in a circuit board to produce a module, thereby reducing the mounting area of the circuit parts and reducing the size of the circuit board.
  • a component-embedded substrate in which circuit components are embedded in a resin substrate is light in weight and does not involve high-temperature firing unlike a ceramic substrate, and thus has an advantage that there are few restrictions on the circuit components incorporated.
  • a wiring pattern is formed on a release carrier, a circuit component is mounted thereon, an uncured resin layer is pressure-bonded thereon, and the circuit component is embedded in the resin layer.
  • a method of manufacturing a component built-in module in which the release carrier is peeled off after being cured is disclosed.
  • a wiring pattern formed on a release carrier is crimped to the component built-in module with an uncured resin layer in between, the release carrier is peeled off, and the wiring pattern is resinized. Multi-layered by transferring to a layer.
  • FIG. 7 shows an example of a conventional method for manufacturing a component built-in module.
  • A shows a state in which a wiring pattern (land) 51 is formed on a release carrier 50 made of a SUS plate or the like.
  • B shows the state which applied the solder paste 52 on the wiring pattern 51, and mounted the circuit component 53 on it.
  • C shows a state in which a metal foil 55 is pressure-bonded on the release carrier 50 with an uncured resin layer 54 therebetween, and a circuit component 53 is embedded in the resin layer 54.
  • D shows a state in which the release carrier 50 is peeled after the resin layer 54 is cured.
  • (E) shows a state in which a metal foil 57 is attached to the lower surface of the resin layer 54 with an uncured thin wiring layer 56 therebetween, and an interlayer connection conductor (via) 58 is formed in the thin wiring layer 56.
  • (F) shows the state in which the wiring patterns 55a and 57a are formed by patterning the metal foils 55 and 57 on the front and back sides.
  • the release carrier 50 such as a SUS plate is used to transfer the wiring pattern to the resin layer. Since this carrier is disposable, the material cost is high and the carrier There is a problem that electrostatic breakdown occurs when the film is peeled off or unnecessary stress is applied to the resin layer 54 and the circuit component 53. Further, since the components are mounted on the wiring pattern (land), it is necessary to form the lands larger in advance in consideration of the mounting position accuracy, and there is a limit to shortening the distance between the components. Further, when solder is used as a mounting material, there is a problem that the risk of occurrence of a short circuit due to solder flash increases. Instead of the release carrier, the core substrate is prepared in advance, the components are mounted on the wiring pattern formed on the core substrate, and then the components are embedded in the resin layer. The flash problem is not solved.
  • An object of a preferred embodiment of the present invention is to provide a component built-in module manufacturing method and a component built-in module that reduce the risk of occurrence of a short circuit and the like and do not require a release carrier.
  • the invention provides a method of manufacturing a component built-in module including the following steps A to C. That is, -Step A: forming a hole for an interlayer connection conductor in the first layer and filling the hole with an interlayer connection conductor made of an uncured conductive paste; -Step B: A step of mounting a circuit component on the uncured interlayer connection conductor using the tackiness of the interlayer connection conductor; Step C: a step of forming a second layer made of an uncured resin layer on the first layer and embedding the circuit component in the second layer.
  • the invention according to the second embodiment provides a method of manufacturing a component built-in module including the following steps A to C. That is, -Step A: A step of fixing a circuit component on the first layer made of an uncured resin layer using the tackiness of the resin layer, -Step B: After the first layer is cured, an interlayer connection conductor hole reaching the terminal electrode of the circuit component is formed in the cured first layer, and the hole is connected to the terminal electrode of the circuit component Forming an interlayer connection conductor; Step C: a step of forming a second layer made of an uncured resin layer on the first layer before or after the step B and embedding the circuit component in the second layer.
  • a wiring pattern (land) is formed on a release carrier, and circuit components are not mounted on the wiring pattern (land), but on an uncured interlayer connection conductor formed on the first layer.
  • components are directly mounted using the tackiness of the interlayer connection conductor.
  • the conductive paste filled in the hole for the interlayer connection conductor has a function as a component mounting material, and mounting using solder is omitted.
  • a release carrier is not required, and the material cost can be greatly reduced. Also, resin filling failure due to insufficient flux cleaning does not occur because flux is not used.
  • the mounting land is formed larger than the terminal electrode of the component in consideration of the mounting position accuracy of the component, and the component is mounted thereon via a bonding material such as solder.
  • a bonding material such as solder.
  • the first layer may be a cured substrate (ceramic substrate or resin substrate), but an uncured resin layer is used as the first layer, and circuit components are fixed using the tackiness of the resin layer. May be.
  • the circuit component can be held tightly using not only the tack property of the uncured interlayer connection conductor but also the tack property of the uncured resin layer, so that the positional stability of the component is increased. There is.
  • a step of simultaneously curing the first layer and the interlayer connection conductor may be provided between the step B and the step C.
  • the second layer is pressure-bonded to the cured first layer and interlayer connection conductor, circuit components do not shift or come off when the second layer is pressure-bonded, and the reliability is improved.
  • an interlayer connection conductor made of an uncured conductive paste may be formed so as to protrude from the surface of the first layer.
  • a protective sheet such as a resin film is pasted on the surface of the first layer, and the interlayer connection is made between the first layer and the protective sheet using a laser or the like.
  • the conductive paste can be filled into the interlayer connection conductor hole without damaging the first layer.
  • the protective sheet is peeled off from the first layer after filling, the conductive paste protrudes from the surface of the first layer by the thickness of the protective sheet.
  • the circuit component is fixed on the first layer made of the uncured resin layer using the tackiness of the resin layer, the position of the circuit component is stabilized. Further, since the first layer and the circuit component can be brought into close contact with each other, it is not necessary to consider the fluidity of the resin of the second layer under the component when forming the second layer, and the resin filling property is improved. There is an effect. There is no need to form a component mounting land on the first layer, and since the terminal electrodes of the circuit components are connected to the outside via the interlayer connection conductor formed on the first layer, the risk of solder flash generation is reduced. Can be resolved.
  • a laser can be used to form the hole for the interlayer connection conductor reaching the terminal electrode of the circuit component in the first layer.
  • the interlayer connection conductor hole may be plated or filled with a conductive paste.
  • the step of forming a second layer of an uncured resin layer on the first layer and embedding the component in the second layer (step C) is connected to the terminal electrode of the circuit component in the cured first layer. It may be before or after the step of forming the interlayer connection conductor (step B).
  • step C is performed after step B, the uncured second layer is formed on the cured first layer, so that the circuit component is already stable, and the circuit component is formed when the second layer is formed. It is difficult for deviation to occur.
  • the process C is performed before the process B, the first layer and the second layer can be simultaneously cured. In that case, generation
  • the first layer may be formed on the support plate, and in step B, the interlayer connection conductor may be formed so as to penetrate the support plate and the first layer.
  • the support plate By providing the support plate, the stability of the first layer is improved and the component mounting accuracy is improved.
  • the support plate is used as it is as a substrate or as a wiring pattern.
  • a resin substrate having a thermal expansion coefficient approximate to that of the first layer and the second layer may be used. Since the thermal expansion coefficients of the support plate, the first layer, and the second layer are approximate, warpage and peeling are unlikely to occur. In that case, a wiring board having a wiring pattern on both surfaces of the resin substrate may be used as the support plate. In that case, it is not necessary to form the wiring pattern on the support plate later.
  • a metal foil may be used as the support plate, and after step C, the support plate may be patterned to obtain a wiring pattern. In this case, the thickness can be further reduced as compared with the case where a resin substrate is used.
  • the interlayer connection conductor and the terminal electrode of the circuit component may be bonded by solid phase diffusion.
  • the conductive paste is electrically connected by physical contact between the metal fillers in the paste and between the metal filler and the counterpart conductor (terminal electrode or wiring pattern).
  • an intermetallic compound is formed by solid phase diffusion between the metal filler and between the metal filler and the counterpart conductor, and a connection with lower resistance becomes possible.
  • Solid phase diffusion pastes are less susceptible to changes in conductivity due to resin expansion and contraction than general contact pastes.
  • solder is used on the uncured interlayer connection conductor formed in the first layer to directly mount the component using the tackiness of the interlayer connection conductor. Mounting can be omitted and the risk of solder flash can be eliminated. Also, a release carrier is not necessary, and the material cost can be greatly reduced. In addition, there is no need to form component mounting lands on the first layer, and the components are directly connected to the interlayer connection conductor, so the distance between the interlayer connection conductors can be made smaller than the distance between the lands, and further miniaturization is realized. it can.
  • the circuit component is fixed on the first layer made of the uncured resin layer using the tackiness of the resin layer. Since the first layer and the circuit component are in close contact with each other, when the second layer is formed, it is not necessary to consider the fluidity of the resin of the second layer below the component, and the resin filling property is improved. Further, it is not necessary to form a component mounting land on the first layer, and the terminal electrode of the circuit component is connected to the outside via the interlayer connection conductor formed on the first layer, so that the risk of solder flash generation Can be eliminated.
  • FIG. 1 shows a manufacturing process of a component built-in module including two circuit components (here, chip components).
  • the number of circuit components may be one or three or more.
  • the circuit component is not limited to a chip component, and may be any component such as a multi-terminal integrated circuit element or a surface wave element.
  • the component built-in module in the parent board state is manufactured and then cut into the child board state.
  • the resin layer 1 may be a prepreg such as a thermosetting resin sheet such as an epoxy resin or a thermosetting resin sheet containing an inorganic filler.
  • the thickness of the resin layer 1 is desirably about 10 to 50 ⁇ m.
  • FIG. 1B shows a second step, in which via holes (interlayer connection conductor holes) 3 are formed in the resin layer 1 including the PET films 2a and 2b.
  • Arbitrary methods such as laser processing and punching, can be used for the formation method of the via hole 3.
  • the via hole 3 is formed at a position corresponding to the terminal electrode of the circuit component 7 to be mounted later.
  • the via hole 3 may be a tapered hole whose diameter is reduced downward.
  • (C) of FIG. 1 is a 3rd process, after peeling PET film 2b by the side of the back, laminating metal foil 4, such as Cu foil, on the back surface of the resin layer 1, via the conductive paste 5 from the surface side Fill the hole 3.
  • the squeegee 6 can prevent the resin layer 1 from being damaged.
  • the conductive paste 5 used in this embodiment a paste containing Sn that is easy to be solid phase diffusion bonded to a Cu foil as a metal filler is desirable.
  • FIG. 1 is a 4th process and shows the state which peeled PET film 2a after filling with the conductive paste (interlayer connection conductor) 5.
  • FIG. A part of the conductive paste 5 protrudes from the surface of the resin layer 1 by the thickness of the PET film 2a.
  • FIG. 1E shows a fifth step, in which a circuit component 7 is mounted on the conductive paste 5 protruding on the surface of the resin layer 1. Since the conductive paste 5 is in an uncured state, the circuit component 7 is held in close contact by the tackiness of the conductive paste 5. At this time, since the resin layer 1 is also in an uncured state, the circuit component 7 can be held more stably by using the tack property of the resin layer 1 by pressing the circuit component 7 until it contacts the resin layer 1. . As described above, when the via hole 3 is a tapered hole having a large diameter toward the upper side, the contact area between the terminal electrode 7a of the circuit component 7 and the conductive paste 5 is increased. 7 should be implemented.
  • the tack property of the thermosetting resin contained in the conductive paste 5 and the resin layer 1 can be enhanced by performing the fifth step on a hot plate heated to a predetermined temperature (for example, 50 ° C.).
  • a predetermined temperature for example, 50 ° C.
  • the circuit component 7 is fixed by heating and curing the conductive paste 5 and the resin layer 1 in an oven at 180 ° C. 7 terminal electrode 7a and conductive paste 5 are electrically connected.
  • a pressure for example, 2 MPa
  • a conductive paste containing Sn as a metal filler conductivity can be obtained by forming an intermetallic compound by solid phase diffusion between Cu and Sn.
  • This conductive paste has a feature that it is less susceptible to changes in conductivity due to expansion and contraction of the resin than a conductive paste that takes conductivity by physical contact with a metal filler as in a general contact paste.
  • FIG. 1 (f) shows a sixth step, in which a metal foil 9 such as a Cu foil is pressure-bonded on the cured resin layer 1 with an uncured resin layer (second layer) 8 in between.
  • the component 7 is embedded in the resin layer 8.
  • the composition of the resin layer 8 is preferably the same or the same type as that of the resin layer 1.
  • the resin filling is preferably performed in a state of good fluidity, for example, about 110 ° C. so that the resin wraps around the circuit component 7. Thereafter, the resin layer 8 is cured by heating to 180 ° C., whereby the resin layer 1 and the resin layer 8 are integrated, and the metal foil 9 is fixed to the surface of the resin layer 8.
  • FIG. 1 (g) shows the seventh step, in which the metal foil 4 on the back surface of the resin layer 1 and the metal foil 9 on the surface of the resin layer 8 are patterned to form wiring patterns 4a and 9a.
  • Complete module A shows the seventh step, in which the metal foil 4 on the back surface of the resin layer 1 and the metal foil 9 on the surface of the resin layer 8 are patterned to form wiring patterns 4a and 9a.
  • the component built-in module can be manufactured without using a release carrier such as a SUS plate, the material cost can be reduced. Further, since the interlayer connection conductor (conductive paste) and the circuit component can be directly connected, mounting can be performed without using solder, the cost can be greatly reduced by reducing the number of steps, and the occurrence of solder flash can be eliminated. Furthermore, since there is no need to form lands for mounting circuit components, it is possible to cope with a narrow pitch and further reduce the size.
  • the circuit component 7 is mounted in a state in which the first resin layer 1 and the conductive paste 5 are both uncured, but the conductive material is formed in the via hole 3 of the cured or semi-cured resin layer 1.
  • the paste 5 may be filled and the circuit component 7 may be mounted on the conductive paste 5.
  • the circuit component 7 is held only by the tackiness of the conductive paste 5.
  • the uncured resin layer 8 is pressure-bonded on the cured resin layer 1 in the step (f)
  • the strength of the circuit component 7 does not cause displacement or dropping when the resin layer 8 is pressure-bonded. If it has, the resin layer 1 and the conductive paste 5 do not need to be completely cured, and may be in a semi-cured state. In that case, since the resin layer 1 and the resin layer 8 can be hardened simultaneously, generation
  • FIG. 2 shows a second embodiment of a component built-in module manufactured by a method similar to the manufacturing method according to the first embodiment, and uses a circuit element 10 having a plurality of terminals on the lower surface as a circuit component.
  • This component built-in module B has a plurality of terminal electrodes 11 on the lower surface of the circuit element 10, and these terminal electrodes 11 are directly connected to the conductive paste 5 which is an interlayer connection conductor. Therefore, it can be mounted without solder balls, and the thickness of the component built-in module B can be reduced accordingly.
  • FIG. 2 there is a gap between the lower surface of the circuit element 10 and the resin layer 1, and the gap is filled with the resin layer 8, but the lower surface of the circuit element 10 and the resin layer 1 are in contact with each other. There may be.
  • FIG. 3 shows a third embodiment of a method for manufacturing a component built-in module according to the present invention, and this embodiment corresponds to claim 6.
  • a cured resin substrate (support plate) 20 having PET films 21a and 21b attached to the front and back surfaces is prepared.
  • the resin substrate 20 a thermosetting resin substrate such as an epoxy resin, a thermosetting resin substrate containing an inorganic filler, or the like can be used.
  • the PET film 21a on the surface side is peeled off, and instead an adhesive layer (first layer) 22 is formed by a printing method or the like.
  • the state where the circuit component 23 is bonded and fixed is shown. At this time, the entire lower surface of the circuit component 23 is brought into close contact with the adhesive layer 22.
  • the material of the adhesive layer 22 is preferably the same as that of the resin substrate 20. After the circuit component 23 is mounted, the adhesive layer 22 is cured by heating.
  • FIG. 3C shows a state in which an uncured resin layer (second layer) 24 is pressure-bonded on the resin substrate 20 and the circuit component 23 is embedded in the resin layer 24.
  • the composition of the resin layer 24 is preferably the same or the same type as that of the resin substrate 20.
  • the resin filling is preferably performed in a state of good fluidity, for example, about 110 ° C. so that the resin wraps around the circuit component 23.
  • the resin layer 24 is cured by heating to 180 ° C., whereby the resin substrate 20 and the resin layer 24 are integrated to form a multilayer substrate.
  • via holes (interlayer connection conductor holes) 25 and 26 extending from the upper side of the resin layer 24 and the lower side of the resin substrate 20 to the terminal electrodes 23a of the circuit component 23 are formed by laser processing. After laser processing, desmear processing is performed.
  • filled plating is performed on the via holes 25 and 26.
  • the metal material (interlayer connection conductor) 27 can be filled in the via holes 25 and 26 on both sides of the front and back, and at the same time, the metal coating 28 is formed on the front and back surfaces (the upper surface of the resin layer 24 and the lower surface of the resin substrate 20). Can be formed. Thereby, the metal coating 28 and the circuit component 23 are electrically connected.
  • the conductive holes may be filled in the via holes 25 and 26 on both sides of the front and back sides.
  • the component built-in module C is completed by patterning the metal film 28 on the front and back surfaces to form a wiring pattern 28a.
  • the via holes 25 and 26 are formed in both the resin substrate 20 and the resin layer 24.
  • the via holes 25 in the resin layer 24 are not essential.
  • the via hole 26 of the resin substrate 20 is processed after the resin layer 24 is formed, it can be processed before the resin layer 24 is formed.
  • the cured resin substrate 20 is used as a core substrate, the adhesive layer 22 is formed thereon, the circuit component 23 is disposed thereon, and the adhesive layer 22 is cured by applying heat.
  • Vias are formed on both sides of the resin-molded multilayer substrate from the both sides to the terminal electrodes of the circuit components, and the plating is filled simultaneously on both sides to establish connection.
  • the resin substrate 20 which is a core substrate as a support material, the component built-in module C can be manufactured without requiring a release carrier.
  • the lands need to be formed larger in consideration of mounting position accuracy.
  • via holes 25 and 26 that reach the terminal electrodes 23a later are opened and connected. Therefore, the pitch can be further reduced. Since the filled plating method is used as a method for forming a conductor in the via hole, the filling of the via hole on both the front and back surfaces and the metal film can be simultaneously formed, and the number of processing steps can be reduced.
  • FIG. 4 shows a fourth embodiment of the method for manufacturing a component built-in module according to the present invention, and this embodiment corresponds to claim 8.
  • a cured resin substrate (support plate) 30 having metal foils 31 and 32 such as Cu foil attached to the front and back surfaces is prepared.
  • the metal foils 31 and 32 on both the front and back surfaces are patterned by etching or the like to form wiring patterns 31a and 32a.
  • the formation method of the wiring patterns 31a and 32a is not limited to etching, and may be formed on the resin substrate 30 by plating or the like.
  • an uncured adhesive layer (first layer) 33 is formed on the resin substrate 30 so as to cover the wiring pattern 31a by printing or the like, and the circuit component 34 is bonded and fixed thereon. .
  • the circuit component 34 is fixed so as to correspond to a predetermined position on the wiring pattern 31a, but the terminal electrode 34a of the circuit component 34 and the wiring pattern 31a are not in contact with each other.
  • the adhesive layer 33 does not have to be the entire surface of the resin substrate 30 and may be only the mounting portion of the circuit component 34. Since the entire lower surface of the circuit component 34 is held by the tackiness of the adhesive layer 33, the circuit component 34 is stabilized. In this state, the adhesive layer 33 is thermally cured.
  • an uncured resin layer (second layer) 35 is pressure-bonded on the resin substrate 30, and the circuit component 34 is embedded in the resin layer 35.
  • the composition of the resin layer 35 is preferably the same or the same type as that of the resin substrate 30.
  • the resin filling is preferably performed in a state of good fluidity, for example, about 110 ° C. so that the resin wraps around the circuit component 34.
  • the resin layer 35 is cured by heating to 180 ° C., whereby the resin substrate 30 and the resin layer 35 are integrated to form a multilayer substrate.
  • via holes (interlayer connection conductor holes) 36 and 37 extending from the upper side of the resin layer 35 and the lower side of the resin substrate 30 to the terminal electrodes 34a of the circuit component 34 are formed by laser processing. At this time, by irradiating the laser using the opening of the wiring pattern 32a on the back surface, the wiring pattern 32a is not damaged. After laser processing, desmear processing is performed.
  • the via holes 36 and 37 include a via hole 36 a extending from the upper surface of the resin layer 35 to the wiring pattern 31 a and a via hole 37 a extending from the lower surface of the resin substrate 30 to the wiring pattern 31 a.
  • filled plating is performed on the via holes 36 and 37.
  • the metal material (interlayer connection conductor) 38 can be filled in the via holes 36 and 37 on both sides of the front and back, and at the same time, the metal film 39 is formed on the front and back surfaces (the upper surface of the resin layer 35 and the lower surface of the resin substrate 30). Can be formed.
  • the metal coating 39 and the circuit component 34 are electrically connected via the interlayer connection conductor 38.
  • the via holes 36 and 37 on both sides may be filled with a conductive paste.
  • the metal film 39 on the front and back surfaces is patterned to form a wiring pattern 39a, thereby completing the component built-in module D.
  • the via holes 36 and 37 are formed in both the resin substrate 30 and the resin layer 35.
  • the via hole 36 in the resin layer 35 is not essential.
  • the via hole 37 of the resin substrate 30 is processed after the formation of the resin layer 35, it can be processed before the formation of the resin layer 35.
  • FIG. 5 shows a fifth embodiment of the method for manufacturing a component built-in module according to the present invention, and this embodiment corresponds to claim 9.
  • an adhesive (first layer) 41 is applied on a metal foil (support plate) 40 such as a Cu foil by using a printing method, a dispenser, or the like.
  • a metal foil (support plate) 40 such as a Cu foil by using a printing method, a dispenser, or the like.
  • the adhesive 41 is applied only to the component mounting portion here, it may be applied to the entire surface.
  • the surface of the metal foil 40 may be subjected to a roughening process for increasing the adhesion strength.
  • the circuit component 42 is bonded and fixed on the adhesive 41 using its tackiness. Thereafter, the adhesive 41 is heated to 130 to 150 ° C. and thermally cured. At this stage, the terminal electrode 42a of the circuit component 42 and the metal foil 40 are not connected.
  • the uncured resin layer (second layer) 43 and the metal foil 44 are stacked and pressure-bonded on the metal foil 40, and the circuit component 42 is embedded in the resin layer 43.
  • the resin filling is preferably performed in a state of good fluidity, for example, about 110 ° C. so that the resin wraps around the circuit component 42.
  • the resin layer 43 is cured by heating to 180 ° C., whereby the adhesive 41 and the resin layer 43 are integrated, and a substrate having the metal foils 40 and 44 on the front and back is formed.
  • via holes (interlayer connection conductor holes) 45 and 46 extending from the upper and lower sides of the resin layer 43 to the terminal electrodes 42a of the circuit component 42 are formed by laser processing.
  • the metal foils 40 and 44 formed on the front and back surfaces are used as a conformal mask, or laser vias are formed for each metal foil using the DLD method. After laser processing, desmear processing is performed.
  • filled plating is performed on the via holes 45, 46, and the via holes 45, 46 on both sides of the front and back sides are filled with a metal material (interlayer connection conductor) 47. 44.
  • the metal foils 40 and 44 and the circuit component 42 are electrically connected via the interlayer connection conductor 47.
  • the via holes 45 and 46 on both sides may be filled with a conductive paste.
  • the component built-in module E is completed by patterning the metal foils 40 and 44 on the front and back surfaces to form the wiring patterns 40a and 44a.
  • the via holes 45 and 46 extending from both the upper and lower sides of the resin layer 43 to the circuit component 42 are formed.
  • at least one of the via holes 45 and 46 is formed so as to penetrate the resin layer 43 in the vertical direction.
  • the metal foils 40 and 44 on the front and back surfaces may be made conductive.
  • a mounting pattern (land) by additive plating or etching on the metal foil that becomes a support at the time of mounting.
  • a mounting substrate As a mounting substrate, only an adhesive is applied, and a mounting pattern forming step is not required. Further, it becomes unnecessary for a bonding agent such as solder and flux, and a reflow and flux cleaning process. Since the lower surface of the circuit component 42 is filled with the adhesive 41, no filling failure occurs when the circuit component 42 is built in the resin layer 43. Since the metal foil is used as a mounting substrate and used as a wiring material, material loss is reduced. Since the via exists only on the terminal electrode, high-density mounting is possible without considering the via arrangement.
  • FIG. 6 shows a sixth embodiment of a component built-in module manufactured by the same method as that of the fifth embodiment.
  • this component built-in module F an adhesive 41 for fixing the circuit component 42 is applied only to the gap portion (portion where there is no terminal electrode) of the circuit component 42.
  • the terminal electrode 42 a does not touch the adhesive 41, and the periphery of the terminal electrode 42 a is covered with a built-in resin layer 43.
  • the upper and lower surfaces of the resin are the same, so that processing can be performed under the same conditions.
  • the adhesion strength with the adhesive 41 can be applied only to the exposed upper surface side in the fifth embodiment. In this embodiment, the entire surface of the terminal electrode can be processed.
  • a to F Component built-in module 1 Resin layer (first layer) 2a, 2b Carrier film 3 Via hole (interlayer connection conductor hole) 4 Metal foil (copper foil) 4a Wiring pattern 5 Conductive paste (interlayer connection conductor) 7 Circuit component 7a Terminal electrode 8 Resin layer (second layer) 9 Metal foil (copper foil) 9a Wiring pattern 10, 23, 34 Circuit component (multi-terminal circuit element) 20, 30 Cured resin substrate (support plate) 22, 33 Adhesive layer (first layer) 23, 34 Circuit parts 24, 35 Resin layer (second layer) 25, 26, 36, 37 Via hole (interlayer connection conductor hole) 27,38 Metal material (interlayer connection conductor) 28, 39 Metal coating 28a, 39a Wiring pattern

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

La présente invention concerne un procédé de fabrication d'un module comprenant un composant intégré, le risque d'occurrence d'un court-circuit et analogue étant réduit et aucune charge de libération n'étant requise. Un trou conducteur de connexion de couche intermédiaire (3) est formé dans une première couche (1) produite à partir d'une couche de résine non durcie, et le trou est rempli d'un conducteur de connexion de couche intermédiaire (5) produit à partir d'une pâte conductrice non durcie. Un composant de circuit (7) est monté sur le conducteur de connexion de couche intermédiaire non durci (5) à l'aide du pouvoir adhésif du conducteur de connexion de couche intermédiaire, et la première couche (1) et le conducteur de connexion de couche intermédiaire (5) sont durcis. Après le durcissement, une seconde couche (8) produite à partir d'une couche de résine non durcie est formée sur la première couche, et de ce fait le composant de circuit (7) est inclus dans la seconde couche. Le composant est ainsi monté directement sur le conducteur de connexion de couche intermédiaire non durci, de façon qu'un montage à l'aide d'une soudure puisse être omis, et que le risque d'une occurrence d'une bavure de soudure puisse être éliminé. Par ailleurs, la charge de libération devient inutile, ce qui entraîne une grande réduction du coût du matériau.
PCT/JP2009/069091 2009-03-09 2009-11-10 Procédé de fabrication d'un module comprenant un composant intégré, et module à composant intégré WO2010103695A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2011503649A JP5163806B2 (ja) 2009-03-09 2009-11-10 部品内蔵モジュールの製造方法及び部品内蔵モジュール

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2009-054631 2009-03-09
JP2009054631 2009-03-09

Publications (1)

Publication Number Publication Date
WO2010103695A1 true WO2010103695A1 (fr) 2010-09-16

Family

ID=42727996

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2009/069091 WO2010103695A1 (fr) 2009-03-09 2009-11-10 Procédé de fabrication d'un module comprenant un composant intégré, et module à composant intégré

Country Status (2)

Country Link
JP (1) JP5163806B2 (fr)
WO (1) WO2010103695A1 (fr)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012080030A (ja) * 2010-10-06 2012-04-19 Nec Corp 電子部品内蔵基板及びその製造方法
JP2012169500A (ja) * 2011-02-15 2012-09-06 Tdk Corp 電子部品内蔵モジュール、電子部品内蔵モジュールの製造方法及び電子部品内蔵モジュール用層間絶縁シート
JP2014505367A (ja) * 2011-01-26 2014-02-27 エーティー アンド エス オーストリア テクノロギー アンド システムテクニーク アクティエンゲゼルシャフト 電子部品のプリント基板又はプリント基板中間体への集積方法及びプリント基板又はプリント基板中間体
JP2014192354A (ja) * 2013-03-27 2014-10-06 Nippon Mektron Ltd 部品実装プリント配線板の製造方法、および部品実装プリント配線板
JP2016100603A (ja) * 2014-11-18 2016-05-30 サムソン エレクトロ−メカニックス カンパニーリミテッド． 素子内蔵型印刷回路基板及びその製造方法
JPWO2015198870A1 (ja) * 2014-06-23 2017-04-20 株式会社村田製作所 部品内蔵基板および部品内蔵基板の製造方法
WO2018173666A1 (fr) * 2017-03-22 2018-09-27 株式会社村田製作所 Substrat multicouche
CN115497832A (zh) * 2022-09-19 2022-12-20 安捷利美维电子(厦门)有限责任公司 中间层、集成异构结构及制作方法
WO2023209986A1 (fr) * 2022-04-28 2023-11-02 株式会社レゾナック Procédé de fabrication d'élément de câblage mince, élément de câblage mince et procédé de fabrication de carte de câblage

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005159226A (ja) * 2003-11-28 2005-06-16 Matsushita Electric Ind Co Ltd 回路部品内蔵基板およびその製造方法
JP2008198733A (ja) * 2007-02-09 2008-08-28 Fujikura Ltd 多層配線板とその製造方法
JP2008270443A (ja) * 2007-04-19 2008-11-06 Fujikura Ltd 積層配線基板及びその製造方法
JP2008288298A (ja) * 2007-05-16 2008-11-27 Toppan Printing Co Ltd 電子部品を内蔵したプリント配線板の製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004343086A (ja) * 2003-04-25 2004-12-02 Matsushita Electric Ind Co Ltd 回路基板用部材とその製造方法及び回路基板の製造方法
JP2008218874A (ja) * 2007-03-07 2008-09-18 Matsushita Electric Ind Co Ltd 回路基板の製造方法および回路基板の製造用材料
JP5007164B2 (ja) * 2007-06-29 2012-08-22 株式会社フジクラ 多層配線板及び多層配線板製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005159226A (ja) * 2003-11-28 2005-06-16 Matsushita Electric Ind Co Ltd 回路部品内蔵基板およびその製造方法
JP2008198733A (ja) * 2007-02-09 2008-08-28 Fujikura Ltd 多層配線板とその製造方法
JP2008270443A (ja) * 2007-04-19 2008-11-06 Fujikura Ltd 積層配線基板及びその製造方法
JP2008288298A (ja) * 2007-05-16 2008-11-27 Toppan Printing Co Ltd 電子部品を内蔵したプリント配線板の製造方法

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012080030A (ja) * 2010-10-06 2012-04-19 Nec Corp 電子部品内蔵基板及びその製造方法
JP2014505367A (ja) * 2011-01-26 2014-02-27 エーティー アンド エス オーストリア テクノロギー アンド システムテクニーク アクティエンゲゼルシャフト 電子部品のプリント基板又はプリント基板中間体への集積方法及びプリント基板又はプリント基板中間体
JP2012169500A (ja) * 2011-02-15 2012-09-06 Tdk Corp 電子部品内蔵モジュール、電子部品内蔵モジュールの製造方法及び電子部品内蔵モジュール用層間絶縁シート
JP2014192354A (ja) * 2013-03-27 2014-10-06 Nippon Mektron Ltd 部品実装プリント配線板の製造方法、および部品実装プリント配線板
JPWO2015198870A1 (ja) * 2014-06-23 2017-04-20 株式会社村田製作所 部品内蔵基板および部品内蔵基板の製造方法
JP2016100603A (ja) * 2014-11-18 2016-05-30 サムソン エレクトロ−メカニックス カンパニーリミテッド． 素子内蔵型印刷回路基板及びその製造方法
JP7074409B2 (ja) 2014-11-18 2022-05-24 サムソン エレクトロ－メカニックス カンパニーリミテッド． 素子内蔵型印刷回路基板
WO2018173666A1 (fr) * 2017-03-22 2018-09-27 株式会社村田製作所 Substrat multicouche
JPWO2018173666A1 (ja) * 2017-03-22 2019-11-07 株式会社村田製作所 多層基板
US11202371B2 (en) 2017-03-22 2021-12-14 Murata Manufacturing Co., Ltd. Multilayer substrate
WO2023209986A1 (fr) * 2022-04-28 2023-11-02 株式会社レゾナック Procédé de fabrication d'élément de câblage mince, élément de câblage mince et procédé de fabrication de carte de câblage
CN115497832A (zh) * 2022-09-19 2022-12-20 安捷利美维电子(厦门)有限责任公司 中间层、集成异构结构及制作方法

Also Published As

Publication number Publication date
JP5163806B2 (ja) 2013-03-13
JPWO2010103695A1 (ja) 2012-09-10

Similar Documents

Publication Publication Date Title
JP5163806B2 (ja) 部品内蔵モジュールの製造方法及び部品内蔵モジュール
KR100935139B1 (ko) 부품 내장 모듈의 제조 방법 및 부품 내장 모듈
JP5093353B2 (ja) 部品内蔵モジュールの製造方法及び部品内蔵モジュール
JP2007273654A (ja) フレキシブル回路基板、フレキシブル回路基板の製造方法および電子機器
US20120175162A1 (en) Printed circuit board
JP2008159682A (ja) 多層プリント配線板およびその製造方法
JP2014146650A (ja) 配線基板およびその製造方法
JP5397012B2 (ja) 部品内蔵配線板、部品内蔵配線板の製造方法
WO2010016522A1 (fr) Carte de circuit imprimé, procédé de fabrication de carte de circuit imprimé, et dispositif électronique
JP2012064600A (ja) 多層基板およびその製造方法
JP2005026573A (ja) 部品内蔵モジュールの製造方法
JP4598140B2 (ja) 部品内蔵配線板、部品内蔵配線板の製造方法
JP5108253B2 (ja) 部品実装モジュール
KR100704922B1 (ko) 페이스트 범프를 이용한 인쇄회로기판 및 그 제조방법
TWI552662B (zh) A manufacturing method of a substrate in which an element is incorporated, and a substrate having a built-in element manufactured by the method
CN114342574B (zh) 电路基板、电路基板的制造方法和电子设备
JP5369875B2 (ja) 部品内蔵配線板、部品内蔵配線板の製造方法
KR100734244B1 (ko) 다층 인쇄회로기판 및 그 제조방법
WO2018030262A1 (fr) Procédé de fabrication de composant de module
US11540396B2 (en) Circuit board structure and manufacturing method thereof
JP5601413B2 (ja) 部品内蔵配線板、部品内蔵配線板の製造方法
JP5516069B2 (ja) 部品内蔵配線板、部品内蔵配線板の製造方法
JP6367902B2 (ja) 配線基板
JP6075789B2 (ja) 配線基板の製造方法
JP4797910B2 (ja) 半導体パッケージ多層基板の製造方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 09841520

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 2011503649

Country of ref document: JP

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 09841520

Country of ref document: EP

Kind code of ref document: A1