WO2010087151A1 - 半導体基板の製造方法および半導体基板 - Google Patents
半導体基板の製造方法および半導体基板 Download PDFInfo
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- WO2010087151A1 WO2010087151A1 PCT/JP2010/000429 JP2010000429W WO2010087151A1 WO 2010087151 A1 WO2010087151 A1 WO 2010087151A1 JP 2010000429 W JP2010000429 W JP 2010000429W WO 2010087151 A1 WO2010087151 A1 WO 2010087151A1
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 253
- 239000000758 substrate Substances 0.000 title claims abstract description 153
- 238000000034 method Methods 0.000 title claims abstract description 35
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 21
- 150000001875 compounds Chemical class 0.000 claims abstract description 199
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- 238000006243 chemical reaction Methods 0.000 claims abstract description 14
- 229910021478 group 5 element Inorganic materials 0.000 claims abstract description 14
- 238000005259 measurement Methods 0.000 claims description 34
- 150000002902 organometallic compounds Chemical class 0.000 claims description 24
- 229910052732 germanium Inorganic materials 0.000 claims description 5
- 229910052717 sulfur Inorganic materials 0.000 claims description 5
- 229910052714 tellurium Inorganic materials 0.000 claims description 5
- 229910052718 tin Inorganic materials 0.000 claims description 5
- 238000010030 laminating Methods 0.000 claims 2
- 239000007858 starting material Substances 0.000 abstract 4
- 150000002736 metal compounds Chemical class 0.000 abstract 1
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- 239000000872 buffer Substances 0.000 description 66
- 230000000052 comparative effect Effects 0.000 description 35
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- 239000013078 crystal Substances 0.000 description 23
- 230000015556 catabolic process Effects 0.000 description 19
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 16
- 239000002994 raw material Substances 0.000 description 16
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- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 11
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- 239000012159 carrier gas Substances 0.000 description 9
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 8
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 8
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- 239000006173 Good's buffer Substances 0.000 description 7
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- 239000010931 gold Substances 0.000 description 4
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- 239000000969 carrier Substances 0.000 description 3
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- 150000004678 hydrides Chemical class 0.000 description 3
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- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
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- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 229920006395 saturated elastomer Polymers 0.000 description 2
- 239000010944 silver (metal) Substances 0.000 description 2
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 2
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- -1 InGaP Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
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- 229910052785 arsenic Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 229940126214 compound 3 Drugs 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 239000007791 liquid phase Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
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- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
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- 239000004332 silver Substances 0.000 description 1
- 229910052723 transition metal Inorganic materials 0.000 description 1
- 150000003624 transition metals Chemical class 0.000 description 1
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7782—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
- H01L29/7783—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
- H01L29/7785—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material with more than one donor layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02395—Arsenides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02463—Arsenides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
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- H01L21/02546—Arsenides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/0257—Doping during depositing
- H01L21/02573—Conductivity type
- H01L21/02576—N-type
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
Definitions
- the present invention relates to a method for manufacturing a semiconductor substrate and a semiconductor substrate.
- field effect transistors referred to as FETs
- HEMTs high electron mobility transistors
- HBTs heterojunction bipolar transistors
- a compound semiconductor epitaxial substrate is used for manufacturing these electronic devices.
- a compound semiconductor epitaxial substrate is manufactured by growing a crystal of a group 3-5 compound semiconductor on a semi-insulating substrate such as a GaAs substrate by an epitaxial growth method.
- a liquid phase method, a molecular beam epitaxial growth method, a metal organic chemical vapor deposition method (referred to as MOCVD method), or the like is used as the epitaxial growth method.
- Patent Document 1 describes a compound semiconductor epitaxial wafer having an AlGaAs buffer layer between a semi-insulating GaAs substrate and an n-type GaAs active layer.
- the buffer layer suppresses a leakage current that degrades the characteristics of the FET.
- the buffer layer also reduces the influence of the substrate or impurities on the substrate on the FET characteristics.
- the buffer layer of Patent Document 1 is formed by metal organic vapor phase epitaxy (referred to as MOVPE method), and donor impurities and acceptor impurities having close concentrations are added.
- Patent Document 2 describes a Group 3-5 compound semiconductor device having a p-type buffer layer formed by the MOVPE method.
- the product of the film thickness and the p-type carrier concentration is set to 1 ⁇ 10 10 to 1 ⁇ 10 12 cm ⁇ .
- Patent Document 1 does not describe the crystal growth conditions of the buffer layer. Usually, when a Group 3-5 compound semiconductor is formed using the MOVPE method or the MOCVD method, a Group 5 such as P and As is used. The raw material is supplied in a very excessive amount as compared with Group 3 raw materials such as Al, Ga, and In. As a result, the manufacturing cost of the compound semiconductor epitaxial wafer increases. In Patent Document 2, the p-type carrier concentration of the p-type buffer layer when oxygen or a transition metal is doped is controlled. However, Patent Document 2 does not consider the supply amount of the Group 5 raw material.
- the supply amount of the Group 5 raw material In order to reduce the manufacturing cost, it is preferable to reduce the supply amount of the Group 5 raw material. However, if the supply amount of the Group 5 raw material is simply reduced for the purpose of reducing the manufacturing cost, the p-type carrier concentration of the Group 3-5 compound semiconductor becomes too large. As a result, excess acceptor impurities that cannot be ionized remain, and the Group 3-5 compound semiconductor cannot exhibit sufficient performance as a buffer layer.
- the Group 3 raw material is supplied as an organometallic compound such as trimethyl gallium and trimethyl aluminum. Carbon contained in the organometallic compound is taken into the crystal of the compound semiconductor during crystal growth.
- the carbon concentration of the Group 3-5 compound semiconductor increases as the ratio of the Group 5 material to the Group 3 material during crystal growth decreases. Since carbon behaves as an acceptor impurity in the crystal of the group 3-5 compound semiconductor, the p-type carrier concentration of the group 3-5 compound semiconductor increases as the carbon concentration increases. As a result, the Group 3-5 compound semiconductor cannot exhibit sufficient performance as a buffer layer.
- an object of the present invention is to provide a method for producing a Group 3-5 compound semiconductor capable of reducing the amount of the Group 5 material used without impairing the physical properties of the Group 3-5 compound semiconductor.
- a step of placing a base substrate inside a reaction vessel, and the reaction vessel comprising a group 3 element organometallic compound 3 A step of epitaxially growing a p-type group 3-5 compound semiconductor on a base substrate by supplying a group 5 source gas composed of a group 5 source gas and an impurity gas containing impurities that are doped in the semiconductor and become a donor
- the flow rate of the impurity gas and the flow rate ratio of the group 5 source gas to the group 3 source gas are set to be the same as those of the p-type group 3-5 compound semiconductor.
- a product N ⁇ d (cm ⁇ 2 ) of residual carrier concentration N (cm ⁇ 3 ) and thickness d (cm) is set to 8.0 ⁇ 10 11 or less.
- the “p-type group 3-5 compound semiconductor” is a group 3-5 compound semiconductor in which the p-type carrier concentration is higher than the n-type carrier concentration.
- a residual capacity per unit area of 0.5 nF by capacitance voltage measurement using a Schottky electrode in contact with the active layer on the p-type group 3-5 compound semiconductor is 0.5 nF.
- the flow rate of the impurity gas and the flow rate ratio of the Group 5 source gas to the Group 3 source gas may be set so as to be less than / cm 2 .
- the flow ratio of the Group 5 source gas to the Group 3 source gas is preferably 9.0 ⁇ 10 6 or less.
- the impurity may include at least one element selected from the element group consisting of Si, Se, Ge, Sn, S, and Te.
- a p-type group 3-5 compound semiconductor and an active layer may be stacked in this order on the base substrate.
- the base substrate and the base substrate are doped into a group 3 source gas composed of an organometallic compound of a group 3 element, a group 5 source gas composed of a group 5 element, and a semiconductor.
- a p-type group 3-5 compound semiconductor epitaxially grown by supplying an impurity gas containing an impurity serving as a donor, and the p-type group 3-5 compound semiconductor has a residual carrier concentration N (cm ⁇ 3 ) and a thickness.
- a semiconductor substrate having a product d ⁇ cm (N ⁇ d (cm ⁇ 2 )) of 8.0 ⁇ 10 11 or less is provided.
- the residual capacity per unit area is preferably less than 0.5 nF / cm 2 in the capacity voltage measurement using a Schottky electrode in contact with the active layer on the p-type Group 3-5 compound semiconductor.
- the p-type group 3-5 compound semiconductor is epitaxially grown with the ratio of the flow rate difference between the group 5 source gas and the group 3 source gas to the impurity gas flow rate being 9.0 ⁇ 10 6 or less. Preferably it is.
- the p-type group 3-5 compound semiconductor is epitaxially grown under the condition that the ratio of the group 5 source gas to the group 3 source gas is 50 or less.
- the donor impurity may include at least one element selected from the element group consisting of Si, Se, Ge, Sn, S, and Te.
- a p-type group 3-5 compound semiconductor and an active layer may be stacked in this order on the base substrate.
- An example of the section of compound semiconductor epitaxial substrate 100 is shown roughly.
- An example of the manufacturing method of the compound semiconductor epitaxial substrate 100 is shown roughly.
- An example of a section of semiconductor device 300 is shown roughly.
- An example of the section of compound semiconductor epitaxial substrate 400 is shown roughly.
- An example of the section of compound semiconductor epitaxial substrate 500 is shown roughly.
- An example of a section of semiconductor device 600 is shown roughly.
- the result of the capacitance voltage measurement in the compound semiconductor epitaxial substrate of Example 1 is shown.
- the result of the capacitance voltage measurement in the compound semiconductor epitaxial substrate of Example 1 is shown.
- the result of the capacitance voltage measurement in the compound semiconductor epitaxial substrate of the comparative example 2 is shown.
- the result of the capacitance voltage measurement in the compound semiconductor epitaxial substrate of the comparative example 2 is shown.
- FIG. 1 schematically shows an example of a cross section of a compound semiconductor epitaxial substrate 100 according to an embodiment.
- the compound semiconductor epitaxial substrate 100 includes a base substrate 102 and a group 3-5 compound semiconductor 104.
- the compound semiconductor epitaxial substrate 100 is an example of a semiconductor substrate.
- the base substrate 102 includes, for example, a Group 3-5 compound semiconductor such as GaAs or a Group 4 semiconductor represented by Si x Ge 1-x (0 ⁇ x ⁇ 1).
- the group 3-5 compound semiconductor 104 is a p-type group 3-5 compound semiconductor.
- the Group 3-5 compound semiconductor 104 is formed by, for example, the MOCVD method.
- the Group 3-5 compound semiconductor 104 has a thickness of 10 nm to 3000 nm, for example.
- the group 3-5 compound semiconductor 104 may have a plurality of layers.
- the group 3-5 compound semiconductor 104 is supplied with a group 3 source gas composed of an organometallic compound of a group 3 element, a group 5 source gas composed of a group 5 element, and an impurity gas containing an impurity serving as a donor on one side of the base substrate 102.
- the main surface 103 is supplied, and a group 3-5 compound semiconductor is crystal-grown on the main surface 103.
- the impurity is doped in the group 3-5 compound semiconductor and acts as a donor, so that the n-type carrier concentration of the group 3-5 compound semiconductor 104 is increased.
- the carbon concentration of the Group 3-5 compound semiconductor increases and the p-type carrier concentration in the Group 3-5 compound semiconductor 104 increases.
- the n-type carrier concentration of the Group 3-5 compound semiconductor 104 is increased by the impurity acting as a donor, the p-type carrier is compensated by the increased n-type carrier.
- the group 3-5 compound semiconductor 104 exhibits sufficient performance as a buffer layer.
- the group 3-5 compound semiconductor 104 decreases, the residual capacity of the group 3-5 compound semiconductor 104 decreases, so that the leakage current of the group 3-5 compound semiconductor 104 decreases. As a result, the breakdown voltage of the group 3-5 compound semiconductor 104 is improved. In addition, carrier mobility in a semiconductor device such as an FET formed in the group 3-5 compound semiconductor 104 is increased. That is, as the residual p-type carrier concentration of the group 3-5 compound semiconductor 104 is reduced, the group 3-5 compound semiconductor 104 has a high breakdown voltage and a buffer layer suitable for forming a semiconductor device having high mobility. Function.
- the “residual p-type carrier concentration” is the carrier concentration of the Group 3-5 compound semiconductor 104 when the p-type carrier concentration is higher than the n-type carrier concentration.
- the carrier concentration when the p-type carrier concentration is smaller than the n-type carrier concentration is referred to as a residual n-type carrier concentration.
- the amount of the Group 5 source material used for manufacturing the Group 3-5 compound semiconductor 104 is reduced by supplying the impurity gas containing the impurity serving as a donor together with the Group 3 source gas and the Group 5 source gas. Can do.
- FIG. 2 schematically shows an example of a method for manufacturing the compound semiconductor epitaxial substrate 100 according to an embodiment.
- the base substrate 102 is prepared in S202.
- the group 3-5 compound semiconductor 104 is epitaxially grown on the main surface 103 of the base substrate 102.
- a group 3 source gas containing an organometallic compound of a group 3 element, a group 5 source gas containing a group 5 element, and an impurity gas containing an impurity serving as a donor are supplied to one main surface 103 of the base substrate 102. Then, the p-type group 3-5 compound semiconductor is crystal-grown on the main surface 103.
- the amount of the n-type carrier that compensates for the p-type carrier of the Group 3-5 compound semiconductor varies depending on the flow rate of the impurity gas supplied together with the Group 3 source gas and the Group 5 source gas. Therefore, the residual p-type carrier concentration can be set to an appropriate value by controlling the flow rate of the impurity gas according to the flow rate ratio of the flow rate of the Group 5 source gas to the flow rate of the Group 3 source gas.
- the flow rate of the Group 3 source gas represents the volume flow rate of the Group 3 source gas.
- the flow rate of the Group 5 source gas represents the volume flow rate of the Group 5 source gas.
- the “impurity gas flow rate” represents the volume flow rate of the impurity gas.
- the “flow ratio of the Group 5 source gas to the group 3 source gas” represents a value obtained by dividing the “group 5 source gas flow rate” by the “group 3 source gas flow rate”. The flow rate ratio is calculated in terms of “flow rate ratio of Group 5 source gas to group 3 source gas flow rate” at 0 ° C. and 101.3 kPa (1 atm).
- the group 3 source gas is a source gas composed of an organometallic compound of a group 3 element.
- the Group 3 source gas is supplied into the reaction vessel together with the carrier gas.
- the group 3 source gas contains, for example, an organometallic compound having an alkyl group such as trimethylgallium (referred to as TMG), trimethylaluminum (referred to as TMA), trimethylindium (referred to as TMI), or the like.
- TMG trimethylgallium
- TMA trimethylaluminum
- TMI trimethylindium
- the alkyl group has 1 to 3 carbon atoms, for example.
- the group 3 source gas can be supplied as follows. First, a raw material container containing an organometallic compound is placed in a thermostatic bath, and the temperature is adjusted so that the organometallic compound reaches a predetermined temperature. Next, a carrier gas such as H 2 is introduced into the raw material container to bubble the organometallic compound. Thereby, the organometallic compound is vaporized.
- the carrier gas flowing out from the raw material container contains an amount of the organometallic compound according to the saturated vapor pressure of the organometallic compound at the temperature of the thermostat and the pressure in the raw material container.
- the flow rate of the Group 3 source gas is based on the flow rate of the carrier gas supplied to the source container, and the constant temperature bath in which the source container is installed. It can be calculated using the saturated vapor pressure of the organometallic compound at the temperature and the pressure in the raw material container.
- the “flow rate of the Group 3 source gas” represents a value obtained by summing the flow rates of the plurality of organometallic compounds.
- the "group 3 source gas flow rate" This is the sum of the flow rate of the first group 3 source gas and the flow rate of the second group 3 source gas.
- the group 5 source gas is a source gas composed of a compound containing a group 5 element.
- the Group 5 source gas is supplied into the reaction vessel together with the carrier gas.
- the Group 5 source gas contains a hydride of a Group 5 element such as arsine, for example.
- the carbon contained in the organometallic compound of the Group 5 element is less likely to be incorporated into the crystal of the Group 3-5 compound semiconductor 104 as compared to the carbon contained in the organometallic compound of the Group 3 element. Therefore, the group 5 source gas may contain an organometallic compound of a group 5 element such as monoalkylarsine.
- the organometallic compound of Group 5 element is, for example, an organometallic compound in which at least one hydrogen of a hydride of Group 5 element is substituted with an alkyl group having 1 to 4 carbon atoms.
- the Group 5 source gas is supplied in the same manner as the Group 3 source gas. Further, the flow rate of the group 5 source gas is calculated in the same manner as the flow rate of the group 3 source gas. When a plurality of Group 5 element compounds are used, the flow rate of the Group 5 source gas is calculated by summing the flow rates of the plurality of Group 5 element compounds.
- Impurity gas contains impurities that become donors.
- the impurity gas may include a carrier gas.
- the impurity serving as a donor is, for example, at least one element selected from the element group consisting of Si, Se, Ge, Sn, S, and Te.
- the impurity gas may include a hydride having the above element or an alkylate having the above element and an alkyl group having 1 to 3 carbon atoms.
- the n-type carrier concentration of the group 3-5 compound semiconductor 104 is increased.
- the flow rate ratio of the Group 5 source gas to the Group 3 source gas is set to a low value of 50 or less, the carbon contained in the Group 3 source gas is taken into the crystal of the Group 3-5 compound semiconductor 104, and the p-type Carrier concentration increases.
- the p-type carrier is compensated for by the n-type carrier, so that an increase in the residual p-type carrier concentration can be suppressed.
- the concentrations of the acceptor impurity and the donor impurity in the Group 3-5 compound semiconductor 104 can be controlled. Therefore, it is possible to control the residual p-type carrier concentration of the Group 3-5 compound semiconductor 104 while reducing the amount of the Group 5 material used.
- the flow rate of the impurity gas and the flow rate ratio of the Group 5 source gas to the Group 3 source gas are set as follows.
- the product of the residual carrier concentration N (cm ⁇ 3 ) and the thickness d (cm) N ⁇ d (cm ⁇ 2 ) is set to 8.0 ⁇ 10 11 or less.
- p-type carriers generated according to the flow rate ratio of the Group 5 source gas to the Group 3 source gas are compensated by the impurity gas.
- the Group 3-5 compound semiconductor 104 having sufficient performance as a buffer layer can be crystal-grown while reducing the amount of the Group 5 material used.
- the residual carrier concentration of the group 3-5 compound semiconductor 104 means a value obtained by subtracting the n-type carrier concentration from the p-type carrier concentration.
- the carrier concentration can be calculated from the capacitance-voltage characteristics (referred to as CV characteristics) of the group 3-5 compound semiconductor 104.
- Thiickness of the group 3-5 compound semiconductor 104 indicates an average film thickness of a region suitable for a buffer layer of a semiconductor device such as an FET. The average film thickness is, for example, an arithmetic average of film thicknesses at five points in the above region. The film thickness can be calculated by observation using SEM or TEM.
- the flow rate ratio of the Group 5 source gas to the Group 3 source gas is 50 or less. That is, the flow rate ratio of the group 5 source gas to the group 3 source gas is 50 or less, and the film thickness of the group 3-5 compound semiconductor 104 is multiplied by the carrier concentration of the group 3-5 compound semiconductor 104. It may be set to be 8.0 ⁇ 10 11 cm ⁇ 2 or less. Crystal growth of the Group 3-5 compound semiconductor 104 under the above conditions greatly reduces the amount of Group 5 source gas used while controlling the concentration of acceptor impurities and donor impurities in the Group 3-5 compound semiconductor 104 can do.
- the flow rate of the group 5 source gas to the group 3 source gas is set to 30 or less, the flow rate of the group 5 source gas can be further reduced. Therefore, it is more preferable to set the flow rate ratio to 30 or less.
- the flow rate ratio of the group 5 source gas to the group 3 source gas is 0.1 or more. Preferably there is.
- the ratio of the flow rate difference between the Group 5 source gas and the Group 3 source gas to the flow rate of the impurity gas is set to 9.0 ⁇ 10 6 or less. Is preferred.
- the ratio of the flow rate difference between the Group 5 source gas and the Group 3 source gas to the impurity gas flow rate may be 8.4 ⁇ 10 6 or less.
- Crystal growth of the Group 3-5 compound semiconductor 104 having sufficient performance as a buffer layer is performed by setting the ratio of the flow rate difference between the Group 5 source gas and the Group 3 source gas to the impurity gas flow rate to the value. Can do.
- the ratio of the flow rate difference between the Group 5 source gas and the Group 3 source gas to the flow rate of the impurity gas is the “difference between the flow rate of the Group 5 source gas and the group 3 source gas” The value divided by "flow rate”. Further, the above ratio is calculated in terms of “the ratio of the flow rate difference between the Group 5 source gas and the Group 3 source gas to the flow rate of the impurity gas” at 0 ° C. and 101.3 kPa (1 atm). When the impurity gas is diluted with another gas such as hydrogen, the flow rate of the impurity gas is calculated by conversion when the impurity gas concentration is 100%.
- ratio of flow rate difference between Group 5 source gas and Group 3 source gas with respect to the flow rate of impurity gas As an index indicating the relationship between the flow rates of impurity gas, Group 5 source gas, and Group 3 source gas, It becomes easy to grasp the relationship between the p-type carrier concentration caused by the flow rate ratio and the flow rate difference between the group 5 source gas and the group 3 source gas and the n-type carrier concentration caused by the impurity gas.
- the ratio of the flow rate difference between the Group 5 source gas and the Group 3 source gas to the flow rate of the impurity gas either of the impurity gas, the Group 5 source gas, and the Group 3 source gas
- the growth temperature, pressure, crystal growth rate, etc. of the reaction vessel are controlled. May be.
- the growth temperature of the reaction vessel at the time of crystal growth is preferably selected in a temperature range where the raw material supply rate is controlled so that the reaction decomposition rate of the raw material does not change even if the growth temperature changes.
- the growth temperature can be selected according to the carrier concentration of the n-GaAs layer that is a Group 3-5 compound semiconductor.
- the growth pressure during crystal growth is set based on the relationship between the in-plane uniformity of the 3-5 group compound semiconductor 104 to be grown and the raw material efficiency. Specifically, the lower the growth pressure, the better the in-plane uniformity, but the lower the raw material efficiency. Therefore, an optimal growth pressure that balances these two factors is set.
- the crystal growth rate of the Group 3-5 compound semiconductor 104 is determined by the flow rate of the Group 3 source gas under the condition of source supply rate-limiting. For example, the crystal growth rate is near the center of the control range of a gas flow meter installed in the growth apparatus, and a growth rate condition is set at a flow rate with good linearity between the gas flow rate and the growth rate.
- FIG. 3 schematically shows an example of a cross section of a semiconductor device 300 according to an embodiment.
- the semiconductor device 300 includes a base substrate 102, a group 3-5 compound semiconductor 104, and an active layer 310 in this order.
- the group 3-5 compound semiconductor 104 can be formed in the same manner as the compound semiconductor epitaxial substrate 100.
- the active layer 310 is, for example, a group 3-5 compound semiconductor.
- FIG. 4 schematically shows an example of a cross section of a compound semiconductor epitaxial substrate 400 according to another embodiment.
- the compound semiconductor epitaxial substrate 400 includes a base substrate 102, a group 3-5 compound semiconductor 104, an active layer 310, and a contact layer 420 in this order.
- the compound semiconductor epitaxial substrate 400 is an example of a semiconductor substrate.
- the base substrate 102 includes, for example, a Group 3-5 compound semiconductor such as GaAs or a Group 4 semiconductor represented by Si x Ge 1-x (0 ⁇ x ⁇ 1).
- the base substrate 102 may be a semi-insulating GaAs substrate.
- the crystallographic plane orientation of the surface of the base substrate 102 is tilted from the crystallographic plane orientation of one (100) plane or a plane equivalent to the (100) plane, and the magnitude of the tilt.
- the base substrate 102 is a stacked substrate in which a Group 3-5 compound semiconductor such as GaAs is formed on a Si substrate, an SOI (silicon-on-insulator) substrate, a Ge substrate, or a GOI (germanium-on-insulator) substrate. Also good.
- a Group 3-5 compound semiconductor such as GaAs is formed on a Si substrate, an SOI (silicon-on-insulator) substrate, a Ge substrate, or a GOI (germanium-on-insulator) substrate. Also good.
- the Group 3-5 compound semiconductor 104 supplies a Group 3 source gas, a Group 5 source gas, and an impurity gas to a pressure-reducing barrel type reaction vessel in which the base substrate 102 is installed. It is obtained by growing a group 3-5 compound semiconductor on the surface 103. At this time, by supplying the group 3 source gas and the group 5 source gas so that the flow rate ratio of the group 5 source gas to the group 3 source gas is 50 or less, more preferably 30 or less, The p-type carrier concentration of the group 3-5 compound semiconductor 104 can be controlled while reducing the amount used.
- a carrier gas, a balance gas, and other source gases may be supplied to the reaction vessel.
- the flow rate of the impurity gas and the flow rate ratio of the Group 5 source gas to the Group 3 source gas are determined by the residual capacity per unit area due to the residual charge in the capacitance voltage measurement using the Schottky electrode of the compound semiconductor epitaxial substrate 400. It is preferably set to be less than 0.5 nF / cm 2 .
- the flow rate of the impurity gas and the flow rate ratio of the Group 5 source gas to the Group 3 source gas is such that the flow rate ratio of the Group 5 source gas to the Group 3 source gas is 50 or less, and the Group 3-5 compound semiconductor 104
- the value obtained by multiplying the film thickness by the carrier concentration of the Group 3-5 compound semiconductor 104 is 8.0 ⁇ 10 11 cm ⁇ 2 or less, and in the capacitance voltage measurement of the compound semiconductor epitaxial substrate 400, the unit caused by the residual charge
- the residual capacity per area may be set to be less than 0.5 nF / cm 2 .
- the capacitance voltage measurement of the Group 3-5 compound semiconductor 104 is performed, for example, by applying a voltage to a Schottky electrode in contact with the active layer 310 formed by removing the contact layer 420 of the compound semiconductor epitaxial substrate 400 by etching or the like. It can. Al, Ag, Au, Cu, or the like can be used as the Schottky electrode. Note that the Schottky electrode is not shown in FIG.
- the Schottky electrode can be formed by forming an inner electrode and an outer electrode surrounding the inner electrode and spaced apart from the inner electrode on the surface of the active layer 310.
- An opening may be formed inside the outer electrode.
- the inner electrode is formed, for example, inside the opening.
- the center of the inner electrode and the center of the outer electrode may substantially coincide.
- the center of the opening may be substantially coincident with the center of the outer electrode.
- the center of the opening and the center of the inner electrode may substantially coincide.
- the shape of the inner electrode is, for example, a circle.
- the shape of the opening may be similar to the shape of the inner electrode.
- the size of the opening is preferably larger than the inner electrode.
- the area of the outer electrode is preferably 10 times or more, more preferably 1000 times or more the area of the inner electrode.
- the area of the outer electrode may be 2 cm 2 or more.
- the outer shape of the outer electrode is not particularly limited, and may be similar to the shape of the inner electrode.
- the extended shape of the outer electrode may be a regular polygon.
- a circular inner electrode, a circular opening, and a square outer electrode are formed so that their centers coincide.
- Capacitance voltage measurement can be performed by applying a voltage between the inner electrode and the outer electrode. According to this method, the capacitance value of each material can be calculated using the area value of the inner electrode and the value of the interval between the inner electrode and the outer electrode.
- the active layer 310 includes, for example, a group 3-5 compound semiconductor such as GaAs, AlGaAs, InGaP, and InGaAs.
- the active layer 310 may have strained InGaAs.
- the active layer 310 functions as, for example, an FET active layer.
- the contact layer 420 may include a Group 3-5 compound semiconductor such as GaAs and InGaAs.
- FIG. 5 schematically shows an example of a cross section of a compound semiconductor epitaxial substrate 500 according to still another embodiment.
- the compound semiconductor epitaxial substrate 500 includes a base substrate 502, a buffer layer 504, a back side electron supply layer 506, a back side spacer layer 508, a channel layer 510, a front side spacer layer 512, a front side electron supply layer 514, a barrier layer 516, and A contact layer 520 is provided in this order.
- the compound semiconductor epitaxial substrate 500 is an example of a semiconductor substrate.
- the buffer layer 504 is formed by crystal growth on one main surface 503 of the base substrate 502.
- the channel layer 510 is an example of an active layer.
- the base substrate 502 and the base substrate 102 have the same configuration.
- the buffer layer 504 and the group 3-5 compound semiconductor 104 have the same configuration.
- the buffer layer 504 may include a plurality of layers. At least some of the plurality of layers in the buffer layer 504 may have a configuration similar to that of the Group 3-5 compound semiconductor 104.
- the buffer layer 504 has a thickness of 10 nm or more and 3000 nm or less, for example.
- the channel layer 510 and the active layer 310 have the same configuration.
- Contact layer 520 has a configuration similar to that of contact layer 420. Therefore, description of the base substrate 502, the buffer layer 504, the channel layer 510, and the contact layer 520 is omitted.
- the back side electron supply layer 506 and the front side electron supply layer 514 supply electrons to the channel layer 510.
- the back-side electron supply layer 506 and the front-side electron supply layer 514 may include a Group 3-5 compound semiconductor such as AlGaAs.
- the back side spacer layer 508 and the front side spacer layer 512 may include a compound semiconductor having a wider band gap than that of the compound semiconductor included in the channel layer 510.
- the barrier layer 516 includes a Group 3-5 compound semiconductor such as AlGaAs. In the barrier layer 516, a gate electrode of an electronic element such as an FET is formed.
- the contact layer 520 includes a Group 3-5 compound semiconductor such as GaAs or InGaAs.
- the capacitance voltage measurement of the compound semiconductor epitaxial substrate 500 when the capacitance is formed by the buffer layer 504 is performed by, for example, removing the contact layer 520 by etching and applying a voltage to a pair of Schottky electrodes formed on the barrier layer 516.
- FIG. 6 schematically shows an example of a cross section of a semiconductor device 600 according to another embodiment.
- the semiconductor device 600 is, for example, a HEMT.
- the semiconductor device 600 includes a base substrate 502, a buffer layer 504, a back side electron supply layer 506, a back side spacer layer 508, a channel layer 510, a front side spacer layer 512, a front side electron supply layer 514, and a barrier layer 516 in this order.
- the semiconductor device 600 includes a contact layer 622 and a contact layer 624 that are in contact with the barrier layer 516, and a control electrode 636.
- the semiconductor device 600 includes a drain electrode 632 in contact with the contact layer 622 and a source electrode 634 in contact with the contact layer 624.
- the drain electrode 632 and the source electrode 634 form an ohmic junction with the contact layer 622 and the contact layer 624, for example.
- the contact layer 622 and the contact layer 624 include, for example, a Group 3-5 compound semiconductor such as GaAs and InGaAs.
- the control electrode 636 controls the current flowing through the drain electrode 632 and the source electrode 634.
- the drain electrode 632, the source electrode 634, and the control electrode 636 may be a semiconductor such as aluminum, copper, gold, silver, platinum, tungsten, other metals, and alloys thereof, or highly doped silicon. .
- the semiconductor device 600 is manufactured, for example, according to the following procedure. First, the compound semiconductor epitaxial substrate 500 shown in FIG. 5 is prepared. Next, part of the contact layer 520 of the compound semiconductor epitaxial substrate 500 is removed by patterning by etching or the like to form a contact layer 622 and a contact layer 624, and the barrier layer 516 is exposed. Thereafter, the drain electrode 632, the source electrode 634, and the control electrode 636 are formed, whereby the semiconductor device 600 can be manufactured.
- the semiconductor device is a HEMT.
- the semiconductor device is not limited to a HEMT.
- the semiconductor device may be a light emitting element, a light receiving element, or a semiconductor circuit as well as an electronic device such as an HBT or FET.
- the compound semiconductor epitaxial substrate 500 was manufactured by the following procedure.
- a semi-insulating GaAs single crystal substrate was prepared as the base substrate 502.
- the prepared GaAs single crystal substrate was placed in a vacuum barrel type MOCVD furnace.
- p-Al 0.25 Ga 0.75 As having a thickness of 500 nm was formed as the buffer layer 504.
- TMA as the first group 3 source gas
- TMG as the second group 3 source gas
- a source gas containing arsine (AsH 3 ) was used as the group 5 source gas.
- a gas containing disilane (Si 2 H 6 ) was used as the impurity gas.
- the flow rate of the impurity gas was set so that the flow rate of disilane was 6.20 ⁇ 10 ⁇ 5 cm 3 / min in terms of 101.3 kPa and 0 ° C.
- High purity hydrogen was used as a carrier gas.
- the first Group 3 source gas, the second Group 3 source gas, and the Group 5 source gas are adjusted so that the flow rate ratio of the Group 5 source gas to the group 3 source gas is 30. And supplied to the MOCVD furnace. Specifically, the flow rate of the first Group 3 source gas was set so that the flow rate of TMA was 2.7 cm 3 / min in terms of 101.3 kPa and 0 ° C. The flow rate of the second group 3 source gas was set so that the flow rate of TMG was 10.6 cm 3 / min in terms of 101.3 kPa and 0 ° C.
- the flow rate of the Group 5 source gas was set so that the flow rate of arsine was 400 cm 3 / min in terms of 101.3 kPa and 0 ° C.
- a growth pressure in a MOCVD furnace was selected to be 10.13 kPa, a growth temperature was 650 ° C., and a growth rate was 1 to 3 ⁇ m / hr.
- the flow rate difference between the Group 5 source gas and the Group 3 source gas was 386.7 cm 3 / min. Therefore, the ratio of the flow rate difference between the Group 5 source gas and the Group 3 source gas to the flow rate of the impurity gas was 6.24 ⁇ 10 6 . Further, the flow rate ratio of the group 5 source gas to the impurity gas flow rate was 6.45 ⁇ 10 6 .
- n-Al 0.22 Ga 0.78 As having a thickness of 3 nm was formed as the back-side electron supply layer 506.
- the residual n-type carrier concentration of the back-side electron supply layer 506 was 3 ⁇ 10 18 cm ⁇ 3 .
- i-Al 0.22 Ga 0.78 As having a thickness of 3 nm was formed as the back-side spacer layer 508.
- a strained InGaAs layer was formed as the channel layer 510.
- i-In 0.20 Ga 0.80 As having a thickness of 14 nm was formed.
- a Group 3 source gas of i-In 0.20 Ga 0.80 As a first Group 3 source gas containing TMI and a second Group 3 source gas containing TMG were used.
- i-Al 0.22 Ga 0.78 As having a thickness of 3 nm was formed as the front spacer layer 512.
- n-Al 0.22 Ga 0.78 As having a thickness of 9 nm was formed as the front-side electron supply layer 514.
- the residual n-type carrier concentration of the front side electron supply layer 514 was 3 ⁇ 10 18 cm ⁇ 3 .
- i-Al 0.22 Ga 0.78 As having a thickness of 50 nm was formed as the barrier layer 516.
- FIG. 7 shows the results of capacitance voltage measurement on the compound semiconductor epitaxial substrate of Example 1.
- the horizontal axis in FIG. 7 indicates the bias voltage [V].
- the vertical axis represents the capacitance [F].
- FIG. 8 shows a diagram in which the vertical axis in the result of the capacitive voltage measurement shown in FIG. 7 is converted into a capacitance [F / cm 2 ] per unit area.
- the capacitance voltage measurement was performed by forming a Schottky electrode on the surface of the barrier layer 516.
- an outer electrode having an opening and an inner electrode arranged inside the opening were formed.
- the shape of the inner electrode was a circle having a diameter of 500 ⁇ m.
- the shape of the opening of the outer electrode was a circle having a diameter of 540 ⁇ m.
- the outer electrode has a circular shape.
- the area of the outer electrode was 2 cm 2 or more.
- the inner electrode, outer electrode, and aperture were designed to be centered.
- Al was used as the material for the outer and inner electrodes. Capacitance voltage measurement was performed by applying a voltage between the inner electrode and the outer electrode.
- the residual capacity was less than 1 pF. Further, as shown in FIG. 8, the residual capacity per unit area is less than a value obtained by dividing 1 pF by the area of the inner electrode (2.0 ⁇ 10 ⁇ 3 cm 2 ), that is, less than 0.5 nF / cm 2 . is there.
- the electrostatic capacitance decreased sharply at a bias voltage in the range of about 2.6 V to about 3.1 V, and good pinch-off characteristics were exhibited.
- the pinch-off voltage was -2.8V.
- the pinch-off voltage represents a voltage when the n-type carrier concentration is 1 ⁇ 10 15 cm ⁇ 3 .
- the p-type carrier concentration and the residual p-type carrier concentration of the buffer layer 504 were calculated.
- the p-type carrier concentration of the buffer layer 504 represents the p-type carrier concentration of the buffer layer 504 when formed without doping disilane.
- the residual p-type carrier concentration of the buffer layer 504 represents the p-type carrier concentration after being compensated by the n-type carrier by doping disilane.
- the buffer layer 504 had a p-type carrier concentration of 3.3 ⁇ 10 16 cm ⁇ 3 and a residual p-type carrier concentration of 5.0 ⁇ 10 15 cm ⁇ 3 . That is, the value obtained by multiplying the film thickness of the buffer layer 504 by the residual p-type carrier concentration of the buffer layer 504 was 2.5 ⁇ 10 11 cm ⁇ 2 , which was 8.0 ⁇ 10 11 cm ⁇ 2 or less.
- the pressure resistance of the buffer layer 504 was measured.
- the breakdown voltage measurement the breakdown voltage due to electron conduction and the breakdown voltage due to hole conduction were measured.
- the breakdown voltage measurement was performed according to the following procedure. First, 130 nm was etched from the surface of the compound semiconductor epitaxial substrate 500 to expose the buffer layer 504. Next, a counter electrode was placed on the exposed buffer layer. The distance between the counter electrodes was 5 ⁇ m. The width of the counter electrode was 200 ⁇ m. An AuGe / Ni / Au electrode was used for pressure resistance measurement by electron conduction. An AuZn electrode was used for the pressure resistance measurement by hole conduction. The withstand voltage due to electron conduction was 22V, the withstand voltage due to hole conduction was 48V, and a good buffer withstand voltage was obtained.
- the hole measurement of the compound semiconductor epitaxial substrate 500 was implemented. Hall measurement was performed by the Van der Pauw method.
- the two-dimensional electron gas concentration at 300 K was 2.4 ⁇ 10 12 cm ⁇ 2 .
- the electron mobility at 300 K was 7600 cm 2 / Vs.
- the two-dimensional electron gas concentration at 77 K was 2.5 ⁇ 10 12 cm ⁇ 2 .
- the electron mobility at 77 K was 24000 cm 2 / Vs.
- Example 2 As Example 2, the compound semiconductor epitaxial substrate 500 having the same structure as that of Example 1 was manufactured by setting the flow rate ratio of the Group 5 source gas to the flow rate of the Group 3 source gas to 30 and decreasing the flow rate of the impurity gas.
- the compound semiconductor epitaxial substrate 500 of Example 2 was manufactured in the same manner as the compound semiconductor epitaxial substrate 500 of Example 1 except that the buffer layer 504 was formed by reducing the flow rate of the impurity gas. Specifically, the flow rate of the impurity gas was set so that the flow rate of disilane was 5.40 ⁇ 10 ⁇ 5 cm 3 / min in terms of standard conditions of 101.3 kPa and 0 ° C.
- the flow rate difference between the Group 5 source gas and the Group 3 source gas in Example 2 was 386.7 cm 3 / min, as in Example 1. Since the flow rate of the impurity gas disilane is 5.40 ⁇ 10 ⁇ 5 cm 3 / min, the ratio of the flow rate difference between the Group 5 source gas and the Group 3 source gas to the impurity gas flow rate is 7.16 ⁇ 10 6 . there were. The flow rate ratio of the Group 5 source gas to the impurity gas flow rate was 7.41 ⁇ 10 6 .
- the p-type carrier concentration of the buffer layer 504 that is, the p-type carrier concentration of the buffer layer 504 when formed without doping disilane is 3.3 ⁇ 10 16 cm ⁇ 3.
- the residual p-type carrier concentration that is, the p-type carrier concentration after being compensated by the n-type carrier by doping with disilane was 8.0 ⁇ 10 15 cm ⁇ 3 . That is, the value obtained by multiplying the film thickness of the buffer layer 504 by the carrier concentration of the buffer layer 504 was 4.0 ⁇ 10 11 cm ⁇ 2 , which was smaller than 8.0 ⁇ 10 11 cm ⁇ 2 .
- the withstand voltage due to electron conduction of the buffer layer 504 of Example 2 was 23V, and the withstand voltage due to hole conduction was 37V. Although the breakdown voltage due to hole conduction was lower than the breakdown voltage of the buffer layer 504 of Example 1, a sufficiently good buffer breakdown voltage was obtained.
- Example 3 As Example 3, the compound semiconductor epitaxial substrate having the same structure as in Example 1 and Example 2 with the flow rate ratio of the Group 5 source gas to the flow rate of the Group 3 source gas being 30 and the impurity gas flow rate being further reduced 500 was produced.
- the compound semiconductor epitaxial substrate 500 of Example 3 was manufactured in the same manner as the compound semiconductor epitaxial substrate 500 of Example 1 and Example 2, except that the buffer layer 504 was formed by reducing the flow rate of the impurity gas. Specifically, the flow rate of the impurity gas was set so that the flow rate of disilane was 4.58 ⁇ 10 ⁇ 5 cm 3 / min in terms of standard conditions of 101.3 kPa and 0 ° C.
- the flow rate difference between the Group 5 source gas and the Group 3 source gas in Example 3 was 386.7 cm 3 / min, as in Example 1. Since the flow rate of the impurity gas disilane is 4.58 ⁇ 10 ⁇ 5 cm 3 / min, the ratio of the flow rate difference between the Group 5 source gas and the Group 3 source gas to the flow rate of the impurity gas is 8.44 ⁇ 10 6 . there were. Further, the flow rate ratio of the Group 5 source gas to the impurity gas flow rate was 8.73 ⁇ 10 6 .
- the p-type carrier concentration of the buffer layer 504 that is, the p-type carrier concentration of the buffer layer 504 when formed without doping with disilane is 3.3 ⁇ 10 16 cm ⁇ 3.
- the residual p-type carrier concentration that is, the p-type carrier concentration after being compensated by the n-type carrier by doping with disilane was 1.4 ⁇ 10 16 cm ⁇ 3 . That is, the value obtained by multiplying the thickness of the buffer layer 504 by the carrier concentration of the buffer layer 504 was 7.0 ⁇ 10 11 cm ⁇ 2 , which was smaller than 8.0 ⁇ 10 11 cm ⁇ 2 .
- the withstand voltage due to electron conduction of the buffer layer 504 of Example 2 was 25V, and the withstand voltage due to hole conduction was 26V. Although the withstand voltage due to hole conduction was further lower than the withstand voltage of the buffer layer 504 of Example 2, a sufficiently good buffer withstand voltage was obtained.
- Comparative Example 1 As Comparative Example 1, a compound semiconductor epitaxial substrate having a structure similar to that of Example 1 was manufactured with a flow rate ratio of the Group 5 source gas to the group 3 source gas being 70.
- the compound semiconductor epitaxial substrate of Comparative Example 1 is the compound semiconductor epitaxial substrate of Example 1 except that the flow rate ratio of the Group 5 source gas to the group 3 source gas is 70 and the buffer layer is formed without supplying the impurity gas. It was produced under the same conditions as 500. Specifically, the flow rate of the first Group 3 source gas was set so that the flow rate of TMA was 2.7 cm 3 / min in terms of standard conditions of 101.3 kPa and 0 ° C.
- the flow rate of the second group 3 source gas was set so that the flow rate of TMG was 10.6 cm 3 / min in terms of standard conditions of 101.3 kPa and 0 ° C.
- the flow rate of the Group 5 source gas was set so that the flow rate of arsine was 930 cm 3 / min in terms of standard conditions of 101.3 kPa and 0 ° C.
- the p-type carrier concentration of the buffer layer was 5 ⁇ 10 15 cm ⁇ 3 . That is, the value obtained by multiplying the thickness of the buffer layer by the carrier concentration of the buffer layer was 2.5 ⁇ 10 11 cm ⁇ 2 , which was 8.0 ⁇ 10 11 cm ⁇ 2 or less. In Comparative Example 1, the residual p-type carrier concentration is equal to the p-type carrier concentration.
- the capacity voltage measurement was implemented similarly to the compound semiconductor epitaxial substrate of the example 1.
- the residual capacity was less than 1 pF, and the residual capacity per unit area was 0.5 nF / cm 2 , indicating good pinch-off characteristics.
- the pinch-off voltage that is, the voltage when the n-type carrier concentration was 1 ⁇ 10 15 cm ⁇ 3 was ⁇ 2.9 V.
- withstand voltage measurement was performed in the same manner as the buffer layer 504 of Example 1.
- the withstand voltage due to electron conduction was 26V
- the withstand pressure due to hole conduction was 42V
- a good buffer withstand voltage was obtained.
- the compound semiconductor epitaxial substrate of Comparative Example 1 hole measurement was performed in the same manner as the compound semiconductor epitaxial substrate 500 of Example 1.
- the two-dimensional electron gas concentration at 300 K was 2.4 ⁇ 10 12 cm ⁇ 2 .
- the electron mobility at 300 K was 7600 cm 2 / Vs.
- the two-dimensional electron gas concentration at 77 K was 2.5 ⁇ 10 12 cm ⁇ 2 .
- the electron mobility at 77 K was 25000 cm 2 / Vs.
- Comparative Example 2 As Comparative Example 2, a compound semiconductor epitaxial substrate having the same structure as in Example 1 was manufactured by setting the flow rate ratio of the Group 5 source gas to the flow rate of the Group 3 source gas to 30 and decreasing the flow rate of the impurity gas.
- the compound semiconductor epitaxial substrate of Comparative Example 2 was manufactured in the same manner as the compound semiconductor epitaxial substrate 500 of Example 1 except that the buffer layer was formed by reducing the flow rate of the impurity gas. Specifically, the flow rate of the impurity gas was set so that the flow rate of disilane was 4.12 ⁇ 10 ⁇ 5 cm 3 / min in terms of standard conditions of 101.3 kPa and 0 ° C.
- the flow rate difference between the Group 5 source gas and the Group 3 source gas in Comparative Example 2 was 386.7 cm 3 / min, as in Example 1. Since the flow rate of the impurity gas disilane is 4.12 ⁇ 10 ⁇ 5 cm 3 / min, the ratio of the flow rate difference between the Group 5 source gas and the Group 3 source gas to the impurity gas flow rate is 9.39 ⁇ 10 6 . there were. The flow rate ratio of the Group 5 source gas to the impurity gas flow rate was 9.71 ⁇ 10 6 .
- the p-type carrier concentration of the buffer layer that is, the original p-type carrier concentration without doping disilane was 3.3 ⁇ 10 16 cm ⁇ 3 .
- the residual p-type carrier concentration that is, the p-type carrier concentration after being compensated by the n-type carrier concentration was 2.0 ⁇ 10 16 cm ⁇ 3 . That is, the value obtained by multiplying the thickness of the buffer layer 504 by the carrier concentration of the buffer layer 504 was 1.0 ⁇ 10 12 cm ⁇ 2 , which was larger than 8.0 ⁇ 10 11 cm ⁇ 2 .
- FIG. 9 shows the results of capacitance voltage measurement on the compound semiconductor epitaxial substrate of Comparative Example 2.
- FIG. 10 shows a diagram in which the vertical axis in the result of the capacitive voltage measurement shown in FIG. 9 is converted into a capacitance [F / cm 2 ] per unit area.
- the capacitance voltage measurement was performed in the same manner as the compound semiconductor epitaxial substrate 500 of Example 1.
- p-type carriers remained, resulting in a residual capacity of 17 pF.
- the residual capacity per unit area was calculated to be 8.7 nF / cm 2 .
- the compound semiconductor epitaxial substrate of Comparative Example 2 hole measurement was performed in the same manner as the compound semiconductor epitaxial substrate 500 of Example 1.
- the two-dimensional electron gas concentration at 300 K was 2.1 ⁇ 10 12 cm ⁇ 2 .
- the electron mobility at 300 K was 7600 cm 2 / Vs.
- the two-dimensional electron gas concentration at 77 K was 2.1 ⁇ 10 12 cm ⁇ 2 .
- the electron mobility at 77 K was 25000 cm 2 / Vs. It is considered that the neutral region was generated by the p-type carrier and the two-dimensional electron gas concentration was lowered.
- Table 1 shows the buffer growth conditions in each of Example 1 to Comparative Example 2.
- Table 2 shows the results of buffer growth in each of Example 1 to Comparative Example 2.
- the n breakdown voltage in Table 2 indicates the breakdown voltage due to electron conduction.
- the p breakdown voltage indicates a breakdown voltage due to hole conduction.
- Table 3 shows the active layer characteristics in each of Example 1 to Comparative Example 2.
- Comparative Example 2 is compared with Example 3.
- the flow rate of disilane which is an impurity gas is different. That is, the ratio of the difference between the flow rate of the Group 5 source gas and the flow rate of the Group 3 source gas with respect to the flow rate of disilane differs between Comparative Example 2 and Example 3.
- the difference between the flow rate of the group 5 source gas and the flow rate of the group 3 source gas with respect to the flow rate of disilane is not an appropriate amount, the residual p-type carrier concentration exceeds the appropriate value and the residual capacity increases. It is considered that the breakdown voltage due to conduction decreases.
- the ratio of the difference between the flow rate of the Group 5 source gas and the flow rate of the Group 3 source gas to the flow rate of disilane in Example 3 is 8.44 ⁇ 10 6
- the Group 5 source material with respect to the flow rate of disilane in Comparative Example 2 The ratio of the difference between the gas flow rate and the Group 3 source gas flow rate is 9.39 ⁇ 10 6 . Therefore, it is considered that a compound semiconductor having good buffer performance grows when the ratio of the difference between the flow rate of the group 5 source gas and the flow rate of the group 3 source gas with respect to the flow rate of disilane is about 9.0 ⁇ 10 6 or less.
- the ratio of the difference between the flow rate of the Group 5 source gas and the flow rate of the Group 3 source gas to the flow rate of disilane may be 8.44 ⁇ 10 6 or less.
- the flow rate of the Group 5 source gas with respect to the flow rate of disilane in Example 3 is 8.73 ⁇ 10 6
- the flow rate ratio of the Group 5 source gas with respect to the flow rate of disilane in Comparative Example 2 is 9.71 ⁇ 10 6 . Therefore, when the flow rate ratio of the group 5 source gas to the flow rate of the group 3 source gas is 30, it is good when the flow rate ratio of the group 5 source gas to the flow rate of disilane is about 9.0 ⁇ 10 6 or less. It is considered that a compound semiconductor having a good buffer performance will grow.
- the flow rate ratio of the group 5 source gas to the flow rate of the group 3 source gas is 30, the flow rate ratio of the group 5 source gas to the flow rate of disilane may be 8.73 ⁇ 10 6 or less.
- the product of the residual carrier concentration and the film thickness in Example 3 is 7.0 ⁇ 10 11
- the product of the residual carrier concentration and the film thickness in Comparative Example 2 is 1.0 ⁇ 10 12. It is. Therefore, it is considered that a compound semiconductor having good buffer performance grows when the product of the residual carrier concentration and the film thickness is 8.0 ⁇ 10 11 or less.
- the product of the residual carrier concentration and the film thickness may be 7.0 ⁇ 10 11 or less.
- the compound semiconductor epitaxial substrates of Example 1, Example 2, and Example 3 were less than the compound semiconductor epitaxial substrate of Comparative Example 1 by reducing the Group 5 source gas by about 60%.
- the device characteristics equivalent to those of the compound semiconductor epitaxial substrate of Comparative Example 1 are shown.
- Comparative Example 2 sufficient characteristics cannot be obtained simply by reducing the Group 5 source gas. That is, by adopting the configuration according to the present invention, a Group 3-5 compound semiconductor exhibiting good device characteristics was obtained despite the significant reduction in the amount of Group 5 source gas used. Thereby, the manufacturing cost of the compound semiconductor epitaxial substrate and the semiconductor device can be greatly reduced.
- compound semiconductor epitaxial substrate 100 compound semiconductor epitaxial substrate, 102 base substrate, 103 main surface, 104 3-5 group compound semiconductor, 300 semiconductor device, 310 active layer, 400 compound semiconductor epitaxial substrate, 420 contact layer, 500 compound semiconductor epitaxial substrate, 502 base substrate, 503 main surface, 504 buffer layer, 506 back side electron supply layer, 508 back side spacer layer, 510 channel layer, 512 front side spacer layer, 514 front side electron supply layer, 516 barrier layer, 520 contact layer, 600 semiconductor device, 622 contact layer, 624 contact layer, 632 drain electrode, 634 source electrode, 636 control electrode
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Abstract
Description
特許文献1 特開平11-345812号公報
特許文献2 特開2007-67359号公報
化合物半導体エピタキシャル基板500を、以下の手順で製作した。ベース基板502として、半絶縁性のGaAs単結晶基板を準備した。準備したGaAs単結晶基板を、減圧バレル型のMOCVD炉に設置した。次に、バッファ層504として、膜厚が500nmのp-Al0.25Ga0.75Asを形成した。p-Al0.25Ga0.75Asの形成には、3族原料ガスとして、第1の3族原料ガスとしてのTMAと、第2の3族原料ガスとしてのTMGとを用いた。また、5族原料ガスとして、アルシン(AsH3)を含む原料ガスを用いた。不純物ガスとして、ジシラン(Si2H6)を含むガスを用いた。不純物ガスの流量は、101.3kPa、0℃の条件に換算して、ジシランの流量が、6.20×10-5cm3/分となるよう設定した。キャリアガスとして、高純度水素を用いた。
実施例2として、3族原料ガスの流量に対する5族原料ガスの流量比を30として、不純物ガスの流量を減少させて、実施例1と同様の構造を有する化合物半導体エピタキシャル基板500を製造した。実施例2の化合物半導体エピタキシャル基板500は、不純物ガスの流量を減少させてバッファ層504を形成した以外は、実施例1の化合物半導体エピタキシャル基板500と同様にして製造した。具体的には、不純物ガスの流量は、101.3kPa、0℃の標準条件に換算して、ジシランの流量が5.40×10-5cm3/分となるよう設定した。
実施例3として、3族原料ガスの流量に対する5族原料ガスの流量比を30として、不純物ガスの流量をさらに減少させて、実施例1および実施例2と同様の構造を有する化合物半導体エピタキシャル基板500を製造した。実施例3の化合物半導体エピタキシャル基板500は、不純物ガスの流量を減少させてバッファ層504を形成した以外は、実施例1および実施例2の化合物半導体エピタキシャル基板500と同様にして製造した。具体的には、不純物ガスの流量は、101.3kPa、0℃の標準条件に換算して、ジシランの流量が4.58×10-5cm3/分となるよう設定した。
比較例1として、3族原料ガスの流量に対する5族原料ガスの流量比を70として、実施例1と同様の構造を有する化合物半導体エピタキシャル基板を製造した。比較例1の化合物半導体エピタキシャル基板は、3族原料ガスの流量に対する5族原料ガスの流量比を70として、不純物ガスを供給しないでバッファ層を形成した以外は、実施例1の化合物半導体エピタキシャル基板500と同様の条件下で製造した。具体的には、第1の3族原料ガスの流量は、101.3kPa、0℃の標準条件に換算して、TMAの流量が2.7cm3/分となるよう設定した。第2の3族原料ガスの流量は、101.3kPa、0℃の標準条件に換算して、TMGの流量が10.6cm3/分となるよう設定した。5族原料ガスの流量は、101.3kPa、0℃の標準条件に換算して、アルシンの流量が930cm3/分となるよう設定した。
比較例2として、3族原料ガスの流量に対する5族原料ガスの流量比を30として、不純物ガスの流量を減少させて、実施例1と同様の構造を有する化合物半導体エピタキシャル基板を製造した。比較例2の化合物半導体エピタキシャル基板は、不純物ガスの流量を減少させてバッファ層を形成した以外は、実施例1の化合物半導体エピタキシャル基板500と同様にして製造した。具体的には、不純物ガスの流量は、101.3kPa、0℃の標準条件に換算して、ジシランの流量が4.12×10-5cm3/分となるよう設定した。
Claims (12)
- ベース基板を反応容器の内部に設置する段階と、
前記反応容器の内部に、3族元素の有機金属化合物からなる3族原料ガス、5族元素を含む化合物からなる5族原料ガス、および、半導体内にドープされてドナーとなる不純物を含む不純物ガスを供給して、前記ベース基板にp型3-5族化合物半導体をエピタキシャル成長させる段階と
を備え、
前記ベース基板に前記p型3-5族化合物半導体をエピタキシャル成長させる段階において、前記不純物ガスの流量、および前記3族原料ガスに対する前記5族原料ガスの流量比を、前記p型3-5族化合物半導体の残留キャリア濃度N(cm-3)および厚さd(cm)の積N×d(cm-2)が8.0×1011以下になるよう設定する、
半導体基板の製造方法。 - 前記ベース基板に前記p型3-5族化合物半導体をエピタキシャル成長させる段階において、前記3族原料ガスに対する前記5族原料ガスの流量比を50以下に設定する、
請求項1に記載の半導体基板の製造方法。 - 前記ベース基板に前記p型3-5族化合物半導体をエピタキシャル成長させる段階において、さらに、前記p型3-5族化合物半導体上の活性層に接するショットキ電極を用いた容量電圧測定による単位面積当たりの残留容量が0.5nF/cm2未満になるよう、前記不純物ガスの流量、および前記3族原料ガスに対する前記5族原料ガスの流量比を設定する、
請求項1に記載の半導体基板の製造方法。 - 前記ベース基板に前記p型3-5族化合物半導体をエピタキシャル成長させる段階において、前記不純物ガスの流量に対する前記5族原料ガスと前記3族原料ガスとの流量差の比を9.0×106以下に設定する、
請求項1に記載の半導体基板の製造方法。 - 前記不純物ガスは、Si、Se、Ge、Sn、SおよびTeからなる元素群より選ばれた少なくとも一つの元素を含む、
請求項1に記載の半導体基板の製造方法。 - 前記ベース基板に、前記p型3-5族化合物半導体と、さらに活性層とが、この順に積層されてなる、
請求項1に記載の半導体基板の製造方法。 - ベース基板と、
3族元素の有機金属化合物からなる3族原料ガス、5族元素からなる5族原料ガス、および、半導体内にドープされてドナーとなる不純物を含む不純物ガスを供給して、前記ベース基板上でエピタキシャル成長されたp型3-5族化合物半導体と
を備え、
前記p型3-5族化合物半導体は、残留キャリア濃度N(cm-3)および厚さd(cm)の積N×d(cm-2)が8.0×1011以下である、
半導体基板。 - 前記p型3-5族化合物半導体は、前記3族原料ガスに対する前記5族原料ガスの比が50以下になる条件でエピタキシャル成長された、
請求項7に記載の半導体基板。 - 前記p型3-5族化合物半導体上の活性層に接するショットキ電極を用いた容量電圧測定において単位面積当たりの残留容量が0.5nF/cm2未満である、
請求項7に記載の半導体基板。 - 前記p型3-5族化合物半導体は、前記不純物ガスの流量に対する前記5族原料ガスと前記3族原料ガスとの流量差の比が9.0×106以下になる条件でエピタキシャル成長された、
請求項7に記載の半導体基板。 - ドナー不純物として、Si、Se、Ge、Sn、SおよびTeからなる元素群より選ばれた少なくとも一つの元素を含む、
請求項7に記載の半導体基板。 - 前記ベース基板に、前記p型3-5族化合物半導体と、さらに活性層とが、この順に積層されてなる、
請求項7に記載の半導体基板。
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