WO2010041356A1 - Procédé de fabrication de modules de composants électroniques - Google Patents

Procédé de fabrication de modules de composants électroniques Download PDF

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Publication number
WO2010041356A1
WO2010041356A1 PCT/JP2009/002415 JP2009002415W WO2010041356A1 WO 2010041356 A1 WO2010041356 A1 WO 2010041356A1 JP 2009002415 W JP2009002415 W JP 2009002415W WO 2010041356 A1 WO2010041356 A1 WO 2010041356A1
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WO
WIPO (PCT)
Prior art keywords
conductive
resin layer
electronic component
sealing resin
component module
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Application number
PCT/JP2009/002415
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English (en)
Japanese (ja)
Inventor
神凉康一
勝部彰夫
田中啓
森木田豊
片岡祐治
Original Assignee
株式会社村田製作所
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Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Priority to JP2010532773A priority Critical patent/JP5321592B2/ja
Publication of WO2010041356A1 publication Critical patent/WO2010041356A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/165—Containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10439—Position of a single component
    • H05K2201/10492—Electrically connected to another device
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
    • H05K2203/013—Inkjet printing, e.g. for printing insulating material or resist
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention has a circuit board on which surface-mounted components are mounted, a sealing resin layer that covers the surface-mounted components, and a conductive thin film that is formed on the surface of the sealing resin layer and functions as a shield layer or the like.
  • the present invention relates to a method for manufacturing an electronic component module.
  • Electronic components used in electronic devices such as mobile communication devices are strongly demanded to be miniaturized and multifunctional, and are in the form of electronic component modules in which various surface mount components are mounted on a circuit board made of ceramic or resin. Often used.
  • Patent Document 1 a conductive film having a shielding effect is provided on the surface of a resin layer in which surface-mounted components are embedded, and further, via a pin-shaped ground terminal installed on the circuit board, A structure in which a conductive film is directly connected is disclosed.
  • Patent Document 2 a conductive film having a shielding effect is provided on the surface of a resin layer embedded in a surface-mounted component, and a conductive block-shaped partition member installed on a circuit board is provided. A structure in which a circuit board and a conductive film are directly connected is disclosed.
  • Patent Document 3 discloses that a collective substrate on which various surface mount components are arranged is collectively sealed with a resin and sealed at a boundary portion cut out as an electronic component module. By forming a groove (cut) part from the top surface of the resin to the position reaching the ground electrode, filling the groove part with conductive paste, and then cutting out the individual electronic component module units at the boundary part. Manufacturing a module is disclosed.
  • Patent Document 1 it is necessary to install a pin-shaped ground terminal and a block-shaped partition member on the circuit board. Therefore, a space for installing these terminals and members on the circuit board is required, which hinders the miniaturization of the circuit board, and thus the electronic component module.
  • a space for arranging these conductive members on the circuit board is required. There is a limit to its miniaturization.
  • the conductive paste having a relatively small viscosity is not sufficiently filled in order to fill the groove with the conductive paste, it cannot be fully filled.
  • the filled conductive paste may contain air bubbles.
  • the conductive paste is generally a thermosetting resin, voids are likely to be generated inside the resin layer during curing, and the electronic component may not be sufficiently shielded from electric field noise and electromagnetic wave noise. .
  • the present invention has been made in view of the above-described circumstances, and can effectively utilize the space on the surface of the circuit board, thereby enabling downsizing of the electronic component module and being formed on the surface of the sealing resin layer.
  • An object of the present invention is to provide an electronic component module manufacturing method capable of shielding a surface-mounted component mounted on a circuit board reliably while reducing the thickness of the conductive film.
  • the present invention provides a step of preparing a collective substrate in which a plurality of electronic component modules each having at least one surface-mounted component mounted on a circuit board is formed, and the surface-mounted component mounted on the plurality of electronic component modules.
  • After applying a conductive paste to the cut portion, using a spin coat, forming a conductive thin film connected to the conductive post; and after forming the conductive thin film Comprise the step of cutting out the electronic component module I to provide a method of manufacturing an electronic component module according to claim.
  • the conductive post is formed so as to have a tapered shape such that a cross section becomes smaller from the surface-mounted component side toward the conductive thin film side.
  • the present invention provides a method for manufacturing an electronic component module, wherein the conductive post is formed by stacking and solidifying fluid conductive materials in a predetermined thickness.
  • the present invention is an electronic component characterized in that a conductive solution is used as the fluid conductive material, and the conductive post is stacked by discharging the conductive solution from a discharge port a plurality of times.
  • a method for manufacturing a module is provided.
  • the encapsulating resin layer is formed to be thicker than the conductive post, and the predetermined thickness of the encapsulating resin layer is polished so that the conductive surface is formed on the top surface of the encapsulating resin layer.
  • a method for manufacturing an electronic component module characterized in that a part of a sex post is exposed.
  • the electronic component module according to the manufacturing method of the electronic component module of the present invention has a surface mounting by a conductive post in which the conductive thin film on the surface of the sealing resin layer is formed on the surface mounting component mounted on the circuit board. Since it is connected to the components, the space on the surface of the circuit board can be used effectively, and the circuit board, and thus the electronic component module can be reduced in size.
  • an electronic component module of the present invention a circuit board on which a surface mounting component is mounted, a sealing resin layer covering the surface mounting component, a top surface of the sealing resin layer, a shield layer, etc. It is possible to manufacture an electronic component module having a conductive thin film functioning as a good reproducibility.
  • the sealing resin layer is formed after the conductive post is formed on the surface mount component mounted on the circuit board, a hole for forming the conductive post is formed in the sealing resin layer in advance. Therefore, the electronic component module can be efficiently manufactured.
  • the collective substrate on which the plurality of electronic component modules are formed is collectively sealed with resin, and the collective substrate is formed from the top surface of the sealing resin layer at the boundary portion of the electronic component module.
  • a cut portion having a predetermined depth is formed, a conductive paste is applied to the top surface and the cut portion of the sealing resin layer, and then spin coating is applied to the side surface and the top surface of the electronic component module.
  • the applied conductive paste can be thinned (for example, 5 to 15 ⁇ m), and the height of the electronic component module can be reduced.
  • the conductive paste filled in the cut portion can be thinned, voids are generated due to evaporation of the diluted liquid of the conductive paste during the thermosetting process, or voids due to bubbles remaining in the conductive paste. There is nothing. Therefore, since the unformed portion of the shield layer is eliminated, the electronic component can be sufficiently shielded from electric field noise and electromagnetic wave noise.
  • the conductive post is formed so as to have a tapered shape such that its cross section becomes smaller from the surface mount component side to the conductive thin film side.
  • a taper shape that reduces the cross section on the shield layer side stabilizes the circuit board without damaging the conductive posts when forming the sealing resin layer, especially when laminating resin sheets.
  • a sealing resin layer can be formed.
  • the conductive post is preferably formed by stacking and solidifying conductive materials having fluidity, and in particular, a sintered metal obtained by firing the stacked conductive materials at a predetermined temperature. It is preferable that If the conductive post is a sintered metal, the sintered metal itself has a high strength and is not easily deformed by heat when the encapsulating resin layer is cured. The damage of the sex post can be minimized.
  • a conductive post by using a conductive solution as a fluid conductive material and discharging the conductive solution from the discharge port a plurality of times.
  • a conductive solution as a fluid conductive material
  • discharging the conductive solution from the discharge port a plurality of times it is preferable to form a conductive post by using a conductive solution as a fluid conductive material and discharging the conductive solution from the discharge port a plurality of times.
  • the sealing resin layer thicker than the height of the conductive post and polishing the predetermined thickness of the sealing resin layer, a part of the conductive post can be exposed on the top surface of the sealing resin layer.
  • the top surface of the sealing resin layer can be flattened, and a part of the conductive post can be reliably exposed on the top surface of the sealing resin layer.
  • FIG. 1 is a cross-sectional view showing a configuration of an electronic component module according to an embodiment of the present invention.
  • An electronic component module 1 according to an embodiment of the present invention has a rectangular parallelepiped shape of 10.0 mm ⁇ 10.0 mm ⁇ 1.2 mm as an example, a circuit board 11 made of ceramic, glass, epoxy resin, and the like, and a circuit Surface mount components 12 and 13 such as semiconductor elements, capacitors, resistors, and SAW filters mounted on the surface of the substrate 11 are provided.
  • a signal pattern (not shown) that also serves as a bonding pad with the surface mounting components 12 and 13 is formed.
  • the terminals of the surface mount components 12 and 13 are connected by bonding wires, solder, or the like.
  • a sealing resin layer 14 made of synthetic resin is formed on the upper surface of the circuit board 11 so as to cover the circuit board 11 and the surface mounting components 12 and 13, and a conductive thin film is formed on the top surface of the sealing resin layer 14. Is formed.
  • the sealing resin layer 14 fixes the surface mount components 12 and 13 to the circuit board 11 and shields the surface mount components 12 and 13 from the external environment.
  • the surface mount component 12 is a chip-type active component such as a semiconductor bare chip or a semiconductor package.
  • the surface-mounted component 13 is a chip-type passive component such as a chip capacitor, a chip inductor, or a chip resistor, and is continuously formed on the end surface of the rectangular parallelepiped component body 13a and a part of the side surface adjacent to the end surface.
  • the external electrode 13b is provided.
  • the external electrode 13b of the surface mounting component 13 is connected to an electrode pad (not shown) of the circuit board 11 on the circuit board 11 side, and is connected to the conductive post 16 on the opposite side to the circuit board 11 side. .
  • the conductive post 16 is formed on the external electrode 13b of the surface mounting component 13, and the conductive thin film 15 formed on the top surface of the sealing resin layer 14 and the surface thereof.
  • the external electrode 13 b of the mounting component 13 is electrically connected via the conductive post 16.
  • the external electrode 13b of the surface mount component 13 is at the ground potential, and the external electrode 13b and the conductive thin film 15 are electrically connected via the conductive post 16.
  • the conductive thin film 15 functions as a shield layer that shields the surface-mounted components 12 and 13 from electric field noise and electromagnetic wave noise (hereinafter referred to as the shield layer 15).
  • the shield layer 15 is preferably formed over the entire top surface of the sealing resin layer 14, but a part thereof, for example, a surface-mounted component that easily affects other surface-mounted components, or It may be formed only on the upper portion of the surface mount component that is susceptible to electromagnetic influence from other surface mount components. Further, the shield layer 15 may be formed on the entire side surface of the electronic component module 1 in addition to the top surface of the sealing resin layer 14, or may be formed on the side surface of the sealing resin layer 14. Good.
  • the shield layer 15 on the top surface of the sealing resin layer 14 is connected to the surface mounting component 13 by the conductive posts 16 formed on the surface mounting component 13 and in the sealing resin layer 14. Therefore, the space on the surface of the circuit board 11 can be used effectively, and the electronic component module 1 can be downsized and densified.
  • a ceramic board mainly made of a ceramic material, a resin board mainly made of a resin material, or the like can be used, and a predetermined circuit pattern (not shown) such as a functional element such as a capacitor or an inductor or a routing wiring is used.
  • a sealing resin layer 14 it is preferable to use a thermosetting resin, and for the purpose of controlling strength, dielectric constant, temperature characteristics, viscosity, etc., a filler component such as ceramic is included in the material. May be used.
  • 2 to 9 are cross-sectional views for explaining a method of manufacturing the electronic component module 1 according to the embodiment of the present invention. 2 to 9, the case where a ceramic multilayer substrate is used as the circuit substrate 11 will be described as an example.
  • a ceramic slurry is prepared by mixing a predetermined amount of an organic binder and an organic solvent with a low-temperature sintered ceramic material.
  • a ceramic slurry is spread on a carrier film such as PET by a doctor blade method or the like, and this is cut into a predetermined size together with the carrier film to produce a ceramic green sheet.
  • the formed hole for the interlayer connection conductor is filled with a conductive paste obtained by mixing a predetermined amount of an organic binder or a solvent with a low melting point metal. Then, an interlayer connection conductor is formed at a predetermined position of the ceramic green sheet. Next, an in-plane wiring conductor is formed on the ceramic green sheet so as to form a predetermined circuit pattern by printing a conductive paste obtained by mixing an organic binder and a solvent with a low melting point metal. In this manner, a predetermined number of ceramic green sheets provided with interlayer connection conductors and in-plane wiring conductors having a predetermined circuit pattern are stacked to produce an unfired ceramic laminate.
  • this unfired ceramic laminate is fired at a predetermined temperature to obtain a ceramic multilayer substrate having electrode pads on the upper surface and the lower surface of the circuit board 11. Thereafter, if necessary, a plating film is formed on the surface pad electrode or the like.
  • solder is supplied to the electrode pads on the upper surface of the ceramic multilayer substrate by screen printing or the like, and after mounting the surface mount components 12 and 13, the solder is melted and solidified by putting it in a reflow furnace. Then, the surface mount components 12 and 13 are fixed to the upper surface of the ceramic multilayer substrate. Then, if necessary, by performing a cleaning process such as removal of solder flux, an assembly board 10 capable of cutting out a plurality of circuit boards 11 made of ceramic multilayer boards on which various surface mount components 12 and 13 are mounted is provided. obtain.
  • low-temperature sintered ceramic material examples include ceramic powders such as alumina, forsterite, and cordierite, glass composite materials obtained by mixing these ceramic powders with glass such as borosilicate, and ZnO—MgO—Al 2 O 3.
  • Crystallized glass-based materials using crystallized glass such as —SiO 2 type, BaO—Al 2 O 3 —SiO 2 type ceramic powder and Al 2 O 3 —CaO—SiO 2 —MgO—B 2 O 3 type ceramic powder
  • Non-glass-based materials such as By using a low-temperature sintered ceramic material, a low-resistance low-melting-point metal such as Ag or Cu can be used as an interlayer connection conductor or in-plane wiring conductor, and as a result, a conductor mainly composed of Ag or Cu.
  • the pattern and the unfired ceramic laminate can be simultaneously fired at a low temperature of, for example, 1050 ° C. or lower.
  • FIG. 2 is a cross-sectional view showing a state in which the conductive posts 16 are formed on the surface mount components 12 and 13 of the electronic component module 1 according to the embodiment of the present invention.
  • a conductive post 16 having a predetermined height is formed on the surface-mounted component 13 mounted on the upper surface of the collective substrate 10. More specifically, the conductive post 16 having a predetermined height is formed by stacking the conductive material 16a having fluidity on the external electrode 13b of the surface mount component 13 and solidifying it.
  • the conductive material 16a having fluidity a conductive solution obtained by dispersing conductive powder in a solvent is used, and a plurality of this conductive solution is discharged from the discharge port of the nozzle 19 based on an inkjet method, a jet dispenser method, or the like.
  • the conductive posts 16 having a predetermined height can be formed by stacking layers of the conductive solution containing the conductive powder by solid discharge and discharging them.
  • the conductive post 16 is applied to a predetermined portion by a plurality of times by applying a fluid conductive material such as a conductive paste in addition to an ink jet method or a jet dispenser method using a conductive solution at a predetermined position. It can also be formed by solidifying it.
  • the conductive post 16 only needs to be formed on at least one surface mount component as in the embodiment of the present invention, and may be formed on a plurality of surface mount components.
  • the conductive post 16 has a plurality of conductive posts 16, 16,...
  • the conductive post 16 that directly connects the circuit board 11 and the shield layer 15 is also included.
  • a plurality of conductive posts 16, 16,... May be formed on one surface-mounted component as necessary, for example, for enhancing shielding properties.
  • FIG. 3 is a cross-sectional view showing a state in which an uncured sealing resin layer 14a is formed on the electronic component module 1 according to the embodiment of the present invention. More specifically, as shown in FIG. 3, first, on a collective substrate 10 on which conductive posts 16 having a predetermined height are formed, a resin sheet laminate in a softened state, a liquid resin transfer mold, An uncured sealing resin layer 14a is formed by coating or the like.
  • the sealing resin layer 14a in a state in which the fluidity is improved by applying heat at a predetermined temperature to reduce the viscosity of the sealing resin layer 14a.
  • the thickness H2 of the sealing resin layer 14a is a height H1 of the conductive post 16 (that is, a height obtained by adding the height of the surface mount component 13 to the height of the conductive post 16 itself). It is preferable to form it thicker than (a).
  • FIG. 4 is a cross-sectional view showing a process in which the sealing resin layer 14b of the electronic component module 1 according to the embodiment of the present invention is polished and a part of the conductive post 16 is exposed.
  • the top surface of the sealing resin layer 14b is flattened by polishing a predetermined thickness of the semi-cured sealing resin layer 14b by moving the polishing roll 20 in the arrow direction in the drawing.
  • a part of the conductive post 16 can be reliably exposed on the top surface of the sealing resin layer 14b.
  • the step of exposing a part of the conductive post 16 to the top surface of the sealing resin layer 14b is performed by polishing the sealing resin layer 14b in a semi-cured state.
  • the sealing resin layer 14b to be performed may be performed after the step of completely curing. Further, by performing rubber pressing in a state where the sealing resin layer 14b is uncured, that is, in a liquid or softened state, the liquid or softened sealing resin layer 14b covering the surface of the conductive post 16 is fluidized and removed. Thus, a part of the conductive post 16 may be exposed on the top surface of the sealing resin layer 14b.
  • the conductive post 16 is preferably a sintered metal obtained by firing a conductive material at a predetermined temperature. If the conductive post 16 is a sintered metal, the strength of the conductive post 16 itself is high, and it is difficult to melt in the step of curing the sealing resin layer 14b, which will be described later. Moreover, it is preferable that the conductive post 16 has a tapered shape such that its cross section decreases from the surface mount component 13 side to the shield layer 15 side. Thus, when the cross section on the shield layer 15 side has a small taper shape, when forming the sealing resin layer 14b, the assembly is performed without damaging the conductive posts 16, especially when the resin sheet is laminated. The sealing resin layer 14 can be stably formed on the substrate 10.
  • the height of the conductive post 16, that is, the distance from the surface mount components 12 and 13 to the shield layer 15, is preferably 30 to 300 ⁇ m in order to ensure strength, reliability, etc.
  • the cross section is circular, it is preferably 20 to 100 ⁇ m in order to cope with the downsizing of the surface mount components 12 and 13.
  • FIG. 5 is a cross-sectional view showing a state in which a part of the conductive post 16 of the electronic component module 1 according to the embodiment of the present invention is exposed from the top surface of the cured sealing resin layer 14. As shown in FIG. 5, a part of the cross section of the conductive post 16 is exposed on the top surface of the cured sealing resin layer 14, and the conductive post 16 is supported and fixed by the sealing resin layer 14. It will be in the state.
  • FIG. 6 is a cross-sectional view showing a state in which the groove-shaped cut portion of the electronic component module 1 according to the embodiment of the present invention is formed.
  • the groove-shaped cut portion 17 may be formed partway through the sealing resin layer 14 or may be formed to a depth that reaches the collective substrate 10.
  • the cut portion 17 is formed to a depth that reaches the collective substrate 10
  • the top surface and the entire side surface of the sealing resin layer 14 can be covered with the shield layer 15 by a manufacturing process of the shield layer 15 to be described later. Can be increased.
  • FIG. 7 is a cross-sectional view showing a state where the conductive paste 18 of the electronic component module 1 according to the embodiment of the present invention is applied. As shown in FIG. 7, the shielding property can be improved by applying the cut portion 17 so that the inside of the cut portion 17 is sufficiently filled with the conductive paste 18.
  • the conductive component (filler) contained in the conductive paste 18 is, for example, Ag, Cu, Ni, and the like, and the synthetic resin (binder) including the conductive component is, for example, an epoxy resin, a phenol resin, a urethane resin, or a silicon resin. Polyester resin, acrylic resin, polyimide resin, and the like.
  • FIG. 8 is a cross-sectional view showing a state in which the shield layer 15 of the electronic component module 1 according to the embodiment of the present invention is formed.
  • the collective substrate 10 and the surface mount components 12 and 13 in a state where the conductive paste 18 is applied before the conductive paste 18 is heat-cured are placed on a spin coater and rotated by centrifugal force.
  • the conductive paste 18 is made into a thin film state.
  • the shield layer 15 is formed by heat-curing when the film is in a thin film state.
  • FIG. 10 is an exemplary diagram showing an outline of a spin coater that spin-coats the collective substrate 10 and the surface mount components 12 and 13 to which the conductive paste 18 is applied.
  • a disk-like rotor 3 is connected to the motor 4 and can rotate at a predetermined rotation direction and rotation speed.
  • the collective substrate 10 in the state of FIG. 7 is placed on the rotor 3.
  • the rotor 3 is rotated by the motor 4 with the collective substrate 10 in the state of FIG. Due to the centrifugal force generated by the rotation of the rotor 3, unnecessary conductive paste 18 filled in the circuit board 11 and the surface mount components 12, 13 is eliminated, and a conductive thin film is formed on the outer surface including the cut portions 17.
  • the state shown in FIG. 8 is obtained.
  • the conductive thin film is dried and thermally cured using an oven or the like to form the shield layer 15 having a thickness of 5 to 15 ⁇ m.
  • the film thickness can be arbitrarily controlled by changing the rotation speed and rotation time of the motor 4 of the spin coater. If it is desired to place importance on the shield characteristics, the film thickness may be set to be thicker. If it is desired to emphasize the reduction in height, the film thickness may be set to be thinner.
  • FIG. 9 is a cross-sectional view showing a state in which the electronic component module 1 according to the embodiment of the present invention is divided into individual electronic component modules 1 from the collective substrate 10.
  • the cut portion 17 is further cut and divided into individual electronic component modules 1.
  • the electronic component module 1 having the conductive thin film formed and functioning as the shield layer 15 or the like can be manufactured with good reproducibility.
  • the conductive post 16 is formed on the surface mount components 12 and 13 mounted on the circuit board 11 and then the sealing resin layer 14 is formed, the conductive post 16 is formed on the sealing resin layer 14. Therefore, the electronic component module 1 can be efficiently manufactured without forming a hole for this purpose in advance.
  • the conductive paste applied to the side and top surfaces of the electronic component module can be thinned by applying the conductive paste to the side surfaces and the top surface, and then using spin coating.
  • the amount of vaporization gas of liquid and the amount of curing reaction gas of conductive paste is small.
  • the film thickness is thin, it is easy to escape to the outside even when gas is generated, and the generation of voids during thermosetting can be suppressed.
  • the time required for spin coating is about 30 s, which is high in productivity, and it is only necessary to use equipment having a simple structure such as a spin coater, so that the production cost can be suppressed.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • Manufacturing & Machinery (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

L'invention porte sur un procédé de fabrication de modules de composants électroniques qui peut produire des modules de composants électroniques compacts par utilisation efficace de l'espace sur la surface de la carte de circuit imprimé, produire un film conducteur plus mince formé sur une surface de couche de résine d'étanchéité, et blinder de façon fiable les composants montés en surface montés sur la carte de circuit imprimé. Une carte d'assemblage qui forme une pluralité de modules de composants électroniques est préparée. Au moins une tige conductrice est formée sur les composants montés en surface montés dans la pluralité de modules de composants électroniques. La carte d'assemblage est scellée en totalité par de la résine de telle manière que des parties des tiges conductrices sont exposées hors de la surface supérieure de la couche de résine d'étanchéité. Des encoches présentant la profondeur spécifiée par rapport à la surface supérieure de la couche de résine d'étanchéité sont formées sur les frontières des modules de composants électroniques. Après qu'une pâte conductrice a été déposée en couche sur la surface supérieure de la couche de résine d'étanchéité et dans les encoches, un dépôt par centrifugation est utilisé pour former un film mince conducteur connecté aux tiges conductrices. Les modules de composants électroniques sont ensuite découpés le long des encoches.
PCT/JP2009/002415 2008-10-07 2009-06-01 Procédé de fabrication de modules de composants électroniques WO2010041356A1 (fr)

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JP2012129363A (ja) * 2010-12-15 2012-07-05 Fujitsu Ltd 電子部品内蔵基板及びその製造方法
JP2013008849A (ja) * 2011-06-24 2013-01-10 Denso Corp 電子装置
JP5890073B1 (ja) * 2014-12-12 2016-03-22 株式会社メイコー モールド回路モジュール及びその製造方法
WO2016093040A1 (fr) * 2014-12-12 2016-06-16 株式会社メイコー Module de circuit moulé et son procédé de fabrication
WO2016117196A1 (fr) * 2015-01-21 2016-07-28 株式会社村田製作所 Module amplificateur de puissance
JP2016535463A (ja) * 2014-10-03 2016-11-10 インテル コーポレイション 垂直コラムを有するオーバラップ形スタック化ダイパッケージ
US10934157B2 (en) 2016-03-21 2021-03-02 Murata Manufacturing Co., Ltd. Packaged circuit system structure
WO2021090694A1 (fr) * 2019-11-07 2021-05-14 株式会社村田製作所 Module
WO2022044504A1 (fr) * 2020-08-31 2022-03-03 株式会社村田製作所 Module de circuit et procédé de fabrication de sous-module

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CN105140138B (zh) * 2015-09-16 2017-10-27 江苏长电科技股份有限公司 一种电磁屏蔽封装方法及其封装结构

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Cited By (16)

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JP2012129363A (ja) * 2010-12-15 2012-07-05 Fujitsu Ltd 電子部品内蔵基板及びその製造方法
JP2013008849A (ja) * 2011-06-24 2013-01-10 Denso Corp 電子装置
JP2016535463A (ja) * 2014-10-03 2016-11-10 インテル コーポレイション 垂直コラムを有するオーバラップ形スタック化ダイパッケージ
US10629561B2 (en) 2014-10-03 2020-04-21 Intel Corporation Overlapping stacked die package with vertical columns
US10256208B2 (en) 2014-10-03 2019-04-09 Intel Corporation Overlapping stacked die package with vertical columns
US10665568B2 (en) 2014-12-12 2020-05-26 Meiko Electronics Co., Ltd. Encapsulated circuit module, and production method therefor
JPWO2016093040A1 (ja) * 2014-12-12 2017-04-27 株式会社メイコー モールド回路モジュール及びその製造方法
TWI691260B (zh) * 2014-12-12 2020-04-11 日商名幸電子股份有限公司 模製電路模組及其製造方法
WO2016093040A1 (fr) * 2014-12-12 2016-06-16 株式会社メイコー Module de circuit moulé et son procédé de fabrication
JP5890073B1 (ja) * 2014-12-12 2016-03-22 株式会社メイコー モールド回路モジュール及びその製造方法
CN107078125A (zh) * 2015-01-21 2017-08-18 株式会社村田制作所 功率放大模块
WO2016117196A1 (fr) * 2015-01-21 2016-07-28 株式会社村田製作所 Module amplificateur de puissance
US10404226B2 (en) 2015-01-21 2019-09-03 Murata Manufacturing Co., Ltd. Power amplifier module
US10934157B2 (en) 2016-03-21 2021-03-02 Murata Manufacturing Co., Ltd. Packaged circuit system structure
WO2021090694A1 (fr) * 2019-11-07 2021-05-14 株式会社村田製作所 Module
WO2022044504A1 (fr) * 2020-08-31 2022-03-03 株式会社村田製作所 Module de circuit et procédé de fabrication de sous-module

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