WO2010041356A1 - Manufacturing method of electronic parts modules - Google Patents

Manufacturing method of electronic parts modules Download PDF

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Publication number
WO2010041356A1
WO2010041356A1 PCT/JP2009/002415 JP2009002415W WO2010041356A1 WO 2010041356 A1 WO2010041356 A1 WO 2010041356A1 JP 2009002415 W JP2009002415 W JP 2009002415W WO 2010041356 A1 WO2010041356 A1 WO 2010041356A1
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WO
WIPO (PCT)
Prior art keywords
conductive
resin layer
electronic component
sealing resin
component module
Prior art date
Application number
PCT/JP2009/002415
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French (fr)
Japanese (ja)
Inventor
神凉康一
勝部彰夫
田中啓
森木田豊
片岡祐治
Original Assignee
株式会社村田製作所
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Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Priority to JP2010532773A priority Critical patent/JP5321592B2/en
Publication of WO2010041356A1 publication Critical patent/WO2010041356A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/552Protection against radiation, e.g. light or electromagnetic waves
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/165Containers
    • HELECTRICITY
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/01078Platinum [Pt]
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787Ceramics, e.g. crystalline carbides, nitrides or oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431Details of mounted components
    • H05K2201/10439Position of a single component
    • H05K2201/10492Electrically connected to another device
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10636Leadless chip, e.g. chip capacitor or resistor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01Tools for processing; Objects used during processing
    • H05K2203/0104Tools for processing; Objects used during processing for patterning or coating
    • H05K2203/013Inkjet printing, e.g. for printing insulating material or resist
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/284Applying non-metallic protective coatings for encapsulating mounted components
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention has a circuit board on which surface-mounted components are mounted, a sealing resin layer that covers the surface-mounted components, and a conductive thin film that is formed on the surface of the sealing resin layer and functions as a shield layer or the like.
  • the present invention relates to a method for manufacturing an electronic component module.
  • Electronic components used in electronic devices such as mobile communication devices are strongly demanded to be miniaturized and multifunctional, and are in the form of electronic component modules in which various surface mount components are mounted on a circuit board made of ceramic or resin. Often used.
  • Patent Document 1 a conductive film having a shielding effect is provided on the surface of a resin layer in which surface-mounted components are embedded, and further, via a pin-shaped ground terminal installed on the circuit board, A structure in which a conductive film is directly connected is disclosed.
  • Patent Document 2 a conductive film having a shielding effect is provided on the surface of a resin layer embedded in a surface-mounted component, and a conductive block-shaped partition member installed on a circuit board is provided. A structure in which a circuit board and a conductive film are directly connected is disclosed.
  • Patent Document 3 discloses that a collective substrate on which various surface mount components are arranged is collectively sealed with a resin and sealed at a boundary portion cut out as an electronic component module. By forming a groove (cut) part from the top surface of the resin to the position reaching the ground electrode, filling the groove part with conductive paste, and then cutting out the individual electronic component module units at the boundary part. Manufacturing a module is disclosed.
  • Patent Document 1 it is necessary to install a pin-shaped ground terminal and a block-shaped partition member on the circuit board. Therefore, a space for installing these terminals and members on the circuit board is required, which hinders the miniaturization of the circuit board, and thus the electronic component module.
  • a space for arranging these conductive members on the circuit board is required. There is a limit to its miniaturization.
  • the conductive paste having a relatively small viscosity is not sufficiently filled in order to fill the groove with the conductive paste, it cannot be fully filled.
  • the filled conductive paste may contain air bubbles.
  • the conductive paste is generally a thermosetting resin, voids are likely to be generated inside the resin layer during curing, and the electronic component may not be sufficiently shielded from electric field noise and electromagnetic wave noise. .
  • the present invention has been made in view of the above-described circumstances, and can effectively utilize the space on the surface of the circuit board, thereby enabling downsizing of the electronic component module and being formed on the surface of the sealing resin layer.
  • An object of the present invention is to provide an electronic component module manufacturing method capable of shielding a surface-mounted component mounted on a circuit board reliably while reducing the thickness of the conductive film.
  • the present invention provides a step of preparing a collective substrate in which a plurality of electronic component modules each having at least one surface-mounted component mounted on a circuit board is formed, and the surface-mounted component mounted on the plurality of electronic component modules.
  • After applying a conductive paste to the cut portion, using a spin coat, forming a conductive thin film connected to the conductive post; and after forming the conductive thin film Comprise the step of cutting out the electronic component module I to provide a method of manufacturing an electronic component module according to claim.
  • the conductive post is formed so as to have a tapered shape such that a cross section becomes smaller from the surface-mounted component side toward the conductive thin film side.
  • the present invention provides a method for manufacturing an electronic component module, wherein the conductive post is formed by stacking and solidifying fluid conductive materials in a predetermined thickness.
  • the present invention is an electronic component characterized in that a conductive solution is used as the fluid conductive material, and the conductive post is stacked by discharging the conductive solution from a discharge port a plurality of times.
  • a method for manufacturing a module is provided.
  • the encapsulating resin layer is formed to be thicker than the conductive post, and the predetermined thickness of the encapsulating resin layer is polished so that the conductive surface is formed on the top surface of the encapsulating resin layer.
  • a method for manufacturing an electronic component module characterized in that a part of a sex post is exposed.
  • the electronic component module according to the manufacturing method of the electronic component module of the present invention has a surface mounting by a conductive post in which the conductive thin film on the surface of the sealing resin layer is formed on the surface mounting component mounted on the circuit board. Since it is connected to the components, the space on the surface of the circuit board can be used effectively, and the circuit board, and thus the electronic component module can be reduced in size.
  • an electronic component module of the present invention a circuit board on which a surface mounting component is mounted, a sealing resin layer covering the surface mounting component, a top surface of the sealing resin layer, a shield layer, etc. It is possible to manufacture an electronic component module having a conductive thin film functioning as a good reproducibility.
  • the sealing resin layer is formed after the conductive post is formed on the surface mount component mounted on the circuit board, a hole for forming the conductive post is formed in the sealing resin layer in advance. Therefore, the electronic component module can be efficiently manufactured.
  • the collective substrate on which the plurality of electronic component modules are formed is collectively sealed with resin, and the collective substrate is formed from the top surface of the sealing resin layer at the boundary portion of the electronic component module.
  • a cut portion having a predetermined depth is formed, a conductive paste is applied to the top surface and the cut portion of the sealing resin layer, and then spin coating is applied to the side surface and the top surface of the electronic component module.
  • the applied conductive paste can be thinned (for example, 5 to 15 ⁇ m), and the height of the electronic component module can be reduced.
  • the conductive paste filled in the cut portion can be thinned, voids are generated due to evaporation of the diluted liquid of the conductive paste during the thermosetting process, or voids due to bubbles remaining in the conductive paste. There is nothing. Therefore, since the unformed portion of the shield layer is eliminated, the electronic component can be sufficiently shielded from electric field noise and electromagnetic wave noise.
  • the conductive post is formed so as to have a tapered shape such that its cross section becomes smaller from the surface mount component side to the conductive thin film side.
  • a taper shape that reduces the cross section on the shield layer side stabilizes the circuit board without damaging the conductive posts when forming the sealing resin layer, especially when laminating resin sheets.
  • a sealing resin layer can be formed.
  • the conductive post is preferably formed by stacking and solidifying conductive materials having fluidity, and in particular, a sintered metal obtained by firing the stacked conductive materials at a predetermined temperature. It is preferable that If the conductive post is a sintered metal, the sintered metal itself has a high strength and is not easily deformed by heat when the encapsulating resin layer is cured. The damage of the sex post can be minimized.
  • a conductive post by using a conductive solution as a fluid conductive material and discharging the conductive solution from the discharge port a plurality of times.
  • a conductive solution as a fluid conductive material
  • discharging the conductive solution from the discharge port a plurality of times it is preferable to form a conductive post by using a conductive solution as a fluid conductive material and discharging the conductive solution from the discharge port a plurality of times.
  • the sealing resin layer thicker than the height of the conductive post and polishing the predetermined thickness of the sealing resin layer, a part of the conductive post can be exposed on the top surface of the sealing resin layer.
  • the top surface of the sealing resin layer can be flattened, and a part of the conductive post can be reliably exposed on the top surface of the sealing resin layer.
  • FIG. 1 is a cross-sectional view showing a configuration of an electronic component module according to an embodiment of the present invention.
  • An electronic component module 1 according to an embodiment of the present invention has a rectangular parallelepiped shape of 10.0 mm ⁇ 10.0 mm ⁇ 1.2 mm as an example, a circuit board 11 made of ceramic, glass, epoxy resin, and the like, and a circuit Surface mount components 12 and 13 such as semiconductor elements, capacitors, resistors, and SAW filters mounted on the surface of the substrate 11 are provided.
  • a signal pattern (not shown) that also serves as a bonding pad with the surface mounting components 12 and 13 is formed.
  • the terminals of the surface mount components 12 and 13 are connected by bonding wires, solder, or the like.
  • a sealing resin layer 14 made of synthetic resin is formed on the upper surface of the circuit board 11 so as to cover the circuit board 11 and the surface mounting components 12 and 13, and a conductive thin film is formed on the top surface of the sealing resin layer 14. Is formed.
  • the sealing resin layer 14 fixes the surface mount components 12 and 13 to the circuit board 11 and shields the surface mount components 12 and 13 from the external environment.
  • the surface mount component 12 is a chip-type active component such as a semiconductor bare chip or a semiconductor package.
  • the surface-mounted component 13 is a chip-type passive component such as a chip capacitor, a chip inductor, or a chip resistor, and is continuously formed on the end surface of the rectangular parallelepiped component body 13a and a part of the side surface adjacent to the end surface.
  • the external electrode 13b is provided.
  • the external electrode 13b of the surface mounting component 13 is connected to an electrode pad (not shown) of the circuit board 11 on the circuit board 11 side, and is connected to the conductive post 16 on the opposite side to the circuit board 11 side. .
  • the conductive post 16 is formed on the external electrode 13b of the surface mounting component 13, and the conductive thin film 15 formed on the top surface of the sealing resin layer 14 and the surface thereof.
  • the external electrode 13 b of the mounting component 13 is electrically connected via the conductive post 16.
  • the external electrode 13b of the surface mount component 13 is at the ground potential, and the external electrode 13b and the conductive thin film 15 are electrically connected via the conductive post 16.
  • the conductive thin film 15 functions as a shield layer that shields the surface-mounted components 12 and 13 from electric field noise and electromagnetic wave noise (hereinafter referred to as the shield layer 15).
  • the shield layer 15 is preferably formed over the entire top surface of the sealing resin layer 14, but a part thereof, for example, a surface-mounted component that easily affects other surface-mounted components, or It may be formed only on the upper portion of the surface mount component that is susceptible to electromagnetic influence from other surface mount components. Further, the shield layer 15 may be formed on the entire side surface of the electronic component module 1 in addition to the top surface of the sealing resin layer 14, or may be formed on the side surface of the sealing resin layer 14. Good.
  • the shield layer 15 on the top surface of the sealing resin layer 14 is connected to the surface mounting component 13 by the conductive posts 16 formed on the surface mounting component 13 and in the sealing resin layer 14. Therefore, the space on the surface of the circuit board 11 can be used effectively, and the electronic component module 1 can be downsized and densified.
  • a ceramic board mainly made of a ceramic material, a resin board mainly made of a resin material, or the like can be used, and a predetermined circuit pattern (not shown) such as a functional element such as a capacitor or an inductor or a routing wiring is used.
  • a sealing resin layer 14 it is preferable to use a thermosetting resin, and for the purpose of controlling strength, dielectric constant, temperature characteristics, viscosity, etc., a filler component such as ceramic is included in the material. May be used.
  • 2 to 9 are cross-sectional views for explaining a method of manufacturing the electronic component module 1 according to the embodiment of the present invention. 2 to 9, the case where a ceramic multilayer substrate is used as the circuit substrate 11 will be described as an example.
  • a ceramic slurry is prepared by mixing a predetermined amount of an organic binder and an organic solvent with a low-temperature sintered ceramic material.
  • a ceramic slurry is spread on a carrier film such as PET by a doctor blade method or the like, and this is cut into a predetermined size together with the carrier film to produce a ceramic green sheet.
  • the formed hole for the interlayer connection conductor is filled with a conductive paste obtained by mixing a predetermined amount of an organic binder or a solvent with a low melting point metal. Then, an interlayer connection conductor is formed at a predetermined position of the ceramic green sheet. Next, an in-plane wiring conductor is formed on the ceramic green sheet so as to form a predetermined circuit pattern by printing a conductive paste obtained by mixing an organic binder and a solvent with a low melting point metal. In this manner, a predetermined number of ceramic green sheets provided with interlayer connection conductors and in-plane wiring conductors having a predetermined circuit pattern are stacked to produce an unfired ceramic laminate.
  • this unfired ceramic laminate is fired at a predetermined temperature to obtain a ceramic multilayer substrate having electrode pads on the upper surface and the lower surface of the circuit board 11. Thereafter, if necessary, a plating film is formed on the surface pad electrode or the like.
  • solder is supplied to the electrode pads on the upper surface of the ceramic multilayer substrate by screen printing or the like, and after mounting the surface mount components 12 and 13, the solder is melted and solidified by putting it in a reflow furnace. Then, the surface mount components 12 and 13 are fixed to the upper surface of the ceramic multilayer substrate. Then, if necessary, by performing a cleaning process such as removal of solder flux, an assembly board 10 capable of cutting out a plurality of circuit boards 11 made of ceramic multilayer boards on which various surface mount components 12 and 13 are mounted is provided. obtain.
  • low-temperature sintered ceramic material examples include ceramic powders such as alumina, forsterite, and cordierite, glass composite materials obtained by mixing these ceramic powders with glass such as borosilicate, and ZnO—MgO—Al 2 O 3.
  • Crystallized glass-based materials using crystallized glass such as —SiO 2 type, BaO—Al 2 O 3 —SiO 2 type ceramic powder and Al 2 O 3 —CaO—SiO 2 —MgO—B 2 O 3 type ceramic powder
  • Non-glass-based materials such as By using a low-temperature sintered ceramic material, a low-resistance low-melting-point metal such as Ag or Cu can be used as an interlayer connection conductor or in-plane wiring conductor, and as a result, a conductor mainly composed of Ag or Cu.
  • the pattern and the unfired ceramic laminate can be simultaneously fired at a low temperature of, for example, 1050 ° C. or lower.
  • FIG. 2 is a cross-sectional view showing a state in which the conductive posts 16 are formed on the surface mount components 12 and 13 of the electronic component module 1 according to the embodiment of the present invention.
  • a conductive post 16 having a predetermined height is formed on the surface-mounted component 13 mounted on the upper surface of the collective substrate 10. More specifically, the conductive post 16 having a predetermined height is formed by stacking the conductive material 16a having fluidity on the external electrode 13b of the surface mount component 13 and solidifying it.
  • the conductive material 16a having fluidity a conductive solution obtained by dispersing conductive powder in a solvent is used, and a plurality of this conductive solution is discharged from the discharge port of the nozzle 19 based on an inkjet method, a jet dispenser method, or the like.
  • the conductive posts 16 having a predetermined height can be formed by stacking layers of the conductive solution containing the conductive powder by solid discharge and discharging them.
  • the conductive post 16 is applied to a predetermined portion by a plurality of times by applying a fluid conductive material such as a conductive paste in addition to an ink jet method or a jet dispenser method using a conductive solution at a predetermined position. It can also be formed by solidifying it.
  • the conductive post 16 only needs to be formed on at least one surface mount component as in the embodiment of the present invention, and may be formed on a plurality of surface mount components.
  • the conductive post 16 has a plurality of conductive posts 16, 16,...
  • the conductive post 16 that directly connects the circuit board 11 and the shield layer 15 is also included.
  • a plurality of conductive posts 16, 16,... May be formed on one surface-mounted component as necessary, for example, for enhancing shielding properties.
  • FIG. 3 is a cross-sectional view showing a state in which an uncured sealing resin layer 14a is formed on the electronic component module 1 according to the embodiment of the present invention. More specifically, as shown in FIG. 3, first, on a collective substrate 10 on which conductive posts 16 having a predetermined height are formed, a resin sheet laminate in a softened state, a liquid resin transfer mold, An uncured sealing resin layer 14a is formed by coating or the like.
  • the sealing resin layer 14a in a state in which the fluidity is improved by applying heat at a predetermined temperature to reduce the viscosity of the sealing resin layer 14a.
  • the thickness H2 of the sealing resin layer 14a is a height H1 of the conductive post 16 (that is, a height obtained by adding the height of the surface mount component 13 to the height of the conductive post 16 itself). It is preferable to form it thicker than (a).
  • FIG. 4 is a cross-sectional view showing a process in which the sealing resin layer 14b of the electronic component module 1 according to the embodiment of the present invention is polished and a part of the conductive post 16 is exposed.
  • the top surface of the sealing resin layer 14b is flattened by polishing a predetermined thickness of the semi-cured sealing resin layer 14b by moving the polishing roll 20 in the arrow direction in the drawing.
  • a part of the conductive post 16 can be reliably exposed on the top surface of the sealing resin layer 14b.
  • the step of exposing a part of the conductive post 16 to the top surface of the sealing resin layer 14b is performed by polishing the sealing resin layer 14b in a semi-cured state.
  • the sealing resin layer 14b to be performed may be performed after the step of completely curing. Further, by performing rubber pressing in a state where the sealing resin layer 14b is uncured, that is, in a liquid or softened state, the liquid or softened sealing resin layer 14b covering the surface of the conductive post 16 is fluidized and removed. Thus, a part of the conductive post 16 may be exposed on the top surface of the sealing resin layer 14b.
  • the conductive post 16 is preferably a sintered metal obtained by firing a conductive material at a predetermined temperature. If the conductive post 16 is a sintered metal, the strength of the conductive post 16 itself is high, and it is difficult to melt in the step of curing the sealing resin layer 14b, which will be described later. Moreover, it is preferable that the conductive post 16 has a tapered shape such that its cross section decreases from the surface mount component 13 side to the shield layer 15 side. Thus, when the cross section on the shield layer 15 side has a small taper shape, when forming the sealing resin layer 14b, the assembly is performed without damaging the conductive posts 16, especially when the resin sheet is laminated. The sealing resin layer 14 can be stably formed on the substrate 10.
  • the height of the conductive post 16, that is, the distance from the surface mount components 12 and 13 to the shield layer 15, is preferably 30 to 300 ⁇ m in order to ensure strength, reliability, etc.
  • the cross section is circular, it is preferably 20 to 100 ⁇ m in order to cope with the downsizing of the surface mount components 12 and 13.
  • FIG. 5 is a cross-sectional view showing a state in which a part of the conductive post 16 of the electronic component module 1 according to the embodiment of the present invention is exposed from the top surface of the cured sealing resin layer 14. As shown in FIG. 5, a part of the cross section of the conductive post 16 is exposed on the top surface of the cured sealing resin layer 14, and the conductive post 16 is supported and fixed by the sealing resin layer 14. It will be in the state.
  • FIG. 6 is a cross-sectional view showing a state in which the groove-shaped cut portion of the electronic component module 1 according to the embodiment of the present invention is formed.
  • the groove-shaped cut portion 17 may be formed partway through the sealing resin layer 14 or may be formed to a depth that reaches the collective substrate 10.
  • the cut portion 17 is formed to a depth that reaches the collective substrate 10
  • the top surface and the entire side surface of the sealing resin layer 14 can be covered with the shield layer 15 by a manufacturing process of the shield layer 15 to be described later. Can be increased.
  • FIG. 7 is a cross-sectional view showing a state where the conductive paste 18 of the electronic component module 1 according to the embodiment of the present invention is applied. As shown in FIG. 7, the shielding property can be improved by applying the cut portion 17 so that the inside of the cut portion 17 is sufficiently filled with the conductive paste 18.
  • the conductive component (filler) contained in the conductive paste 18 is, for example, Ag, Cu, Ni, and the like, and the synthetic resin (binder) including the conductive component is, for example, an epoxy resin, a phenol resin, a urethane resin, or a silicon resin. Polyester resin, acrylic resin, polyimide resin, and the like.
  • FIG. 8 is a cross-sectional view showing a state in which the shield layer 15 of the electronic component module 1 according to the embodiment of the present invention is formed.
  • the collective substrate 10 and the surface mount components 12 and 13 in a state where the conductive paste 18 is applied before the conductive paste 18 is heat-cured are placed on a spin coater and rotated by centrifugal force.
  • the conductive paste 18 is made into a thin film state.
  • the shield layer 15 is formed by heat-curing when the film is in a thin film state.
  • FIG. 10 is an exemplary diagram showing an outline of a spin coater that spin-coats the collective substrate 10 and the surface mount components 12 and 13 to which the conductive paste 18 is applied.
  • a disk-like rotor 3 is connected to the motor 4 and can rotate at a predetermined rotation direction and rotation speed.
  • the collective substrate 10 in the state of FIG. 7 is placed on the rotor 3.
  • the rotor 3 is rotated by the motor 4 with the collective substrate 10 in the state of FIG. Due to the centrifugal force generated by the rotation of the rotor 3, unnecessary conductive paste 18 filled in the circuit board 11 and the surface mount components 12, 13 is eliminated, and a conductive thin film is formed on the outer surface including the cut portions 17.
  • the state shown in FIG. 8 is obtained.
  • the conductive thin film is dried and thermally cured using an oven or the like to form the shield layer 15 having a thickness of 5 to 15 ⁇ m.
  • the film thickness can be arbitrarily controlled by changing the rotation speed and rotation time of the motor 4 of the spin coater. If it is desired to place importance on the shield characteristics, the film thickness may be set to be thicker. If it is desired to emphasize the reduction in height, the film thickness may be set to be thinner.
  • FIG. 9 is a cross-sectional view showing a state in which the electronic component module 1 according to the embodiment of the present invention is divided into individual electronic component modules 1 from the collective substrate 10.
  • the cut portion 17 is further cut and divided into individual electronic component modules 1.
  • the electronic component module 1 having the conductive thin film formed and functioning as the shield layer 15 or the like can be manufactured with good reproducibility.
  • the conductive post 16 is formed on the surface mount components 12 and 13 mounted on the circuit board 11 and then the sealing resin layer 14 is formed, the conductive post 16 is formed on the sealing resin layer 14. Therefore, the electronic component module 1 can be efficiently manufactured without forming a hole for this purpose in advance.
  • the conductive paste applied to the side and top surfaces of the electronic component module can be thinned by applying the conductive paste to the side surfaces and the top surface, and then using spin coating.
  • the amount of vaporization gas of liquid and the amount of curing reaction gas of conductive paste is small.
  • the film thickness is thin, it is easy to escape to the outside even when gas is generated, and the generation of voids during thermosetting can be suppressed.
  • the time required for spin coating is about 30 s, which is high in productivity, and it is only necessary to use equipment having a simple structure such as a spin coater, so that the production cost can be suppressed.

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Abstract

Provided is a manufacturing method of electronic parts modules which can produce compact electronic parts modules by effectively using the space on the circuit board surface, can produce a thinner conductive film formed on a sealing resin layer surface, and can reliably shield the surface-mounted parts mounted on the circuit board. An assembly board which forms a plurality of electronic parts modules is prepared. At least one conductive post is formed on the surface-mounted parts mounted in the plurality of electronic parts modules. The assembly board is sealed as a whole by resin so that parts of the conductive posts are exposed from the top surface of the sealing resin layer. Notches having the specified depth from the top surface of the sealing resin layer are formed on the boundaries of the electronic parts modules. After a conductive paste is coated on the top surface of the sealing resin layer and in the notches, spin coating is used to form a conductive thin film connected to the conductive posts. Then the electronic parts modules are cut off along the notches.

Description

電子部品モジュールの製造方法Manufacturing method of electronic component module
 本発明は、表面実装部品が搭載された回路基板と、該表面実装部品を覆う封止樹脂層と、該封止樹脂層表面に形成され、シールド層等として機能する導電性薄膜とを有した電子部品モジュールの製造方法に関する。 The present invention has a circuit board on which surface-mounted components are mounted, a sealing resin layer that covers the surface-mounted components, and a conductive thin film that is formed on the surface of the sealing resin layer and functions as a shield layer or the like. The present invention relates to a method for manufacturing an electronic component module.
 移動体通信機等の電子機器に用いられる電子部品は、小型化、多機能化の要求が強く、セラミックや樹脂からなる回路基板上に各種の表面実装部品が搭載された電子部品モジュールの形態で使用されることが多い。 Electronic components used in electronic devices such as mobile communication devices are strongly demanded to be miniaturized and multifunctional, and are in the form of electronic component modules in which various surface mount components are mounted on a circuit board made of ceramic or resin. Often used.
 このような電子部品モジュールにおいては、該電子部品モジュールが配置される筐体やマザーボードにおいて、その周辺に配置される各種の電気素子から電磁気的な影響を受けるのを避けるため、又は各種の電気素子に対して電磁気的な影響を与えることを防ぐため、回路基板上に搭載されている表面実装部品をグランド電位にあるシールド層でカバーする構成を採用することがある。 In such an electronic component module, in a casing or a motherboard on which the electronic component module is arranged, in order to avoid electromagnetic influence from various electric elements arranged in the periphery thereof, or various electric elements In order to prevent electromagnetic influence on the surface mount component, a configuration in which the surface mount component mounted on the circuit board is covered with a shield layer at the ground potential may be employed.
 たとえば、特許文献1には、表面実装部品の埋設された樹脂層の表面にシールド効果を有する導電膜を設け、さらに、回路基板上に設置されたピン状のグランド端子を介して、回路基板と導電膜とを直接的に接続した構造が開示されている。また、特許文献2には、同じく、表面実装部品の埋設された樹脂層の表面にシールド効果を有する導電膜を設け、回路基板上に設置された導電性を有するブロック状の仕切り部材を介して、回路基板と導電膜とを直接的に接続した構造が開示されている。 For example, in Patent Document 1, a conductive film having a shielding effect is provided on the surface of a resin layer in which surface-mounted components are embedded, and further, via a pin-shaped ground terminal installed on the circuit board, A structure in which a conductive film is directly connected is disclosed. Similarly, in Patent Document 2, a conductive film having a shielding effect is provided on the surface of a resin layer embedded in a surface-mounted component, and a conductive block-shaped partition member installed on a circuit board is provided. A structure in which a circuit board and a conductive film are directly connected is disclosed.
 また、従来の導電膜の形成方法として、特許文献3には、各種の表面実装部品を配置した集合基板を樹脂にて一括封止し、電子部品モジュールとして切り出す境界部分にて、封止された樹脂の天面から接地用電極に到達する位置までの溝(切り込み)部を形成し、溝部に導電性ペーストを充填した後、境界部分にて個々の電子部品モジュール単位に切り出すことで、電子部品モジュールを製造することが開示されている。 In addition, as a conventional method for forming a conductive film, Patent Document 3 discloses that a collective substrate on which various surface mount components are arranged is collectively sealed with a resin and sealed at a boundary portion cut out as an electronic component module. By forming a groove (cut) part from the top surface of the resin to the position reaching the ground electrode, filling the groove part with conductive paste, and then cutting out the individual electronic component module units at the boundary part. Manufacturing a module is disclosed.
特開2000-223647号公報JP 2000-223647 A 特開2005-317935号公報JP 2005-317935 A 特開2004-172176号公報JP 2004-172176 A
 しかしながら、特許文献1、特許文献2のいずれの構造においても、回路基板上にピン状のグランド端子やブロック状の仕切り部材を設置する必要がある。したがって、回路基板上にこれらの端子や部材を設置するためのスペースが必要となり、回路基板、ひいては電子部品モジュールの小型化の妨げとなっている。すなわち、表面実装部品が搭載された回路基板と、表面実装部品を覆う樹脂層と、樹脂層の表面に設けられた導電膜とを備えた構造を有した、いわゆる導電膜付き樹脂封止タイプの電子部品モジュールにおいて、回路基板と導電膜とをピンやブロックのような導電性部材で直接的に接続した構造では、回路基板にこれらの導電性部材を配置するためのスペースが必要となるため、その小型化には限界がある。 However, in both the structures of Patent Document 1 and Patent Document 2, it is necessary to install a pin-shaped ground terminal and a block-shaped partition member on the circuit board. Therefore, a space for installing these terminals and members on the circuit board is required, which hinders the miniaturization of the circuit board, and thus the electronic component module. That is, a resin-encapsulated type with a conductive film having a structure including a circuit board on which surface-mounted components are mounted, a resin layer that covers the surface-mounted components, and a conductive film provided on the surface of the resin layer In an electronic component module, in a structure in which a circuit board and a conductive film are directly connected by a conductive member such as a pin or a block, a space for arranging these conductive members on the circuit board is required. There is a limit to its miniaturization.
 また、特許文献3に開示されている製造方法では、溝部に導電性ペーストを充填するために比較的粘度が小さい導電性ペーストを比較的多めに充填しなければ、奥まで充填しきれない場合、又は充填された導電性ペーストに気泡が含まれる場合が生じうる。この場合、導電性ペーストが一般に熱硬化性樹脂であることから、硬化の途上で樹脂層内部にボイドが発生しやすく、電子部品を電界ノイズ及び電磁波ノイズから十分にシールドすることができないおそれがある。 In addition, in the manufacturing method disclosed in Patent Document 3, if the conductive paste having a relatively small viscosity is not sufficiently filled in order to fill the groove with the conductive paste, it cannot be fully filled. Alternatively, the filled conductive paste may contain air bubbles. In this case, since the conductive paste is generally a thermosetting resin, voids are likely to be generated inside the resin layer during curing, and the electronic component may not be sufficiently shielded from electric field noise and electromagnetic wave noise. .
 本発明は、上述した実情に鑑みてなされたものであり、回路基板表面のスペースを有効に活用でき、これによって電子部品モジュールの小型化を可能とするとともに、封止樹脂層表面に形成された導電膜を薄膜化しつつ、一方で確実に回路基板上に搭載された表面実装部品をシールドすることができる電子部品モジュールの製造方法を提供することを目的とする。 The present invention has been made in view of the above-described circumstances, and can effectively utilize the space on the surface of the circuit board, thereby enabling downsizing of the electronic component module and being formed on the surface of the sealing resin layer. An object of the present invention is to provide an electronic component module manufacturing method capable of shielding a surface-mounted component mounted on a circuit board reliably while reducing the thickness of the conductive film.
 すなわち、本発明は、回路基板上に少なくとも1つの表面実装部品が搭載された電子部品モジュールが複数形成された集合基板を準備する工程と、複数の前記電子部品モジュールに搭載された前記表面実装部品の上に、少なくとも1つの導電性ポストを形成する工程と、前記導電性ポストの一部が封止樹脂層の天面から露出するようにして前記集合基板を樹脂にて一括封止する工程と、前記電子部品モジュールの境界部分にて、前記封止樹脂層の天面から、前記集合基板に向かって所定の深さを有する切り込み部を形成する工程と、前記封止樹脂層の天面及び前記切り込み部に導電性ペーストを塗布した後、スピンコートを用いて、前記導電性ポストと接続させた導電性薄膜を形成する工程と、前記導電性薄膜の形成後、前記切り込み部に沿って前記電子部品モジュールを切り出す工程とを含むことを特徴とする電子部品モジュールの製造方法を提供する。 That is, the present invention provides a step of preparing a collective substrate in which a plurality of electronic component modules each having at least one surface-mounted component mounted on a circuit board is formed, and the surface-mounted component mounted on the plurality of electronic component modules. A step of forming at least one conductive post on the substrate, and a step of collectively sealing the collective substrate with a resin such that a part of the conductive post is exposed from the top surface of the sealing resin layer; A step of forming a notch having a predetermined depth from the top surface of the sealing resin layer toward the collective substrate at the boundary portion of the electronic component module; and the top surface of the sealing resin layer; After applying a conductive paste to the cut portion, using a spin coat, forming a conductive thin film connected to the conductive post; and after forming the conductive thin film, Comprise the step of cutting out the electronic component module I to provide a method of manufacturing an electronic component module according to claim.
 また、本発明は、前記導電性ポストを、前記表面実装部品側から前記導電性薄膜側に向かって断面が小さくなるようなテーパ形状を有するように形成することを特徴とする電子部品モジュールの製造方法を提供する。 According to another aspect of the present invention, the conductive post is formed so as to have a tapered shape such that a cross section becomes smaller from the surface-mounted component side toward the conductive thin film side. Provide a method.
 また、本発明は、前記導電性ポストを、流動性を持つ導電材料を所定の厚みに積み重ね、固化させることにより形成することを特徴とする電子部品モジュールの製造方法を提供する。 Further, the present invention provides a method for manufacturing an electronic component module, wherein the conductive post is formed by stacking and solidifying fluid conductive materials in a predetermined thickness.
 また、本発明は、前記流動性を持つ導電材料として導電性溶液を用い、前記導電性溶液を吐出口から複数回にわたって吐出して積み重ね、前記導電性ポストを形成することを特徴とする電子部品モジュールの製造方法を提供する。 Further, the present invention is an electronic component characterized in that a conductive solution is used as the fluid conductive material, and the conductive post is stacked by discharging the conductive solution from a discharge port a plurality of times. A method for manufacturing a module is provided.
 また、本発明においては、前記封止樹脂層を前記導電性ポストの高さよりも厚く形成し、前記封止樹脂層の所定厚みを研磨することによって、前記封止樹脂層の天面に前記導電性ポストの一部を露出させることを特徴とする電子部品モジュールの製造方法を提供する。 In the present invention, the encapsulating resin layer is formed to be thicker than the conductive post, and the predetermined thickness of the encapsulating resin layer is polished so that the conductive surface is formed on the top surface of the encapsulating resin layer. Provided is a method for manufacturing an electronic component module, characterized in that a part of a sex post is exposed.
 本発明の電子部品モジュールの製造方法に係る電子部品モジュールは、封止樹脂層表面の導電性薄膜が、回路基板上に搭載された表面実装部品の上に形成された導電性ポストによって、表面実装部品に接続されているため、回路基板表面のスペースを有効に活用することができ、回路基板、ひいては電子部品モジュールを小型化することができる。 The electronic component module according to the manufacturing method of the electronic component module of the present invention has a surface mounting by a conductive post in which the conductive thin film on the surface of the sealing resin layer is formed on the surface mounting component mounted on the circuit board. Since it is connected to the components, the space on the surface of the circuit board can be used effectively, and the circuit board, and thus the electronic component module can be reduced in size.
 本発明の電子部品モジュールの製造方法によれば、表面実装部品が搭載された回路基板と、この表面実装部品を覆う封止樹脂層と、封止樹脂層の天面に形成され、シールド層等として機能する導電性薄膜とを有した電子部品モジュールを再現性良く製造することができる。特に、回路基板上に搭載された表面実装部品の上に導電性ポストを形成してから封止樹脂層を形成するので、封止樹脂層に導電性ポストを形成するための穴を予め形成しておくことなく、上記の電子部品モジュールを効率良く製造することができる。 According to the method for manufacturing an electronic component module of the present invention, a circuit board on which a surface mounting component is mounted, a sealing resin layer covering the surface mounting component, a top surface of the sealing resin layer, a shield layer, etc. It is possible to manufacture an electronic component module having a conductive thin film functioning as a good reproducibility. In particular, since the sealing resin layer is formed after the conductive post is formed on the surface mount component mounted on the circuit board, a hole for forming the conductive post is formed in the sealing resin layer in advance. Therefore, the electronic component module can be efficiently manufactured.
 また、導電性ポストを形成した後、複数の電子部品モジュールが形成された集合基板を樹脂にて一括封止し、電子部品モジュールの境界部分にて、封止樹脂層の天面から、集合基板に向かって所定の深さを有する切り込み部を形成し、封止樹脂層の天面及び切り込み部に導電性ペーストを塗布した後、スピンコートを用いることにより、電子部品モジュールの側面及び天面に塗布した導電性ペーストを薄膜化(例えば5~15μm)することができ、電子部品モジュールの低背化を実現することができる。また、切り込み部に充填された導電性ペーストも薄膜化することができるので、熱硬化処理時に導電性ペーストの希釈液が気化することによるボイド、あるいは導電性ペースト内に残留する気泡によるボイドが生じることが無い。したがって、シールド層の未形成部分が無くなるので、電子部品を電界ノイズ及び電磁波ノイズから十分にシールドすることが可能となる。 Also, after forming the conductive posts, the collective substrate on which the plurality of electronic component modules are formed is collectively sealed with resin, and the collective substrate is formed from the top surface of the sealing resin layer at the boundary portion of the electronic component module. A cut portion having a predetermined depth is formed, a conductive paste is applied to the top surface and the cut portion of the sealing resin layer, and then spin coating is applied to the side surface and the top surface of the electronic component module. The applied conductive paste can be thinned (for example, 5 to 15 μm), and the height of the electronic component module can be reduced. In addition, since the conductive paste filled in the cut portion can be thinned, voids are generated due to evaporation of the diluted liquid of the conductive paste during the thermosetting process, or voids due to bubbles remaining in the conductive paste. There is nothing. Therefore, since the unformed portion of the shield layer is eliminated, the electronic component can be sufficiently shielded from electric field noise and electromagnetic wave noise.
 また、導電性ポストを、表面実装部品側から導電性薄膜側にむかってその断面が小さくなるようなテーパ形状を有するように形成することが好ましい。シールド層側の断面が小さくなるようなテーパ形状を有していると、封止樹脂層の形成時、特に樹脂シートをラミネートする場合、導電性ポストを破損することなく、回路基板上に安定して封止樹脂層を形成することができる。 Further, it is preferable that the conductive post is formed so as to have a tapered shape such that its cross section becomes smaller from the surface mount component side to the conductive thin film side. A taper shape that reduces the cross section on the shield layer side stabilizes the circuit board without damaging the conductive posts when forming the sealing resin layer, especially when laminating resin sheets. Thus, a sealing resin layer can be formed.
 また、導電性ポストは、流動性を持った導電材料を積み重ね、固化させることにより形成したものであることが好ましく、特に、積み重ねた導電材料を所定温度で焼成することによって得られた焼結金属であることが好ましい。導電性ポストが焼結金属であれば、焼結金属自体は強度が高く、また、封止樹脂層の硬化時の熱に対しても変形しにくいので、封止樹脂層の形成時等における導電性ポストの破損を最小限に抑制することができる。 In addition, the conductive post is preferably formed by stacking and solidifying conductive materials having fluidity, and in particular, a sintered metal obtained by firing the stacked conductive materials at a predetermined temperature. It is preferable that If the conductive post is a sintered metal, the sintered metal itself has a high strength and is not easily deformed by heat when the encapsulating resin layer is cured. The damage of the sex post can be minimized.
 また、流動性を持つ導電材料として導電性溶液を用い、導電性溶液を吐出口から複数回にわたって吐出するようにして導電性ポストを形成することが好ましい。これにより、導電性ポストの高さ及び形状の制御が容易になり、ひいてはシールド層との確実な接続を容易に得ることができる。 In addition, it is preferable to form a conductive post by using a conductive solution as a fluid conductive material and discharging the conductive solution from the discharge port a plurality of times. As a result, the height and shape of the conductive post can be easily controlled, and as a result, reliable connection with the shield layer can be easily obtained.
 また、封止樹脂層を導電性ポストの高さよりも厚く形成し、封止樹脂層の所定厚みを研磨することによって、封止樹脂層の天面に導電性ポストの一部を露出させることが好ましい。これにより、封止樹脂層の天面を平坦化するとともに、封止樹脂層の天面に導電性ポストの一部を確実に露出させることができる。 Further, by forming the sealing resin layer thicker than the height of the conductive post and polishing the predetermined thickness of the sealing resin layer, a part of the conductive post can be exposed on the top surface of the sealing resin layer. preferable. Thereby, the top surface of the sealing resin layer can be flattened, and a part of the conductive post can be reliably exposed on the top surface of the sealing resin layer.
本発明の実施の形態に係る電子部品モジュールの構成を示す断面図である。It is sectional drawing which shows the structure of the electronic component module which concerns on embodiment of this invention. 本発明の実施の形態に係る電子部品モジュールの表面実装部品の上に導電性ポストが形成された状態を示す断面図である。It is sectional drawing which shows the state by which the conductive post was formed on the surface mounting component of the electronic component module which concerns on embodiment of this invention. 本発明の実施の形態に係る電子部品モジュールに未硬化状態の封止樹脂層が形成された状態を示す断面図である。It is sectional drawing which shows the state by which the uncured sealing resin layer was formed in the electronic component module which concerns on embodiment of this invention. 本発明の実施の形態に係る電子部品モジュールの封止樹脂層を研磨し、導電性ポストの一部を露出させる過程を示す断面図である。It is sectional drawing which shows the process in which the sealing resin layer of the electronic component module which concerns on embodiment of this invention is grind | polished, and a part of electroconductive post is exposed. 本発明の実施の形態に係る電子部品モジュールの導電性ポストの一部を硬化した封止樹脂層の天面から露出させた状態を示す断面図である。It is sectional drawing which shows the state exposed from the top | upper surface of the sealing resin layer which hardened | cured a part of electroconductive post | mailbox of the electronic component module which concerns on embodiment of this invention. 本発明の実施の形態に係る電子部品モジュールの溝状の切り込み部が形成された状態を示す断面図である。It is sectional drawing which shows the state in which the groove-shaped notch part of the electronic component module which concerns on embodiment of this invention was formed. 本発明の実施の形態に係る電子部品モジュールの導電性ペーストが塗布された状態を示す断面図である。It is sectional drawing which shows the state by which the electrically conductive paste of the electronic component module which concerns on embodiment of this invention was apply | coated. 本発明の実施の形態に係る電子部品モジュールのシールド層が形成された状態を示す断面図である。It is sectional drawing which shows the state in which the shield layer of the electronic component module which concerns on embodiment of this invention was formed. 本発明の実施の形態に係る電子部品モジュールの集合基板から個々の電子部品モジュールに分断された状態を示す断面図である。It is sectional drawing which shows the state divided | segmented into each electronic component module from the assembly substrate of the electronic component module which concerns on embodiment of this invention. 導電性ペーストが塗布された状態の集合基板及び表面実装部品をスピンコート処理するスピンコーターの概略を示す例示図である。It is an exemplary view showing an outline of a spin coater that spin-coats a collective substrate and a surface-mounted component in a state where a conductive paste is applied.
 以下、本発明の実施の形態について、図面を参照しながら詳細に説明する。図1は、本発明の実施の形態に係る電子部品モジュールの構成を示す断面図である。本発明の実施の形態に係る電子部品モジュール1は、一例として10.0mm×10.0mm×1.2mmの直方体形状をしており、セラミック、ガラス、エポキシ樹脂等からなる回路基板11と、回路基板11の表面に搭載されている半導体素子、コンデンサ、抵抗、SAWフィルタ等の表面実装部品12、13とを備えている。回路基板11の表面には、表面実装部品12、13との接合パッドを兼ねた信号パターン(図示せず)が形成されており、回路基板11の信号パターンと各半導体素子、コンデンサ、抵抗等の表面実装部品12、13の端子とは、ボンディングワイヤ、ハンダ等により接続されている。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a cross-sectional view showing a configuration of an electronic component module according to an embodiment of the present invention. An electronic component module 1 according to an embodiment of the present invention has a rectangular parallelepiped shape of 10.0 mm × 10.0 mm × 1.2 mm as an example, a circuit board 11 made of ceramic, glass, epoxy resin, and the like, and a circuit Surface mount components 12 and 13 such as semiconductor elements, capacitors, resistors, and SAW filters mounted on the surface of the substrate 11 are provided. On the surface of the circuit board 11, a signal pattern (not shown) that also serves as a bonding pad with the surface mounting components 12 and 13 is formed. The signal pattern of the circuit board 11 and each semiconductor element, capacitor, resistor, etc. The terminals of the surface mount components 12 and 13 are connected by bonding wires, solder, or the like.
 また、回路基板11及び表面実装部品12、13を覆うように回路基板11の上面に合成樹脂による封止樹脂層14が形成されており、封止樹脂層14の天面には導電性薄膜が形成されている。封止樹脂層14によって、表面実装部品12、13の回路基板11への固定、ならびに、表面実装部品12、13が外部環境からシールドされている。 Further, a sealing resin layer 14 made of synthetic resin is formed on the upper surface of the circuit board 11 so as to cover the circuit board 11 and the surface mounting components 12 and 13, and a conductive thin film is formed on the top surface of the sealing resin layer 14. Is formed. The sealing resin layer 14 fixes the surface mount components 12 and 13 to the circuit board 11 and shields the surface mount components 12 and 13 from the external environment.
 表面実装部品12は、半導体ベアチップや半導体パッケージ等のチップ型能動部品である。一方、表面実装部品13は、チップコンデンサ、チップインダクタ、チップ抵抗のようなチップ型受動部品であり、その直方体形状の部品素体13aの端面及び端面に隣接した側面の一部に連続的に形成された外部電極13bを有する。表面実装部品13の外部電極13bは、回路基板11側で回路基板11の電極パッド(図示せず)に接続されるとともに、回路基板11側とは反対側で導電性ポスト16に接続されている。つまり、本発明の実施の形態において、導電性ポスト16は表面実装部品13の外部電極13bの上に形成されており、封止樹脂層14の天面に形成されている導電性薄膜15と表面実装部品13の外部電極13bとは、導電性ポスト16を介して電気的に接続されている。 The surface mount component 12 is a chip-type active component such as a semiconductor bare chip or a semiconductor package. On the other hand, the surface-mounted component 13 is a chip-type passive component such as a chip capacitor, a chip inductor, or a chip resistor, and is continuously formed on the end surface of the rectangular parallelepiped component body 13a and a part of the side surface adjacent to the end surface. The external electrode 13b is provided. The external electrode 13b of the surface mounting component 13 is connected to an electrode pad (not shown) of the circuit board 11 on the circuit board 11 side, and is connected to the conductive post 16 on the opposite side to the circuit board 11 side. . That is, in the embodiment of the present invention, the conductive post 16 is formed on the external electrode 13b of the surface mounting component 13, and the conductive thin film 15 formed on the top surface of the sealing resin layer 14 and the surface thereof. The external electrode 13 b of the mounting component 13 is electrically connected via the conductive post 16.
 特に、本発明の実施の形態では、表面実装部品13の外部電極13bはグランド電位にあって、外部電極13bと導電性薄膜15とが導電性ポスト16を介して電気的に接続されることにより、導電性薄膜15は表面実装部品12、13を電界ノイズ及び電磁波ノイズからシールドするシールド層として機能する(以下、シールド層15と呼称する)。なお、シールド層15は、封止樹脂層14の天面全域に形成されていることが好ましいが、その一部、たとえば他の表面実装部品に電磁気的な影響を与えやすい表面実装部品、あるいは、他の表面実装部品から電磁気的な影響を受けやすい表面実装部品の上側部分のみに形成されていてもよい。また、シールド層15は、封止樹脂層14の天面に加えて、電子部品モジュール1の側面全域に形成されていてもよいし、あるいは、封止樹脂層14の側面に形成されていてもよい。 In particular, in the embodiment of the present invention, the external electrode 13b of the surface mount component 13 is at the ground potential, and the external electrode 13b and the conductive thin film 15 are electrically connected via the conductive post 16. The conductive thin film 15 functions as a shield layer that shields the surface-mounted components 12 and 13 from electric field noise and electromagnetic wave noise (hereinafter referred to as the shield layer 15). The shield layer 15 is preferably formed over the entire top surface of the sealing resin layer 14, but a part thereof, for example, a surface-mounted component that easily affects other surface-mounted components, or It may be formed only on the upper portion of the surface mount component that is susceptible to electromagnetic influence from other surface mount components. Further, the shield layer 15 may be formed on the entire side surface of the electronic component module 1 in addition to the top surface of the sealing resin layer 14, or may be formed on the side surface of the sealing resin layer 14. Good.
 このように、封止樹脂層14の天面のシールド層15は、表面実装部品13の上であって封止樹脂層14の中に形成された導電性ポスト16によって、表面実装部品13に接続されているため、回路基板11表面のスペースを有効に活用することができ、電子部品モジュール1を小型化、高密度化することができる。 As described above, the shield layer 15 on the top surface of the sealing resin layer 14 is connected to the surface mounting component 13 by the conductive posts 16 formed on the surface mounting component 13 and in the sealing resin layer 14. Therefore, the space on the surface of the circuit board 11 can be used effectively, and the electronic component module 1 can be downsized and densified.
 回路基板11としては、主としてセラミック材料からなるセラミック基板、主として樹脂材料からなる樹脂基板等を用いることができ、コンデンサやインダクタ等の機能素子や引き回し配線等、所定の回路パターン(図示省略)をその表面及び/又は内部に有する。封止樹脂層14としては、熱硬化性樹脂を用いることが好適であり、強度、誘電率、温度特性、粘性等をコントロールすることを目的として、その材料中にセラミック等のフィラー成分を含有させたものを用いてもよい。 As the circuit board 11, a ceramic board mainly made of a ceramic material, a resin board mainly made of a resin material, or the like can be used, and a predetermined circuit pattern (not shown) such as a functional element such as a capacitor or an inductor or a routing wiring is used. On the surface and / or inside. As the sealing resin layer 14, it is preferable to use a thermosetting resin, and for the purpose of controlling strength, dielectric constant, temperature characteristics, viscosity, etc., a filler component such as ceramic is included in the material. May be used.
 図2ないし図9は、本発明の実施の形態に係る電子部品モジュール1の製造方法を説明するための断面図である。なお、図2ないし図9では、回路基板11としてセラミック多層基板を用いる場合を例に挙げて説明する。 2 to 9 are cross-sectional views for explaining a method of manufacturing the electronic component module 1 according to the embodiment of the present invention. 2 to 9, the case where a ceramic multilayer substrate is used as the circuit substrate 11 will be described as an example.
 まず、低温焼結セラミック材料に有機バインダや有機溶剤を所定量混合して、セラミックスラリーを調製する。次いで、PET等のキャリアフィルム上にドクターブレード法等によってセラミックスラリーを塗り広げ、これをキャリアフィルムとともに所定の大きさに切断して、セラミックグリーンシートを作製する。 First, a ceramic slurry is prepared by mixing a predetermined amount of an organic binder and an organic solvent with a low-temperature sintered ceramic material. Next, a ceramic slurry is spread on a carrier film such as PET by a doctor blade method or the like, and this is cut into a predetermined size together with the carrier film to produce a ceramic green sheet.
 次いで、セラミックグリーンシートにレーザー等を用いて層間接続導体用孔を形成した後、形成した層間接続導体用孔に低融点金属に有機バインダや溶剤を所定量混合してなる導電性ペーストを充填して、セラミックグリーンシートの所定箇所に層間接続導体を形成する。次いで、同じく低融点金属に有機バインダや溶剤を混合してなる導電性ペーストをスクリーン印刷等によって印刷して、所定の回路パターンとなるように、セラミックグリーンシート上に面内配線導体を形成する。このようにして、所定の回路パターンの層間接続導体や面内配線導体を設けたセラミックグリーンシートを所定の枚数積み重ねて、未焼成セラミック積層体を作製する。 Next, after forming the hole for the interlayer connection conductor using a laser or the like in the ceramic green sheet, the formed hole for the interlayer connection conductor is filled with a conductive paste obtained by mixing a predetermined amount of an organic binder or a solvent with a low melting point metal. Then, an interlayer connection conductor is formed at a predetermined position of the ceramic green sheet. Next, an in-plane wiring conductor is formed on the ceramic green sheet so as to form a predetermined circuit pattern by printing a conductive paste obtained by mixing an organic binder and a solvent with a low melting point metal. In this manner, a predetermined number of ceramic green sheets provided with interlayer connection conductors and in-plane wiring conductors having a predetermined circuit pattern are stacked to produce an unfired ceramic laminate.
 次いで、この未焼成セラミック積層体を所定の温度で焼成して、回路基板11の上側の面及び下側の面に電極パッドを有するセラミック多層基板を得る。その後、必要に応じて、表面のパッド電極等にめっき膜を形成する。次いで、セラミック多層基板の上側の面の電極パッドに、スクリーン印刷等によりはんだを供給し、さらに表面実装部品12、13を搭載した後、これをリフロー炉に投入することによってはんだを溶融、固化させて、表面実装部品12、13をセラミック多層基板の上側の面に固定する。そして、必要に応じて、はんだフラックスの除去等の洗浄処理を行うことによって、各種の表面実装部品12、13を搭載したセラミック多層基板からなる回路基板11を複数切り出すことが可能な集合基板10を得る。 Next, this unfired ceramic laminate is fired at a predetermined temperature to obtain a ceramic multilayer substrate having electrode pads on the upper surface and the lower surface of the circuit board 11. Thereafter, if necessary, a plating film is formed on the surface pad electrode or the like. Next, solder is supplied to the electrode pads on the upper surface of the ceramic multilayer substrate by screen printing or the like, and after mounting the surface mount components 12 and 13, the solder is melted and solidified by putting it in a reflow furnace. Then, the surface mount components 12 and 13 are fixed to the upper surface of the ceramic multilayer substrate. Then, if necessary, by performing a cleaning process such as removal of solder flux, an assembly board 10 capable of cutting out a plurality of circuit boards 11 made of ceramic multilayer boards on which various surface mount components 12 and 13 are mounted is provided. obtain.
 なお、低温焼結セラミック材料としては、例えば、アルミナやフォルステライト、コージェライト等のセラミック粉末やこれらのセラミック粉末にホウ珪酸等のガラスを混合したガラス複合系材料、ZnO-MgO-Al2 O3 -SiO2 系等の結晶化ガラスを用いた結晶化ガラス系材料、BaO-Al2 O3 -SiO2 系セラミック粉末やAl2 O3 -CaO-SiO2 -MgO-B2 O3 系セラミック粉末等の非ガラス系材料を挙げることができる。低温焼結セラミック材料を用いることによって、層間接続導体や面内配線導体としてAg又はCu等のような低抵抗の低融点金属を用いることができ、その結果、AgやCuを主成分とする導体パターンと未焼成セラミック積層体とをたとえば1050℃以下の低温で同時焼成することができる。 Examples of the low-temperature sintered ceramic material include ceramic powders such as alumina, forsterite, and cordierite, glass composite materials obtained by mixing these ceramic powders with glass such as borosilicate, and ZnO—MgO—Al 2 O 3. Crystallized glass-based materials using crystallized glass such as —SiO 2 type, BaO—Al 2 O 3 —SiO 2 type ceramic powder and Al 2 O 3 —CaO—SiO 2 —MgO—B 2 O 3 type ceramic powder Non-glass-based materials such as By using a low-temperature sintered ceramic material, a low-resistance low-melting-point metal such as Ag or Cu can be used as an interlayer connection conductor or in-plane wiring conductor, and as a result, a conductor mainly composed of Ag or Cu. The pattern and the unfired ceramic laminate can be simultaneously fired at a low temperature of, for example, 1050 ° C. or lower.
 図2は、本発明の実施の形態に係る電子部品モジュール1の表面実装部品12、13の上に導電性ポスト16が形成された状態を示す断面図である。図2に示すように、集合基板10の上側の面に搭載された表面実装部品13の上に、所定高さの導電性ポスト16を形成する。より具体的には、表面実装部品13の外部電極13bの上に流動性を持つ導電材料16aを積み重ねていき、これを固化させることにより、所定高さの導電性ポスト16を形成する。たとえば、流動性を持つ導電材料16aとして、導電性粉末を溶剤に分散してなる導電性溶液を用い、この導電性溶液を、インクジェット法やジェットディスペンサー法等に基づき、ノズル19の吐出口から複数回にわたって吐出することによって、導電性粉末を含む導電性溶液の層を積み重ね、これらを固化することによって、所定高さの導電性ポスト16を形成することができる。なお、導電性ポスト16は、導電性溶液を用いたインクジェット法やジェットディスペンサー法の他、導電性ペーストのような流動性を持った導電材料をスクリーン印刷等の手法で所定箇所に複数回塗り重ね、これを固化することによって形成することもできる。 FIG. 2 is a cross-sectional view showing a state in which the conductive posts 16 are formed on the surface mount components 12 and 13 of the electronic component module 1 according to the embodiment of the present invention. As shown in FIG. 2, a conductive post 16 having a predetermined height is formed on the surface-mounted component 13 mounted on the upper surface of the collective substrate 10. More specifically, the conductive post 16 having a predetermined height is formed by stacking the conductive material 16a having fluidity on the external electrode 13b of the surface mount component 13 and solidifying it. For example, as the conductive material 16a having fluidity, a conductive solution obtained by dispersing conductive powder in a solvent is used, and a plurality of this conductive solution is discharged from the discharge port of the nozzle 19 based on an inkjet method, a jet dispenser method, or the like. The conductive posts 16 having a predetermined height can be formed by stacking layers of the conductive solution containing the conductive powder by solid discharge and discharging them. In addition, the conductive post 16 is applied to a predetermined portion by a plurality of times by applying a fluid conductive material such as a conductive paste in addition to an ink jet method or a jet dispenser method using a conductive solution at a predetermined position. It can also be formed by solidifying it.
 なお、導電性ポスト16は、本発明の実施の形態のように、少なくとも1つの表面実装部品の上に形成されていればよく、複数の表面実装部品の上に形成されてもよい。導電性ポスト16は、1つの電子部品モジュール1に複数の導電性ポスト16、16、・・・を有する場合、表面実装部品12、13とシールド層15とを接続する導電性ポスト16に加えて、回路基板11とシールド層15とを直接的に接続する導電性ポスト16も含む。また、シールド性の強化等、必要に応じて、1つの表面実装部品の上に複数の導電性ポスト16、16、・・・を形成してもよい。 Note that the conductive post 16 only needs to be formed on at least one surface mount component as in the embodiment of the present invention, and may be formed on a plurality of surface mount components. When the conductive post 16 has a plurality of conductive posts 16, 16,... In one electronic component module 1, in addition to the conductive posts 16 that connect the surface mount components 12, 13 and the shield layer 15. The conductive post 16 that directly connects the circuit board 11 and the shield layer 15 is also included. In addition, a plurality of conductive posts 16, 16,... May be formed on one surface-mounted component as necessary, for example, for enhancing shielding properties.
 次いで、複数の表面実装部品12、13が搭載されている回路基板11を複数切り出すことが可能な集合基板10の上部を覆うように、合成樹脂による未硬化状態の封止樹脂層14aを形成する。図3は、本発明の実施の形態に係る電子部品モジュール1に未硬化状態の封止樹脂層14aが形成された状態を示す断面図である。より詳細には、図3に示すように、まず、所定高さの導電性ポスト16を形成した集合基板10上に、軟化状態にある樹脂シートのラミネート、液状樹脂のトランスファモールド、同じく液状樹脂のコーティング等によって、未硬化状態の封止樹脂層14aを形成する。ここでは、所定温度の熱を加え、封止樹脂層14aの粘度を低下させることにより流動性を高めた状態で、封止樹脂層14aを形成することが好ましい。なお、図3に示すように、封止樹脂層14aの厚みH2は、導電性ポスト16の高さH1(つまり、導電性ポスト16そのものの高さに表面実装部品13の高さを加えた高さ)よりも厚く形成しておくことが好ましい。 Next, an uncured sealing resin layer 14a made of synthetic resin is formed so as to cover an upper portion of the collective substrate 10 from which a plurality of circuit boards 11 on which a plurality of surface mount components 12 and 13 are mounted can be cut out. . FIG. 3 is a cross-sectional view showing a state in which an uncured sealing resin layer 14a is formed on the electronic component module 1 according to the embodiment of the present invention. More specifically, as shown in FIG. 3, first, on a collective substrate 10 on which conductive posts 16 having a predetermined height are formed, a resin sheet laminate in a softened state, a liquid resin transfer mold, An uncured sealing resin layer 14a is formed by coating or the like. Here, it is preferable to form the sealing resin layer 14a in a state in which the fluidity is improved by applying heat at a predetermined temperature to reduce the viscosity of the sealing resin layer 14a. As shown in FIG. 3, the thickness H2 of the sealing resin layer 14a is a height H1 of the conductive post 16 (that is, a height obtained by adding the height of the surface mount component 13 to the height of the conductive post 16 itself). It is preferable to form it thicker than (a).
 その後、未硬化状態の封止樹脂層14aを樹脂の硬化温度未満の所定の温度に加熱して半硬化状態の封止樹脂層14bとする。図4は、本発明の実施の形態に係る電子部品モジュール1の封止樹脂層14bを研磨し、導電性ポスト16の一部を露出させる過程を示す断面図である。図4に示すように、半硬化状態の封止樹脂層14bの所定厚み分を研磨ロール20を図中矢印方向に動かす等によって研磨することにより、封止樹脂層14bの天面を平坦化するとともに、封止樹脂層14bの天面に導電性ポスト16の一部を確実に露出させることができる。なお、本実施の形態においては、導電性ポスト16の一部を封止樹脂層14bの天面に露出させる工程を、封止樹脂層14bが半硬化状態で研磨することにより行なったが、後述する封止樹脂層14bを完全に硬化させる工程の後に行なってもよい。また、封止樹脂層14bが未硬化状態、すなわち液状もしくは軟化状態でラバープレスを行なうことにより、導電性ポスト16の表面を覆っている液状もしくは軟化状態の封止樹脂層14bを流動させて排除することにより、導電性ポスト16の一部を封止樹脂層14bの天面に露出させるようにしてもよい。 Thereafter, the uncured sealing resin layer 14a is heated to a predetermined temperature lower than the curing temperature of the resin to form a semi-cured sealing resin layer 14b. FIG. 4 is a cross-sectional view showing a process in which the sealing resin layer 14b of the electronic component module 1 according to the embodiment of the present invention is polished and a part of the conductive post 16 is exposed. As shown in FIG. 4, the top surface of the sealing resin layer 14b is flattened by polishing a predetermined thickness of the semi-cured sealing resin layer 14b by moving the polishing roll 20 in the arrow direction in the drawing. At the same time, a part of the conductive post 16 can be reliably exposed on the top surface of the sealing resin layer 14b. In the present embodiment, the step of exposing a part of the conductive post 16 to the top surface of the sealing resin layer 14b is performed by polishing the sealing resin layer 14b in a semi-cured state. The sealing resin layer 14b to be performed may be performed after the step of completely curing. Further, by performing rubber pressing in a state where the sealing resin layer 14b is uncured, that is, in a liquid or softened state, the liquid or softened sealing resin layer 14b covering the surface of the conductive post 16 is fluidized and removed. Thus, a part of the conductive post 16 may be exposed on the top surface of the sealing resin layer 14b.
 導電性ポスト16は、特に導電材料を所定温度で焼成することによって得られた焼結金属であることが好ましい。導電性ポスト16が焼結金属であれば、それ自体の強度が高く、また、後述する封止樹脂層14bを硬化する工程において溶融しにくいので、その破損を最小限に抑制することができる。また、導電性ポスト16は、表面実装部品13側からシールド層15側にむかってその断面が小さくなるようなテーパ形状を有していることが好ましい。このように、シールド層15側の断面が小さいテーパ形状を有していると、封止樹脂層14bを形成する際、特に樹脂シートをラミネートする場合、導電性ポスト16を破損することなく、集合基板10上に安定して封止樹脂層14を形成することができる。 The conductive post 16 is preferably a sintered metal obtained by firing a conductive material at a predetermined temperature. If the conductive post 16 is a sintered metal, the strength of the conductive post 16 itself is high, and it is difficult to melt in the step of curing the sealing resin layer 14b, which will be described later. Moreover, it is preferable that the conductive post 16 has a tapered shape such that its cross section decreases from the surface mount component 13 side to the shield layer 15 side. Thus, when the cross section on the shield layer 15 side has a small taper shape, when forming the sealing resin layer 14b, the assembly is performed without damaging the conductive posts 16, especially when the resin sheet is laminated. The sealing resin layer 14 can be stably formed on the substrate 10.
 なお、導電性ポスト16の高さ、すなわち表面実装部品12、13からシールド層15までの距離は、強度や信頼性等を確保するために、30~300μmであることが好ましく、また、その径は、断面が円形状である場合、表面実装部品12、13の小型化に対応するため、20~100μmであることが好ましい。 The height of the conductive post 16, that is, the distance from the surface mount components 12 and 13 to the shield layer 15, is preferably 30 to 300 μm in order to ensure strength, reliability, etc. When the cross section is circular, it is preferably 20 to 100 μm in order to cope with the downsizing of the surface mount components 12 and 13.
 次いで、半硬化状態の封止樹脂層14bを完全に硬化させる。図5は、本発明の実施の形態に係る電子部品モジュール1の導電性ポスト16の一部を硬化した封止樹脂層14の天面から露出させた状態を示す断面図である。図5に示すように、導電性ポスト16の一部断面が硬化した封止樹脂層14の天面に露出した状態であって、かつ、導電性ポスト16が封止樹脂層14によって支持、固定された状態となる。 Next, the semi-cured sealing resin layer 14b is completely cured. FIG. 5 is a cross-sectional view showing a state in which a part of the conductive post 16 of the electronic component module 1 according to the embodiment of the present invention is exposed from the top surface of the cured sealing resin layer 14. As shown in FIG. 5, a part of the cross section of the conductive post 16 is exposed on the top surface of the cured sealing resin layer 14, and the conductive post 16 is supported and fixed by the sealing resin layer 14. It will be in the state.
 次に、封止樹脂層14が形成された状態で、電子部品モジュール1として切り出す境界部分において、所定の深さまで溝状の切り込み部をブレード等を用いて形成する。図6は、本発明の実施の形態に係る電子部品モジュール1の溝状の切り込み部が形成された状態を示す断面図である。なお、溝状の切り込み部17は封止樹脂層14の途中まで形成するようにしてもよく、また集合基板10に到達する深さまで形成してもよい。集合基板10に到達する深さまで切り込み部17を形成した場合、後述するシールド層15の作製工程により、封止樹脂層14の天面及び側面全体をシールド層15で被覆することができ、シールド効率を高めることができる。 Next, in a state where the sealing resin layer 14 is formed, a groove-like cut portion is formed using a blade or the like to a predetermined depth at a boundary portion cut out as the electronic component module 1. FIG. 6 is a cross-sectional view showing a state in which the groove-shaped cut portion of the electronic component module 1 according to the embodiment of the present invention is formed. Note that the groove-shaped cut portion 17 may be formed partway through the sealing resin layer 14 or may be formed to a depth that reaches the collective substrate 10. When the cut portion 17 is formed to a depth that reaches the collective substrate 10, the top surface and the entire side surface of the sealing resin layer 14 can be covered with the shield layer 15 by a manufacturing process of the shield layer 15 to be described later. Can be increased.
 次に、切り込み部17も含めて、ディスペンサー、ジェットディスペンサー、真空印刷装置等を用いて導電性ペースト18を外面に塗布する。図7は、本発明の実施の形態に係る電子部品モジュール1の導電性ペースト18が塗布された状態を示す断面図である。図7に示すように、切り込み部17の内部が導電性ペースト18で十分に充填されるよう塗布することにより、シールド性を高めることができる。 Next, the conductive paste 18 is applied to the outer surface using a dispenser, a jet dispenser, a vacuum printing device, etc., including the cut portion 17. FIG. 7 is a cross-sectional view showing a state where the conductive paste 18 of the electronic component module 1 according to the embodiment of the present invention is applied. As shown in FIG. 7, the shielding property can be improved by applying the cut portion 17 so that the inside of the cut portion 17 is sufficiently filled with the conductive paste 18.
 導電性ペースト18に含まれる導電性成分(フィラー)は、例えばAg、Cu、Ni等であり、導電性成分を包含する合成樹脂(バインダー)は、例えばエポキシ樹脂、フェノール樹脂、ウレタン樹脂、シリコン樹脂、ポリエステル樹脂、アクリル樹脂、ポリイミド樹脂等である。 The conductive component (filler) contained in the conductive paste 18 is, for example, Ag, Cu, Ni, and the like, and the synthetic resin (binder) including the conductive component is, for example, an epoxy resin, a phenol resin, a urethane resin, or a silicon resin. Polyester resin, acrylic resin, polyimide resin, and the like.
 次に、導電性ペースト18をスピンコーターによりスピンコートすることで薄膜化されたシールド層15を形成する。図8は、本発明の実施の形態に係る電子部品モジュール1のシールド層15が形成された状態を示す断面図である。図8では、導電性ペースト18を熱硬化処理する前に導電性ペースト18が塗布された状態の集合基板10及び表面実装部品12、13をスピンコーターに載置し、回転させることによる遠心力で、導電性ペースト18を薄膜状態とする。薄膜状態となった時点で熱硬化処理することにより、シールド層15が形成される。 Next, the thinned shield layer 15 is formed by spin-coating the conductive paste 18 with a spin coater. FIG. 8 is a cross-sectional view showing a state in which the shield layer 15 of the electronic component module 1 according to the embodiment of the present invention is formed. In FIG. 8, the collective substrate 10 and the surface mount components 12 and 13 in a state where the conductive paste 18 is applied before the conductive paste 18 is heat-cured are placed on a spin coater and rotated by centrifugal force. The conductive paste 18 is made into a thin film state. The shield layer 15 is formed by heat-curing when the film is in a thin film state.
 図10は、導電性ペースト18が塗布された状態の集合基板10及び表面実装部品12、13をスピンコート処理するスピンコーターの概略を示す例示図である。円盤状のローター3がモーター4と接続してあり、所定の回転方向及び回転速度で回転することが可能となっている。図7の状態の集合基板10は、ローター3の上に載置される。 FIG. 10 is an exemplary diagram showing an outline of a spin coater that spin-coats the collective substrate 10 and the surface mount components 12 and 13 to which the conductive paste 18 is applied. A disk-like rotor 3 is connected to the motor 4 and can rotate at a predetermined rotation direction and rotation speed. The collective substrate 10 in the state of FIG. 7 is placed on the rotor 3.
 図7の状態の集合基板10を載置した状態で、モーター4によりローター3を回転させる。ローター3の回転により生じる遠心力により、回路基板11及び表面実装部品12、13に充填されている不要な導電性ペースト18が排除され、切り込み部17を含めて外面に導電性薄膜が形成され、図8の状態となる。そして、オーブン等を用いて導電性薄膜を乾燥、熱硬化させることにより、膜厚5~15μmのシールド層15が形成される。スピンコーターのモーター4の回転数、回転時間を変更することで、膜厚を任意に制御することができる。シールド特性を重視したい場合には膜厚を厚めに設定すればよいし、低背化を重視したい場合には膜厚を薄めに設定すればよい。 7, the rotor 3 is rotated by the motor 4 with the collective substrate 10 in the state of FIG. Due to the centrifugal force generated by the rotation of the rotor 3, unnecessary conductive paste 18 filled in the circuit board 11 and the surface mount components 12, 13 is eliminated, and a conductive thin film is formed on the outer surface including the cut portions 17. The state shown in FIG. 8 is obtained. Then, the conductive thin film is dried and thermally cured using an oven or the like to form the shield layer 15 having a thickness of 5 to 15 μm. The film thickness can be arbitrarily controlled by changing the rotation speed and rotation time of the motor 4 of the spin coater. If it is desired to place importance on the shield characteristics, the film thickness may be set to be thicker. If it is desired to emphasize the reduction in height, the film thickness may be set to be thinner.
 そして、最後に切り込み部17にて集合基板10を分断することにより、電子部品モジュール1に個片化される。図9は、本発明の実施の形態に係る電子部品モジュール1の集合基板10から個々の電子部品モジュール1に分断された状態を示す断面図である。図9では、切り込み部17をさらに切り進め、個々の電子部品モジュール1に分断されている。 Finally, the collective substrate 10 is divided at the cut portion 17 to be separated into electronic component modules 1. FIG. 9 is a cross-sectional view showing a state in which the electronic component module 1 according to the embodiment of the present invention is divided into individual electronic component modules 1 from the collective substrate 10. In FIG. 9, the cut portion 17 is further cut and divided into individual electronic component modules 1.
 以上のように本実施の形態によれば、表面実装部品12、13が搭載された回路基板11と、表面実装部品12、13を覆う封止樹脂層14と、封止樹脂層14の表面に形成され、シールド層15等として機能する導電性薄膜とを有した電子部品モジュール1を再現性良く製造することができる。特に、回路基板11上に搭載された表面実装部品12、13の上に導電性ポスト16を形成してから封止樹脂層14を形成するので、封止樹脂層14に導電性ポスト16を形成するための穴をあらかじめ形成しておくことなく、上記の電子部品モジュール1を効率良く製造することができる。 As described above, according to the present embodiment, the circuit board 11 on which the surface-mounted components 12 and 13 are mounted, the sealing resin layer 14 that covers the surface-mounted components 12 and 13, and the surface of the sealing resin layer 14 The electronic component module 1 having the conductive thin film formed and functioning as the shield layer 15 or the like can be manufactured with good reproducibility. In particular, since the conductive post 16 is formed on the surface mount components 12 and 13 mounted on the circuit board 11 and then the sealing resin layer 14 is formed, the conductive post 16 is formed on the sealing resin layer 14. Therefore, the electronic component module 1 can be efficiently manufactured without forming a hole for this purpose in advance.
 また、側面及び天面に導電性ペーストを塗布した後、スピンコートを用いることにより、電子部品モジュールの側面及び天面に塗布した導電性ペーストを薄膜化することができ、熱硬化時に発生する希釈液の気化ガス、導電性ペーストの硬化反応ガスの発生量が少ない。加えて膜厚が薄いため、ガスが発生した場合であっても外部へ抜けやすく、熱硬化時におけるボイドの発生を抑制することができる。また、スピンコートに要する時間は略30s程度であり、生産性が高く、しかもスピンコーターのような簡易な構造の設備を使用するのみで足りることから、生産コストも抑制することが可能となる。 In addition, the conductive paste applied to the side and top surfaces of the electronic component module can be thinned by applying the conductive paste to the side surfaces and the top surface, and then using spin coating. The amount of vaporization gas of liquid and the amount of curing reaction gas of conductive paste is small. In addition, since the film thickness is thin, it is easy to escape to the outside even when gas is generated, and the generation of voids during thermosetting can be suppressed. Further, the time required for spin coating is about 30 s, which is high in productivity, and it is only necessary to use equipment having a simple structure such as a spin coater, so that the production cost can be suppressed.
 なお、本発明は上記実施例に限定されるものではなく、本発明の趣旨の範囲内であれば多種の変形、置換等が可能であることは言うまでもない。 It should be noted that the present invention is not limited to the above-described embodiments, and it goes without saying that various modifications and substitutions are possible within the scope of the present invention.
 1 電子部品モジュール
 10 集合基板
 11 回路基板
 12、13 表面実装部品
 14 封止樹脂層
 15 シールド層
 16 導電性ポスト
 17 切り込み部
 18 導電性ペースト
DESCRIPTION OF SYMBOLS 1 Electronic component module 10 Collective board 11 Circuit board 12, 13 Surface mount component 14 Sealing resin layer 15 Shield layer 16 Conductive post 17 Notch part 18 Conductive paste

Claims (5)

  1.  回路基板上に少なくとも1つの表面実装部品が搭載された電子部品モジュールが複数形成された集合基板を準備する工程と、
     複数の前記電子部品モジュールに搭載された前記表面実装部品の上に、少なくとも1つの導電性ポストを形成する工程と、
     前記導電性ポストの一部が封止樹脂層の天面から露出するようにして前記集合基板を樹脂にて一括封止する工程と、
     前記電子部品モジュールの境界部分にて、前記封止樹脂層の天面から、前記集合基板に向かって所定の深さを有する切り込み部を形成する工程と、
     前記封止樹脂層の天面及び前記切り込み部に導電性ペーストを塗布した後、スピンコートを用いて、前記導電性ポストと接続させた導電性薄膜を形成する工程と、
     前記導電性薄膜の形成後、前記切り込み部に沿って前記電子部品モジュールを切り出す工程と
     を含むことを特徴とする電子部品モジュールの製造方法。
    Preparing a collective substrate in which a plurality of electronic component modules each having at least one surface-mounted component mounted on a circuit board;
    Forming at least one conductive post on the surface-mounted component mounted on the plurality of electronic component modules;
    A step of collectively sealing the collective substrate with a resin so that a part of the conductive post is exposed from the top surface of the sealing resin layer;
    Forming a cut portion having a predetermined depth from the top surface of the sealing resin layer toward the collective substrate at a boundary portion of the electronic component module;
    Forming a conductive thin film connected to the conductive post using spin coating after applying a conductive paste to the top surface of the sealing resin layer and the cut portion; and
    And a step of cutting out the electronic component module along the cut portion after forming the conductive thin film.
  2.  前記導電性ポストを、前記表面実装部品側から前記導電性薄膜側に向かって断面が小さくなるようなテーパ形状を有するように形成することを特徴とする請求項1に記載の電子部品モジュールの製造方法。 2. The electronic component module according to claim 1, wherein the conductive post is formed to have a tapered shape such that a cross-section is reduced from the surface-mounted component side toward the conductive thin film side. Method.
  3.  前記導電性ポストを、流動性を持つ導電材料を所定の厚みに積み重ね、固化させることにより形成することを特徴とする請求項1又は2に記載の電子部品モジュールの製造方法。 3. The method of manufacturing an electronic component module according to claim 1, wherein the conductive posts are formed by stacking and solidifying fluid conductive materials in a predetermined thickness.
  4.  前記流動性を持つ導電材料として導電性溶液を用い、前記導電性溶液を吐出口から複数回にわたって吐出して積み重ねることを特徴とする請求項3に記載の電子部品モジュールの製造方法。 4. The method of manufacturing an electronic component module according to claim 3, wherein a conductive solution is used as the fluid conductive material, and the conductive solution is discharged and stacked a plurality of times from a discharge port.
  5.  前記封止樹脂層を前記導電性ポストの高さよりも厚く形成し、前記封止樹脂層の所定厚みを研磨することによって、前記封止樹脂層の天面に前記導電性ポストの一部を露出させることを特徴とする請求項1乃至4のいずれか一項に記載の電子部品モジュールの製造方法。 By forming the sealing resin layer thicker than the height of the conductive post and polishing a predetermined thickness of the sealing resin layer, a part of the conductive post is exposed on the top surface of the sealing resin layer. The method for manufacturing an electronic component module according to claim 1, wherein the electronic component module is manufactured.
PCT/JP2009/002415 2008-10-07 2009-06-01 Manufacturing method of electronic parts modules WO2010041356A1 (en)

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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012129363A (en) * 2010-12-15 2012-07-05 Fujitsu Ltd Substrate with built-in electronic component and method of manufacturing the same
JP2013008849A (en) * 2011-06-24 2013-01-10 Denso Corp Electronic apparatus
JP5890073B1 (en) * 2014-12-12 2016-03-22 株式会社メイコー Molded circuit module and manufacturing method thereof
WO2016093040A1 (en) * 2014-12-12 2016-06-16 株式会社メイコー Moulded circuit module, and production method therefor
WO2016117196A1 (en) * 2015-01-21 2016-07-28 株式会社村田製作所 Power amplifier module
JP2016535463A (en) * 2014-10-03 2016-11-10 インテル コーポレイション Overlapping stacked die package with vertical columns
US10934157B2 (en) 2016-03-21 2021-03-02 Murata Manufacturing Co., Ltd. Packaged circuit system structure
WO2021090694A1 (en) * 2019-11-07 2021-05-14 株式会社村田製作所 Module
WO2022044504A1 (en) * 2020-08-31 2022-03-03 株式会社村田製作所 Circuit module and submodule manufacturing method

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105140138B (en) * 2015-09-16 2017-10-27 江苏长电科技股份有限公司 One kind electromagnetic shielding method for packing and its encapsulating structure

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62147735A (en) * 1985-12-23 1987-07-01 Matsushita Electric Works Ltd Manufacture of flip chip
JP2002280468A (en) * 2001-03-16 2002-09-27 Matsushita Electric Ind Co Ltd High frequency module and its manufacturing method
JP2004172176A (en) * 2002-11-18 2004-06-17 Taiyo Yuden Co Ltd Circuit module
JP2005109135A (en) * 2003-09-30 2005-04-21 Matsushita Electric Ind Co Ltd Method for manufacturing module with built-in electronic component
JP2007294828A (en) * 2006-03-29 2007-11-08 Kyocera Corp Circuit module

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62147735A (en) * 1985-12-23 1987-07-01 Matsushita Electric Works Ltd Manufacture of flip chip
JP2002280468A (en) * 2001-03-16 2002-09-27 Matsushita Electric Ind Co Ltd High frequency module and its manufacturing method
JP2004172176A (en) * 2002-11-18 2004-06-17 Taiyo Yuden Co Ltd Circuit module
JP2005109135A (en) * 2003-09-30 2005-04-21 Matsushita Electric Ind Co Ltd Method for manufacturing module with built-in electronic component
JP2007294828A (en) * 2006-03-29 2007-11-08 Kyocera Corp Circuit module

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012129363A (en) * 2010-12-15 2012-07-05 Fujitsu Ltd Substrate with built-in electronic component and method of manufacturing the same
JP2013008849A (en) * 2011-06-24 2013-01-10 Denso Corp Electronic apparatus
JP2016535463A (en) * 2014-10-03 2016-11-10 インテル コーポレイション Overlapping stacked die package with vertical columns
US10629561B2 (en) 2014-10-03 2020-04-21 Intel Corporation Overlapping stacked die package with vertical columns
US10256208B2 (en) 2014-10-03 2019-04-09 Intel Corporation Overlapping stacked die package with vertical columns
US10665568B2 (en) 2014-12-12 2020-05-26 Meiko Electronics Co., Ltd. Encapsulated circuit module, and production method therefor
JPWO2016093040A1 (en) * 2014-12-12 2017-04-27 株式会社メイコー Molded circuit module and manufacturing method thereof
TWI691260B (en) * 2014-12-12 2020-04-11 日商名幸電子股份有限公司 Molded circuit module and manufacturing method thereof
WO2016093040A1 (en) * 2014-12-12 2016-06-16 株式会社メイコー Moulded circuit module, and production method therefor
JP5890073B1 (en) * 2014-12-12 2016-03-22 株式会社メイコー Molded circuit module and manufacturing method thereof
CN107078125A (en) * 2015-01-21 2017-08-18 株式会社村田制作所 Power amplifier module
WO2016117196A1 (en) * 2015-01-21 2016-07-28 株式会社村田製作所 Power amplifier module
US10404226B2 (en) 2015-01-21 2019-09-03 Murata Manufacturing Co., Ltd. Power amplifier module
US10934157B2 (en) 2016-03-21 2021-03-02 Murata Manufacturing Co., Ltd. Packaged circuit system structure
WO2021090694A1 (en) * 2019-11-07 2021-05-14 株式会社村田製作所 Module
WO2022044504A1 (en) * 2020-08-31 2022-03-03 株式会社村田製作所 Circuit module and submodule manufacturing method

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