Classifications

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  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
  • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
  • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
  • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
  • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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  • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
  • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
  • H01J37/32—Gas-filled discharge tubes
  • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
  • H01J37/32192—Microwave generated discharge
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  • H01J37/32—Gas-filled discharge tubes
  • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
  • H01J37/32192—Microwave generated discharge
  • H01J37/32211—Means for coupling power to the plasma
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  • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
  • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
  • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
  • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
  • H01L21/28008—Making conductor-insulator-semiconductor electrodes
  • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
  • H01L21/28158—Making the insulator
  • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
  • H01L21/28211—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer
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  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
  • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
  • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
  • H01L21/321—After treatment
  • H01L21/32105—Oxidation of silicon-containing layers
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  • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
  • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
  • H01L21/76—Making of isolation regions between components
  • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
  • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
  • H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
  • H01L21/76235—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls trench shape altered by a local oxidation of silicon process step, e.g. trench corner rounding by LOCOS
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10B—ELECTRONIC MEMORY DEVICES
  • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
  • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
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  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D30/00—Field-effect transistors [FET]
  • H10D30/60—Insulated-gate field-effect transistors [IGFET]
  • H10D30/68—Floating-gate IGFETs
  • H10D30/681—Floating-gate IGFETs having only two programming levels
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  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D64/00—Electrodes of devices having potential barriers
  • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
  • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
  • H10D64/311—Gate electrodes for field-effect devices
  • H10D64/411—Gate electrodes for field-effect devices for FETs
  • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
  • H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
  • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
  • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
  • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
  • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
  • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
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  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
  • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
  • H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
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  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
  • H10D84/01—Manufacture or treatment
  • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
  • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
  • H10D84/0147—Manufacturing their gate sidewall spacers
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  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
  • H10D84/01—Manufacture or treatment
  • H10D84/02—Manufacture or treatment characterised by using material-based technologies
  • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
  • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Definitions

• the present invention relates to a method for forming a silicon oxide film, and more specifically, for example, after oxidizing a trench formed in silicon in a manufacturing process of a semiconductor device or forming a gate electrode of a transistor by etching, line & space
• the present invention relates to a method for forming a silicon oxide film that can be applied when an oxidization process is performed on the uneven pattern.
• the shallow mouth trench isolation is known.
• STI shallow mouth trench isolation
• CM P chemical mechanical polishing
• the process of planarizing the mask (silicon nitride film) as a stopper is performed by the olishing process.
• STI a silicon oxide film is formed by oxidizing the inner surface of a wrench formed by etching. The purpose of this oxidation process is to prevent the occurrence of leakage current by processing the trench shape non-acutely by forming a silicon oxide film.
• the line & space is repaired to repair etching damage.
• An oxidation treatment is also performed on the concavo-convex pattern of the source in the same manner as described above.
• a thermal oxidation process using an oxidation furnace RTP (Rapid Thermal Process) apparatus and a plasma processing apparatus are used. It is roughly classified into the plasma oxidation treatment used.
• a silicon substrate is heated to a temperature of more than 800 ° C., and the atmosphere is changed to an oxidizing atmosphere using a WVG (Water Vaor Generator) device.
• WVG Water Vaor Generator
• Thermal oxidation is considered to be a method that can form a high-quality silicon oxide film.
• thermal oxidation requires treatment at a high temperature of more than 800 ° C, so there is a problem that thermal budget is increased and the silicon substrate is distorted by thermal stress. .
• the plasma oxidation treatment uses a process gas containing argon gas and oxygen gas with an oxygen flow rate ratio of about 1%, and is microwave-excited formed at a chamber internal pressure of 1 33.3 Pa.
• a method of performing plasma oxidation treatment by causing plasma to act on the silicon surface has been proposed (for example, Patent Document 1).
• plasma oxidation is performed at a relatively low processing temperature of about 400 ° C., so problems such as an increase in thermal budget and thermal distortion in the thermal oxidation are avoided. can do.
• plasma oxidation treatment is performed under conditions of a processing pressure of about 13.3.3 Pa and a flow rate of about 2 % in the processing gas (referred to as “low pressure and low oxygen concentration conditions” for convenience of explanation).
• Patent Document 1 WO 2 0 0 4 Z 0 0 8 5 1 9 Disclosure of Invention
• An object of the present invention is to provide a method for forming a silicon oxide film.
• Means for solving the problem In the method for forming a silicon oxide film of the present invention, a plasma of a processing gas is applied to a silicon portion exposed on the surface of an object to be processed having a concavo-convex shape in a processing chamber of a plasma processing apparatus.
• a method of forming a silicon oxide film for forming a substrate wherein 0.2 W / cm 2 or more per area of the object to be processed on a mounting table for mounting the object to be processed in the processing chamber is 2.3 W / cm 2 or less. While applying high-frequency power at an output within the range, the ratio of oxygen in the processing gas is in the range of 0.1% to 50% and the processing pressure is 1.3 Pa or more 6 6 7 P
• the ratio of the film thickness of the silicon oxide film on the uneven sidewall surface to the film thickness of the silicon oxide film on the bottom wall surface of the recess [film thickness Z on the sidewall surface] is not less than 0.01 and not more than 0.6, the ratio of oxygen in the processing gas is in the range of not less than 0.5% and not more than 50%, and the processing pressure is 6 Within the range of 7 Pa to 1 3 3 Pa.
• the ratio of the film thickness of the silicon oxide film on the uneven sidewall surface to the film thickness of the silicon oxide film on the bottom wall surface of the recess Thickness z Thickness of bottom wall] is 0.
• the proportion of oxygen in the processing gas is in the range of 0.5% or more and 25% or less, and the processing pressure is 20 Pa or more and 60 Pa or less Within the range of is preferable.
• the processing gas contains hydrogen.
• the ratio of the hydrogen flow rate to the total flow rate of hydrogen and oxygen in the processing gas is in the range of 1% to 90%. The range is preferred.
• the frequency of the high-frequency power is preferably in the range of 100 kHz to 60 MHz.
• the treatment temperature is preferably within the range of room temperature to 60 ° C.
• the plasma may be formed by the processing gas and a microwave introduced into the processing chamber by a planar antenna having a plurality of slots. Iku mouth wave excitation plasma.
• the power density of the microwave is preferably in the range of 0.25 5 W / cm 2 or more and 2.5 5 W / cm 2 or less per area of the object to be processed.
• a computer-readable storage medium stores a control program that runs on a computer.
• the control program places the object to be processed on the silicon portion exposed on the surface of the object having an uneven shape in the processing chamber of the plasma processing apparatus at the time of execution.
• the proportion of oxygen in the processing gas is 0.1%
• the oxidation treatment is performed by applying plasma of the treatment gas generated under the condition that the treatment pressure is in the range of 50% to 50% and the treatment pressure is in the range of 1.3 Pa to 6 67 Pa.
• the ratio of the film thickness of the silicon oxide film formed on the uneven sidewall surface to the film thickness of the silicon oxide film formed on the bottom wall surface of the recess [film thickness of the sidewall surface / film on the bottom wall surface]
• the silicon oxide film is formed so that the thickness is 0.6 or less. It is intended to control the plasma processing apparatus in a computer as a method of forming the oxide film is performed.
• a plasma processing apparatus comprising: a processing chamber having an upper opening for processing an object to be processed using plasma; a dielectric member that closes the opening of the processing chamber; An antenna provided outside for introducing electromagnetic waves into the processing chamber; a gas supply mechanism for supplying a source gas into the processing chamber; an exhaust mechanism for evacuating the processing chamber; and an object to be processed in the processing chamber
• a mounting table for mounting the body, a high-frequency power source connected to the mounting table, and a silicon portion exposed to the surface of the processing object having an uneven shape in the processing chamber are subjected to an oxidation treatment by plasma of a processing gas.
• the silicon oxide film In forming the silicon oxide film, high-frequency power is applied to the mounting table with an output within the range of 0.2 W / cm 2 or more to 2.3 W / cm 2 or less per area of the object to be processed, and the gas supply By mechanism
• the ratio of oxygen in the processing gas supplied is in the range of 0.1% to 50% and the processing pressure by the exhaust mechanism is in the range of 1.3 Pa to 6 67 Pa.
• the plasma is generated by introducing electromagnetic waves into the platform room by the antenna, and the film thickness of the silicon oxide film formed on the uneven side wall surface and the bottom wall surface of the recess are formed.
• a control unit that controls the ratio of the thickness of the silicon oxide film to the thickness of the side wall surface / thickness of the bottom wall surface to be equal to or less than 0.6.
• the method of forming a silicon oxide film of the present invention a high frequency output in the range of area per 0. S WZ cm 2 or more 2. 3 W / cm 2 or less of a target object in the mounting table mounting the object to be processed While applying power, plasma oxidation is performed with the ratio of oxygen in the processing gas within the range of 0.1% to 50% and the processing pressure within the range of 1.3 Pa to 6 67 Pa.
• the ratio of the thickness of the uneven side wall to the bottom wall is set to 0.6 or less.
• the silicon oxide film can be formed with sufficient thickness on the bottom wall surface of the recess while forming the silicon oxide film on the uneven side wall surface as thin as possible. Therefore, by utilizing the silicon oxide film forming method of the present invention in various device manufacturing processes, lateral dimension loss is minimized, the dimensional accuracy of the device manufacturing area is secured, and miniaturization is supported. Can be achieved. Brief Description of Drawings
• FIG. 1 is a schematic cross-sectional view showing an example of a plasma processing apparatus suitable for carrying out the silicon oxide film forming method of the present invention.
• Figure 2 shows the structure of a planar antenna.
• FIG. 3 is an explanatory diagram showing the configuration of the control unit.
• FIG. 4A-FIG. 4I are explanatory diagrams showing an example of application to the formation of a silicon oxide film in a trench in STI.
• FIG. 5A-FIG. 5B are explanatory diagrams showing an example of application to the formation of a silicon oxide film for the purpose of damage repair after etching the gate electrode of a transistor.
• FIG. 6A to FIG. 6C are explanatory diagrams showing the relationship between the plasma processing conditions and the isotropic or anisotropy in the oxidation processing.
• FIG. 7 is an explanatory diagram showing a cross-sectional structure near the surface of the wafer on which the uneven pattern is formed.
• FIG. 8 is a graph showing the relationship between the ratio of oxygen in the processing gas and the sidewall / bottom film thickness ratio in Examples 1 to 3.
• FIG. 9 shows the processing pressure and the side wall / bottom thickness ratio in Examples 2 to 4. It is a graph drawing which shows the relationship.
• FIG. 10 is a graph showing the relationship between the partial pressure of oxygen in the processing gas and the thickness ratio of the bottom of the sidewall in Examples 1 to 4 and Comparative Example 1.
• FIG. 11 is a graph showing the relationship between the plasma oxidation processing time, the average film thickness, and the wafer in-plane uniformity in Example 1.
• FIG. 12 is a graph showing the relationship between the plasma oxidation processing time, the average film thickness, and the in-plane uniformity of the wafer in Example 2.
• FIG. 13 is a graph showing the relationship between the film thickness ratio of the side wall Z bottom and the current density of the high-frequency bias current in Examples 5 to 8 and Comparative Examples 2 and 3.
• FIG. 14 is a graph showing the relationship between the plasma oxidation treatment time, the average film thickness, and the in-plane uniformity in Example 8.
• FIGS. 15A to 15D are explanatory diagrams showing an application example of forming a silicon oxide film in a trench in a flash memory.
• FIG. 1 is a cross-sectional view schematically showing a schematic configuration of a plasma processing apparatus 100 that can be used in a method for forming a silicon oxide film according to an embodiment of the present invention.
• FIG. 2 is a plan view showing a planar antenna of the plasma processing apparatus 100 of FIG.
• the plasma processing apparatus 100 introduces microwaves directly into the processing chamber using a planar antenna having a plurality of slot-shaped holes, in particular, a RLSA (Radial Line Slot Antenna).
• a RLSA microwave plasma processing apparatus capable of generating microwave-excited plasma with high density and low electron temperature by generating plasma in the processing chamber.
• T / JP2009 / 051517 In the plasma processing apparatus 100, a plasma having a plasma density of 1 X 1 0 1 () to 5 X 1 0 12 / cm 3 and a low electron temperature of 0.7 to 2 eV Can be processed.
• Plasma generated by the inductive coupling method ICP, Induction Couple P 1 asma
• magnetron method magnetron method
• ECR method Electrode 1 otron Resonance
• surface wave method plasma generated by the inductive coupling method
• the plasma processing apparatus 1 0 0 is the manufacturing process of various semiconductor devices can be suitably used for the purpose of forming a silicon oxide film (e.g. S i 0 2 film).
• the plasma processing apparatus 100 includes, as main components, an airtight chamber (processing chamber) 1, a gas supply mechanism 18 as a gas supply unit that supplies gas into the chamber 1, and a chamber 1, an exhaust device 24 as an exhaust mechanism for evacuating the inside of the chamber 1, a microwave introduction mechanism 2 7 provided on the upper portion of the chamber 1 and introducing a microwave into the chamber 1 1, and these plasma processing devices And a control unit 5 0 for controlling each component unit 1 0 0.
• the chamber 1 is formed of a substantially cylindrical container that is grounded.
• the chamber 11 may be formed of a rectangular tube container.
• the chamber 1 has a bottom wall 1a and a side wall 1b made of a material such as aluminum.
• a mounting table 2 for horizontally supporting a silicon substrate (wafer W) as an object to be processed.
• the mounting table 2 is made of a material having high thermal conductivity, such as ceramics such as A 1 N.
• the mounting table 2 is supported by a cylindrical support member 3 that extends upward from the center of the bottom of the exhaust chamber 11.
• the support member 3 is made of ceramics such as A 1 N, for example.
• a cover ring 4 for covering the mounting table 2 is provided.
• the cover ring 4 may be formed in an annular shape, and preferably covers the entire surface of the mounting table 2. Covering 4 can prevent impurities from entering wafer W.
• the cover ring 4 is made of a material such as quartz, single crystal silicon, polysilicon, amorphous silicon, or SiN, and quartz is most preferable.
• the material constituting the covering 4 is preferably a high-purity material having a low content of impurities such as alkali metals and metals.
• the mounting table 2 has a resistance heating type heater 5 as a temperature control mechanism. Is embedded. In this heat evening 5, the mounting table 2 is heated by being fed from the heat evening power source 5 a, and the wafer W as the object to be processed is uniformly heated by the heat.
• the mounting table 2 is provided with a thermocouple (TC) 6. By measuring the temperature with this thermocouple 6, the heating temperature of the wafer W can be controlled in the range from room temperature to 900 ° C., for example.
• the mounting table 2 is provided with wafer support pins (not shown) for supporting the wafer W and moving it up and down. Each wafer support pin is provided so as to protrude and retract with respect to the surface of the mounting table 2.
• a cylindrical liner 7 made of quartz is provided on the inner periphery of the chamber 11.
• a quartz baffle plate 8 having a large number of exhaust holes 8 a is provided in an annular shape on the outer peripheral side of the mounting table 2 in order to uniformly exhaust the inside of the chamber 1.
• the baffle plate 8 is supported by a plurality of support columns 9 o.
• a circular opening 10 is formed in a substantially central portion of the bottom wall 1 a of the chamber 11.
• the bottom wall 1 a is provided with an exhaust chamber 11 that communicates with the opening 10 and protrudes downward.
• This exhaust chamber 1 1 is the exhaust A trachea 12 is connected, and is connected to an exhaust device 24 via the exhaust pipe 12.
• An annular upper plate 13 is joined to the upper portion of the chamber 11.
• the inner periphery of the upper plate 1 3 protrudes toward the inside (the space inside the chamber) to form an annular support portion 1 3 a.
• An annular gas introduction part 15 is provided on the side wall 1 b of the chamber 1.
• the gas introduction unit 15 is connected to a gas supply mechanism 18 that supplies an oxygen-containing gas or a plasma excitation gas.
• the gas introduction part 15 may be provided in a nozzle shape or a shower shape.
• a loading / unloading port 16 for loading / unloading the wafer W and a gate valve 17 for opening / closing the loading / unloading port 16 are provided between the transfer chamber (not shown) adjacent to the loading / unloading chamber.
• the gas supply mechanism 18 has, for example, an inert gas supply source 19a, an oxygen-containing gas supply source 19b, and a hydrogen gas supply source 19c.
• a gas supply source for example, a purge gas supply source used when replacing the atmosphere inside the chamber 1, a cleaning gas supply source used when cleaning the inside of the chamber 1, etc. Also good.
• Inert gas is used as a plasma excitation gas, can produce a stable plasma, such as rare gas can be used
• gas supply mechanism 1 8 1517 inert gas supply source 1 9 a, oxygen-containing gas supply source 1 9 b, and hydrogen gas supply source reach gas introduction part 15 via gas line 2 0, and gas introduction part 15 to chamber 1 Introduced in.
• gas supply mechanism 1 8 1517 inert gas supply source 1 9 a, oxygen-containing gas supply source 1 9 b, and hydrogen gas supply source reach gas introduction part 15 via gas line 2 0, and gas introduction part 15 to chamber 1 Introduced in.
• Each gas line 20 connected to each gas supply source is provided with a mass flow controller 21 and opening / closing valves 22 before and after it. With such a gas supply mechanism 18 configuration, the supplied gas can be switched and the flow rate can be controlled.
• the exhaust device 24 as an exhaust mechanism includes a vacuum pump such as a high-speed vacuum pump such as a turbo molecular pump. As described above, the vacuum pump 24 is connected to the exhaust chamber 11 of the chamber 1 through the exhaust pipe 12. The gas in the chamber 1 flows uniformly into the space 1 1 a of the exhaust chamber 1 1, and further exhausts to the outside through the exhaust pipe 1 2 by operating the vacuum pump 2 4 from the space 1 1 a. Is done. As a result, the inside of the chamber 11 can be depressurized at a high speed to a predetermined degree of vacuum, for example, 0.13 3 Pa.
• Microphone Mouth wave introduction mechanism 2 7 consists mainly of transmission plate 2 8, planar antenna 3 1 as antenna, slow wave material 3 3, metal cover 3 4, waveguide 3 7, matching circuit 3 8 and microwave generator 3 9.
• the transmission plate 28 that transmits microwaves is disposed on a support portion 13 a that protrudes to the inner peripheral side of the upper plate 13.
• the transmission plate 28 is made of a dielectric material such as quartz or ceramics such as A 1 2 0 3 and A 1 N.
• the transmission plate 28 and the support portion 13 a are hermetically sealed through a sealing member 29 such as an O-ring. Therefore, the inside of the chamber 1 is kept airtight.
• the planar antenna 3 1 as an antenna is located above the transmission plate 2 8 On the outside of the chamber 1) so as to face the mounting table 2.
• the planar antenna 3 1 has a disk shape.
• the shape of the planar antenna 3 1 is not limited to a disk shape, and may be a square plate shape, for example.
• the planar antenna 31 is locked to the upper end of the upper plate 13.
• the planar antenna 31 is made of a conductive member such as a copper plate having a surface plated with gold or silver, an aluminum plate, a nickel plate, or an alloy thereof.
• the planar antenna 3 1 has a number of slot-like microwave radiation holes 3 2 that radiate microwaves.
• the microwave radiation hole 3 2 is formed to penetrate the planar antenna 3 1 in a predetermined pattern.
• Each microwave radiation hole 32 has an elongated rectangular shape (slot shape) as shown in FIG. 2, for example.
• adjacent microwave radiation holes 3 2 force S are arranged in a “C” shape.
• the microwave radiation holes 32 arranged in combination in a predetermined shape for example, T-shape are further arranged concentrically as a whole.
• the length and arrangement interval of the microwave radiation holes 32 are determined according to the wavelength ( ⁇ g) of the microwave.
• the interval between the microwave radiation holes 3 2 is set to be A g Z 4 or Lg.
• the interval between adjacent microwave radiation holes 3 2 formed concentrically is indicated by ⁇ r.
• the shape of the microwave radiation hole 32 may be another shape such as a circular shape or an arc shape.
• the arrangement form of the microwave radiation holes 32 is not particularly limited, and the microwave radiation holes 32 may be arranged concentrically, for example, spirally, radially, or the like.
• a slow wave material 33 having a dielectric constant larger than that of vacuum is provided on the upper surface of the planar antenna 31.
• This slow wave material 3 3 Since the wavelength of the chromo wave becomes longer, it has the function of adjusting the plasma by shortening the wavelength of the microwave.
• quartz, polytetrafluoroethylene resin, polyimide resin or the like can be used as the material of the slow wave material.
• planar antenna 3 1 and the transmission plate 28 and the slow wave material 3 3 and the planar antenna 3 1 may be contacted or separated from each other, but are preferably in contact with each other.
• a metal cover 3 4 is provided on the upper portion of the chamber 1 so as to cover the planar antenna 3 1 and the slow wave material 3 3.
• the metal cover 3 4 is formed of a metal material such as aluminum or stainless steel.
• a flat waveguide is formed by the metal cover 3 4 and the planar antenna 3 1 so that microwaves can be uniformly supplied into the chamber 1.
• the upper end of the upper plate 1 1 3 and the metal cover 3 4 are sealed by a seal member 3 5.
• a cooling water flow path 3 4 a is formed inside the metal force bar 3 4. By allowing the cooling water to flow through the cooling water flow path 3 4 a, the metal cover 3 4, the slow wave material 3 3, the planar antenna 3 1, and the transmission plate 2 8 can be cooled.
• the metal cover 3 4 is grounded.
• An opening 36 is formed at the center of the upper wall (ceiling) of the metal cover 3 4, and a waveguide 37 is connected to the opening 36.
• a microwave generator 39 that generates microwaves is connected to the other end of the waveguide 37 through a matching circuit 3 8.
• the waveguide 37 has a circular cross-section coaxial waveguide 37a extending upward from the opening 36 of the metal cover 34, and a mode at the upper end of the coaxial waveguide 37a.
• a horizontally extending rectangular waveguide 3 7 b connected via a converter 40.
• the mode converter 40 converts microwaves that propagate in the rectangular waveguide 37b in TE mode to TEM mode. It has a function.
• An inner conductor 41 extends in the center of the coaxial waveguide 37a.
• the inner conductor 4 1 is fixedly connected to the center of the planar antenna 31 at the lower end thereof. With such a structure, the microwave is efficiently and uniformly propagated radially and uniformly to the flat waveguide formed by the planar antenna 3 1 through the inner conductor 4 1 of the coaxial waveguide 3 7 a.
• An electrode 42 is embedded on the surface side of the mounting table 2.
• a high-frequency power supply 4 4 for bias application is connected to the electrode 4 2 via a matching box (M.B.) 4 3.
• M.B. matching box
• the wafer W It is configured so that a bias can be applied to the (processed object).
• a material of the electrode 42 for example, a conductive material such as molybdenum or tungsten can be used.
• the electrode 42 is formed in, for example, a mesh shape, a lattice shape, a spiral shape, or the like.
• the microwave generated by the microwave generator 39 is propagated to the planar antenna 31 via the waveguide 37, and further to the microphone mouth wave radiation hole 3 2 (slot) is introduced into the chamber 11 through the transmission plate 28.
• the microwave frequency for example, 2.45 GHz is preferably used, and 8.35 GHz, 1.9.8 GHz, or the like can also be used.
• Each component of the plasma processing apparatus 100 is connected to and controlled by the controller 50.
• the control unit 50 is typically a review overnight.
• the process controller 5 1 having a CPU and the user interface 5 connected to the process controller 5 1 are provided. 2 and storage unit 5 3.
• the process controller 51 is connected to the plasma processing device 100
• each component related to process conditions such as temperature, pressure, gas flow rate, microwave output, high frequency output for bias application (for example, heat source 5a, gas supply mechanism 18, exhaust device 24, micro It is a control means that controls the wave generator 39, high frequency power supply 44, etc.).
• the user interface 52 allows the process manager to perform command input operations to manage the plasma processing device 100 and visualize the operating status of the plasma processing device 100. Display.
• the storage unit 53 records a control program (software), processing condition data, etc. for realizing various processes executed by the plasma processing apparatus 100 under the control of the process controller 51. Saved recipes are stored.
• an arbitrary recipe is called from the storage unit 53 by an instruction from the user interface 52, etc., and is executed by the process controller 51.
• a desired process is performed in the chamber 11 of the processing apparatus 100.
• Recipes for the control program and processing condition data are stored in a computer-readable storage medium such as a CD-ROM, hard disk, flexible disk, flash memory, DVD, or Blu-ray disc. Available. Furthermore, it is also possible to transmit the recipe from another device, for example, via a dedicated line.
• the lower temperature formed on the object to be processed at a low temperature of 60 ° C. or lower, for example, room temperature (about 25 ° C.) or higher and 60 ° C. or lower. Damage-free plasma processing can be performed on the ground film and substrate (wafer W).
• the plasma processing apparatus 100 is excellent in plasma uniformity, process uniformity can be realized even for a large-diameter wafer W (object to be processed).
• plasma oxidation processing using the RLSA type plasma processing apparatus 100 will be described. First, the gate valve 17 is opened and the wafer W is loaded into the chamber 11 from the loading / unloading port 16 and mounted on the mounting table 2.
• the inert gas supply source 19a, the oxygen-containing gas supply source 19b and the hydrogen gas supply source 19c of the gas supply mechanism 18 are Inert gas, oxygen-containing gas and, if necessary, hydrogen gas are introduced into the chamber 11 at a predetermined flow rate through the gas introduction part 15. In this manner, the inside of the chamber 1 1 is adjusted to a predetermined pressure.
• a microwave having a predetermined frequency, for example, 2.45 GHz, generated by the microwave generator 39 is guided to the waveguide 37 through the matching circuit 38.
• the microwave guided to the waveguide 3 7 sequentially passes through the rectangular waveguide 3 7 b and the coaxial waveguide 3 7 a and is supplied to the planar antenna 3 1 through the inner conductor 4 1. That is, the microwave propagates in the TE mode in the rectangular waveguide 3 7 b, and the TE mode microwave is converted into the TEM mode by the mode converter 40, and the coaxial waveguide 3 7 a It propagates toward the planar antenna 3 1.
• the microwaves enter the space above the wafer W in the chamber 11 from the slot-like microwave radiation holes 32 formed through the planar antenna 31 through the transmission plate 28 as a dielectric. Radiated.
• the microwave output at this time is selected from the range of 0.25 5 to 2.5 5 W / cm 2 as the power density when, for example, a wafer W having a diameter of 200 mm or more is processed. be able to.
• An electromagnetic field is formed in the chamber 1 by the microwaves radiated from the planar antenna 31 to the chamber 1 through the transmission plate 28, and the inert gas and the oxygen-containing gas are turned into plasma.
• the wave-excited plasma has a high density of about 1 X 1 0 1 Q to 5 X 1 0 12 / cm 3 by radiating microwaves from the many microphone mouth wave radiation holes 3 2 of the planar antenna 3 1, In the vicinity of wafer W, low electron temperature plasma of approximately 1.2 eV or less is obtained.
• the plasma formed in this way has little plasma damage due to ions or the like on the substrate (wafer W).
• plasma oxidation treatment is performed on silicon (single crystal silicon, polycrystalline silicon, or amorphous silicon) formed on the surface of the wafer W by the action of active species such as radicals and ions in the plasma, and silicon that is not damaged. An oxide film is formed.
• a predetermined frequency and a high frequency power of a predetermined frequency are supplied from the high frequency power supply 44 to the mounting table 2.
• the high frequency power supplied from this high frequency power supply 44 applies a high frequency bias voltage (high frequency bias) to the substrate.
• high frequency bias high frequency bias
• the anisotropy of the plasma oxidation process Is promoted. That is, when a high frequency bias is applied to the substrate, an electromagnetic field is formed in the vicinity of the substrate, and this acts to attract ions in the plasma to the substrate (wafer W). It weakens the oxidative action by ions and suppresses the oxidation rate at these sites, while acting on the bottom wall of the recess to increase the oxidation rate.
• the plasma oxidation treatment performed in the plasma processing apparatus 100 will be described.
• processing gas rare The A r gas as the gas, it is preferable to use respectively using the 0 2 gas as an oxygen-containing gas.
• the flow rate ratio (volume ratio) of the O 2 gas contained in the processing gas increases the anisotropy of the plasma processing and suppresses the oxidation of the side walls of the unevenness, while promoting the oxidation of the bottom of the recessed portion.
• 0.1% to 50% more preferably within the range of 0.5% to 25%, even more preferably within the range of 0.5% to 10%.
• a range of 5% to 1% is desirable.
• the oxygen (ion) partial pressure is further lowered inside the unevenness, so that oxygen ions are drawn to the bottom by applying a bias, and the side wall This is because the action of oxygen ions on the part is suppressed.
• hydrogen can also be included in the processing gas.
• ⁇ radicals are generated in the plasma, so the oxidation rate can be increased.
• the total flow rate ratio (volume ratio) of hydrogen and oxygen to the entire process gas should be within the range of 0.1% to 50%. Preferably, it is in the range of 0.5% to 25%, more preferably in the range of 0.5% to 10%, and more preferably in the range of 0.5% to 1%. It is desirable to be within.
• the volume ratio of the hydrogen flow rate to the total flow rate of hydrogen and oxygen should be within the range of 1% or more and 90% or less. From the viewpoint of improving the oxidation rate at the bottom of the recess, it is more preferably in the range of 10% or more and 60% or less.
• the silicon oxide film formed on the side wall of the uneven portion is recessed. From the viewpoint of forming a thin film selectively and thinner than the silicon oxide film formed on the bottom of the film, it is desirable that the content be in the range of 1% to 50%.
• the processing pressure increases the anisotropy of the plasma oxidation treatment, suppresses the oxidation of the side walls of the unevenness, and promotes the oxidation of the bottom of the recessed portion,
• the preferred combinations of the oxygen flow rate ratio in the processing gas and the processing pressure are as follows.
• the ratio of the thickness of the silicon oxide film on the concavo-convex side wall surface to the thickness of the silicon oxide film on the bottom wall surface of the recess [the thickness of the side wall surface film thickness on the bottom wall surface] is not less than 0.0 1
• the ratio of oxygen in the processing gas is in the range of 0.5% to 50% and the processing pressure is in the range of 6.7 Pa to 1 3 3 Pa. It is preferable.
• the ratio of the thickness of the silicon oxide film on the concavo-convex side wall surface to the thickness of the silicon oxide film on the bottom wall surface of the recess [side wall thickness Z bottom wall thickness] is not less than 0.01 In the case of 0.4 or less, the proportion of oxygen in the process gas is in the range of 0.5% or more and 25% or less, and the process pressure is in the range of 20 Pa or more and 60 Pa or less. It is preferable that
• high-frequency power having a predetermined frequency and power is supplied from the high-frequency power supply 44 to the mounting table 2 during the plasma oxidation process, and a high-frequency bias is applied to the substrate (wafer W).
• the frequency of the high-frequency power supplied from the high-frequency power supply 4 4 is preferably in the range of, for example, 100 kHz to 60 MHz, and is preferably in the range of 400 kHz to 13.5 MHz. The inside is more preferable.
• the high frequency power is preferably applied within a range of, for example, 0.2 W / cm 2 or more and 2.3 W / cm 2 or less as the power density per area of the wafer W, and 0.3 5 W / cm 2 or more 1 It is more preferable to apply within 2WZcm 2 or less. Also, the high frequency power is in the range of 2 0 0 W or more and 2 0 0 0 W or less Within T / JP2009 / 051517 is preferable, and within the range of 300 W or more and 1 200 W or less is more preferable.
• the high frequency power applied to the mounting table 2 has the effect of drawing the ion species in the plasma into the wafer W while maintaining the low electron temperature of the plasma.
• the anisotropy of plasma oxidation can be increased, and the thickness of the silicon oxide film formed on the bottom wall portion can be made extremely larger than the side wall portion of the uneven portion.
• a high frequency bias is applied to the wafer W, it is a plasma with a low electron temperature, so there is no damage to the silicon oxide film due to ions in the plasma, etc.
• a silicon oxide film can be formed.
• the microwave power density in plasma oxidation treatment is within the range of 0.25 5 W / cm 2 or more and 2.5 5 WZ cm 2 or less from the viewpoint of reducing the radial component and improving the anisotropy. It is preferable to do.
• the microwave power density means the microwave power per 1 cm 2 of the wafer W area.
• the microwave power is within a range of 5 00 W or more and less than 5 0 0 0 W, and 1 0 0 0 W or more 3 0 0 More preferably, it is 0 W or less.
• the heating temperature of the wafer W is preferably set within the range of, for example, the room temperature (about 25 ° C.) or more and 60 ° C. or less as the temperature of the mounting table 2, and 2 200 ° C. or more and 50 ° It is more preferable to set it within the range of 0 ° C or less, and it is desirable to set it within the range of 400 ° C or more and 500 ° C or less. 5 3 is stored as a recipe.
• the process controller 51 reads the recipe, and each component of the plasma processing apparatus 100, for example, the gas supply mechanism 18, the exhaust apparatus 24, the microwave generator 39, the heat source 5 a, and the high frequency By sending a control signal to the power supply 44, etc., plasma oxidation treatment under the desired conditions is realized.
• FIG. 4A to FIG. 41 show the process from the formation of the trench in S T I to the subsequent oxide film formation.
• a silicon oxide film 10 2 such as Si 0 2 is formed on the silicon substrate 10 1 by a method such as thermal oxidation.
• a silicon nitride film 103 such as Si 3 N 4 is formed on the silicon oxide film 102 by using, for example, C VD (Chemical Vapor Deposition).
• C VD Chemical Vapor Deposition
• D after applying a photoresist on the silicon nitride film 103, patterning is performed by a photolithography technique to form a resist layer 104.
• the silicon nitride film 103 and the silicon oxide film 102 are selectively plasma etched using, for example, a halogen-based etching gas.
• the silicon substrate 101 is exposed corresponding to the pattern of the resist layer 104 (FIG. 4E).
• the silicon nitride film 103 forms a mask pattern for the trench.
• FIG. 4F shows a state in which the so-called ashing process is performed by using an oxygen-containing plasma using a processing gas containing oxygen, for example, and the resist layer 104 is removed.
• ashing process is performed by using an oxygen-containing plasma using a processing gas containing oxygen, for example, and the resist layer 104 is removed.
• anisotropic plasma etching is performed on the silicon substrate 101 to form trenches 105.
• This etching is For example C 1 2, HB r, SF 6, or a halogen or halogen compound such as CF 4, can be performed by using an etching gas containing ⁇ 2 the halogen compound.
• FIG. 4H shows a process of forming a silicon oxide film on the trench 10 5 of the wafer W after etching in S T I.
• the high-frequency power is supplied to the electrode 42 of the mounting table 2 with the frequency and power (power density) within the above range, and the oxygen ratio in the processing gas is within the range of 0.1% to 50%.
• the plasma oxidation treatment is performed under the condition that the treatment pressure is 1.3 Pa or more and 6 6 7 Pa or less. By performing the plasma oxidation process under such conditions, the silicon oxide film 11 1 1 can be formed by oxidizing the inner surface of the trench 10 5 as shown in FIG. 4I.
• the silicon oxide film 1 1 1 formed by the selective oxidation process in this way is formed by the film thickness of the silicon oxide film 1 1 1 a formed on the side wall of the trench 10 5 and the bottom of the trench 1 0 5.
• Ratio of silicon oxide film formed in 1 to 1 lb film thickness [silicon oxide film 1 1 1 a film thickness / silicon oxide film 1 1 1 b film thickness] force 0.6 or less, for example, 0.0 It is within the range of 1 to 0.6 (preferably within the range of 0.0 1 to 0.4), and the thickness of the silicon oxide film 1 1 1 a on the side wall of the wrench 1 0 5 should be extremely suppressed Can do. In this case, it is not necessary to reduce the gate length when forming the gate electrode, and further miniaturization of the device is realized.
• the silicon oxide film 1 1 1 a on the side wall of the trench 10 0 5 for embedding the isolation film in STI becomes thicker in the lateral direction (side wall part) in the silicon substrate 1 0 1, so that a device is formed.
• the area of the region (for example, memory cell formation region in case of DRAM) will be reduced.
• the thickness of the silicon oxide film 1 1 1 a formed on the side wall of the trench 10 5 and the silicon oxide formed on the bottom of the trench 1 0 5 If the ratio of the film 1 1 1 b to the film thickness [silicon oxide film 1 1 1 a film thickness Z silicon oxide film 1 1 1 b film thickness] exceeds 0.6, there will be an error in dimensional accuracy. It becomes difficult to cope with miniaturization.
• the thickness of the silicon oxide film 1 1 1 a formed on the side wall of the trench 10 5 is selectively reduced as much as possible. Is required.
• the selectivity of oxidation of the bottom and side walls is increased, and the silicon oxide film 11 1a formed on the side wall is changed to the silicon oxide film on the bottom.
• the S i O in the trench 10 5 is formed by, for example, the CVD method according to the procedure of element isolation region formation by STI.
• the silicon nitride film 10 3 is polished as a stopper layer by CMP (Chemical Mechanical Pollshing) and flattened.
• CMP Chemical Mechanical Pollshing
• the element isolation structure is formed by removing the silicon nitride film 103 and the upper portion of the buried insulating film by etching or CMP.
• the silicon oxide film forming method of the present embodiment Can also be applied to oxidation treatment for repairing etching damage, which is performed after the transistor gate etching.
• FIG. 5A shows a state in which a plasma oxidation process is performed on a polysilicon electrode 200 which is a gate electrode of a transistor.
• a polysilicon layer is formed on a silicon substrate 10 1 through an insulating film 2 0 2 such as Si 0 2, and this polysilicon layer is line-and-spaced using an etching mask 2 0 1 such as a resist.
• etching mask 2 0 1 such as a resist.
• the plasma damage caused by etching is repaired by performing plasma oxidation treatment on the silicon substrate 10 0 1 on which the polysilicon electrode 2 0 0 is formed using the plasma treatment apparatus 1 0 0 of FIG. ing.
• the ratio of oxygen in the treatment gas is 50% or less, for example, 0.1% or more and 50% or less, while supplying high-frequency power to the mounting table 2 at a frequency and power (power density) in the above range.
• a processing pressure of 6 6 7 Pa or less for example, 1.3 Pa or more and 6 67 7 Pa or less.
• a thin silicon oxide film 203 is formed on the side surface of the polysilicon electrode 20 0 by the plasma oxidation process.
• the transistor forming portion is formed in the polysilicon electrode 2 0 0 accordingly.
• the area (channel width) is reduced and an error occurs between the line and space dimensions formed by etching.
• the thickness of the silicon oxide film 20 3 formed on the side wall of the polysilicon electrode 200 is increased, the above error becomes too large, and it becomes difficult to cope with miniaturization. Therefore, in order to secure the area of the transistor formation portion, it is necessary to suppress the thickness of the silicon oxide film 20 3 on the side wall portion of the polysilicon electrode 200 extremely thin.
• the selectivity of the oxidation treatment between the silicon substrate 1001 and the side wall of the polysilicon electrode 200 is increased, and the silicon oxide film 20 formed on the side wall is increased.
• the thickness of 3 By reducing the thickness of 3, dimensional accuracy can be maintained, and a sufficient area for transistor formation can be secured even when miniaturization is attempted.
• the mounting table is mainly used.
• the selectivity of the oxidation treatment between the bottom and side walls of the recess can be controlled.
• the processing pressure is increased, the radicals in the plasma increase and the isotropy of oxidation becomes stronger.
• the processing pressure is lowered, the ions in the plasma increase and oxidation occurs.
• FIG. 6 B increasing the proportion of ⁇ 2 gas in the process gas it becomes strong isotropic oxidized to ions in the plasma is reduced, lowering the ratio of 0 2 gas As the number of ions in the plasma increases, the anisotropy of oxidation increases.
• high frequency power is supplied to the mounting table 2 to apply a high frequency bias to the substrate (wafer W), and ions in the plasma are drawn into the substrate (wafer W).
• a high frequency bias to the substrate (wafer W)
• ions in the plasma are drawn into the substrate (wafer W).
• the process pressure was set to less than 6 6 7 P a, and the 0 2 ratio in the process gas is set to 50% or less.
• oxidation is mainly performed by ions as the oxidation active species, and the thickness of the silicon oxide film formed on the bottom and side walls of the concavo-convex shape is selectively controlled.
• FIG. 7 shows a silicon substrate 10 having an uneven pattern 1 2 0
• This figure schematically shows the cross-sectional structure of the surface of the wafer W after the silicon surface of 1 is oxidized to form the silicon oxide film 1 2 1.
• a silicon oxide film 1 2 1 was formed by performing plasma oxidation on the silicon surface under the following conditions using the plasma processing apparatus 100 shown in FIG.
• the side wall Z bottom thickness ratio (b / c) is an index of oxidation selectivity between the side wall and the bottom, and the smaller this value, the better the selectivity. This is because the thickness b of the silicon oxide film on the sidewall is preferably made as thin as possible in order to cope with the miniaturization of devices.
• the side wall Z bottom film thickness ratio (b Z c) is, for example, preferably 0.6 or less, and more preferably 0.4 or less.
• High frequency bias frequency 1 3.5 6 MHz
• High-frequency bias power 6 0 0 W (power density 0.7 0 2 W / cm 2 )
• Microwave power 1 2 0 0 W (Power density 0.6 1 4 W / cm
• Target film thickness 6 nm (as top film thickness a)
• the side wall / bottom film thickness ratio b Z c which is an index of the selectivity between the side wall and the bottom in the plasma oxidation process, is In Comparative Example 1 in which plasma oxidation treatment was performed without applying a high-frequency bias to Fig. 2, the thickness of the sidewalls was larger than the thickness of the bottom, and the thickness ratio b / c was 1.27. 2, indicating that oxidation progressed approximately isotropically.
• FIG. 8 is a graph showing the relationship between the thickness ratio bZc between the side wall and the bottom in the plasma oxidation process in Examples 1 to 3 and the ratio of oxygen gas in the process gas. From this Fig.8, if the volume ratio of oxygen gas in the processing gas is 50% or less under the condition of the processing pressure of 40 Pa, the side wall / bottom film thickness ratio b / c is 0.6 or less. It was found that the side wall / bottom film thickness ratio b / c could be reduced to 0.4 or less if the volume ratio was 25% or less.
• FIG. 9 is a graph showing the relationship between the processing pressure and the film thickness ratio b / c between the side wall and the bottom in the plasma oxidation process in Examples 2-4. From Figure 9 this, 1% 0 2 conditions, if below process pressure 2 6 7 P a, it is possible to the side wall / bottom film thickness ratio b / c to 0.6 or less, the processing pressure It has been found that if the thickness is set to 1 3 3 Pa or less, the side wall bottom film thickness ratio b no c can be reduced to 0.4 or less, and the thickness of the side wall can be reduced.
• the graph of FIG. 10 shows the relationship between the side wall Z bottom thickness ratio b / c of the silicon oxide film in Examples 1 to 4 and Comparative Example 1 and the oxygen partial pressure in the process gas. This is a plot of the staff. From FIG. 10, it is preferable to set the partial pressure of oxygen in the processing gas to 10 or less in order to obtain a thin sidewall with a sidewall bottom thickness ratio b / c of 0.4 or less. It can be seen that the following is more preferable.
• FIG. 11 shows the relationship between the plasma oxidation processing time in Example 1, the average film thickness of the top film thickness a, and the in-plane uniformity of the average film thickness.
• a sufficient oxidation rate is obtained.
• the uniformity within the wafer surface in the plasma oxidation process was good at 4% or less.
• the uniformity within the wafer surface in Fig. 11 was calculated as a percentage (XI 0%) of (maximum film thickness within wafer surface and minimum film thickness) / (average film thickness X 2 within wafer surface) ( The same applies to Fig. 12 and Fig. 14).
• FIG. 12 shows the relationship between the plasma oxidation treatment time in Example 2, the average film thickness of the top film thickness a, and the in-wafer uniformity of the average film thickness.
• a sufficient oxidation rate is obtained.
• the uniformity within the wafer surface in the plasma oxidation process remained almost 2%, which was a very good result.
• High frequency bias frequency 1 3.5 6 MHz
• Microwave power 1 2 0 0 W (power density 0.6 1 4 / cm)
• Target film thickness 6 nm (as the top film thickness a)
• Examples 5 to 8 and Comparative Example 3 are the same except that no high frequency bias is applied.
• plasma oxidation is performed while H 2 is added to the processing gas and high frequency bias power is applied to the mounting table 2 It was shown that the oxidation rate can be significantly improved by performing the above.
• the proportion of hydrogen is preferably 0.1% or more and less than 2%, more preferably 0.1% to 1%. Even if H 2 is added, plasma oxidation treatment is performed while applying high-frequency bias power to the mounting table 2 at a power density of 0.2 [W / cm 2 ] or more as in Examples 5 to 8.
• Figure 13 shows the relationship with (power).
• the side wall can be obtained by setting the power density of the high-frequency bias applied to the workpiece to 0.2 [w / cm 2 ] or more. It was found that the Z bottom thickness ratio b / c can be reduced to 0.6 or less, and the thickness of the sidewall can be reduced.
• the power density of the high-frequency bias applied to the workpiece is set to 0.2 [W / cm 2 ] or more, so that the side wall Z bottom film thickness ratio b / c
• the side wall / bottom film thickness ratio b / c is 0.4 or less by setting the power density of the high frequency bias to 0.35 [W / cm 2 ] or more. It was found that the thickness of the sidewall can be reduced.
• the high-frequency bias had a power density of 0.16 [W / cm 2 ] in Comparative Example 2 where no high-frequency bias was applied to the workpiece (wafer W).
• Comparative Example 3 which was as small as possible, a sufficient oxidation rate could not be obtained, and the film thickness ratio b Z c was 0.8 to 1.2, resulting in low selectivity. Therefore, when it is desired to reduce the thickness of the sidewall and increase the oxidation rate while obtaining high selectivity between the sidewall and the bottom in the plasma oxidation process, the process gas is supplied while supplying high-frequency bias power to the mounting table 2. It has been found that it is preferable to add H 2 therein.
• FIG. 14 shows the relationship between the plasma oxidation processing time in Example 8 and the average film thickness of the top film thickness a and the in-wafer uniformity of the average film thickness.
• a large oxidation rate is obtained.
• H 2 H 2
• the side wall Z can be obtained by adjusting the oxygen ratio in the processing gas to a range of 0.1% to 50% and a processing pressure to a range of 1.3 Pa to 6 67 Pa.
• the bottom film thickness ratio bZc can be set to 0.6 or less, for example, within the range of 0.11 or more and 0.6 or less.
• the oxide film thickness at the bottom is made as thin as possible while the silicon oxide is oxidized at the bottom.
• a film can be selectively formed. As a result, the lateral dimensional accuracy of the concavo-convex pattern is ensured, and it becomes possible to cope with fine device design.
• the oxidation rate is increased, and the film thickness in the range of 20 nm or less, for example, 6 nm or more and 20 nm or less, is formed on the bottom wall of the concave-convex shape in a short time.
• a thin silicon oxide film with a thickness of 0.6 nm or more and 12 nm or less can be formed on the sidewall.
• the embodiments of the present invention have been described.
• the present invention is not limited to the above-described embodiments, and various modifications can be made.
• the RLSA plasma processing apparatus that is optimal as an apparatus for performing the silicon oxide film forming method of the present invention has been described as an example.
• other braces such as ICP plasma method, ECR plasma method, surface reflected wave plasma method, magnetron plasma method, etc. It is also possible to use a Jerusalema processing device.
• the polysilicon gate electrode of the transistor by the oxidation treatment inside the trench 10 5 of the single crystal silicon substrate 101 in STI and the etching is used.
• the oxidation treatment for repairing the etching damage after forming the film was described.
• the method for forming a silicon oxide film of the present invention can also be applied to other various applications that are highly required to form a silicon oxide film on the surface of the concavo-convex pattern.
• a silicon surface whose surface orientation varies depending on the part due to the unevenness for example, a silicon oxide film as a gate insulating film or the like is selectively sidewalls in the manufacturing process of a three-dimensional transistor such as a fin structure or a groove gate structure. It can also be applied to thin films. Conversely, it can also be applied to the case where it is desired to selectively form a thick silicon oxide film on the bottom of the uneven silicon.
• FIGS. 15A to 15D show an example in which the method for forming a silicon oxide film according to the present invention is applied to a process of manufacturing a flash memory.
• a first insulating film layer 30 2 of Si 02 is formed on a silicon substrate 30 1 by thermally oxidizing the substrate, and then CVD is performed thereon.
• the first polysilicon layer 3 0 3, S i 3 N 4 layer and S i ⁇ two layers of the second insulating film layer 3 0 4 was laminated composed of further second polysilicon layer is formed thereon 3 0 5 is formed.
• the first insulating layer 30 2 acts as a tunnel oxide
• the first polysilicon layer 30 3 acts as a floating gate
• the second polysilicon layer 3 0 5 operates as a control gate.
• a method for forming these layers on the silicon substrate 301 is also well known.
• the second polysilicon layer 30 Photoresist is applied onto 5 and patterned by a photolithographic technique to form a mask 300 for etching. Thereafter, using the mask 3 06 formed in this manner, for example, plasma etching is performed, thereby forming trenches 3 0 7 in the silicon substrate 3 0 1 at a stretch as shown in FIG. 15 B. Separate each memory area.
• plasma oxidation is performed on the trench 30 7 according to the method of the present invention to form a silicon oxide film 30 8 on the inner surface of the trench 30 7.
• the film thickness of the silicon oxide film 30 8 a on the sidewall of the trench 30 7 can be made extremely thin compared to the film thickness of the bottom silicon oxide film 3 0 8 b. Therefore, in this device, the gate length can be increased in each memory element.
• each memory area is embedded to complete the flash memory.
• a suitable metal wiring for example if an interlayer such as S i O 2 by CVD or plasma CVD
• An insulating film 3009 is formed, and each memory area is embedded to complete the flash memory.
• the thickness of the silicon oxide film formed on the side wall of each memory element can be made extremely thin, so that the gate length can be increased while miniaturizing the element. The As a result, a flash memory having a large memory capacity and high operation reliability can be obtained.

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• 2009
  • 2009-01-23 WO PCT/JP2009/051517 patent/WO2009093760A1/ja not_active Ceased
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• 2010
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