JP2009200483A - シリコン酸化膜の形成方法 - Google Patents

シリコン酸化膜の形成方法 Download PDF

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Publication number
JP2009200483A
JP2009200483A JP2009013724A JP2009013724A JP2009200483A JP 2009200483 A JP2009200483 A JP 2009200483A JP 2009013724 A JP2009013724 A JP 2009013724A JP 2009013724 A JP2009013724 A JP 2009013724A JP 2009200483 A JP2009200483 A JP 2009200483A
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Prior art keywords
silicon oxide
oxide film
plasma
processing
thickness
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JP2009013724A
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Japanese (ja)
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JP2009200483A5 (enExample
Inventor
Hideo Nakamura
秀雄 中村
Yoshiro Kabe
義郎 壁
Junichi Kitagawa
淳一 北川
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Priority to JP2009013724A priority Critical patent/JP2009200483A/ja
Publication of JP2009200483A publication Critical patent/JP2009200483A/ja
Publication of JP2009200483A5 publication Critical patent/JP2009200483A5/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32192—Microwave generated discharge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32192—Microwave generated discharge
    • H01J37/32211—Means for coupling power to the plasma
    • H01J37/3222—Antennas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28211—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/32105—Oxidation of silicon-containing layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • H01L21/76235—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls trench shape altered by a local oxidation of silicon process step, e.g. trench corner rounding by LOCOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0147—Manufacturing their gate sidewall spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Analytical Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Formation Of Insulating Films (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Plasma Technology (AREA)
  • Drying Of Semiconductors (AREA)
JP2009013724A 2008-01-24 2009-01-24 シリコン酸化膜の形成方法 Pending JP2009200483A (ja)

Priority Applications (1)

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JP2009013724A JP2009200483A (ja) 2008-01-24 2009-01-24 シリコン酸化膜の形成方法

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Application Number Priority Date Filing Date Title
JP2008013564 2008-01-24
JP2009013724A JP2009200483A (ja) 2008-01-24 2009-01-24 シリコン酸化膜の形成方法

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JP2009200483A true JP2009200483A (ja) 2009-09-03
JP2009200483A5 JP2009200483A5 (enExample) 2012-01-26

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US (1) US20110017586A1 (enExample)
JP (1) JP2009200483A (enExample)
KR (1) KR101249611B1 (enExample)
TW (1) TW200941579A (enExample)
WO (1) WO2009093760A1 (enExample)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009239157A (ja) * 2008-03-28 2009-10-15 Toshiba Corp 半導体装置の製造方法
WO2011040455A1 (ja) * 2009-09-30 2011-04-07 東京エレクトロン株式会社 選択的プラズマ窒化処理方法及びプラズマ窒化処理装置
JP2012216667A (ja) * 2011-03-31 2012-11-08 Tokyo Electron Ltd プラズマ処理方法
WO2018179038A1 (ja) * 2017-03-27 2018-10-04 株式会社Ｋｏｋｕｓａｉ Ｅｌｅｃｔｒｉｃ 半導体装置の製造方法、プログラム及び基板処理装置
JP2025009917A (ja) * 2023-07-06 2025-01-20 ベイジン イータウン セミコンダクター テクノロジー カンパニー リミテッド 半導体ワークピースのための低圧酸化処理方法及び装置

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011097029A (ja) * 2009-09-30 2011-05-12 Tokyo Electron Ltd 半導体装置の製造方法
US8642479B2 (en) * 2011-07-14 2014-02-04 Nanya Technology Corporation Method for forming openings in semiconductor device
TWI476832B (zh) * 2011-09-28 2015-03-11 Tokyo Electron Ltd 蝕刻方法及裝置
KR101854609B1 (ko) 2011-12-27 2018-05-08 삼성전자주식회사 게이트 절연층의 형성 방법
US20130320453A1 (en) * 2012-06-01 2013-12-05 Abhijit Jayant Pethe Area scaling on trigate transistors
JP2014209515A (ja) * 2013-04-16 2014-11-06 東京エレクトロン株式会社 エッチング方法
JP6125467B2 (ja) * 2014-06-16 2017-05-10 富士フイルム株式会社 プリント注文受付機とその作動方法および作動プログラム

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JP2002033381A (ja) * 2000-07-19 2002-01-31 Mitsubishi Electric Corp 素子分離絶縁膜の形成方法及び、半導体装置の製造方法
WO2002058130A1 (en) * 2001-01-22 2002-07-25 Tokyo Electron Limited Method for producing material of electronic device
JP2002280369A (ja) * 2001-03-19 2002-09-27 Canon Sales Co Inc シリコン基板の酸化膜形成装置及び酸化膜形成方法
WO2004023549A1 (ja) * 2002-08-30 2004-03-18 Fujitsu Amd Semiconductor Limited 半導体装置及びその製造方法
JP2005286339A (ja) * 2004-03-29 2005-10-13 Sharp Corp シリコンカーバイド基板上に二酸化シリコンを生成する高密度プラズマプロセス
JP2005294551A (ja) * 2004-03-31 2005-10-20 Toshiba Corp シリコン系被処理物の酸化処理方法、酸化処理装置および半導体装置の製造方法
WO2006073568A2 (en) * 2004-11-16 2006-07-13 Applied Materials, Inc. MULTI-LAYER HIGH QUALITY GATE DIELECTRIC FOR LOW-TEMPERATURE POLY-SILICON TFTs

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JPH0519296A (ja) * 1991-07-12 1993-01-29 Matsushita Electric Ind Co Ltd 絶縁膜の形成方法及び絶縁膜形成装置
JPH11219950A (ja) * 1998-02-03 1999-08-10 Hitachi Ltd 半導体集積回路の製造方法並びにその製造装置
JP3505493B2 (ja) * 1999-09-16 2004-03-08 松下電器産業株式会社 半導体装置の製造方法
JP2004047950A (ja) * 2002-04-03 2004-02-12 Hitachi Kokusai Electric Inc 半導体装置の製造方法および半導体製造装置
JP4694108B2 (ja) * 2003-05-23 2011-06-08 東京エレクトロン株式会社 酸化膜形成方法、酸化膜形成装置および電子デバイス材料
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Patent Citations (7)

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Publication number Priority date Publication date Assignee Title
JP2002033381A (ja) * 2000-07-19 2002-01-31 Mitsubishi Electric Corp 素子分離絶縁膜の形成方法及び、半導体装置の製造方法
WO2002058130A1 (en) * 2001-01-22 2002-07-25 Tokyo Electron Limited Method for producing material of electronic device
JP2002280369A (ja) * 2001-03-19 2002-09-27 Canon Sales Co Inc シリコン基板の酸化膜形成装置及び酸化膜形成方法
WO2004023549A1 (ja) * 2002-08-30 2004-03-18 Fujitsu Amd Semiconductor Limited 半導体装置及びその製造方法
JP2005286339A (ja) * 2004-03-29 2005-10-13 Sharp Corp シリコンカーバイド基板上に二酸化シリコンを生成する高密度プラズマプロセス
JP2005294551A (ja) * 2004-03-31 2005-10-20 Toshiba Corp シリコン系被処理物の酸化処理方法、酸化処理装置および半導体装置の製造方法
WO2006073568A2 (en) * 2004-11-16 2006-07-13 Applied Materials, Inc. MULTI-LAYER HIGH QUALITY GATE DIELECTRIC FOR LOW-TEMPERATURE POLY-SILICON TFTs

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009239157A (ja) * 2008-03-28 2009-10-15 Toshiba Corp 半導体装置の製造方法
US7858467B2 (en) 2008-03-28 2010-12-28 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device
US8097503B2 (en) 2008-03-28 2012-01-17 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device
US8404537B2 (en) 2008-03-28 2013-03-26 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device
WO2011040455A1 (ja) * 2009-09-30 2011-04-07 東京エレクトロン株式会社 選択的プラズマ窒化処理方法及びプラズマ窒化処理装置
JP2011077321A (ja) * 2009-09-30 2011-04-14 Tokyo Electron Ltd 選択的プラズマ窒化処理方法及びプラズマ窒化処理装置
US20120184111A1 (en) * 2009-09-30 2012-07-19 Tokyo Electron Limited Selective plasma nitriding method and plasma nitriding apparatus
JP2012216667A (ja) * 2011-03-31 2012-11-08 Tokyo Electron Ltd プラズマ処理方法
WO2018179038A1 (ja) * 2017-03-27 2018-10-04 株式会社Ｋｏｋｕｓａｉ Ｅｌｅｃｔｒｉｃ 半導体装置の製造方法、プログラム及び基板処理装置
JPWO2018179038A1 (ja) * 2017-03-27 2019-11-07 株式会社Ｋｏｋｕｓａｉ Ｅｌｅｃｔｒｉｃ 半導体装置の製造方法、プログラム及び基板処理装置
US10796900B2 (en) 2017-03-27 2020-10-06 Kokusai Electric Corporation Method of manufacturing semiconductor device
JP2025009917A (ja) * 2023-07-06 2025-01-20 ベイジン イータウン セミコンダクター テクノロジー カンパニー リミテッド 半導体ワークピースのための低圧酸化処理方法及び装置

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US20110017586A1 (en) 2011-01-27
KR101249611B1 (ko) 2013-04-01
WO2009093760A1 (ja) 2009-07-30
TW200941579A (en) 2009-10-01
KR20100119547A (ko) 2010-11-09

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