KR101249611B1 - 실리콘 산화막의 형성 방법, 기억 매체, 및 플라즈마 처리 장치 - Google Patents

실리콘 산화막의 형성 방법, 기억 매체, 및 플라즈마 처리 장치 Download PDF

Info

Publication number
KR101249611B1
KR101249611B1 KR1020107017810A KR20107017810A KR101249611B1 KR 101249611 B1 KR101249611 B1 KR 101249611B1 KR 1020107017810 A KR1020107017810 A KR 1020107017810A KR 20107017810 A KR20107017810 A KR 20107017810A KR 101249611 B1 KR101249611 B1 KR 101249611B1
Authority
KR
South Korea
Prior art keywords
silicon oxide
oxide film
film thickness
less
plasma
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
KR1020107017810A
Other languages
English (en)
Korean (ko)
Other versions
KR20100119547A (ko
Inventor
히데오 나카무라
요시로 가베
준이치 기타가와
Original Assignee
도쿄엘렉트론가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 도쿄엘렉트론가부시키가이샤 filed Critical 도쿄엘렉트론가부시키가이샤
Publication of KR20100119547A publication Critical patent/KR20100119547A/ko
Application granted granted Critical
Publication of KR101249611B1 publication Critical patent/KR101249611B1/ko
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32192—Microwave generated discharge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32192—Microwave generated discharge
    • H01J37/32211—Means for coupling power to the plasma
    • H01J37/3222—Antennas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28211—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/32105—Oxidation of silicon-containing layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • H01L21/76235—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls trench shape altered by a local oxidation of silicon process step, e.g. trench corner rounding by LOCOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0147—Manufacturing their gate sidewall spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Analytical Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Formation Of Insulating Films (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Plasma Technology (AREA)
  • Drying Of Semiconductors (AREA)
KR1020107017810A 2008-01-24 2009-01-23 실리콘 산화막의 형성 방법, 기억 매체, 및 플라즈마 처리 장치 Active KR101249611B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2008013564 2008-01-24
JPJP-P-2008-013564 2008-01-24
PCT/JP2009/051517 WO2009093760A1 (ja) 2008-01-24 2009-01-23 シリコン酸化膜の形成方法、記憶媒体、および、プラズマ処理装置

Publications (2)

Publication Number Publication Date
KR20100119547A KR20100119547A (ko) 2010-11-09
KR101249611B1 true KR101249611B1 (ko) 2013-04-01

Family

ID=40901251

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020107017810A Active KR101249611B1 (ko) 2008-01-24 2009-01-23 실리콘 산화막의 형성 방법, 기억 매체, 및 플라즈마 처리 장치

Country Status (5)

Country Link
US (1) US20110017586A1 (enExample)
JP (1) JP2009200483A (enExample)
KR (1) KR101249611B1 (enExample)
TW (1) TW200941579A (enExample)
WO (1) WO2009093760A1 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4845917B2 (ja) 2008-03-28 2011-12-28 株式会社東芝 半導体装置の製造方法
JP2011097029A (ja) * 2009-09-30 2011-05-12 Tokyo Electron Ltd 半導体装置の製造方法
JP2011077321A (ja) * 2009-09-30 2011-04-14 Tokyo Electron Ltd 選択的プラズマ窒化処理方法及びプラズマ窒化処理装置
JP2012216667A (ja) * 2011-03-31 2012-11-08 Tokyo Electron Ltd プラズマ処理方法
US8642479B2 (en) * 2011-07-14 2014-02-04 Nanya Technology Corporation Method for forming openings in semiconductor device
TWI476832B (zh) * 2011-09-28 2015-03-11 Tokyo Electron Ltd 蝕刻方法及裝置
KR101854609B1 (ko) 2011-12-27 2018-05-08 삼성전자주식회사 게이트 절연층의 형성 방법
US20130320453A1 (en) * 2012-06-01 2013-12-05 Abhijit Jayant Pethe Area scaling on trigate transistors
JP2014209515A (ja) * 2013-04-16 2014-11-06 東京エレクトロン株式会社 エッチング方法
JP6125467B2 (ja) * 2014-06-16 2017-05-10 富士フイルム株式会社 プリント注文受付機とその作動方法および作動プログラム
WO2018179038A1 (ja) * 2017-03-27 2018-10-04 株式会社Ｋｏｋｕｓａｉ Ｅｌｅｃｔｒｉｃ 半導体装置の製造方法、プログラム及び基板処理装置
CN116844939B (zh) * 2023-07-06 2024-08-13 北京屹唐半导体科技股份有限公司 用于半导体工件的低压氧化处理方法和装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0519296A (ja) * 1991-07-12 1993-01-29 Matsushita Electric Ind Co Ltd 絶縁膜の形成方法及び絶縁膜形成装置
JP2002280369A (ja) * 2001-03-19 2002-09-27 Canon Sales Co Inc シリコン基板の酸化膜形成装置及び酸化膜形成方法
JP2006286662A (ja) * 2005-03-31 2006-10-19 Toshiba Corp シリコン系被処理物の酸化処理方法、酸化処理装置および半導体装置の製造方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11219950A (ja) * 1998-02-03 1999-08-10 Hitachi Ltd 半導体集積回路の製造方法並びにその製造装置
JP3505493B2 (ja) * 1999-09-16 2004-03-08 松下電器産業株式会社 半導体装置の製造方法
JP2002033381A (ja) * 2000-07-19 2002-01-31 Mitsubishi Electric Corp 素子分離絶縁膜の形成方法及び、半導体装置の製造方法
JP3916565B2 (ja) * 2001-01-22 2007-05-16 東京エレクトロン株式会社 電子デバイス材料の製造方法
JP2004047950A (ja) * 2002-04-03 2004-02-12 Hitachi Kokusai Electric Inc 半導体装置の製造方法および半導体製造装置
AU2003246154A1 (en) * 2002-08-30 2004-03-29 Fujitsu Amd Semiconductor Limited Semiconductor device and its manufacturing method
JP4694108B2 (ja) * 2003-05-23 2011-06-08 東京エレクトロン株式会社 酸化膜形成方法、酸化膜形成装置および電子デバイス材料
JP2005286339A (ja) * 2004-03-29 2005-10-13 Sharp Corp シリコンカーバイド基板上に二酸化シリコンを生成する高密度プラズマプロセス
JP4643168B2 (ja) * 2004-03-31 2011-03-02 株式会社東芝 シリコン基板の酸化処理方法
US20060105114A1 (en) * 2004-11-16 2006-05-18 White John M Multi-layer high quality gate dielectric for low-temperature poly-silicon TFTs

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0519296A (ja) * 1991-07-12 1993-01-29 Matsushita Electric Ind Co Ltd 絶縁膜の形成方法及び絶縁膜形成装置
JP2002280369A (ja) * 2001-03-19 2002-09-27 Canon Sales Co Inc シリコン基板の酸化膜形成装置及び酸化膜形成方法
JP2006286662A (ja) * 2005-03-31 2006-10-19 Toshiba Corp シリコン系被処理物の酸化処理方法、酸化処理装置および半導体装置の製造方法

Also Published As

Publication number Publication date
US20110017586A1 (en) 2011-01-27
WO2009093760A1 (ja) 2009-07-30
TW200941579A (en) 2009-10-01
JP2009200483A (ja) 2009-09-03
KR20100119547A (ko) 2010-11-09

Similar Documents

Publication Publication Date Title
KR101249611B1 (ko) 실리콘 산화막의 형성 방법, 기억 매체, 및 플라즈마 처리 장치
TWI487027B (zh) Plasma oxidation treatment method
TWI492297B (zh) 電漿蝕刻方法、半導體裝置之製造方法、及電漿蝕刻裝置
TWI433237B (zh) A plasma oxidation treatment method and a plasma processing apparatus
JP5073482B2 (ja) シリコン酸化膜の製造方法、その制御プログラム、記憶媒体及びプラズマ処理装置
KR101380094B1 (ko) 반도체 장치의 제조 방법
KR101102690B1 (ko) 실리콘 산화막의 형성 방법, 플라즈마 처리 장치 및 기억 매체
JP4906659B2 (ja) シリコン酸化膜の形成方法
JP5231232B2 (ja) プラズマ酸化処理方法、プラズマ処理装置、及び、記憶媒体
KR101063102B1 (ko) 실리콘 산화막의 형성 방법 및 형성 장치
KR101255905B1 (ko) 실리콘 산화막의 형성 방법 및 장치

Legal Events

Date Code Title Description
PA0105 International application

Patent event date: 20100811

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
A201 Request for examination
PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 20110307

Comment text: Request for Examination of Application

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 20120612

Patent event code: PE09021S01D

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

Patent event code: PE07011S01D

Comment text: Decision to Grant Registration

Patent event date: 20121226

GRNT Written decision to grant
PR0701 Registration of establishment

Comment text: Registration of Establishment

Patent event date: 20130326

Patent event code: PR07011E01D

PR1002 Payment of registration fee

Payment date: 20130326

End annual number: 3

Start annual number: 1

PG1601 Publication of registration
FPAY Annual fee payment

Payment date: 20160304

Year of fee payment: 4

PR1001 Payment of annual fee

Payment date: 20160304

Start annual number: 4

End annual number: 4

FPAY Annual fee payment

Payment date: 20170221

Year of fee payment: 5

PR1001 Payment of annual fee

Payment date: 20170221

Start annual number: 5

End annual number: 5

FPAY Annual fee payment

Payment date: 20180316

Year of fee payment: 6

PR1001 Payment of annual fee

Payment date: 20180316

Start annual number: 6

End annual number: 6

FPAY Annual fee payment

Payment date: 20190318

Year of fee payment: 7

PR1001 Payment of annual fee

Payment date: 20190318

Start annual number: 7

End annual number: 7

PR1001 Payment of annual fee

Payment date: 20200318

Start annual number: 8

End annual number: 8

PR1001 Payment of annual fee

Payment date: 20210325

Start annual number: 9

End annual number: 9

PR1001 Payment of annual fee

Payment date: 20220216

Start annual number: 10

End annual number: 10

PR1001 Payment of annual fee

Payment date: 20230220

Start annual number: 11

End annual number: 11

PR1001 Payment of annual fee

Payment date: 20240305

Start annual number: 12

End annual number: 12

PR1001 Payment of annual fee

Payment date: 20250217

Start annual number: 13

End annual number: 13