WO2009078145A1 - 制御装置 - Google Patents
制御装置 Download PDFInfo
- Publication number
- WO2009078145A1 WO2009078145A1 PCT/JP2008/003697 JP2008003697W WO2009078145A1 WO 2009078145 A1 WO2009078145 A1 WO 2009078145A1 JP 2008003697 W JP2008003697 W JP 2008003697W WO 2009078145 A1 WO2009078145 A1 WO 2009078145A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- memory
- power
- status
- performs
- control device
- Prior art date
Links
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1415—Saving, restoring, recovering or retrying at system level
- G06F11/1417—Boot up procedures
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2284—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by power-on test, e.g. power-on self test [POST]
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
- G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/76—Masking faults in memories by using spares or by reconfiguring using address translation or modifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C2029/0407—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals on power on
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C2029/0411—Online error correction
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Abstract
ECCメモリの永久故障の存在を知ることができ、永久故障が累積して予兆ないまま修正不可能となることを避けることができる制御装置を提供する。メモリ診断手段(11)は、電源投入のときに電源投入ステータスをセットしてECCメモリ(12)を診断し、再起動手段(13)は、メモリ診断手段(11)が電源投入ステータス中にECCメモリ(12)の修正可能エラーを検出したときは再起動を掛ける。動作処理手段(14)は、メモリ診断手段11がECCメモリ(12)の修正可能エラーを検出しないときは電源投入ステータスをリセットして通常動作を行うとともに、ECCメモリ(12)の修正可能エラーを検出したが電源投入ステータス中でないときは通常動作を行う。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009546135A JP5269810B2 (ja) | 2007-12-14 | 2008-12-10 | 制御装置 |
US12/814,159 US8145951B2 (en) | 2007-12-14 | 2010-06-11 | Control device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007-322839 | 2007-12-14 | ||
JP2007322839 | 2007-12-14 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/814,159 Continuation-In-Part US8145951B2 (en) | 2007-12-14 | 2010-06-11 | Control device |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2009078145A1 true WO2009078145A1 (ja) | 2009-06-25 |
Family
ID=40795268
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2008/003697 WO2009078145A1 (ja) | 2007-12-14 | 2008-12-10 | 制御装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US8145951B2 (ja) |
JP (2) | JP5269810B2 (ja) |
WO (1) | WO2009078145A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014035729A (ja) * | 2012-08-10 | 2014-02-24 | Hitachi Automotive Systems Ltd | 車両用制御装置 |
WO2014091666A1 (ja) * | 2012-12-12 | 2014-06-19 | 株式会社デンソー | 車載電子制御装置 |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10191802B2 (en) * | 2015-09-04 | 2019-01-29 | Oracle International Corporation | Extract-transform-load diagnostics |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5823397A (ja) * | 1981-07-31 | 1983-02-12 | Nec Corp | 記憶装置 |
JPH06175934A (ja) * | 1992-12-01 | 1994-06-24 | Oki Electric Ind Co Ltd | 1ビットエラー処理方式 |
JP2000132462A (ja) * | 1998-10-27 | 2000-05-12 | Hitachi Ltd | プログラム自己修復方式 |
WO2007010829A1 (ja) * | 2005-07-15 | 2007-01-25 | Matsushita Electric Industrial Co., Ltd. | 不揮発性記憶装置、メモリコントローラ及び不良領域検出方法 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57176599A (en) * | 1981-04-21 | 1982-10-29 | Nec Corp | Error report circuit |
JPS61125651A (ja) * | 1984-11-21 | 1986-06-13 | Fujitsu Ltd | エラ−報告処理方式 |
JPH0814807B2 (ja) * | 1985-11-21 | 1996-02-14 | 日本電気株式会社 | 記憶システム |
JPS6448153A (en) * | 1987-08-19 | 1989-02-22 | Yokogawa Electric Corp | Memory controller |
JPS6465650A (en) * | 1987-09-04 | 1989-03-10 | Hitachi Ltd | Error detecting device for storage device |
JPH0325798A (ja) * | 1989-06-23 | 1991-02-04 | Ricoh Co Ltd | Eepromを使用した記憶装置 |
US5077737A (en) * | 1989-08-18 | 1991-12-31 | Micron Technology, Inc. | Method and apparatus for storing digital data in off-specification dynamic random access memory devices |
JPH04115338A (ja) * | 1990-09-06 | 1992-04-16 | Fujitsu Ltd | 交替メモリ方式 |
JPH0571950U (ja) * | 1992-02-27 | 1993-09-28 | 横河電機株式会社 | 定周期メモリ検査装置 |
JPH0652065A (ja) | 1992-08-03 | 1994-02-25 | Fujitsu Ltd | メモリ制御回路 |
JPH06175394A (ja) * | 1992-12-09 | 1994-06-24 | Konica Corp | カラートナー |
JPH08314811A (ja) * | 1995-05-22 | 1996-11-29 | Mitsubishi Electric Corp | メモリインタフェース装置 |
JPH10133899A (ja) | 1996-10-31 | 1998-05-22 | Fanuc Ltd | 訂正不可能なエラーの予測方法および予測装置 |
US6038680A (en) * | 1996-12-11 | 2000-03-14 | Compaq Computer Corporation | Failover memory for a computer system |
US8032816B2 (en) * | 2007-06-01 | 2011-10-04 | International Business Machines Corporation | Apparatus and method for distinguishing temporary and permanent errors in memory modules |
US7971124B2 (en) * | 2007-06-01 | 2011-06-28 | International Business Machines Corporation | Apparatus and method for distinguishing single bit errors in memory modules |
EP2377125B1 (en) * | 2009-01-14 | 2018-03-07 | Marvell World Trade Ltd. | Method and apparatus for determining a location of a defect on a storage medium |
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2008
- 2008-12-10 JP JP2009546135A patent/JP5269810B2/ja active Active
- 2008-12-10 WO PCT/JP2008/003697 patent/WO2009078145A1/ja active Application Filing
-
2010
- 2010-06-11 US US12/814,159 patent/US8145951B2/en active Active
-
2013
- 2013-03-25 JP JP2013062374A patent/JP2013127820A/ja active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5823397A (ja) * | 1981-07-31 | 1983-02-12 | Nec Corp | 記憶装置 |
JPH06175934A (ja) * | 1992-12-01 | 1994-06-24 | Oki Electric Ind Co Ltd | 1ビットエラー処理方式 |
JP2000132462A (ja) * | 1998-10-27 | 2000-05-12 | Hitachi Ltd | プログラム自己修復方式 |
WO2007010829A1 (ja) * | 2005-07-15 | 2007-01-25 | Matsushita Electric Industrial Co., Ltd. | 不揮発性記憶装置、メモリコントローラ及び不良領域検出方法 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014035729A (ja) * | 2012-08-10 | 2014-02-24 | Hitachi Automotive Systems Ltd | 車両用制御装置 |
WO2014091666A1 (ja) * | 2012-12-12 | 2014-06-19 | 株式会社デンソー | 車載電子制御装置 |
JP2014115950A (ja) * | 2012-12-12 | 2014-06-26 | Denso Corp | 車載電子制御装置 |
US9778970B2 (en) | 2012-12-12 | 2017-10-03 | Denso Corporation | Memory check, abnormality threshold count, and reset in an onboard electronic control unit |
Also Published As
Publication number | Publication date |
---|---|
US8145951B2 (en) | 2012-03-27 |
US20100251019A1 (en) | 2010-09-30 |
JP5269810B2 (ja) | 2013-08-21 |
JP2013127820A (ja) | 2013-06-27 |
JPWO2009078145A1 (ja) | 2011-04-28 |
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