WO2009060913A1 - エピタキシャルウェーハの製造方法 - Google Patents

エピタキシャルウェーハの製造方法 Download PDF

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Publication number
WO2009060913A1
WO2009060913A1 PCT/JP2008/070236 JP2008070236W WO2009060913A1 WO 2009060913 A1 WO2009060913 A1 WO 2009060913A1 JP 2008070236 W JP2008070236 W JP 2008070236W WO 2009060913 A1 WO2009060913 A1 WO 2009060913A1
Authority
WO
WIPO (PCT)
Prior art keywords
epitaxial wafer
scratches
wafer
manufacturing epitaxial
boundary region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2008/070236
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
Kazushige Takaishi
Tomonori Miura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumco Corp
Original Assignee
Sumco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumco Corp filed Critical Sumco Corp
Priority to JP2009540086A priority Critical patent/JP5493863B2/ja
Priority to US12/740,441 priority patent/US7998867B2/en
Publication of WO2009060913A1 publication Critical patent/WO2009060913A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/4401Means for minimising impurities, e.g. dust, moisture or residual gas, in the reaction chamber
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/12Substrate holders or susceptors
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68757Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a coating or a hardness or a material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Mechanical Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Chemical Vapour Deposition (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Weting (AREA)
PCT/JP2008/070236 2007-11-08 2008-11-06 エピタキシャルウェーハの製造方法 Ceased WO2009060913A1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009540086A JP5493863B2 (ja) 2007-11-08 2008-11-06 エピタキシャルウェーハの製造方法
US12/740,441 US7998867B2 (en) 2007-11-08 2008-11-06 Method for manufacturing epitaxial wafer

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-291339 2007-11-08
JP2007291339 2007-11-08

Publications (1)

Publication Number Publication Date
WO2009060913A1 true WO2009060913A1 (ja) 2009-05-14

Family

ID=40625800

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/070236 Ceased WO2009060913A1 (ja) 2007-11-08 2008-11-06 エピタキシャルウェーハの製造方法

Country Status (4)

Country Link
US (1) US7998867B2 (enExample)
JP (1) JP5493863B2 (enExample)
TW (1) TW200933707A (enExample)
WO (1) WO2009060913A1 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018137266A (ja) * 2017-02-20 2018-08-30 Sppテクノロジーズ株式会社 プラズマ加工方法及びこの方法を用いて製造された基板
DE112010003306B4 (de) 2009-08-19 2019-12-24 Sumco Corp. Verfahren zur Herstellung eines epitaktischen Siliziumwafers

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011082443A (ja) * 2009-10-09 2011-04-21 Sumco Corp エピタキシャルウェーハおよびその製造方法
JP6035982B2 (ja) * 2012-08-09 2016-11-30 株式会社Sumco エピタキシャルシリコンウェーハの製造方法およびエピタキシャルシリコンウェーハ
TWI574355B (zh) * 2012-08-13 2017-03-11 矽品精密工業股份有限公司 半導體封裝件及其製法
US10361097B2 (en) 2012-12-31 2019-07-23 Globalwafers Co., Ltd. Apparatus for stressing semiconductor substrates
JP7276242B2 (ja) * 2020-05-11 2023-05-18 信越半導体株式会社 シリコンウェーハのエッチング方法及びエッチング装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002134521A (ja) * 2000-10-30 2002-05-10 Sumitomo Metal Ind Ltd シリコン半導体基板の熱処理方法
JP2004071836A (ja) * 2002-08-06 2004-03-04 Sumitomo Mitsubishi Silicon Corp 半導体基板の製造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4925809A (en) * 1987-05-23 1990-05-15 Osaka Titanium Co., Ltd. Semiconductor wafer and epitaxial growth on the semiconductor wafer with autodoping control and manufacturing method therefor
JPH0810685B2 (ja) * 1990-05-11 1996-01-31 富士通株式会社 基板のウェット処理装置
JP2827885B2 (ja) * 1994-02-12 1998-11-25 信越半導体株式会社 半導体単結晶基板およびその製造方法
JP3175619B2 (ja) * 1997-03-07 2001-06-11 日本電気株式会社 半導体基板の製造方法
JP3368799B2 (ja) * 1997-05-22 2003-01-20 住友電気工業株式会社 Iii−v族化合物半導体ウェハおよびその製造方法
JP2003229370A (ja) 2001-11-30 2003-08-15 Shin Etsu Handotai Co Ltd サセプタ、気相成長装置、エピタキシャルウェーハの製造方法およびエピタキシャルウェーハ
JP2007204286A (ja) * 2006-01-31 2007-08-16 Sumco Corp エピタキシャルウェーハの製造方法
US7816765B2 (en) 2008-06-05 2010-10-19 Sumco Corporation Silicon epitaxial wafer and the production method thereof
JP5487565B2 (ja) 2008-06-19 2014-05-07 株式会社Sumco エピタキシャルウェーハおよびその製造方法
JP2010016312A (ja) 2008-07-07 2010-01-21 Sumco Corp エピタキシャルウェーハの製造方法
JP2010141272A (ja) 2008-12-15 2010-06-24 Sumco Corp エピタキシャルウェーハとその製造方法
JP5141541B2 (ja) 2008-12-24 2013-02-13 株式会社Sumco エピタキシャルウェーハの製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002134521A (ja) * 2000-10-30 2002-05-10 Sumitomo Metal Ind Ltd シリコン半導体基板の熱処理方法
JP2004071836A (ja) * 2002-08-06 2004-03-04 Sumitomo Mitsubishi Silicon Corp 半導体基板の製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE112010003306B4 (de) 2009-08-19 2019-12-24 Sumco Corp. Verfahren zur Herstellung eines epitaktischen Siliziumwafers
JP2018137266A (ja) * 2017-02-20 2018-08-30 Sppテクノロジーズ株式会社 プラズマ加工方法及びこの方法を用いて製造された基板

Also Published As

Publication number Publication date
US20100261341A1 (en) 2010-10-14
TWI368938B (enExample) 2012-07-21
JPWO2009060913A1 (ja) 2011-03-24
JP5493863B2 (ja) 2014-05-14
US7998867B2 (en) 2011-08-16
TW200933707A (en) 2009-08-01

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