JP5493863B2 - エピタキシャルウェーハの製造方法 - Google Patents

エピタキシャルウェーハの製造方法 Download PDF

Info

Publication number
JP5493863B2
JP5493863B2 JP2009540086A JP2009540086A JP5493863B2 JP 5493863 B2 JP5493863 B2 JP 5493863B2 JP 2009540086 A JP2009540086 A JP 2009540086A JP 2009540086 A JP2009540086 A JP 2009540086A JP 5493863 B2 JP5493863 B2 JP 5493863B2
Authority
JP
Japan
Prior art keywords
wafer
epitaxial
scratch
back surface
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2009540086A
Other languages
English (en)
Japanese (ja)
Other versions
JPWO2009060913A1 (ja
Inventor
和成 高石
友紀 三浦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumco Corp
Original Assignee
Sumco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumco Corp filed Critical Sumco Corp
Priority to JP2009540086A priority Critical patent/JP5493863B2/ja
Publication of JPWO2009060913A1 publication Critical patent/JPWO2009060913A1/ja
Application granted granted Critical
Publication of JP5493863B2 publication Critical patent/JP5493863B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/4401Means for minimising impurities, e.g. dust, moisture or residual gas, in the reaction chamber
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/12Substrate holders or susceptors
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68757Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a coating or a hardness or a material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Mechanical Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Chemical Vapour Deposition (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Weting (AREA)
JP2009540086A 2007-11-08 2008-11-06 エピタキシャルウェーハの製造方法 Active JP5493863B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009540086A JP5493863B2 (ja) 2007-11-08 2008-11-06 エピタキシャルウェーハの製造方法

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2007291339 2007-11-08
JP2007291339 2007-11-08
PCT/JP2008/070236 WO2009060913A1 (ja) 2007-11-08 2008-11-06 エピタキシャルウェーハの製造方法
JP2009540086A JP5493863B2 (ja) 2007-11-08 2008-11-06 エピタキシャルウェーハの製造方法

Publications (2)

Publication Number Publication Date
JPWO2009060913A1 JPWO2009060913A1 (ja) 2011-03-24
JP5493863B2 true JP5493863B2 (ja) 2014-05-14

Family

ID=40625800

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009540086A Active JP5493863B2 (ja) 2007-11-08 2008-11-06 エピタキシャルウェーハの製造方法

Country Status (4)

Country Link
US (1) US7998867B2 (enExample)
JP (1) JP5493863B2 (enExample)
TW (1) TW200933707A (enExample)
WO (1) WO2009060913A1 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5795461B2 (ja) * 2009-08-19 2015-10-14 株式会社Sumco エピタキシャルシリコンウェーハの製造方法
JP2011082443A (ja) * 2009-10-09 2011-04-21 Sumco Corp エピタキシャルウェーハおよびその製造方法
JP6035982B2 (ja) * 2012-08-09 2016-11-30 株式会社Sumco エピタキシャルシリコンウェーハの製造方法およびエピタキシャルシリコンウェーハ
TWI574355B (zh) * 2012-08-13 2017-03-11 矽品精密工業股份有限公司 半導體封裝件及其製法
US9583363B2 (en) * 2012-12-31 2017-02-28 Sunedison Semiconductor Limited (Uen201334164H) Processes and apparatus for preparing heterostructures with reduced strain by radial distension
JP6387131B2 (ja) * 2017-02-20 2018-09-05 Sppテクノロジーズ株式会社 プラズマ加工方法及びこの方法を用いて製造された基板
JP7276242B2 (ja) * 2020-05-11 2023-05-18 信越半導体株式会社 シリコンウェーハのエッチング方法及びエッチング装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0417334A (ja) * 1990-05-11 1992-01-22 Fujitsu Ltd 基板のウェット処理装置
JPH10256200A (ja) * 1997-03-07 1998-09-25 Nec Corp 半導体基板およびその製造方法
JP2002134521A (ja) * 2000-10-30 2002-05-10 Sumitomo Metal Ind Ltd シリコン半導体基板の熱処理方法
JP2004071836A (ja) * 2002-08-06 2004-03-04 Sumitomo Mitsubishi Silicon Corp 半導体基板の製造方法
JP2007204286A (ja) * 2006-01-31 2007-08-16 Sumco Corp エピタキシャルウェーハの製造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4925809A (en) * 1987-05-23 1990-05-15 Osaka Titanium Co., Ltd. Semiconductor wafer and epitaxial growth on the semiconductor wafer with autodoping control and manufacturing method therefor
JP2827885B2 (ja) * 1994-02-12 1998-11-25 信越半導体株式会社 半導体単結晶基板およびその製造方法
JP3368799B2 (ja) * 1997-05-22 2003-01-20 住友電気工業株式会社 Iii−v族化合物半導体ウェハおよびその製造方法
JP2003229370A (ja) 2001-11-30 2003-08-15 Shin Etsu Handotai Co Ltd サセプタ、気相成長装置、エピタキシャルウェーハの製造方法およびエピタキシャルウェーハ
US7816765B2 (en) * 2008-06-05 2010-10-19 Sumco Corporation Silicon epitaxial wafer and the production method thereof
JP5487565B2 (ja) * 2008-06-19 2014-05-07 株式会社Sumco エピタキシャルウェーハおよびその製造方法
JP2010016312A (ja) * 2008-07-07 2010-01-21 Sumco Corp エピタキシャルウェーハの製造方法
JP2010141272A (ja) * 2008-12-15 2010-06-24 Sumco Corp エピタキシャルウェーハとその製造方法
JP5141541B2 (ja) * 2008-12-24 2013-02-13 株式会社Sumco エピタキシャルウェーハの製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0417334A (ja) * 1990-05-11 1992-01-22 Fujitsu Ltd 基板のウェット処理装置
JPH10256200A (ja) * 1997-03-07 1998-09-25 Nec Corp 半導体基板およびその製造方法
JP2002134521A (ja) * 2000-10-30 2002-05-10 Sumitomo Metal Ind Ltd シリコン半導体基板の熱処理方法
JP2004071836A (ja) * 2002-08-06 2004-03-04 Sumitomo Mitsubishi Silicon Corp 半導体基板の製造方法
JP2007204286A (ja) * 2006-01-31 2007-08-16 Sumco Corp エピタキシャルウェーハの製造方法

Also Published As

Publication number Publication date
TW200933707A (en) 2009-08-01
JPWO2009060913A1 (ja) 2011-03-24
US20100261341A1 (en) 2010-10-14
TWI368938B (enExample) 2012-07-21
US7998867B2 (en) 2011-08-16
WO2009060913A1 (ja) 2009-05-14

Similar Documents

Publication Publication Date Title
JP5493863B2 (ja) エピタキシャルウェーハの製造方法
CN107851560B (zh) 基座、外延生长装置、及外延晶圆
JP5141541B2 (ja) エピタキシャルウェーハの製造方法
JP2011522393A (ja) サポートボスを有するサセプタ
JP4839836B2 (ja) シリコンエピタキシャルウェーハの製造方法
JP2011091387A (ja) エピタキシャルシリコンウェーハの製造方法
JPWO2009081720A1 (ja) エピタキシャルシリコンウェーハの製造方法
JP5795461B2 (ja) エピタキシャルシリコンウェーハの製造方法
JP2007204286A (ja) エピタキシャルウェーハの製造方法
JP5347288B2 (ja) シリコンエピタキシャルウェーハの製造方法
JP6459801B2 (ja) エピタキシャルシリコンウェーハの製造方法
TW201725697A (zh) 外延晶片的製造方法
JP5195370B2 (ja) エピタキシャルウェーハの製造方法
JP2023108951A (ja) シリコンエピタキシャルウェーハの製造方法
US20140030874A1 (en) Method for manufacturing silicon carbide substrate
JP2009302163A (ja) シリコンウェーハ及びそれを用いたエピタキシャルシリコンウェーハ及び貼り合わせsoiウェーハ並びにそれらの製造方法。
JPWO2009060914A1 (ja) エピタキシャルウェーハ
JP4675749B2 (ja) エピタキシャルウエーハの製造方法
JP2008294217A (ja) 気相成長装置及び気相成長方法
JP2002231634A (ja) シリコンエピタキシャルウェーハ及びシリコンエピタキシャルウェーハの製造方法
JP2010040935A (ja) エピタキシャルシリコンウェーハおよびその製造方法
JP2013191889A (ja) シリコンエピタキシャルウェーハ
TWI906589B (zh) 用於矽片的磊晶生長方法
KR100919932B1 (ko) 실리콘 에피택셜 단결정 기판의 제조방법 및 에칭장치
JP2011091143A (ja) シリコンエピタキシャルウェーハの製造方法

Legal Events

Date Code Title Description
A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20120724

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120924

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20130614

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130909

A911 Transfer to examiner for re-examination before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A911

Effective date: 20130925

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20131108

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140106

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20140204

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20140217

R150 Certificate of patent or registration of utility model

Ref document number: 5493863

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250