WO2009050843A1 - 電子デバイス - Google Patents

電子デバイス Download PDF

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Publication number
WO2009050843A1
WO2009050843A1 PCT/JP2008/002404 JP2008002404W WO2009050843A1 WO 2009050843 A1 WO2009050843 A1 WO 2009050843A1 JP 2008002404 W JP2008002404 W JP 2008002404W WO 2009050843 A1 WO2009050843 A1 WO 2009050843A1
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WO
WIPO (PCT)
Prior art keywords
void
electronic part
grounding
tip end
signal electrode
Prior art date
Application number
PCT/JP2008/002404
Other languages
English (en)
French (fr)
Inventor
Shoichi Mizuno
Hiroaki Takeuchi
Shuji Nojima
Original Assignee
Advantest Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corporation filed Critical Advantest Corporation
Priority to JP2009537890A priority Critical patent/JPWO2009050843A1/ja
Publication of WO2009050843A1 publication Critical patent/WO2009050843A1/ja

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
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    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Structure Of Printed Boards (AREA)
  • Wire Bonding (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

　電子デバイスであって、表面に空洞部が形成された回路基板と、空洞部内に載置された電子部品と、空洞部の底面に形成され、先端部が電子部品の信号電極と対応する位置に設けられるパターン配線と、パターン配線の先端部、および、電子部品の信号電極を接続する信号用ワイヤと、空洞部の底面において、パターン配線の先端部を挟むように形成される２つの空洞部内接地パターンと、信号電極を挟むように電子部品に設けられた２つの接地電極のそれぞれと、対応する空洞部内接地パターンとを接続する２以上の接地用ワイヤとを備える電子デバイスが提供される。
PCT/JP2008/002404 2007-10-19 2008-09-02 電子デバイス WO2009050843A1 (ja)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101900738B1 (ko) * 2012-08-23 2018-09-20 삼성전자주식회사 칩 온 필름
JP2018207118A (ja) * 2018-08-10 2018-12-27 太陽誘電株式会社 回路モジュール

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009057691A1 (ja) * 2007-10-30 2009-05-07 Kyocera Corporation 接続端子及びこれを用いたパッケージ並びに電子装置
CN102099846A (zh) * 2008-08-22 2011-06-15 夏普株式会社 电子封装件、显示装置以及电子设备
US9398694B2 (en) * 2011-01-18 2016-07-19 Sony Corporation Method of manufacturing a package for embedding one or more electronic components
US9408307B2 (en) * 2012-03-22 2016-08-02 Kyocera Corporation Device housing package
TWI584420B (zh) * 2015-09-16 2017-05-21 旭德科技股份有限公司 封裝載板及其製作方法
KR20220094992A (ko) 2020-12-29 2022-07-06 삼성전자주식회사 반도체 패키지
CN116209134A (zh) * 2021-11-30 2023-06-02 鹏鼎控股(深圳)股份有限公司 电路板总成及其制造方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03211842A (ja) * 1990-01-17 1991-09-17 Fujitsu Ltd Ｉｃチップの実装構造
JPH06303010A (ja) * 1993-04-14 1994-10-28 Sony Corp 高周波伝送線路及び該高周波伝送線路を用いた集積回路装置並びに高周波平面回路の接続方法
JPH0778902A (ja) * 1993-06-18 1995-03-20 Murata Mfg Co Ltd 回路素子の実装構造
JPH0786328A (ja) * 1993-09-16 1995-03-31 Hitachi Ltd 半導体集積回路装置及びその製造方法
JPH08116202A (ja) * 1994-10-17 1996-05-07 Oki Electric Ind Co Ltd 集積回路パッケージ
JPH09120974A (ja) * 1995-08-14 1997-05-06 Samsung Electron Co Ltd 半導体装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1994007349A1 (en) * 1992-09-24 1994-03-31 Hughes Aircraft Company Magnetic vias within multi-layer, 3-dimensional structures/substrates
JP3296356B2 (ja) * 1999-02-08 2002-06-24 松下電器産業株式会社 弾性表面波デバイスとその製造方法
US6221694B1 (en) * 1999-06-29 2001-04-24 International Business Machines Corporation Method of making a circuitized substrate with an aperture
US6888235B2 (en) * 2001-09-26 2005-05-03 Molex Incorporated Power delivery system for integrated circuits utilizing discrete capacitors
JP2004055985A (ja) * 2002-07-23 2004-02-19 Shinko Electric Ind Co Ltd セラミックパッケージ及び電子装置
JP2007088058A (ja) 2005-09-20 2007-04-05 Denso Corp 多層基板、及びその製造方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03211842A (ja) * 1990-01-17 1991-09-17 Fujitsu Ltd Ｉｃチップの実装構造
JPH06303010A (ja) * 1993-04-14 1994-10-28 Sony Corp 高周波伝送線路及び該高周波伝送線路を用いた集積回路装置並びに高周波平面回路の接続方法
JPH0778902A (ja) * 1993-06-18 1995-03-20 Murata Mfg Co Ltd 回路素子の実装構造
JPH0786328A (ja) * 1993-09-16 1995-03-31 Hitachi Ltd 半導体集積回路装置及びその製造方法
JPH08116202A (ja) * 1994-10-17 1996-05-07 Oki Electric Ind Co Ltd 集積回路パッケージ
JPH09120974A (ja) * 1995-08-14 1997-05-06 Samsung Electron Co Ltd 半導体装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101900738B1 (ko) * 2012-08-23 2018-09-20 삼성전자주식회사 칩 온 필름
JP2018207118A (ja) * 2018-08-10 2018-12-27 太陽誘電株式会社 回路モジュール

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