WO2009048097A1 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
WO2009048097A1
WO2009048097A1 PCT/JP2008/068354 JP2008068354W WO2009048097A1 WO 2009048097 A1 WO2009048097 A1 WO 2009048097A1 JP 2008068354 W JP2008068354 W JP 2008068354W WO 2009048097 A1 WO2009048097 A1 WO 2009048097A1
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WO
WIPO (PCT)
Prior art keywords
lyophilic
treated
substrate
treated section
underfill resin
Prior art date
Application number
PCT/JP2008/068354
Other languages
English (en)
French (fr)
Inventor
Toshinobu Ogatsu
Original Assignee
Nec Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corporation filed Critical Nec Corporation
Priority to CN2008801103741A priority Critical patent/CN101821842B/zh
Priority to JP2009537021A priority patent/JP5446867B2/ja
Priority to US12/682,677 priority patent/US8373284B2/en
Publication of WO2009048097A1 publication Critical patent/WO2009048097A1/ja

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    • HELECTRICITY
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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  • Non-Metallic Protective Coatings For Printed Circuits (AREA)

Abstract

 大型でかつ低背化した半導体装置の基板と半導体部品の間にアンダーフィル樹脂を充填する際に均一に浸透充填させる。 基板(10)上に半導体部品(20)が搭載されるとともに基板と半導体部品の間にアンダーフィル樹脂(40)が充填された半導体装置において、基板において、アンダーフィル樹脂と接する領域の一部に、その周囲の領域部分と比較して少なくとも液状のアンダーフィル樹脂と親液性を有するように処理された親液化処理部(30)を有する。親液化処理部は、親液化処理部の周囲の領域部分よりも接触角が小さくなるように処理されている。親液化処理部の周囲の領域部分は、ソルダレジストで被覆されている。親液化処理部では、ソルダレジスト上に、紫外光露光により親液化処理された酸化チタン膜が形成されている。
PCT/JP2008/068354 2007-10-10 2008-10-09 半導体装置 WO2009048097A1 (ja)

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CN2008801103741A CN101821842B (zh) 2007-10-10 2008-10-09 半导体装置
JP2009537021A JP5446867B2 (ja) 2007-10-10 2008-10-09 半導体装置
US12/682,677 US8373284B2 (en) 2007-10-10 2008-10-09 Semiconductor device

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US20100213622A1 (en) 2010-08-26
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CN101821842B (zh) 2013-07-24
JP5446867B2 (ja) 2014-03-19

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