WO2009008066A1 - 配線基板及びその製造方法 - Google Patents

配線基板及びその製造方法 Download PDF

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Publication number
WO2009008066A1
WO2009008066A1 PCT/JP2007/063755 JP2007063755W WO2009008066A1 WO 2009008066 A1 WO2009008066 A1 WO 2009008066A1 JP 2007063755 W JP2007063755 W JP 2007063755W WO 2009008066 A1 WO2009008066 A1 WO 2009008066A1
Authority
WO
WIPO (PCT)
Prior art keywords
hole
wiring substrate
insulating layer
base substrate
manufacturing
Prior art date
Application number
PCT/JP2007/063755
Other languages
English (en)
French (fr)
Inventor
Michimasa Takahashi
Original Assignee
Ibiden Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co., Ltd. filed Critical Ibiden Co., Ltd.
Priority to PCT/JP2007/063755 priority Critical patent/WO2009008066A1/ja
Priority to CN200780053731.0A priority patent/CN101690433B/zh
Priority to JP2009522458A priority patent/JP5001368B2/ja
Priority to EP07790573A priority patent/EP2170028A4/en
Publication of WO2009008066A1 publication Critical patent/WO2009008066A1/ja

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09509—Blind vias, i.e. vias having one side closed
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09536—Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09563—Metal filled via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/0959—Plated through-holes or plated blind vias filled with insulating material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/096—Vertically aligned vias, holes or stacked vias

Abstract

　スルーホール内部の導通が高温の熱を持った場合でも、導体パターンどうしの接続の断裂を起こりにくくすることができる配線基板を提供する。本発明に係る配線基板（１０）は、無機繊維に樹脂を含浸した基材から形成される絶縁層（１６１ａ）と、絶縁層（１６１ａ）を支えるベース基板（１２１）と、絶縁層（１６１ａ）の上に設けられた導体パターン（１１７ａ）とベース基板（１２１）の上に設けられた導体パターン（１１３ａ）とを電気的に接続するヴィア（１１４ａ）と、ベース基板（１２１）を貫通するスルーホール（１１１）と、を有する。スルーホール（１１１）は、孔径が１０μｍ以上１５０μｍ以下である。
PCT/JP2007/063755 2007-07-10 2007-07-10 配線基板及びその製造方法 WO2009008066A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
PCT/JP2007/063755 WO2009008066A1 (ja) 2007-07-10 2007-07-10 配線基板及びその製造方法
CN200780053731.0A CN101690433B (zh) 2007-07-10 2007-07-10 布线基板及其制造方法
JP2009522458A JP5001368B2 (ja) 2007-07-10 2007-07-10 配線基板及びその製造方法
EP07790573A EP2170028A4 (en) 2007-07-10 2007-07-10 WELDING SUBSTRATE AND METHOD FOR THE PRODUCTION THEREOF

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/063755 WO2009008066A1 (ja) 2007-07-10 2007-07-10 配線基板及びその製造方法

Publications (1)

Publication Number Publication Date
WO2009008066A1 true WO2009008066A1 (ja) 2009-01-15

Family

ID=40228263

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/063755 WO2009008066A1 (ja) 2007-07-10 2007-07-10 配線基板及びその製造方法

Country Status (4)

Country Link
EP (1) EP2170028A4 (ja)
JP (1) JP5001368B2 (ja)
CN (1) CN101690433B (ja)
WO (1) WO2009008066A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020202344A (ja) * 2019-06-13 2020-12-17 昭和電工マテリアルズ株式会社 多層配線板用の接続穴形成方法及びこれを用いた多層配線板の製造方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109082944A (zh) * 2018-09-30 2018-12-25 深圳昊天龙邦复合材料有限公司 新型芳纶纸基覆铜板及其制备方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000049458A (ja) * 1998-07-30 2000-02-18 Ngk Spark Plug Co Ltd 多層配線基板
JP2001257474A (ja) * 2000-03-10 2001-09-21 Ngk Spark Plug Co Ltd 配線基板の製造方法
JP2002151815A (ja) * 2000-11-07 2002-05-24 Ngk Spark Plug Co Ltd スルーホール用充填材並びにそれを用いたプリント配線板及びその製造方法
JP2002246760A (ja) * 2001-02-13 2002-08-30 Fujitsu Ltd 多層プリント配線板およびその製造方法
JP2003124632A (ja) * 2001-10-16 2003-04-25 Nec Toppan Circuit Solutions Inc 多層プリント配線板及びその製造方法
JP2005199442A (ja) 2004-01-13 2005-07-28 Mitsubishi Pencil Co Ltd 筆記具のクリップ固定構造

Family Cites Families (15)

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Publication number Priority date Publication date Assignee Title
JPH04309284A (ja) * 1991-04-05 1992-10-30 Kanegafuchi Chem Ind Co Ltd ガラスクロス強化電気用積層板の製造方法
JPH05129779A (ja) * 1991-11-05 1993-05-25 Hitachi Chem Co Ltd 多層プリント配線板用金属箔張り積層板
US5473120A (en) * 1992-04-27 1995-12-05 Tokuyama Corporation Multilayer board and fabrication method thereof
JPH07314607A (ja) * 1994-05-25 1995-12-05 Matsushita Electric Works Ltd 積層板
JPH10303556A (ja) * 1997-04-28 1998-11-13 Matsushita Electric Works Ltd プリント配線板の製造方法
US6207595B1 (en) * 1998-03-02 2001-03-27 International Business Machines Corporation Laminate and method of manufacture thereof
KR20010088796A (ko) * 1998-09-03 2001-09-28 엔도 마사루 다층프린트배선판 및 그 제조방법
MY144573A (en) * 1998-09-14 2011-10-14 Ibiden Co Ltd Printed circuit board and method for its production
JP2000349418A (ja) * 1999-06-04 2000-12-15 Nippon Avionics Co Ltd プリント配線板の製造方法
US6452117B2 (en) * 1999-08-26 2002-09-17 International Business Machines Corporation Method for filling high aspect ratio via holes in electronic substrates and the resulting holes
JP4034046B2 (ja) * 2001-06-07 2008-01-16 日本碍子株式会社 高精度な貫通孔を有する多層板、及び、回路基板
JP2003069229A (ja) * 2001-08-27 2003-03-07 Ngk Spark Plug Co Ltd 多層プリント配線板
KR100467825B1 (ko) * 2002-12-12 2005-01-25 삼성전기주식회사 스택형 비아홀을 갖는 빌드업 인쇄회로기판 및 그 제조 방법
TWI310670B (en) * 2003-08-28 2009-06-01 Ibm Printed wiring board manufacturing method and printed wiring board
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Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000049458A (ja) * 1998-07-30 2000-02-18 Ngk Spark Plug Co Ltd 多層配線基板
JP2001257474A (ja) * 2000-03-10 2001-09-21 Ngk Spark Plug Co Ltd 配線基板の製造方法
JP2002151815A (ja) * 2000-11-07 2002-05-24 Ngk Spark Plug Co Ltd スルーホール用充填材並びにそれを用いたプリント配線板及びその製造方法
JP2002246760A (ja) * 2001-02-13 2002-08-30 Fujitsu Ltd 多層プリント配線板およびその製造方法
JP2003124632A (ja) * 2001-10-16 2003-04-25 Nec Toppan Circuit Solutions Inc 多層プリント配線板及びその製造方法
JP2005199442A (ja) 2004-01-13 2005-07-28 Mitsubishi Pencil Co Ltd 筆記具のクリップ固定構造

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP2170028A4 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020202344A (ja) * 2019-06-13 2020-12-17 昭和電工マテリアルズ株式会社 多層配線板用の接続穴形成方法及びこれを用いた多層配線板の製造方法
JP7430494B2 (ja) 2019-06-13 2024-02-13 リンクステック株式会社 多層配線板用の接続穴形成方法及びこれを用いた多層配線板の製造方法

Also Published As

Publication number Publication date
CN101690433A (zh) 2010-03-31
EP2170028A1 (en) 2010-03-31
EP2170028A4 (en) 2011-07-20
CN101690433B (zh) 2013-10-02
JP5001368B2 (ja) 2012-08-15
JPWO2009008066A1 (ja) 2010-09-02

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