WO2009072531A1 - キャビティー部を有する多層配線基板 - Google Patents

キャビティー部を有する多層配線基板 Download PDF

Info

Publication number
WO2009072531A1
WO2009072531A1 PCT/JP2008/071985 JP2008071985W WO2009072531A1 WO 2009072531 A1 WO2009072531 A1 WO 2009072531A1 JP 2008071985 W JP2008071985 W JP 2008071985W WO 2009072531 A1 WO2009072531 A1 WO 2009072531A1
Authority
WO
WIPO (PCT)
Prior art keywords
wiring board
multilayer wiring
cavity section
cavity
multilayer
Prior art date
Application number
PCT/JP2008/071985
Other languages
English (en)
French (fr)
Inventor
Jun Matsui
Shingetsu Yamada
Original Assignee
Mitsubishi Plastics, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Plastics, Inc. filed Critical Mitsubishi Plastics, Inc.
Priority to JP2009544697A priority Critical patent/JP4881445B2/ja
Priority to US12/745,651 priority patent/US20110042124A1/en
Priority to DE112008003252T priority patent/DE112008003252T5/de
Priority to CN2008801187342A priority patent/CN101884257B/zh
Priority to KR1020107012104A priority patent/KR101153766B1/ko
Publication of WO2009072531A1 publication Critical patent/WO2009072531A1/ja

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/183Components mounted in and supported by recessed areas of the printed circuit board
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0274Optical details, e.g. printed circuits comprising integral optical means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4632Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating thermoplastic or uncured resin sheets comprising printed circuits without added adhesive materials between the sheets
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4688Composite multilayer circuits, i.e. comprising insulating layers having different properties
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4697Manufacturing multilayer circuits having cavities, e.g. for mounting components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201Structure
    • H01L2224/32012Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32013Structure relative to the bonding area, e.g. bond pad the layer connector being larger than the bonding area, e.g. bond pad
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49107Connecting at different heights on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12044OLED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483Containers
    • H01L33/486Containers adapted for surface mounting
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0313Organic insulating material
    • H05K1/0353Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
    • H05K1/0373Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement containing additives, e.g. fillers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0104Properties and characteristics in general
    • H05K2201/0129Thermoplastic polymer, e.g. auto-adhesive layer; Shaping of thermoplastic polymer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0206Materials
    • H05K2201/0209Inorganic, non-metallic particles
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10106Light emitting diode [LED]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2054Light-reflecting surface, e.g. conductors, substrates, coatings, dielectrics
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06Lamination
    • H05K2203/063Lamination of preperforated insulating layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/4617Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Laminated Bodies (AREA)
  • Led Device Packages (AREA)

Abstract

 複数の配線基板を積層してなるキャビティー部を有する多層配線基板であって、多層配線基板とした際に前記キャビティー部底面に配置される配線基板1、及び配線基板1より上層側に配置される配線基板2からなり、前記配線基板1及び/又は配線基板2が、所定の性質を有する絶縁基材からなり、前記配線基板2は、さらにキャビティー用穴が形成されている、キャビティー部を有する多層配線基板により、キャビティー部を有し、リフレクター機能をも備えた多層配線基板を提供する。
PCT/JP2008/071985 2007-12-05 2008-12-03 キャビティー部を有する多層配線基板 WO2009072531A1 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2009544697A JP4881445B2 (ja) 2007-12-05 2008-12-03 キャビティー部を有する多層配線基板
US12/745,651 US20110042124A1 (en) 2007-12-05 2008-12-03 Multilayer wiring substrate having cavity portion
DE112008003252T DE112008003252T5 (de) 2007-12-05 2008-12-03 Vielschichtiges Leitungssubstrat mit einem Hohlraumbereich
CN2008801187342A CN101884257B (zh) 2007-12-05 2008-12-03 具有腔部的多层布线基板
KR1020107012104A KR101153766B1 (ko) 2007-12-05 2008-12-03 캐비티부를 갖는 다층 배선 기판

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-314619 2007-12-05
JP2007314619 2007-12-05

Publications (1)

Publication Number Publication Date
WO2009072531A1 true WO2009072531A1 (ja) 2009-06-11

Family

ID=40717710

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/071985 WO2009072531A1 (ja) 2007-12-05 2008-12-03 キャビティー部を有する多層配線基板

Country Status (7)

Country Link
US (1) US20110042124A1 (ja)
JP (1) JP4881445B2 (ja)
KR (1) KR101153766B1 (ja)
CN (1) CN101884257B (ja)
DE (1) DE112008003252T5 (ja)
TW (1) TW200934349A (ja)
WO (1) WO2009072531A1 (ja)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011049476A (ja) * 2009-08-28 2011-03-10 Taiyo Holdings Co Ltd ソルダーレジスト層及びプリント配線板
CN102093593A (zh) * 2010-12-30 2011-06-15 中国人民解放军国防科学技术大学 树脂基复合材料用添加型阻燃剂、阻燃复合材料及其制备方法
JP2012119549A (ja) * 2010-12-02 2012-06-21 Sumitomo Bakelite Co Ltd バンプ形成用導電性樹脂組成物
JP2012186451A (ja) * 2011-02-14 2012-09-27 Murata Mfg Co Ltd 多層配線板の製造方法および多層配線板
WO2017187939A1 (ja) * 2016-04-26 2017-11-02 株式会社村田製作所 樹脂多層基板の製造方法
JPWO2020162473A1 (ja) * 2019-02-05 2021-12-02 株式会社村田製作所 樹脂多層基板および樹脂多層基板の製造方法

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5340763B2 (ja) * 2009-02-25 2013-11-13 ローム株式会社 Ledランプ
WO2011058938A1 (ja) * 2009-11-10 2011-05-19 株式会社村田製作所 多層基板およびその製造方法
US20110147069A1 (en) * 2009-12-18 2011-06-23 International Business Machines Corporation Multi-tiered Circuit Board and Method of Manufacture
JP5684511B2 (ja) * 2010-08-11 2015-03-11 三菱樹脂株式会社 金属箔積層体、led搭載用基板及び光源装置
DE102011054818A1 (de) * 2011-10-26 2013-05-02 Hella Kgaa Hueck & Co. Elektronische Schaltung
CN103200775B (zh) * 2013-03-25 2016-03-23 乐健科技(珠海)有限公司 用于led安装的陶瓷基印刷电路板的制备方法
WO2014185218A1 (ja) * 2013-05-16 2014-11-20 株式会社村田製作所 樹脂多層基板の製造方法
US9006901B2 (en) * 2013-07-19 2015-04-14 Alpha & Omega Semiconductor, Inc. Thin power device and preparation method thereof
JP5874697B2 (ja) * 2013-08-28 2016-03-02 株式会社デンソー 多層プリント基板およびその製造方法
TWI572267B (zh) * 2014-09-29 2017-02-21 旭德科技股份有限公司 具有凹槽的多層線路板與其製作方法
CN104282632B (zh) * 2014-10-24 2017-04-19 无锡中微高科电子有限公司 基于lcp基板的封装外壳及制备方法
US10643981B2 (en) * 2014-10-31 2020-05-05 eLux, Inc. Emissive display substrate for surface mount micro-LED fluidic assembly
KR20160112116A (ko) * 2015-03-18 2016-09-28 엘지이노텍 주식회사 발광소자 어레이와 이를 포함하는 조명시스템
WO2018052045A1 (ja) * 2016-09-16 2018-03-22 東京応化工業株式会社 基板接着方法及び積層体の製造方法
US9997442B1 (en) * 2016-12-14 2018-06-12 Advanced Semiconductor Engineering, Inc. Semiconductor device and method of manufacturing the same
US10845282B2 (en) * 2017-02-22 2020-11-24 The Boeing Company Test coupons having node bonds, methods for testing node bonds, and related apparatuses
US11277924B2 (en) * 2017-08-04 2022-03-15 Fujikura Ltd. Method for manufacturing multilayer printed wiring board and multilayer printed wiring board
US10895372B2 (en) * 2018-05-31 2021-01-19 Darfon Electronics Corp. Light source board, manufacturing method thereof, and luminous keyboard using the same
US10692663B2 (en) 2018-05-31 2020-06-23 Darfon Electronics Corp. Light source board, manufacturing method thereof, and luminous keyboard using the same
TWI661759B (zh) * 2018-07-19 2019-06-01 欣興電子股份有限公司 基板結構及其製造方法
US10720289B1 (en) * 2019-02-20 2020-07-21 Darfon Electronics Corp. Light emitting keyboard and lighting board thereof
CN111462651B (zh) * 2019-05-08 2021-12-10 伊乐视有限公司 用于表面贴装微型led流体组装的发光显示基板及制备方法
KR20210047204A (ko) * 2019-10-21 2021-04-29 삼성전자주식회사 직하형 백라이트장치 및 이를 구비한 디스플레이장치
CN114258192A (zh) * 2020-09-23 2022-03-29 庆鼎精密电子(淮安)有限公司 具有高反射率的电路板及其制作方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07202271A (ja) * 1993-12-28 1995-08-04 Matsushita Electric Works Ltd 発光ダイオード及びその製造方法
JP2000077822A (ja) * 1998-06-17 2000-03-14 Katsurayama Technol:Kk 凹みプリント配線板およびその製造方法、ならびに電子部品
JP2004039691A (ja) * 2002-06-28 2004-02-05 Matsushita Electric Ind Co Ltd Led照明装置用の熱伝導配線基板およびそれを用いたled照明装置、並びにそれらの製造方法
JP2004172533A (ja) * 2002-11-22 2004-06-17 Denso Corp プリント基板の製造方法およびその製造方法によって形成されるプリント基板
JP2004265955A (ja) * 2003-02-26 2004-09-24 Ibiden Co Ltd 多層プリント配線板
JP2007165502A (ja) * 2005-12-13 2007-06-28 Yamaichi Electronics Co Ltd 素子内蔵回路基板およびその製造方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0883930A (ja) 1994-09-14 1996-03-26 Mitsubishi Gas Chem Co Inc チップled搭載用基板の製造法
US5629497A (en) * 1994-10-04 1997-05-13 Cmk Corporation Printed wiring board and method of manufacturing in which a basefilm including conductive circuits is covered by a cured polyimide resin lay
US6583364B1 (en) * 1999-08-26 2003-06-24 Sony Chemicals Corp. Ultrasonic manufacturing apparatuses, multilayer flexible wiring boards and processes for manufacturing multilayer flexible wiring boards
JP4181778B2 (ja) * 2002-02-05 2008-11-19 ソニー株式会社 配線基板の製造方法
US6791839B2 (en) * 2002-06-25 2004-09-14 Dow Corning Corporation Thermal interface materials and methods for their preparation and use
AU2003212761A1 (en) * 2003-03-14 2004-09-30 Telefonaktiebolaget Lm Ericsson (Publ) A substrate structure, a method and an arrangement for producing such substrate structure

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07202271A (ja) * 1993-12-28 1995-08-04 Matsushita Electric Works Ltd 発光ダイオード及びその製造方法
JP2000077822A (ja) * 1998-06-17 2000-03-14 Katsurayama Technol:Kk 凹みプリント配線板およびその製造方法、ならびに電子部品
JP2004039691A (ja) * 2002-06-28 2004-02-05 Matsushita Electric Ind Co Ltd Led照明装置用の熱伝導配線基板およびそれを用いたled照明装置、並びにそれらの製造方法
JP2004172533A (ja) * 2002-11-22 2004-06-17 Denso Corp プリント基板の製造方法およびその製造方法によって形成されるプリント基板
JP2004265955A (ja) * 2003-02-26 2004-09-24 Ibiden Co Ltd 多層プリント配線板
JP2007165502A (ja) * 2005-12-13 2007-06-28 Yamaichi Electronics Co Ltd 素子内蔵回路基板およびその製造方法

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011049476A (ja) * 2009-08-28 2011-03-10 Taiyo Holdings Co Ltd ソルダーレジスト層及びプリント配線板
JP2012119549A (ja) * 2010-12-02 2012-06-21 Sumitomo Bakelite Co Ltd バンプ形成用導電性樹脂組成物
CN102093593A (zh) * 2010-12-30 2011-06-15 中国人民解放军国防科学技术大学 树脂基复合材料用添加型阻燃剂、阻燃复合材料及其制备方法
JP2012186451A (ja) * 2011-02-14 2012-09-27 Murata Mfg Co Ltd 多層配線板の製造方法および多層配線板
WO2017187939A1 (ja) * 2016-04-26 2017-11-02 株式会社村田製作所 樹脂多層基板の製造方法
JPWO2017187939A1 (ja) * 2016-04-26 2018-12-20 株式会社村田製作所 樹脂多層基板およびその製造方法
JPWO2020162473A1 (ja) * 2019-02-05 2021-12-02 株式会社村田製作所 樹脂多層基板および樹脂多層基板の製造方法
JP7147885B2 (ja) 2019-02-05 2022-10-05 株式会社村田製作所 樹脂多層基板および樹脂多層基板の製造方法

Also Published As

Publication number Publication date
DE112008003252T5 (de) 2011-05-05
KR101153766B1 (ko) 2012-06-13
TW200934349A (en) 2009-08-01
JP4881445B2 (ja) 2012-02-22
JPWO2009072531A1 (ja) 2011-04-28
US20110042124A1 (en) 2011-02-24
CN101884257A (zh) 2010-11-10
KR20100075671A (ko) 2010-07-02
CN101884257B (zh) 2012-02-08

Similar Documents

Publication Publication Date Title
WO2009072531A1 (ja) キャビティー部を有する多層配線基板
WO2008146487A1 (ja) 回路基板およびその製造方法
EP1484952A4 (en) MULTILAYER CONDUCTOR PLATE, BASE FOR A MULTIPLE PCB, PRINTED PCB AND METHOD FOR THE PRODUCTION THEREOF
WO2009048604A3 (en) Robust multi-layer wiring elements and assemblies with embedded microelectronic elements
TW200735425A (en) Light-emitting diode package and manufacturing method thereof
WO2008081904A1 (ja) 凹版及びこれを用いた導体層パターン付き基材
TW200635471A (en) Multilayered printed circuit board
WO2006039633A3 (en) Structure and method of making interconnect element, and multilayer wiring board including the interconnect element
MY154125A (en) Metal base circuit board
WO2008143099A1 (ja) 積層配線基板及びその製造方法
TW200737380A (en) Multilayer interconnection substrate, semiconductor device, and solder resist
WO2007078893A3 (en) Embedded waveguide printed circuit board structure
WO2011099820A3 (en) Pcb with cavity and fabricating method thereof
TW200617065A (en) Resin composite metal foil, laminate and process for the production of printed wiring board using the laminate
TW200610458A (en) Circuit board and method for the production of such a circuit board
EP1881751A4 (en) CERAMIC MULTILAYER PLATE
TW200704327A (en) Multi-layer printed circuit board
EP1915037A4 (en) RIGID PCB OF THE BENDING TYPE AND PROCESS FOR THEIR MANUFACTURE
TW200634999A (en) Multilayer wiring board and its manufacturing method
SG141415A1 (en) Flexible printed circuit board
JP2009283739A5 (ja)
TW200629998A (en) Printed circuit board and forming method thereof
WO2008153185A1 (ja) プリント配線板製造用の埋設銅めっき方法及びその埋設銅めっき方法を用いて得られるプリント配線板
WO2009051239A1 (ja) 配線基板、実装構造体、並びに配線基板の製造方法
TW200635472A (en) Multilayered printed circuit board

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 200880118734.2

Country of ref document: CN

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08858135

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 2009544697

Country of ref document: JP

ENP Entry into the national phase

Ref document number: 20107012104

Country of ref document: KR

Kind code of ref document: A

WWE Wipo information: entry into national phase

Ref document number: 1120080032521

Country of ref document: DE

WWE Wipo information: entry into national phase

Ref document number: 12745651

Country of ref document: US

122 Ep: pct application non-entry in european phase

Ref document number: 08858135

Country of ref document: EP

Kind code of ref document: A1

RET De translation (de og part 6b)

Ref document number: 112008003252

Country of ref document: DE

Date of ref document: 20110505

Kind code of ref document: P