WO2008142970A1 - 薄膜の結晶化方法、薄膜半導体装置の製造方法、電子機器の製造方法、および表示装置の製造方法 - Google Patents

薄膜の結晶化方法、薄膜半導体装置の製造方法、電子機器の製造方法、および表示装置の製造方法 Download PDF

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Publication number
WO2008142970A1
WO2008142970A1 PCT/JP2008/058275 JP2008058275W WO2008142970A1 WO 2008142970 A1 WO2008142970 A1 WO 2008142970A1 JP 2008058275 W JP2008058275 W JP 2008058275W WO 2008142970 A1 WO2008142970 A1 WO 2008142970A1
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Prior art keywords
producing
film
thin
light absorbing
absorbing layer
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PCT/JP2008/058275
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English (en)
French (fr)
Inventor
Nobuhiko Umezu
Koichi Tsukihara
Goh Matsunobu
Original Assignee
Sony Corporation
Inagaki, Yoshio
Tatsuki, Koichi
Hotta, Shin
Shirai, Katsuya
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Application filed by Sony Corporation, Inagaki, Yoshio, Tatsuki, Koichi, Hotta, Shin, Shirai, Katsuya filed Critical Sony Corporation
Priority to US12/600,595 priority Critical patent/US8168518B2/en
Priority to KR1020097026248A priority patent/KR101442875B1/ko
Priority to CN2008800165967A priority patent/CN101681815B/zh
Publication of WO2008142970A1 publication Critical patent/WO2008142970A1/ja
Priority to US13/441,556 priority patent/US8518756B2/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66765Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H01L21/02683Continuous wave laser beam
    • H01L21/2026
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/127Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H01L27/1274Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
    • H01L27/1281Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor by using structural features to control crystal growth, e.g. placement of grain filters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/127Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H01L27/1274Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
    • H01L27/1285Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Ceramic Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)

Abstract

 基板(1)上にゲート電極(11)を覆う状態でゲート絶縁膜(13)を成膜し、さらに非晶質シリコン膜(半導体薄膜)(15)を成膜する。この上部にバッファ層(17)を介して光吸収層(19)を成膜する。光吸収層(19)に対して、半導体レーザーのような連続発振レーザーからエネルギー線Lhを照射する。これにより、光吸収層Lhの表面側のみ酸化させつつ、光吸収層(19)においてエネルギー線Lhの熱変換によって発生させた熱と酸化の反応熱とにより非晶質シリコン膜(15)を結晶化させた美結晶シリコン膜(15a)とする。これにより、制御性が良好でありながらも、より簡便な手順で低コスト化された薄膜の結晶化方法を提供する。
PCT/JP2008/058275 2007-05-18 2008-04-30 薄膜の結晶化方法、薄膜半導体装置の製造方法、電子機器の製造方法、および表示装置の製造方法 WO2008142970A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
US12/600,595 US8168518B2 (en) 2007-05-18 2008-04-30 Method for crystallizing thin film, method for manufacturing thin film semiconductor device, method for manufacturing electronic apparatus, and method for manufacturing display device
KR1020097026248A KR101442875B1 (ko) 2007-05-18 2008-04-30 박막의 결정화 방법, 박막 반도체 장치의 제조 방법, 전자 기기의 제조 방법, 및 표시 장치의 제조 방법
CN2008800165967A CN101681815B (zh) 2007-05-18 2008-04-30 薄膜的结晶化方法、薄膜半导体装置的制造方法、电子设备的制造方法及显示装置的制造方法
US13/441,556 US8518756B2 (en) 2007-05-18 2012-04-06 Method for crystallizing thin film, method for manufacturing thin film semiconductor device, method for manufacturing electronic apparatus, and method for manufacturing display device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007132785A JP5003277B2 (ja) 2007-05-18 2007-05-18 薄膜の結晶化方法、薄膜半導体装置の製造方法、電子機器の製造方法、および表示装置の製造方法
JP2007-132785 2007-05-18

Related Child Applications (2)

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US12/600,595 A-371-Of-International US8168518B2 (en) 2007-05-18 2008-04-30 Method for crystallizing thin film, method for manufacturing thin film semiconductor device, method for manufacturing electronic apparatus, and method for manufacturing display device
US13/441,556 Continuation US8518756B2 (en) 2007-05-18 2012-04-06 Method for crystallizing thin film, method for manufacturing thin film semiconductor device, method for manufacturing electronic apparatus, and method for manufacturing display device

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JP (1) JP5003277B2 (ja)
KR (1) KR101442875B1 (ja)
CN (1) CN101681815B (ja)
WO (1) WO2008142970A1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011068065A1 (en) * 2009-12-02 2011-06-09 Canon Kabushiki Kaisha Semiconductor device and production method thereof
JP5213192B2 (ja) * 2009-05-01 2013-06-19 株式会社日本製鋼所 結晶質膜の製造方法および製造装置

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JP5003277B2 (ja) * 2007-05-18 2012-08-15 ソニー株式会社 薄膜の結晶化方法、薄膜半導体装置の製造方法、電子機器の製造方法、および表示装置の製造方法
JP2010182819A (ja) * 2009-02-04 2010-08-19 Sony Corp 薄膜トランジスタおよび表示装置
JP5564879B2 (ja) * 2009-10-01 2014-08-06 三菱電機株式会社 非晶質半導体膜の結晶化方法、並びに薄膜トランジスタ、半導体装置、表示装置、及びその製造方法
TWI528418B (zh) 2009-11-30 2016-04-01 應用材料股份有限公司 在半導體應用上的結晶處理
WO2013069045A1 (ja) * 2011-11-07 2013-05-16 パナソニック株式会社 薄膜トランジスタ装置の製造方法、薄膜トランジスタ装置および表示装置
CN102832169A (zh) * 2012-08-28 2012-12-19 京东方科技集团股份有限公司 阵列基板及其制备方法、显示器件
KR102580219B1 (ko) * 2015-12-15 2023-09-20 삼성디스플레이 주식회사 박막 트랜지스터, 이의 제조 방법 및 이를 포함하는 표시 장치
US20190067338A1 (en) * 2017-08-28 2019-02-28 Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Amoled Substrate and Method for Manufacturing Same
US10651257B2 (en) 2017-12-18 2020-05-12 Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Array substrate and manufacturing method thereof
CN108039352B (zh) * 2017-12-18 2020-06-05 武汉华星光电半导体显示技术有限公司 阵列基板及其制造方法
CN112542386B (zh) * 2020-11-03 2022-07-08 北海惠科光电技术有限公司 显示面板和薄膜晶体管的制造方法及其制造设备

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JP5003277B2 (ja) * 2007-05-18 2012-08-15 ソニー株式会社 薄膜の結晶化方法、薄膜半導体装置の製造方法、電子機器の製造方法、および表示装置の製造方法

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JP2002083820A (ja) * 2000-06-19 2002-03-22 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP2004128261A (ja) * 2002-10-03 2004-04-22 Seiko Epson Corp 半導体薄膜及び薄膜トランジスタの製造方法、電気光学装置及び電子機器

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5213192B2 (ja) * 2009-05-01 2013-06-19 株式会社日本製鋼所 結晶質膜の製造方法および製造装置
WO2011068065A1 (en) * 2009-12-02 2011-06-09 Canon Kabushiki Kaisha Semiconductor device and production method thereof

Also Published As

Publication number Publication date
US20120196395A1 (en) 2012-08-02
KR101442875B1 (ko) 2014-09-19
US20100159619A1 (en) 2010-06-24
JP5003277B2 (ja) 2012-08-15
US8518756B2 (en) 2013-08-27
JP2008288425A (ja) 2008-11-27
CN101681815A (zh) 2010-03-24
KR20100017836A (ko) 2010-02-16
US8168518B2 (en) 2012-05-01
CN101681815B (zh) 2011-10-26

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