WO2008126206A1 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

Info

Publication number
WO2008126206A1
WO2008126206A1 PCT/JP2007/056368 JP2007056368W WO2008126206A1 WO 2008126206 A1 WO2008126206 A1 WO 2008126206A1 JP 2007056368 W JP2007056368 W JP 2007056368W WO 2008126206 A1 WO2008126206 A1 WO 2008126206A1
Authority
WO
WIPO (PCT)
Prior art keywords
copper
copper layer
forming
layer
semiconductor device
Prior art date
Application number
PCT/JP2007/056368
Other languages
English (en)
French (fr)
Inventor
Masaki Haneda
Noriyoshi Shimizu
Michie Sunayama
Original Assignee
Fujitsu Microelectronics Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Microelectronics Limited filed Critical Fujitsu Microelectronics Limited
Priority to JP2009508757A priority Critical patent/JP5141683B2/ja
Priority to PCT/JP2007/056368 priority patent/WO2008126206A1/ja
Publication of WO2008126206A1 publication Critical patent/WO2008126206A1/ja
Priority to US12/566,016 priority patent/US8003518B2/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76831Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/2855Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H01L21/2885Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76861Post-treatment or after-treatment not introducing additional chemical elements into the layer
    • H01L21/76864Thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76867Barrier, adhesion or liner layers characterized by methods of formation other than PVD, CVD or deposition from a liquids
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76871Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L21/76873Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53233Copper alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

(課題)Cu拡散バリア膜を形成するためにCu中に添加した金属を、Cu配線中から効率的に除去することを可能とする半導体装置の製造方法を提供する。 (解決手段)基板上に層間絶縁膜を形成する工程と、前記層間絶縁膜に開口部を形成する工程と、前記開口部の内面を覆うように、マンガンと銅を含む合金層を形成する工程と、前記合金層上に、銅を主成分とする材料からなる第1の銅層を、前記開口部を埋めるように形成する工程と、前記第1の銅層上に、銅を主成分とする材料からなり、且つ、酸素、炭素又は窒素のいずれかの濃度が前記第1の銅層よりも高い第2の銅層を形成する工程と、前記第2の銅層が形成された基板を加熱する工程と、前記第2の銅層を除去する工程とを有する。  
PCT/JP2007/056368 2007-03-27 2007-03-27 半導体装置の製造方法 WO2008126206A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2009508757A JP5141683B2 (ja) 2007-03-27 2007-03-27 半導体装置の製造方法
PCT/JP2007/056368 WO2008126206A1 (ja) 2007-03-27 2007-03-27 半導体装置の製造方法
US12/566,016 US8003518B2 (en) 2007-03-27 2009-09-24 Semiconductor device fabrication method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/056368 WO2008126206A1 (ja) 2007-03-27 2007-03-27 半導体装置の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/566,016 Continuation US8003518B2 (en) 2007-03-27 2009-09-24 Semiconductor device fabrication method

Publications (1)

Publication Number Publication Date
WO2008126206A1 true WO2008126206A1 (ja) 2008-10-23

Family

ID=39863389

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/056368 WO2008126206A1 (ja) 2007-03-27 2007-03-27 半導体装置の製造方法

Country Status (3)

Country Link
US (1) US8003518B2 (ja)
JP (1) JP5141683B2 (ja)
WO (1) WO2008126206A1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010080606A (ja) * 2008-09-25 2010-04-08 Rohm Co Ltd 半導体装置の製造方法
WO2013191065A1 (ja) * 2012-06-18 2013-12-27 東京エレクトロン株式会社 マンガン含有膜の形成方法

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5343417B2 (ja) * 2008-06-25 2013-11-13 富士通セミコンダクター株式会社 半導体装置およびその製造方法
US8852674B2 (en) 2010-11-12 2014-10-07 Applied Materials, Inc. Method for segregating the alloying elements and reducing the residue resistivity of copper alloy layers
US8461683B2 (en) * 2011-04-01 2013-06-11 Intel Corporation Self-forming, self-aligned barriers for back-end interconnects and methods of making same
US8492897B2 (en) * 2011-09-14 2013-07-23 International Business Machines Corporation Microstructure modification in copper interconnect structures
TWI633624B (zh) * 2011-12-01 2018-08-21 應用材料股份有限公司 用於銅阻障層應用之摻雜的氮化鉭
JP5972317B2 (ja) * 2014-07-15 2016-08-17 株式会社マテリアル・コンセプト 電子部品およびその製造方法
US10453740B2 (en) * 2017-06-29 2019-10-22 Taiwan Semiconductor Manufacturing Co., Ltd. Interconnect structure without barrier layer on bottom surface of via
US10760156B2 (en) 2017-10-13 2020-09-01 Honeywell International Inc. Copper manganese sputtering target
US11035036B2 (en) 2018-02-01 2021-06-15 Honeywell International Inc. Method of forming copper alloy sputtering targets with refined shape and microstructure
US11069526B2 (en) * 2018-06-27 2021-07-20 Taiwan Semiconductor Manufacturing Co., Ltd. Using a self-assembly layer to facilitate selective formation of an etching stop layer
US11270911B2 (en) 2020-05-06 2022-03-08 Applied Materials Inc. Doping of metal barrier layers

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007012996A (ja) * 2005-07-01 2007-01-18 Toshiba Corp 半導体装置
JP2007059660A (ja) * 2005-08-25 2007-03-08 Sony Corp 半導体装置の製造方法および半導体装置
JP2007067107A (ja) * 2005-08-30 2007-03-15 Fujitsu Ltd 半導体装置の製造方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6037257A (en) * 1997-05-08 2000-03-14 Applied Materials, Inc. Sputter deposition and annealing of copper alloy metallization
US5969422A (en) * 1997-05-15 1999-10-19 Advanced Micro Devices, Inc. Plated copper interconnect structure
US6249055B1 (en) * 1998-02-03 2001-06-19 Advanced Micro Devices, Inc. Self-encapsulated copper metallization
US6265305B1 (en) * 1999-10-01 2001-07-24 United Microelectronics Corp. Method of preventing corrosion of a titanium layer in a semiconductor wafer
JP3992654B2 (ja) * 2003-06-26 2007-10-17 沖電気工業株式会社 半導体装置の製造方法
JP4478038B2 (ja) 2004-02-27 2010-06-09 株式会社半導体理工学研究センター 半導体装置及びその製造方法
JP2006294922A (ja) * 2005-04-12 2006-10-26 Renesas Technology Corp 半導体装置の製造方法
JP4589835B2 (ja) * 2005-07-13 2010-12-01 富士通セミコンダクター株式会社 半導体装置の製造方法及び半導体装置
JP2007109687A (ja) * 2005-10-11 2007-04-26 Sony Corp 半導体装置の製造方法
JP2008135569A (ja) * 2006-11-28 2008-06-12 Rohm Co Ltd 半導体装置の製造方法および半導体装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007012996A (ja) * 2005-07-01 2007-01-18 Toshiba Corp 半導体装置
JP2007059660A (ja) * 2005-08-25 2007-03-08 Sony Corp 半導体装置の製造方法および半導体装置
JP2007067107A (ja) * 2005-08-30 2007-03-15 Fujitsu Ltd 半導体装置の製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010080606A (ja) * 2008-09-25 2010-04-08 Rohm Co Ltd 半導体装置の製造方法
WO2013191065A1 (ja) * 2012-06-18 2013-12-27 東京エレクトロン株式会社 マンガン含有膜の形成方法
JPWO2013191065A1 (ja) * 2012-06-18 2016-05-26 東京エレクトロン株式会社 マンガン含有膜の形成方法

Also Published As

Publication number Publication date
US8003518B2 (en) 2011-08-23
JP5141683B2 (ja) 2013-02-13
US20100009530A1 (en) 2010-01-14
JPWO2008126206A1 (ja) 2010-07-22

Similar Documents

Publication Publication Date Title
WO2008126206A1 (ja) 半導体装置の製造方法
WO2008149844A1 (ja) 成膜方法及び成膜装置
WO2008081824A1 (ja) 半導体装置およびその製造方法
TW200711038A (en) Method of forming a semiconductor device having a diffusion barrier stack and structure thereof
TW200620464A (en) Semiconductor device and methods for fabricating the same
TWI267197B (en) Thin film and method array substrate and method of producing the same
WO2007060640A3 (en) Method of forming a self aligned copper capping layer
WO2011008925A3 (en) Methods for forming dielectric layers
TW200741916A (en) Low resistance and inductance backside through vias and methods of fabricating same
TWI256677B (en) Barrier material and process for Cu interconnect
WO2009137604A3 (en) Method of forming an electronic device using a separation-enhancing species
EP1930946A3 (en) Wiring substrate and method for manufacturing the same
TWI257125B (en) A method for preventing metal line bridging in a semiconductor device
TW200601414A (en) Semiconductor device and manufacturing method thereof
WO2007109464A3 (en) Methods for etching a bottom anti-reflective coating layer in dual damascene application
WO2009155160A3 (en) Multi-layer thick metallization structure for a microelectronic device, integrated circuit containing same, and method of manufacturing an integrated circuit containing same
TW200633133A (en) Substrate processing method and method of manufacturing semiconductor device
WO2012003341A3 (en) Methods for forming tungsten-containing layers
TW200636862A (en) Method for manufacturing semiconductor device
TW200733255A (en) Metallic silicide forming method and method of manufacturing semiconductor device
TW200705556A (en) Wire structure and forming method of the same
SG162774A1 (en) Interconnect capping layer and method of fabrication
WO2012064925A3 (en) Method for segregating the alloying elements and reducing the residue resistivity of copper alloy layers
TW200601490A (en) Fabricating method of semiconductor device
JP2009164471A5 (ja)

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 07739806

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 2009508757

Country of ref document: JP

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 07739806

Country of ref document: EP

Kind code of ref document: A1