WO2008117509A1 - Ｓｏｉウエーハの製造方法 - Google Patents
Ｓｏｉウエーハの製造方法 Download PDFInfo
- Publication number
- WO2008117509A1 WO2008117509A1 PCT/JP2008/000339 JP2008000339W WO2008117509A1 WO 2008117509 A1 WO2008117509 A1 WO 2008117509A1 JP 2008000339 W JP2008000339 W JP 2008000339W WO 2008117509 A1 WO2008117509 A1 WO 2008117509A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- wafer
- soi
- base
- bond
- forming
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 3
- 229910052710 silicon Inorganic materials 0.000 abstract 3
- 239000010703 silicon Substances 0.000 abstract 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 239000013078 crystal Substances 0.000 abstract 2
- 238000009792 diffusion process Methods 0.000 abstract 2
- 239000002019 doping agent Substances 0.000 abstract 2
- 229910052814 silicon oxide Inorganic materials 0.000 abstract 2
- 230000003647 oxidation Effects 0.000 abstract 1
- 238000007254 oxidation reaction Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76256—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Recrystallisation Techniques (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007-080313 | 2007-03-26 | ||
| JP2007080313A JP5194508B2 (ja) | 2007-03-26 | 2007-03-26 | Ｓｏｉウエーハの製造方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2008117509A1 true WO2008117509A1 (ja) | 2008-10-02 |
Family
ID=39788251
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/JP2008/000339 WO2008117509A1 (ja) | 2007-03-26 | 2008-02-26 | Ｓｏｉウエーハの製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP5194508B2 (enrdf_load_stackoverflow) |
| WO (1) | WO2008117509A1 (enrdf_load_stackoverflow) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2484506A (en) * | 2010-10-13 | 2012-04-18 | Univ Warwick | Heterogrowth |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5643488B2 (ja) * | 2009-04-28 | 2014-12-17 | 信越化学工業株式会社 | 低応力膜を備えたｓｏｉウェーハの製造方法 |
| JP2011071193A (ja) * | 2009-09-24 | 2011-04-07 | Sumco Corp | 貼合せｓｏｉウェーハ及びその製造方法 |
| JP5978764B2 (ja) * | 2012-05-24 | 2016-08-24 | 信越半導体株式会社 | Ｓｏｉウェーハの製造方法 |
| JP6186984B2 (ja) | 2013-07-25 | 2017-08-30 | 三菱電機株式会社 | 半導体装置の製造方法 |
| JP7334698B2 (ja) * | 2020-09-11 | 2023-08-29 | 信越半導体株式会社 | Ｓｏｉウェーハの製造方法及びｓｏｉウェーハ |
| JP7380517B2 (ja) * | 2020-10-21 | 2023-11-15 | 信越半導体株式会社 | Ｓｏｉウェーハの製造方法及びｓｏｉウェーハ |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01186612A (ja) * | 1988-01-14 | 1989-07-26 | Fujitsu Ltd | 半導体基板の製造方法 |
| JPH05217826A (ja) * | 1992-01-31 | 1993-08-27 | Canon Inc | 半導体基体及びその作製方法 |
| JPH0837286A (ja) * | 1994-07-21 | 1996-02-06 | Toshiba Microelectron Corp | 半導体基板および半導体基板の製造方法 |
| JPH098124A (ja) * | 1995-06-15 | 1997-01-10 | Nippondenso Co Ltd | 絶縁分離基板及びその製造方法 |
| JPH1032321A (ja) * | 1995-12-30 | 1998-02-03 | Hyundai Electron Ind Co Ltd | Ｓｏｉ基板およびその製造方法 |
| JPH10116897A (ja) * | 1996-10-09 | 1998-05-06 | Mitsubishi Materials Shilicon Corp | 張り合わせ基板およびその製造方法 |
| JP2000030996A (ja) * | 1998-07-07 | 2000-01-28 | Shin Etsu Handotai Co Ltd | Ｓｏｉウエーハの製造方法及びｓｏｉウエーハ |
| WO2005022610A1 (ja) * | 2003-09-01 | 2005-03-10 | Sumco Corporation | 貼り合わせウェーハの製造方法 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007059704A (ja) * | 2005-08-25 | 2007-03-08 | Sumco Corp | 貼合せ基板の製造方法及び貼合せ基板 |
-
2007
- 2007-03-26 JP JP2007080313A patent/JP5194508B2/ja active Active
-
2008
- 2008-02-26 WO PCT/JP2008/000339 patent/WO2008117509A1/ja active Application Filing
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01186612A (ja) * | 1988-01-14 | 1989-07-26 | Fujitsu Ltd | 半導体基板の製造方法 |
| JPH05217826A (ja) * | 1992-01-31 | 1993-08-27 | Canon Inc | 半導体基体及びその作製方法 |
| JPH0837286A (ja) * | 1994-07-21 | 1996-02-06 | Toshiba Microelectron Corp | 半導体基板および半導体基板の製造方法 |
| JPH098124A (ja) * | 1995-06-15 | 1997-01-10 | Nippondenso Co Ltd | 絶縁分離基板及びその製造方法 |
| JPH1032321A (ja) * | 1995-12-30 | 1998-02-03 | Hyundai Electron Ind Co Ltd | Ｓｏｉ基板およびその製造方法 |
| JPH10116897A (ja) * | 1996-10-09 | 1998-05-06 | Mitsubishi Materials Shilicon Corp | 張り合わせ基板およびその製造方法 |
| JP2000030996A (ja) * | 1998-07-07 | 2000-01-28 | Shin Etsu Handotai Co Ltd | Ｓｏｉウエーハの製造方法及びｓｏｉウエーハ |
| WO2005022610A1 (ja) * | 2003-09-01 | 2005-03-10 | Sumco Corporation | 貼り合わせウェーハの製造方法 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2484506A (en) * | 2010-10-13 | 2012-04-18 | Univ Warwick | Heterogrowth |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2008244019A (ja) | 2008-10-09 |
| JP5194508B2 (ja) | 2013-05-08 |
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