WO2007148640A1 - 基板処理システムおよび動作検証方法 - Google Patents
基板処理システムおよび動作検証方法 Download PDFInfo
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- WO2007148640A1 WO2007148640A1 PCT/JP2007/062205 JP2007062205W WO2007148640A1 WO 2007148640 A1 WO2007148640 A1 WO 2007148640A1 JP 2007062205 W JP2007062205 W JP 2007062205W WO 2007148640 A1 WO2007148640 A1 WO 2007148640A1
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Classifications
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/418—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM]
- G05B19/4184—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM] characterised by fault tolerance, reliability of production system
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B23/00—Testing or monitoring of control systems or parts thereof
- G05B23/02—Electric testing or monitoring
- G05B23/0205—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
- G05B23/0218—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterised by the fault detection method dealing with either existing or incipient faults
- G05B23/0224—Process history based detection method, e.g. whereby history implies the availability of large amounts of data
- G05B23/0227—Qualitative history assessment, whereby the type of data acted upon, e.g. waveforms, images or patterns, is not relevant, e.g. rule based assessment; if-then decisions
- G05B23/0235—Qualitative history assessment, whereby the type of data acted upon, e.g. waveforms, images or patterns, is not relevant, e.g. rule based assessment; if-then decisions based on a comparison with predetermined threshold or range, e.g. "classical methods", carried out during normal operation; threshold adaptation or choice; when or how to compare with the threshold
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67276—Production flow monitoring, e.g. for increasing throughput
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/30—Nc systems
- G05B2219/32—Operator till task planning
- G05B2219/32196—Store audit, history of inspection, control and workpiece data into database
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/30—Nc systems
- G05B2219/45—Nc applications
- G05B2219/45031—Manufacturing semiconductor wafers
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
Definitions
- the present invention relates to a substrate processing system and an operation verification method that collect apparatus data of semiconductor manufacturing apparatuses such as a batch heat treatment apparatus and detect a failure based on the collected data.
- a semiconductor manufacturing apparatus is composed of a large number of parts, and includes many parts that cannot be avoided over time. Therefore, in order to operate the semiconductor manufacturing equipment with high quality without causing a failure, it is effective to periodically inspect the power of the components that make up the semiconductor manufacturing equipment. However, visual inspection is unrealistic considering the complexity of semiconductor manufacturing equipment and the large number of parts.
- the output of a sensor or the like which is a component that requires periodic inspection, is converted into an electrical signal and taken into the main controller of the semiconductor manufacturing apparatus, and is pre-set in the main controller.
- a method of detecting whether or not each component is operating normally is adopted.
- the main controller may be overloaded, and the main controller may be defective.
- the present invention has been made in view of the above problems, and can automatically verify the operation of components without increasing the burden on the main controller in the semiconductor manufacturing apparatus.
- An object of the present invention is to provide a substrate processing system and an operation verification method. Means for solving the problem
- the present invention collects at least one substrate processing apparatus that performs a desired process on a substrate and the substrate processing apparatus force data, and collects the collected data.
- the verification device comprises:
- Search designation means for retrieving data stored in the storage means under a predetermined search condition; upper and lower limit designation means for designating an upper limit value and a lower limit value of the data for each desired time interval;
- Data acquisition means for acquiring data from the storage means
- a determination unit that determines whether the data acquired by the data acquisition unit is within a range specified by the upper and lower limit specification unit;
- the data is data indicating an event, and the time for which the event data continues is verified.
- FIG. 1 is a functional block diagram showing a hardware configuration of an apparatus data collection system for realizing a substrate processing system according to the present invention.
- FIG. 2 is a functional block diagram showing the hardware configuration of the data collection auxiliary computer shown in FIG.
- FIG. 3 is a flowchart showing a flow of processing of a data verification program performed by the verification computer 4 shown in FIG. 1.
- FIG. 4 is a flowchart showing a flow of event activation processing performed by an event activation program in the device data collection system shown in FIG. 1.
- FIG. 5 is a flowchart showing a processing flow of a duration verification program in the apparatus data collection system shown in FIG. 1.
- FIG. 6 is an explanatory diagram showing a method for acquiring data for duration verification in the processing of the duration verification program of FIG.
- FIG. 7 is a flowchart showing a flow of processing for determining a search condition of a search method according to the substrate processing system of the present invention.
- FIG. 8 is a flowchart showing a detailed processing flow of start / end time designation shown in step S 32 of FIG. 7.
- FIG. 9 is a flowchart showing a flow of processing for determining a search condition of another search method according to the substrate processing system of the present invention.
- FIG. 10 is an explanatory view showing in more detail the effect of a combination of a plurality of devices and batches set in the processing of the system in step S 50 shown in FIG. 9.
- FIG. 11 is an explanatory diagram when the start event and end event of step S33 in FIG. 7 are associated with a plurality of events.
- FIG. 12 is a diagram showing a first example of data search in the substrate processing system of the present invention.
- FIG. 13 is a diagram showing a second embodiment of data search in the substrate processing system of the present invention.
- FIG. 14 is a diagram showing a third embodiment of data search in the substrate processing system of the present invention.
- FIG. 15 is a diagram showing a fourth embodiment of data search in the substrate processing system of the present invention.
- FIG. 16 is a diagram showing a fifth example of data search in the substrate processing system of the present invention.
- FIG. 17 is a diagram showing a sixth embodiment of data search in the substrate processing system of the present invention.
- FIG. 18 is a diagram showing a seventh example of data search in the substrate processing system of the present invention.
- FIG. 19 is a diagram showing an eighth example of data search in the substrate processing system of the present invention.
- FIG. 20 is a perspective view of a substrate processing apparatus applied to the present invention.
- FIG. 21 is a side perspective view of the substrate processing apparatus shown in FIG.
- FIG. 22 is a table showing an example when (a) the upper and lower limits of the data items are constant. (B) A diagram showing the table in (a).
- FIG. 23 is a table showing an example when the upper and lower limits of the data item change (a).
- FIG. 24 is a conceptual diagram showing the structure of a search result.
- FIG. 25 is a time chart showing the operation of the present embodiment.
- the substrate processing system of the present invention collects data for verification of a semiconductor manufacturing apparatus using a data collection device, and collects the data collected using the verification device. Based on this, it is configured to automatically verify the operation of semiconductor manufacturing equipment.
- the semiconductor manufacturing device and the data collection device are connected by a network capable of high-speed data communication, and data generated by the operating semiconductor manufacturing device is collected frequently online and attached to the data collection device. It is a system that analyzes with a verification device while accumulating in the connected storage means (database).
- FIG. 1 is a functional block diagram showing a hardware configuration of a substrate processing system according to the present invention.
- FIG. 2 is a functional block diagram showing the hardware configuration of the data collection device shown in FIG.
- the substrate processing system includes a main controller (main controller) 5 and a semiconductor manufacturing apparatus 1 that collects various data, a data collection auxiliary computer (data collection apparatus) 2, and a data collection apparatus.
- a computer (verification device) 4 is connected to a network 6 capable of high-speed data communication such as a LAN.
- the semiconductor manufacturing apparatus 1 is simply referred to as an apparatus.
- the main controller 5 which is one of the components of the semiconductor manufacturing apparatus 1, has a function of acquiring data obtained by the operating semiconductor manufacturing apparatus 1 and performing data communication with various computers via the network 6. It is a controller.
- the data collection computer 3 communicates with the main controller 5 via the network 6 to acquire device data at high speed, and a database (storage means) having the acquired data inside or outside of itself. It has the function to accumulate in.
- the data collection auxiliary computer 2 is a computer provided when data is collected from the semiconductor manufacturing apparatus 1 but the main controller 5 cannot sufficiently acquire data, and is independent of the main controller 5. Then, the data of the semiconductor manufacturing apparatus 1 is acquired, and the data is transmitted to the data collection computer 3 via the network 6. As a result, even when the load of the data collection processing is large, it is possible to prevent the main controller 5 from being hindered.
- the data collected and accumulated by the data collection computer 3 is searched for by processing of software operating on the data collection computer 3 or the verification computer 4 connected to the network 6 It is searched by the processing of the software that operates above.
- the main controller 5 may be configured not to communicate with the data collection auxiliary computer 2 or the data collection computer 3 by acquiring all data with the data collection auxiliary computer 2 or the data collection computer 3.
- FIG. 1 only one semiconductor manufacturing apparatus 1 is shown, but in the substrate processing system of the present invention, a plurality of semiconductor manufacturing apparatuses 1 can be connected. There can be a plurality of data collection auxiliary computers 2 or data collection computers 3 respectively.
- the data collection auxiliary computer 2 includes a computer main body 11 including a CPUlla and a memory ib, a communication IF (interface) 12, a display 'input device 13, It comprises a memory device 14 and a recording medium 15.
- the data collection computer 3, the verification computer 4, and the main controller 5 shown in FIG. 1 are different in scale, performance, and additional devices from the data collection auxiliary computer 2, but basically,
- the hardware configuration is the same as that of the data collection auxiliary computer 2 shown in FIG.
- the data collected by the data collection computer 3 or the like is roughly divided into monitor data and event data.
- the monitor data is data obtained from the sensor about the response of the movable part of the semiconductor manufacturing apparatus 1 and is mainly given as a numerical value, such as a flow rate value of the mass flow controller or a temperature value of the heater.
- the temperature data of the temperature rise process from the normal temperature to the treatment temperature the temperature rise process from the standby temperature to the treatment temperature Data with rapid fluctuations, such as temperature data of the temperature, temperature data of rapid temperature drop that occurs when the boat is loaded and unloaded into the reactor, and pressure data that is depressurized from atmospheric pressure when processing the substrate Etc.
- the temperature and pressure must be kept constant during substrate processing such as wafer film formation and oxidation'diffusion processing.
- monitor data must be kept at a constant value.
- some data must be held at a constant value.
- the monitor data of the semiconductor manufacturing apparatus 1 includes a mixture of variously fluctuating data and constant data, and it is necessary to collect both fluctuating data and constant data. Don't be. Therefore, there is a large amount of data to be collected, and it is necessary to change the upper and lower limits of data as time passes.
- an event is a parameter used for state transition or control of the main controller 5 such as a table number or the like that changes or an expected error occurs. This indicates the time at which the internal state changes, and is given by state transition or logical type.
- the event data is, for example, data indicating the ONZOFF state of a component, such as opening / closing of a valve, data such as whether an error has occurred, or whether the semiconductor manufacturing apparatus 1 is processing power on a substrate. It is data such as. In other words, event data (data indicating a change in a certain state) is also collected, and a check is made as to how long a state continues. It manages semiconductor manufacturing equipment 1.
- FIG. As described above, since the amount of data collected is extremely large! It is feared that overloading is performed only on the main controller 5. Therefore, in the substrate processing system of the present invention, FIG. As shown, the data collection of the semiconductor manufacturing apparatus 1 is not performed by the main controller 5 alone, but is shared by the data collection auxiliary computer 2 and the data collection computer 3.
- an element part having a high response speed such as a mass flow controller is 10 to verify the operation at a high speed of LOO Hertz. If this is necessary, or if it is sufficient to verify the data at a slow speed of 0.01 Hz, such as the cooling water supply pressure, all of the data is transferred to the main controller 5.
- the main controller since the data collection computers 2 and 3 collect data in a distributed manner and the verification computer 4 performs verification processing, the main controller must have high performance. There is no need to demand high performance.
- the main controller performs all the verification processing, the processing load is reduced due to the heavy verification processing load of the main controller, and the main task of the main controller is reduced. There was a risk of hindering device control. Furthermore, if the main controller 5 performs all the verification processing, a high-performance main controller 5 is required, resulting in an increase in the cost of the apparatus.
- the auxiliary computer 2 for data collection, the computer 3 for data collection, and the computer 4 for verification perform data collection and verification processing, so that the main controller 5 has high performance. As a result, the cost of the semiconductor manufacturing apparatus 1 can be reduced.
- FIG. 3 is a flowchart showing the flow of processing of the verification program performed by the verification computer 4 shown in FIG.
- a verification target is set, or search condition designation processing for recognizing a preset verification target is performed (step Sl).
- the target of verification is at least verification Including the time range to be verified and the data information to be verified.
- the time range to be verified is, for example, a force that directly specifies the time, such as 1 pm force until 3 pm, or an event (such as the time when the valve is closed from the time when the valve is opened).
- the event is the time when the event data changes to the specified state, specified by the data information and state belonging to the event data), or a combination of them.
- a plurality of data information settings may be made.
- data information is a generic term for data items, data names, data numbers, data identifiers (data IDs), and so on.
- the verification target is called a search condition, and the search condition will be described later.
- step S2 if the data power to be verified is composed of several pieces, set upper and lower limit data for each, or set the upper and lower limit data set in advance. Recognized upper / lower limit designation processing is performed (step S2).
- the upper and lower limit data settings are often fixed values for each of the upper and lower limit values for the time range to be verified, but when the power is turned on or when the set value changes, etc.
- the upper limit value and the lower limit value can be changed with the passage of time as follows.
- the first column (0 min 0 sec?) shows the relative time from the beginning of the time range to be verified.
- the upper and lower limits are widened at the moment when the power is turned on, and the upper and lower limits are gradually narrowed when the set value (target value) changes. (Conversely, it may be gradually narrowed at first and gradually widened.)
- a series for checking the upper and lower limits of one data item in this way is called an upper / lower limit series, and one set of upper limit series and one set of lower limit series correspond to one data item.
- the upper and lower limit value series are specified as a series consisting of a relative time column and an absolute time column so that both constant values and change values can be handled.
- the upper and lower limit values are set so that the data is retained if no new line is added at a later time. In this case, for example, as shown in Fig. 22 (a) and (b), it is sufficient to set only one line, that is, to set the upper and lower limit values at the start time. Also, when the upper and lower limits change over time, for example, as shown in Fig. 23 (a) and (b).
- step S3 data acquisition processing is performed to acquire data to be searched for the database power of the data collection computer 3 according to the search conditions.
- step S4 the upper and lower limit values specified in step S2 and the data acquired in step S3 are matched to determine whether the acquired data is within the upper and lower limit values.
- the specified process is performed (step S4).
- the acquired data may be composed of multiple data. In this case, the upper and lower limit values are determined for each data.
- the result is NG. If the acquired data does not exceed the upper and lower limit values, the result is OK. In the case of NG, the number of NG times, the time when each became NG, the acquired data value, and the upper and lower limit values are acquired, and the NG process of step S5 is executed.
- step S5 when executing the NG process in step S5 !, if it becomes NG in step S4, an arbitrary program is executed on a command line basis. For example, it is possible to send an Internet mail indicating that it is NG to a specific address set in advance. Alternatively, the specified data can be recorded in a specific storage area set in advance. Alternatively, information indicating NG can be displayed on the screen of the verification computer 4. In this way, one verification process is completed.
- a series of processes of the verification program shown in FIG. 3 can be executed immediately by a user operation, or can be executed at a specified time using a timer inside the computer. Alternatively, it can be executed periodically.
- the regular execution is an execution process at a predetermined time interval such as, for example, once a week, every Monday at 9:00 am or every hour at 0 minutes.
- the event activation program will be described. For example, there is data to be inspected at all times regardless of whether the semiconductor manufacturing equipment 1 is processing wafers or idling, such as the supply pressure of cooling water, but the semiconductor manufacturing equipment 1 is processing wafers. Inspection only inside Some data is sufficient. In the case of data like the latter, it is necessary to run the verification program as soon as the wafer processing is completed.
- the wafer processing by the semiconductor manufacturing apparatus 1 does not always start on time. Since it is usually started at any time regardless of day or night time, it is possible to determine in advance when the wafer processing will end. In many cases, there is no power. For this reason, an event activation program described below can be added so that the verification program can be operated immediately even when wafer processing is executed irregularly.
- step Sl l Data acquisition processing is performed (step Sl l).
- step S12 the event data acquired in step S11 is analyzed, and state determination processing is performed to determine whether or not the state is set in advance (step S12). For example, in the above-described wafer processing example, a state in which the wafer processing by the semiconductor manufacturing apparatus 1 is completed is set. In addition, it is possible to set a state in which the alarm of the semiconductor manufacturing apparatus 1 has been recovered or a state in which the wafer has been loaded.
- step S12 if the acquired event data is pre-set “state”, that is, “match”, the program is terminated, and the acquired event data is pre-set. If it is not in the state, that is, if it is “mismatch”, the process of step S13 is executed. Step S13 is the verification program described above.
- verification can be performed periodically in a short time using a timer inside the computer. Periodic verification is, for example, performing verification once every minute or verification every 5 seconds.
- the verification program processing described in Fig. 3 was mainly for monitoring data.
- the sensor is expensive
- the monitor data required for the power that cannot be used or the power of sensing technology may not be obtained.
- FIG. 5 is a flowchart showing the processing flow of the continuous time verification program.
- the continuous time verification program operated by the verification computer 4 will be described with reference to FIG.
- step S21 a verification target is set, or search condition designation processing for recognizing a preset verification target is performed (step S21).
- This step S21 is almost the same process as the search condition designation process in the verification program described in step S1 of FIG. 3, but the data to be set belongs to the event data. This is different from the verification program shown in Fig. 3 in that “status” such as “loading”, noreb “open”, and alarm “occurrence” must also be specified.
- upper limit and lower limit data is set for each data to be verified, or upper / lower limit designation processing for recognizing preset upper limit and lower limit data is performed (step S22). ).
- the upper and lower limit data is set in terms of time.
- the upper and lower limit values can be set as a constant value according to the characteristics of the data to be acquired, or can be set to change over time. For example, as shown in Figure 24. In Fig. 25, the power of the data item to be examined is calculated and the time during which the specified state is continued is calculated and the upper and lower limits are compared. The comparison between the duration and the upper and lower limits is performed at the time when the specified state has been continued. If there is no upper / lower limit value series data at the same time as the end of continuation, the latest upper / lower limit value data before that time is used.
- step S23 a data acquisition process for acquiring desired data from the database of the data collection computer 3 is performed according to the search condition.
- FIG. 6 is an explanatory diagram showing a method for acquiring data for duration verification in the processing of the duration verification program of FIG.
- force is generated by four points of data in the specified time range.
- the data to be acquired is each one point outside both (or one) of the time range. It is getting to include. Therefore, in both cases, 6 points of data are acquired, and in one case, 5 points of data are acquired.
- the duration of the state can be calculated.
- the specified time range is shown in the figure (that is, the range from 12:02:00 to 12:40:00)
- the duration of “Paying out” can be calculated only with the data of “Waiting” at 12:02:34 in (2) and “Paying out” at 12:36:05 in (3).
- the data of (2), (3), and (4) is obtained by collecting the “standby” data of 12:45:13 in (4), which is one of the future points outside the time range.
- the duration of “paying” can be calculated.
- the duration from “paying” in (3) to “waiting” in (4) is the duration of “paying”.
- step S24 A duration conversion process for calculating time is performed (step S24).
- step S25 the upper / lower limit values of the data specified in step S22 and the data acquired in step S23 are matched to determine the upper / lower limits.
- An upper / lower limit determination process is performed (step S25).
- step S25 if the upper and lower limit values are not exceeded, the program ends as "OK", and if the acquired data exceeds the upper and lower limit values, the program ends as "NG” and the NG processing in step S26 is executed. Execute.
- the execution method of the NG process at this time is the same as the case of executing the NG process in step S5 of the verification program in FIG.
- step S1 and step S21 are search designation means
- step S2 and step S22 are upper and lower limit designation means
- step S3 and step S23 are data acquisition means
- step S4 Step S25 constitutes determination means
- step S24 constitutes duration conversion means of the present invention.
- boat events such as “boat UP” and “boat DOWN” can also be implemented in the same manner. It can also be applied to vacuuming events.
- FIG. 7 is a flowchart showing the flow of processing for determining the search condition of the search method according to the substrate processing system of the present invention.
- the time designation of the search condition is determined by a series of processing from the device designation in step S31 processed in step S30 to the start delay 'end delay designation in step S34.
- step S30 a plurality of time designations can be determined in parallel, and a plurality of determination contents can be combined by OR.
- step S31 device designation processing is performed in which the user designates the target semiconductor manufacturing apparatus 1 (step S31). At this time, when a plurality of semiconductor manufacturing apparatuses 1 from which data is to be collected are connected, the single semiconductor manufacturing apparatus 1 is selected. The semiconductor manufacturing apparatus 1 selected here is used to limit events in the process of the subsequent step S33.
- a start time and end time designation process is performed in which the user designates a general start time and end time for performing a search (step S32).
- the user does not need to specify the exact start and end times of the data he wants to acquire.
- a start event 'end event designation process for designating an abstract time indicated by the event is performed (step S33).
- the event is, for example, the state of each component part constituting the semiconductor manufacturing apparatus 1 such as “the time when the valve is turned OFF ON” or “the time when the MFC is in the standby state force control start state”. It represents the time of change, and the collected device data power is the specific time that can be obtained.
- step S33 The time setting in step S33 is used to further narrow down the time designated in step S32. As a result, the user can search for desired data without knowing the exact start and end times of the event.
- step S34 a start delay and end delay designation process for setting a delay time applied to the start time and the end time is performed (step S34).
- a start delay and end delay designation process for setting a delay time applied to the start time and the end time is performed (step S34).
- Data of the time traced back by the specified delay time from the start time of the event set in step S33 or the data after the delay time from the end time of the event set in step S33 can be acquired .
- step S32 start 'end time
- step S34 delay start / end time must all be set. ⁇ If you set either the end time or the event start of step S33 ⁇ End time, you do not have to set it if you do not need to set other settings. For example, when the start time and end time are already determined as in the conventional method, in the present invention, only the start / end time of step S32 need be set. Also, if a search is performed under the same conditions across a plurality of semiconductor manufacturing apparatuses 1, another semiconductor manufacturing apparatus 1 may satisfy another condition determined in parallel in accordance with the process of step S30. Should be specified
- step S35 data designation processing for designating a data point acquired by the user is performed (step S35).
- a plurality of data at this time can be specified across a plurality of semiconductor manufacturing apparatuses 1. In this way, one search condition is determined, and data is searched according to the search condition.
- FIG. 8 is a flowchart showing the detailed processing flow of the start / end time designation shown in step S32 of FIG. Note that the broken lines in the flowchart in Fig. 8 indicate parallel processing.
- step S32a the start time is specified when specified by time
- step S32b the start batch is specified when specified by notch
- step S32c the end time
- step S32d the end batch is specified.
- step S32b the start time of that batch is the data search start time
- step S32d the end time of that batch is the end of the data search. It is time. In this way, data retrieval can be performed more flexibly and accurately by using batch designation that is easy to grasp from the management instead of specific start time and end time.
- FIG. 9 is a flowchart showing a flow of processing for determining a search condition of another search method according to the substrate processing system of the present invention.
- the flowchart of FIG. 9 is branched into two systems (that is, the system of step S30 and the system of step S50) in the branching process of step S40.
- the processing of the system in step S30 is the same as the processing flow for search condition determination shown in FIG. Also, the process of step S30 and the process of step S50 can be executed simultaneously in parallel.
- step S50 device designation processing for designating the semiconductor manufacturing device 1 targeted by the user is performed (step S51).
- step S52 a batch designating process for designating a batch in the semiconductor manufacturing apparatus 1 designated in step S51 is performed (step S52), and the process ends.
- one unit can be determined in parallel, and the determined settings are combined by OR. Therefore, multiple sets of semiconductor manufacturing equipment 1 and batches performed by the equipment are set. ORed.
- step S31 is set to be replaced with the device designation process in step S51.
- the process of specifying the start time and the end time of step S32 is replaced with the notch specifying process of step S52.
- FIG. 10 is an explanatory diagram showing in more detail the effect of a set of a plurality of devices and batches set in the process of step S50 shown in FIG.
- FIG. 10 (a) shows a case where a set of apparatuses and batches is not set in the process of step S50 shown in FIG.
- the device and battery Since the set of H is specified, the “search condition list” is displayed!
- the time specification set in step S 30 becomes the time specification of the final search condition as it is. For example, device A, batch 1, start event ⁇ , and end event ⁇ in the “search condition list” remain as device A, batch 1, start event ⁇ , and end event ⁇ in the “final search condition”. .
- FIG. 10 (b) shows a case where a plurality of sets of devices and batches are set in the process of step S50 shown in FIG.
- the items in the “Search condition list” and “Device 'batch list” are displayed !, and a combination of multiple devices and batches specified in step S50 is combined.
- the “final search condition” depends on the time of device A, batch 1, start event ⁇ ⁇ , end event ⁇ of “search condition list”, and time of device B, batch 3 of “device 'batch list”. Is changed to the time of device B, batch 3, start event ⁇ , end event ⁇ .
- the start and end times can be specified by an event that occurs in the apparatus not at a specific time.
- the start and end times are specified by the event, the user may expect many events at the approximate time set in step S32 in FIG. Therefore, when multiple specific times correspond to the start event and end event in step S33 of FIG. 7, they are made to correspond as shown in FIG.
- FIG. 11 is an explanatory diagram when the start event and the end event of step S33 in FIG. 7 are associated with a plurality of events
- the “start trigger time” on the left side of the figure is the step in FIG. It is a list of specific times corresponding to the start event of S33.
- the “end trigger time” on the right side of the figure is a list of specific times corresponding to the end event of step S33 in FIG.
- the respective times are arranged in the order of occurrence. First, the first two times are compared, and if the start event is earlier than the end event, they are associated as a set and moved to the next time. Otherwise, the start time of the end event is ignored, the start event time remains the same, and only the end event is moved to the next time and compared again. Repeat this process. In this way, the user can detect when an unexpected event occurs. I try to prevent the search conditions from becoming meaningless.
- FIG. 12 is a diagram showing a first embodiment of data search in the substrate processing system of the present invention.
- the first embodiment shows the data search period when there is one designated device and one designated batch and one designated event condition.
- the specified event condition is that the search start is event 1 and the search end is event 2.
- (a) is the search period in the case of event power.
- (B) is the search period for two events.
- the event start condition is 2 times and the end condition is 3 times, but since the start condition is less than the end condition, the third end condition “Event 2” is the paired start condition. Is ignored. Therefore, there are two search periods.
- the event start condition is 3 times and the end condition is 2 times, but since the start condition is more than the end condition, the third start condition “Event 1” is the paired end condition. Is ignored. Therefore, there are two search periods.
- FIG. 13 is a diagram showing a second example of data search in the substrate processing system of the present invention.
- the second embodiment shows the data search period when there are two designated devices and two designated batches and one designated event condition.
- the event condition in this case is the search start force event 1 and the search end event 2.
- the search period is one device A and one device B.
- FIG. 14 is a diagram showing a third embodiment of data search in the substrate processing system of the present invention.
- the third embodiment shows a data search period when there is one designated device, two designated batches, and one designated event condition.
- the event condition in this case is that the search start is event 1 and the search end is event 2.
- the search period is one for batch 1 and one for batch 2.
- FIG. 15 is a diagram showing a fourth embodiment of data search in the substrate processing system of the present invention.
- the fourth embodiment shows the data search period when there is one designated device and one designated batch and multiple designated event conditions.
- event condition 1 is search start force S event 1 and search end is event 2
- event condition 2 is search start force event 3 and search end is event 4.
- FIG. 16 is a diagram showing a fifth embodiment of data search in the substrate processing system of the present invention. It is.
- the fifth embodiment shows the data search period when there is one designated device, time designation instead of batch, and designated event condition force.
- the event conditions in this case are the search start force event 1 and the search end event 2.
- the search period is one from the start of batch 1 to the end of batch 2.
- FIG. 17 is a diagram showing a sixth embodiment of data search in the substrate processing system of the present invention.
- the sixth embodiment shows the data search period when there is one designated device, time designation instead of batch, and a plurality of designated event conditions.
- event condition 1 is search start force S event 1 and search end is event 2
- event condition 2 is search start force event 3 and search end is event 4.
- FIG. 18 is a diagram showing a seventh example of data search in the substrate processing system of the present invention.
- the data retrieval period is shown in the case where there is one designated device, the designated batch is a continuous start batch and end batch, and the designated event condition force.
- the event condition in this case is the search start force event 1 and the search end event 2.
- the search period is from the middle of batch 1 to the end of batch 2 and is one.
- FIG. 19 is a diagram showing an eighth example of data search in the substrate processing system of the present invention.
- the data retrieval period is shown when there is one designated device, the designated batch is a continuous start batch and end batch, and there are a plurality of designated event conditions.
- event condition 1 is search start event 1 and search end is event 2
- event condition 2 is search start force event 3 and search end is event 4.
- search results for the search conditions are configured as shown in Fig. 24.
- FIG. 24 is a conceptual diagram showing the structure of a search result.
- 900 shows the entire search result, and has a search condition 910, metadata 912, and an aggregate 916 of actual data.
- Search condition 910 is the entire information related to the search condition determined through the processing of FIG. 7 or FIG.
- the actual data aggregate 916 is composed of actual data fragments 918 generated by the data information specified in step S35, and there are the specified number of data points.
- the actual data fragment 918 is a single block of actual data generated with the data information specified in step S35, corresponding to a specific set of start and end times. There are multiple combinations of the time of occurrence and the numerical value, logical value, or status at that time.
- the actual data fragment 918 includes information on a specific set of start and end times that the search condition 910 has, thereby making it easier to understand and handle.
- the metadata 912 is the same number of data as the actual data aggregate 916 and corresponds to the one-to-one data, and is an additional element that has a supplementary role to understand the meaning of the actual data aggregate 916. It is. Double lines 914 indicate one-to-one correspondence.
- the substrate processing apparatus applied to the substrate processing system of the present invention can be applied not only to a semiconductor manufacturing apparatus but also to an apparatus for processing a glass substrate such as an LCD device.
- the film formation process that is not related to the content of the process performed inside the substrate processing apparatus includes, for example, a process for forming a CVD, PVD, oxide film, nitride film, or a film containing a metal. Including. Further, annealing, oxidation, nitriding, diffusion, etc. may be performed.
- the substrate processing system of the present invention may have a configuration in which a verification device for verifying data and a data collection device are combined.
- the substrate processing apparatus is configured as a semiconductor manufacturing apparatus that performs processing steps in a method of manufacturing a semiconductor device.
- a vertical substrate processing apparatus (hereinafter sometimes simply referred to as a processing apparatus) that performs oxidation, diffusion processing, CVD processing, or the like is applied to the substrate as the substrate processing apparatus.
- FIG. 20 is a perspective view of a substrate processing apparatus applied to the present invention.
- FIG. 21 is a side perspective view of the substrate processing apparatus shown in FIG.
- a hoop (substrate container, hereinafter referred to as a pod) 110 is used as a wafer carrier that stores a wafer (substrate) 200 that also has silicon isotropic force.
- the processing apparatus 100 includes a casing 111. Front wall of housing 111 Front of 11 la A front maintenance opening 103 as an opening provided for maintenance is opened in the front part, and front maintenance doors 104 and 104 for opening and closing the front maintenance opening 103 are respectively installed.
- a pod loading / unloading port (substrate container loading / unloading port) 112 is opened on the front wall 11la of the casing 111 so as to communicate with the inside and outside of the casing 111. It is opened and closed by a cutter (substrate container loading / unloading opening / closing mechanism) 113.
- a load port (substrate container delivery table) 114 is installed in front of the front side of the pod loading / unloading port 112, and the load port 114 is configured to place and align the pod 110. .
- the pod 110 is loaded onto the load port 114 by an in-process transfer device (not shown), and the load port 114 is also loaded.
- a rotary pod shelf (substrate container mounting shelf) 105 is installed in the upper part of the central portion of the casing 111 in the front-rear direction.
- the rotary pod shelf 105 includes a plurality of pods 110. It is configured to be stored.
- the rotary pod shelf 105 is a vertically-supported support column 116 that is intermittently rotated in a horizontal plane, and a plurality of shelf plates (substrate container) that are radially supported by the support column 116 at each of the upper, middle, and lower positions.
- the plurality of shelf plates 117 are configured to hold the plurality of pods 110 in a state where the pods 110 are respectively addressed.
- a pod transfer device (substrate container transfer device) 118 is installed, and the pod transfer device 118 installs the pod 110.
- the pod transport device 118 includes a pod elevator 118a and a pod
- the pod 110 is transported between the load port 114 , the rotary pod shelf 105, and the pod opener (substrate container lid opening / closing mechanism) 121 by continuous operation with the transport mechanism 118b.
- a sub-housing 119 is constructed across the rear end at a lower portion of the housing 111 at a substantially central portion in the front-rear direction.
- Wafer loading / unloading ports (substrate loading / unloading ports) 120 for loading / unloading wafers 200 into / from the sub-casing 119 are arranged on the front wall 119a of the sub-casing 119 in two vertical stages.
- Wafer loading / unloading ports on the upper and lower stages 12 A pair of pod openers 121 and 121 are installed at 0 and 120, respectively.
- the pod opener 121 includes mounting bases 122 and 122 for mounting the pod 110, and cap attaching / detaching mechanisms (lid attaching / detaching mechanisms) 123 and 123 for attaching / detaching caps (lids) of the pod 110.
- the pod opener 121 is configured to open and close the wafer loading / unloading port of the pod 110 by attaching / detaching the cap of the pod 110 placed on the placing table 122 by the cap attaching / detaching mechanism 123.
- the sub-housing 119 constitutes a transfer chamber 124 that is fluidly isolated from the installation space of the pod transfer device 118 and the rotary pod shelf 105.
- a wafer transfer mechanism (substrate transfer mechanism) 125 is installed in the front area of the transfer chamber 124.
- the wafer transfer mechanism 125 can transfer the wafer 200 in the horizontal direction or move the wafer 200 in a horizontal direction.
- An apparatus (substrate transfer apparatus) 125a and a wafer transfer apparatus elevator (substrate transfer apparatus ascending / descending mechanism) 125b for raising and lowering the wafer transfer apparatus 125a are configured. As schematically shown in FIG.
- the wafer transfer apparatus elevator 125b is installed between the right end of the pressure-resistant casing 111 and the right end of the front area of the moving chamber 124 of the sub casing 119.
- the boat (substrate holder) is configured by using the twister (substrate holder) 125c of the wafer transfer device 125a as the mounting portion of the wafer 200. ) It is configured to load (charge) and unload (dispatch) 200 and 200 for 217.
- a standby unit 126 that houses and waits for the boat 217 is configured.
- a processing furnace 202 is provided above the standby unit 126. The lower end of the processing furnace 202 is configured to be opened and closed by a furnace port shatter (furnace port opening / closing mechanism) 147!
- a boat elevator for raising and lowering the boat 217 is provided between the right end portion of the pressure-resistant casing 111 and the right end portion of the standby section 126 of the sub casing 119.
- (Substrate holder lifting mechanism) 115 is installed.
- a seal cap 219 as a lid is installed horizontally on the arm 128, which is connected to the lifting platform of the boat elevator 115, and the seal cap 219 supports the boat 217 vertically, and the processing furnace 202 It is configured to be able to close the lower end.
- the boat 217 includes a plurality of holding members, and a plurality of (for example, about 50 to 125) wafers 200 are horizontally aligned with their centers aligned in the vertical direction. Configured to hold.
- the left end of the transfer chamber 124 opposite to the wafer transfer device elevator 125b side and the boat elevator 115 side has a cleaned atmosphere or non-cleaned atmosphere.
- a clean unit 134 composed of a supply fan and a dust-proof filter is installed to supply clean air 133, which is an active gas, and is not shown between the wafer transfer device 125a and the tarine unit 134, although not shown in the figure.
- a notch aligning device 135 is installed as a substrate aligning device for aligning the circumferential position of the wafer.
- the clean air 133 blown out from the clean unit 134 is circulated to the boat 217 in the notch aligning device 135, the wafer transfer device 125a, and the standby unit 126, and is then sucked in by a duct (not shown).
- the air is exhausted to the outside of the body 111 or is circulated to the primary side (supply side) that is the suction side of the clean unit 134, and is again blown into the transfer chamber 124 by the clean unit 134. It is configured.
- the loaded pod 110 is automatically transported and delivered by the pod transport device 118 to the designated shelf 117 of the rotary pod shelf 105, temporarily stored, and then from the shelf 117.
- the wafer loading / unloading port 120 of the pod opener 121 is closed by the cap attaching / detaching mechanism 123, and the transfer chamber 124 is filled with clean air 133.
- the transfer chamber 124 is filled with nitrogen gas as clean air 133, so that the oxygen concentration is set to 20 ppm or less, which is much lower than the oxygen concentration inside the housing 111 (atmosphere).
- the pod 110 mounted on the mounting table 122 has its opening-side end surface pressed against the opening edge of the wafer loading / unloading port 120 in the front wall 1 19a of the sub-housing 119, and its key.
- the yap is removed by the cap attaching / detaching mechanism 123, and the wafer loading / unloading opening is opened.
- the wafer 200 is picked up from the pod 110 through the wafer loading / unloading port by the twister 125c of the wafer transfer device 125a and aligned with the notch aligner 135. Then, it is carried into the waiting section 126 behind the transfer chamber 124 and loaded into the boat 217 (charging).
- the wafer transfer device 125 a that has transferred the wafer 200 to the boat 217 returns to the pod 110 and loads the next wafer 110 into the boat 217.
- the lower end force furnace logo 147 of the processing furnace 202 closed by the furnace logo 147 is released. Subsequently, the boat 217 holding the 200 groups of wafers is loaded (loaded) into the processing furnace 202 when the seal cap 219 is raised by the boat elevator 115.
- the wafer 200 and the pod 110 are ejected to the outside of the casing 111 by the reverse procedure described above.
- a substrate processing system includes at least one substrate processing apparatus that performs desired processing on a substrate, collects the substrate processing apparatus force data, and stores the collected data.
- a substrate processing system comprising: a data collection device having storage means for performing verification; and a verification device for verifying data stored in the storage means.
- the verification device includes:
- Search designation means for retrieving data stored in the storage means under a predetermined search condition; upper and lower limit designation means for designating an upper limit value and a lower limit value of the data for each desired time interval; Data acquisition means for acquiring data from the storage means;
- a determination unit that determines whether the data acquired by the data acquisition unit is within a range specified by the upper and lower limit specification unit;
- the data is data indicating an event, and the time for which the event data continues is verified.
- the substrate processing system includes at least one substrate processing apparatus including a plurality of components, collects data from the substrate processing apparatus, and stores the collected data.
- a substrate processing system comprising: a data collection device having storage means for performing analysis; and a verification device for analyzing and verifying data accumulated in the storage means;
- the verification device includes search specification means for specifying to search data stored in the storage means under a predetermined condition;
- Upper and lower limit designating means for designating an upper limit value and a lower limit value of data searched by the search designating means by time;
- Data acquisition means for acquiring data from the storage means
- a duration calculation means for calculating a time during which the data acquired by the data acquisition means continues in a predetermined state
- the data acquisition unit may include a determination unit that determines whether or not the data acquired by the data acquisition unit is within the range specified by the upper and lower limit specification unit.
- the verification device when the preset state is completed, goes back to the past by a predetermined time for the current force. Minute data is acquired, and it is also possible to perform verification on the acquired data after determining whether or not the force is in a preset state.
- a method for verifying the operation of a semiconductor manufacturing apparatus can be provided.
- at least one substrate processing apparatus that performs a desired process on the substrate collects data by the data collection apparatus, and stores the collected data in a storage means included in the data collection apparatus, and uses the verification apparatus.
- An operation verification method for verifying data stored in the storage means, the verification device The verification by the search specification means specifies that the data stored in the storage means is searched under a predetermined condition, and then the data searched by the upper and lower limit specification means changes when the data changes with time.
- the upper limit value and the lower limit value are specified for each desired time interval, then data is acquired from the storage means by the data acquisition means, and then the data acquired by the data acquisition means by the determination means is the upper and lower limits. It is determined whether the value is within the range specified by the value specifying means.
- the operation verification method of the semiconductor manufacturing apparatus collects data by at least one substrate processing apparatus that performs desired processing on the substrate by the data collection apparatus. And a method for verifying the data stored in the storage means by the verification device, wherein the verification by the verification device is a search designation means.
- the verification by the verification device is a search designation means.
- the data stored in the storage means is to be searched under a predetermined condition, then specify the upper and lower limit values of the data in terms of time by means of the upper and lower limit value specifying means, and then by the data acquisition means.
- Data is acquired from the storage means, and then the time that the data acquired by the duration calculation means continues in a predetermined state is calculated.
- Data obtained at the discretion constant means may be made to determine whether it is within the range specified by the upper and lower limit value designating means.
- operation verification of the components of the semiconductor manufacturing apparatus can be automatically performed without increasing the burden on the main controller of the semiconductor manufacturing apparatus. It is possible to verify the power of the parts that are operating normally. Therefore, it is possible to detect a minor abnormality before a component fails. In addition, it is possible to monitor variations in the operating time of each component. By doing so, it becomes possible to check the reliability of semiconductor manufacturing equipment.
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Abstract
Description
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US12/225,390 US8266095B2 (en) | 2006-06-19 | 2007-06-18 | Substrate processing system and operation inspecting method |
JP2008522442A JP4797066B2 (ja) | 2006-06-19 | 2007-06-18 | 基板処理システム、検証装置および検証装置の動作検証方法 |
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JP2009181506A (ja) * | 2008-01-31 | 2009-08-13 | Fanuc Ltd | 生産管理装置を備えた生産システム |
JP2011100926A (ja) * | 2009-11-09 | 2011-05-19 | Toray Eng Co Ltd | 基板処理システム |
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US8876453B2 (en) * | 2010-01-12 | 2014-11-04 | Hitachi Kokusai Electric Inc. | Substrate processing apparatus and method of manufacturing semiconductor device |
JP6318483B2 (ja) * | 2013-06-28 | 2018-05-09 | 株式会社デンソー | 電子装置の製造方法および限界値設定装置 |
JP6287018B2 (ja) * | 2013-10-04 | 2018-03-07 | 富士通株式会社 | 可視化方法、表示方法、情報処理装置、可視化プログラム及び表示プログラム |
EP3379357B1 (en) * | 2017-03-24 | 2019-07-10 | ABB Schweiz AG | Computer system and method for monitoring the technical state of industrial process systems |
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US8266095B2 (en) | 2012-09-11 |
JP5394452B2 (ja) | 2014-01-22 |
US20100223277A1 (en) | 2010-09-02 |
JPWO2007148640A1 (ja) | 2009-11-19 |
JP2012028787A (ja) | 2012-02-09 |
JP4797066B2 (ja) | 2011-10-19 |
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