WO2007094284A1 - 気密封止用キャップ、電子部品収納用パッケージおよび気密封止用キャップの製造方法 - Google Patents
気密封止用キャップ、電子部品収納用パッケージおよび気密封止用キャップの製造方法 Download PDFInfo
- Publication number
- WO2007094284A1 WO2007094284A1 PCT/JP2007/052461 JP2007052461W WO2007094284A1 WO 2007094284 A1 WO2007094284 A1 WO 2007094284A1 JP 2007052461 W JP2007052461 W JP 2007052461W WO 2007094284 A1 WO2007094284 A1 WO 2007094284A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- plating layer
- hermetic sealing
- region
- electronic component
- sealing cap
- Prior art date
Links
- 238000007789 sealing Methods 0.000 title claims abstract description 173
- 238000000034 method Methods 0.000 title claims description 17
- 229910000679 solder Inorganic materials 0.000 claims abstract description 122
- 238000004519 manufacturing process Methods 0.000 claims abstract description 46
- 238000007747 plating Methods 0.000 claims description 261
- 238000003860 storage Methods 0.000 claims description 54
- 229910045601 alloy Inorganic materials 0.000 claims description 16
- 239000000956 alloy Substances 0.000 claims description 16
- 239000000758 substrate Substances 0.000 claims description 15
- 230000001590 oxidative effect Effects 0.000 claims description 14
- 238000005304 joining Methods 0.000 claims description 13
- 229910015363 Au—Sn Inorganic materials 0.000 claims description 9
- 238000007254 oxidation reaction Methods 0.000 claims description 9
- 230000003647 oxidation Effects 0.000 claims description 8
- 238000002844 melting Methods 0.000 claims description 3
- 230000008018 melting Effects 0.000 claims description 3
- 230000000873 masking effect Effects 0.000 claims description 2
- 238000003892 spreading Methods 0.000 abstract description 14
- 230000002401 inhibitory effect Effects 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 310
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 63
- 230000000052 comparative effect Effects 0.000 description 31
- 238000002474 experimental method Methods 0.000 description 18
- 239000002253 acid Substances 0.000 description 17
- 239000000919 ceramic Substances 0.000 description 13
- 239000002184 metal Substances 0.000 description 13
- 229910052751 metal Inorganic materials 0.000 description 13
- 230000000694 effects Effects 0.000 description 11
- 238000005259 measurement Methods 0.000 description 11
- 238000009736 wetting Methods 0.000 description 8
- 239000013078 crystal Substances 0.000 description 7
- 239000000463 material Substances 0.000 description 7
- 229910017709 Ni Co Inorganic materials 0.000 description 5
- 229910003267 Ni-Co Inorganic materials 0.000 description 5
- 229910003262 Ni‐Co Inorganic materials 0.000 description 5
- 239000011247 coating layer Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 238000009825 accumulation Methods 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 230000013011 mating Effects 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- 229910000531 Co alloy Inorganic materials 0.000 description 1
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000004071 soot Substances 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 238000010897 surface acoustic wave method Methods 0.000 description 1
- 229910052727 yttrium Inorganic materials 0.000 description 1
- VWQVUPCCIRVNHF-UHFFFAOYSA-N yttrium atom Chemical compound [Y] VWQVUPCCIRVNHF-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4817—Conductive parts for containers, e.g. caps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/06—Containers; Seals characterised by the material of the container or its electrical properties
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
- H01L2924/1617—Cavity coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/162—Disposition
- H01L2924/1627—Disposition stacked type assemblies, e.g. stacked multi-cavities
Definitions
- Hermetic sealing cap, electronic component storage package, and hermetic sealing cap manufacturing method are provided.
- the present invention relates to a hermetic sealing cap, an electronic component storage package, and a method for manufacturing an hermetic sealing cap, and more particularly to an hermetic sealing cap used for storing an electronic component and an electronic component storage.
- the present invention relates to a method of manufacturing a package and a hermetic sealing cap.
- SMD Surface Mount Device
- SAW surface acoustic wave filters
- crystal resonators surface acoustic wave filters
- oscillators oscillators
- Such an electronic component storage package includes an electronic component storage member (case) on which the electronic component is mounted, and an airtight sealing cap that hermetically seals the electronic component storage member.
- the hermetic sealing cap melts the solder layer and is joined to the electronic component housing member when heated by heat.
- the hermetic sealing cap is configured to have high solder wettability
- the solder layer seals the hermetic sealing cap. May spread over the stop surface.
- the solder layer wets and spreads on the sealing surface of the hermetic sealing cap, there is insufficient solder between the hermetic sealing cap and the electronic component storage member, resulting in a decrease in hermeticity.
- the solder layer spreads inward on the sealing surface of the hermetic sealing cap, there is a disadvantage that the solder layer may come into contact with the bonding wire that connects the electronic component and the electronic component housing member.
- hermetic sealing cap is proposed in which the solder layer is prevented from spreading inward on the sealing surface of the hermetic sealing cap when the hermetic sealing is performed.
- a hermetically sealing cap is disclosed in, for example, Japanese Patent Laid-Open No. 4-96256.
- the electronic component storage member of the metal hermetic seal lid is not masked with an aluminum plate to suppress acid soot, the electronic component storage member of the metal hermetic seal lid is not Since the Ni plating in the bonded area is easily oxidized, the solder wettability in the area where the electronic component housing member of the metal normetic seal lid is bonded decreases and the bonding characteristics by the solder decrease. The inconvenience arises.
- the present invention has been made to solve the above-described problems, and one object of the present invention is to prevent the manufacturing process from becoming complicated while the solder layer is on the sealing surface. It is an object to provide a hermetic sealing cap, an electronic component storage package, and a method for manufacturing an hermetic sealing cap capable of suppressing the wet spread of the inside.
- a hermetic sealing cap is an hermetic sealing cap used for an electronic component storage package including an electronic component storage member for storing an electronic component.
- An electronic component comprising: a base material; a first plating layer formed on the surface of the base material; and a second plating layer formed on the surface of the first plating layer and less oxidized than the first plating layer. At least part of the second plating layer in the region inside the region to which the storage member is joined is removed to expose the surface of the first plating layer, and to the region where the second plating layer is removed. The surface of the first plating layer is oxidized.
- the hermetic sealing cap according to the first aspect of the present invention as described above, at least a part of the second plating layer in the region inside the region to which the electronic component storage member is joined is removed.
- the oxidized region of the first plating layer is exposed. Since the solder wettability can be lowered, when the electronic component housing member is hermetically sealed, it is possible to suppress the solder layer from spreading inward on the first mating layer of the hermetic sealing cap.
- the surface of the first plating layer is exposed and oxidized when exposed. It is not necessary to mask the area where the electronic component storage member of the second plating layer is bonded in order to suppress the oxidation of the surface of the region where the electronic component storage member of the second plating layer is bonded! Complicating the manufacturing process of the hermetic sealing cap can be suppressed.
- the first plating layer is an Ni plating layer
- the second plating layer is an Au plating layer.
- the surface of the first plating layer can be easily oxidized to reduce the solder wettability of the oxidized region of the first plating layer.
- the first plating layer is composed of the Ni plating layer
- the second plating layer is composed of the Au plating layer that is less easily oxidized than the Ni plating layer, so that the first plating layer is formed on the surface of the first plating layer. Easily form a second plating layer that is less susceptible to oxidation than the first plating layer Can do.
- a solder layer having an Au—Sn alloy force is formed on at least one surface of the first plating layer and the second plating layer in a region to which the electronic component housing member is bonded. Yes.
- the solder layer can be easily melted and bonded onto the surface of at least one of the first plating layer and the second plating layer.
- the exposed and oxidized region of the first plating layer is formed in a ring shape when seen in a plan view.
- the area to be removed can be made narrower as compared with the case where the second plating layer in all areas inside the area to which the electronic component housing member is bonded is removed. 2
- the time required for the step of removing the second plating layer can be shortened.
- a second plating layer is formed on a region inside the exposed and oxidized region of the first plating layer. If comprised in this way, it can suppress by the 2nd plating layer that the area
- the boundary line between the exposed and oxidized region of the first plating layer and the region where the electronic component housing member is joined is The boundary line force at the corner of the hermetic sealing cap is arranged outside the boundary line in the region other than the corner of the hermetic sealing cap.
- the solder layer is formed in the region where the electronic component storage member is bonded, it is possible to suppress the accumulation of the solder at the corner of the region where the electronic component storage member is bonded. It can be suppressed that the thickness of the solder layer at the corner of the region where the component housing member is joined is larger than the thickness of the solder layer other than the corner of the region where the electronic component housing member is joined.
- the exposed and oxidized region of the first plating layer is formed in a groove shape having a predetermined depth.
- the second plating layer can be surely removed to expose the first plating layer.
- An electronic component storage package includes: a base material; a first plating layer formed on the surface of the base material; a first plating layer formed on the surface of the first plating layer; And a second plating layer that is less susceptible to oxidation than the plating layer, and at least part of the second plating layer in the region inside the region where the electronic component housing member is joined is removed, so that the surface of the first plating layer is removed.
- the exposed surface of the first plating layer exposed in the region where the second plating layer is removed is oxidized, and is sealed with the hermetic sealing cap and the hermetic sealing cap.
- an electronic component storage member for storage With this configuration, it is possible to store an electronic component including a hermetic sealing cap that can suppress the solder layer from spreading inward on the sealing surface while suppressing the complexity of the manufacturing process. You can get a package.
- a method for manufacturing an airtight sealing cap is a method for manufacturing an airtight sealing cap used in an electronic component storage package including an electronic component storage member for storing an electronic component.
- the hermetic sealing cap in the method for manufacturing the hermetic sealing cap according to the third aspect of the present invention, as described above, at least a part of the second plating layer in the region inside the region to which the electronic component housing member is joined is removed.
- the surface of the first plating layer is exposed, and the surface of the first plating layer exposed in the region where the second plating layer is removed is provided with a step of oxidizing the first plating layer. Therefore, when the electronic component housing member is hermetically sealed, it is possible to prevent the solder layer from wetting and spreading on the first mating layer of the hermetic sealing cap. Can do.
- the surface of the first plating layer is exposed and oxidized.
- it is necessary to mask the region where the electronic component storage member of the second plating layer is bonded. Since there is no necessity, it can suppress that the manufacturing process of the cap for airtight sealing becomes complicated.
- the step of forming the first plating layer includes a step of forming a first plating layer made of a Ni plating layer
- the step of forming the two plating layers includes the step of forming the second plating layer composed of the Au plating layer.
- the method further includes a step of melting and bonding a solder layer made of an Au-Sn alloy alloy on the surface of the second plating layer in the region where the electronic component housing member is bonded. If comprised in this way, a solder layer can be easily formed on the surface of the area
- the electronic component housing member of the second plating layer is joined in the step of oxidizing the surface of the first plating layer.
- the method includes a step of exposing the surface of the first mesh layer by removing at least a part of the second mesh layer using a laser without masking the region.
- the step of oxidizing the surface of the first plating layer exposes the surface of the first plating layer in a ring shape.
- Including the step of acidifying With this configuration, the area to be removed can be made narrower as compared with the case where the second plating layer is removed from all the areas inside the area where the electronic component housing member is joined.
- the time required for the step of removing the second plating layer can be shortened.
- the second method is used.
- the step of removing at least a part of the sticking layer includes a step of removing the second sticking layer while leaving the second sticking layer inside the region to be removed.
- the step of exposing the surface of the first plating layer to oxidize is performed by exposing the first coating layer to oxidization.
- Boundary line force with the region where the electronic component housing member is joined at the corner of the hermetic sealing cap is arranged outside the boundary line in the region other than the corner of the hermetic sealing cap.
- the step of removing at least a part of the second plating layer to expose the surface of the first plating layer includes the second plating layer.
- the method includes a step of removing at least a part of the layer and removing a part of the surface of the first plating layer by a predetermined depth.
- FIG. 1 is a cross-sectional view showing the structure of an electronic component storage package according to a first embodiment of the present invention.
- FIG. 2 is a cross-sectional view showing the structure of the hermetic sealing cap according to the first embodiment of the present invention.
- FIG. 3 is a bottom view showing the structure of the hermetic sealing cap according to the first embodiment of the present invention.
- Is 4] A sectional view showing a detailed structure of the hermetic sealing cap according to the first embodiment of the present invention.
- FIG. 5 is a sectional view for explaining a method of manufacturing the hermetic sealing cap according to the first embodiment of the present invention shown in FIG.
- FIG. 6 A sectional view for explaining the method of manufacturing the hermetic sealing cap according to the first embodiment of the present invention shown in FIG.
- FIG. 7 A sectional view for explaining a method of manufacturing the hermetic sealing cap according to the first embodiment of the present invention shown in FIG.
- FIG. 8 A sectional view for explaining the method of manufacturing the hermetic sealing cap according to the first embodiment of the present invention shown in FIG.
- FIG. 9 A sectional view for explaining a method of manufacturing the hermetic sealing cap according to the first embodiment of the present invention shown in FIG.
- FIG. 10 is a cross-sectional view for explaining a method of manufacturing the hermetic sealing cap according to the first embodiment of the present invention shown in FIG.
- FIG. 11 is a cross-sectional view for explaining a method for manufacturing the electronic component storage package using the hermetic sealing cap shown in FIG. 1.
- FIG. 12 is a diagram for explaining an experiment conducted for confirming the effect of the hermetic sealing cap according to the first embodiment of the present invention.
- FIG. 13 A view for explaining an experiment conducted for confirming the effect of the hermetic sealing cap according to the first embodiment of the present invention.
- FIG. 14 is a diagram for explaining an experiment conducted for confirming the effect of the hermetic sealing cap according to the first embodiment of the present invention.
- FIG. 15 is a view for explaining an experiment conducted for confirming the effect of the hermetic sealing cap according to the first embodiment of the present invention.
- FIG. 16 is a diagram for explaining an experiment conducted for confirming the effect of the hermetic sealing cap according to the first embodiment of the present invention.
- FIG. 18 is a diagram for explaining an experiment conducted for confirming the effect of the hermetic sealing cap according to the first embodiment of the present invention.
- FIG. 19 is a bottom view showing the structure of a hermetic sealing cap according to a second embodiment of the present invention.
- FIG. 20 is a diagram for explaining an experiment conducted for confirming the effect of the hermetic sealing cap according to the second embodiment of the present invention.
- the electronic component storage package stores a hermetic sealing cap 1, an electronic component 10 such as a crystal resonator, and the electronic component 10. And an electronic component housing member 20 for the purpose.
- the electronic component storage member 20 includes a ceramic substrate 21 having an insulating material force such as alumina, and a ceramic frame 22 having an insulating material force such as alumina constituting a storage space on a predetermined region on the surface of the ceramic substrate 21. Is included.
- the electronic component 10 is mounted on the ceramic substrate 21 located in the storage space surrounded by the ceramic frame body 22 via the bumps 11.
- a tungsten layer 23 and a Ni—Co alloy layer 24 are formed on the upper surface of the ceramic frame 22.
- the Ni—Co alloy layer 24 on the upper surface of the ceramic frame 22 is joined to the solder layer 5 of the hermetic sealing cap 1 described later.
- the hermetic sealing cap 1 according to the first embodiment of the present invention includes Fe-Ni as shown in FIG.
- the Ni plating layer 3 is the “first plating layer” of the present invention
- the Au plating layer 4 is an example of the “second plating layer” of the present invention.
- the substrate 2 is formed to have a thickness of about 1.85 mm (length) X about 2.35 mm (width) and about 0.08 mm.
- the Ni plating layer 3 is formed with a thickness of about 2 m. Further, the surface of the portion of the Ni plating layer 3 located in the oxidation region S1 (see FIG. 3) is oxidized. As a result, in the acid region S1 on the lower surface of the Ni plating layer 3, the solder wettability is lowered. Further, as shown in FIG. 4, the oxidized region S1 of the Ni plating layer 3 is formed in a groove shape having a depth D1 (about 0.1 ⁇ m). Further, as shown in FIG.
- the oxide region S1 of the Ni plating layer 3 is formed in a ring shape having a width of about 0.20 mm as viewed in a plan view.
- the Au plating layer 4 is formed with a thickness of about 0.02 m, and the surface is less likely to be oxidized than the Ni plating layer 3.
- the Au plating layer 4 is disposed on the side surface and the top surface of the Ni plating layer 3 and inside the acid region S1 on the bottom surface of the Ni plating layer 3. ing.
- the Au plating layer 4 is formed in the joining region S2 before the solder layer 5 is fused, and the Au in the Au plating layer 4 diffuses into the solder layer 5 when the solder layer 5 is fused.
- the solder layer 5 is formed on the surface of the Ni plating layer 3. Further, as shown in FIG. 3, the solder layer 5 is formed in a joining region S 2 where the electronic component housing member 20 on the lower surface of the Ni plating layer 3 is joined.
- the solder layer 5 has a width W1 of about 0.36 mm at the four corners of the hermetic sealing cap 1 in a plan view and other than the corners of the hermetic sealing cap 1. This part has a width W2 of about 0.25 mm.
- the Au plating layer 4 located in the acid region S1 with a laser intensity of about 10 W and a width of about 0.2 Omm is removed, and the Ni plating layer 3 also remove part of the surface by a depth of about 0.1 m (Dl).
- the surface of the Ni plating layer 3 exposed by the removal of the Au plating layer 4 is oxidized in a short time by heat generated by laser irradiation. In this way, the surface of the Ni plating layer 3 is oxidized in the acid region S1.
- the surface of the bonding region S2 on the lower surface of the Au plating layer 4 is made of an Au—Sn alloy (Au: about 80% by mass) and about 1.85 mm ( Vertical) X approx. 2.35mm (horizontal) profile, approx. 1.55mm (vertical) X approx. 2.05mm (horizontal) opening, and a ring with a thickness of approx. 0.025mm to approx. 0.03 8mm
- the solder 5a is placed.
- a storage member 20 is prepared. Thereafter, the electronic component 10 having the bumps 11 on the upper surface of the ceramic substrate 21 is attached. Then, the solder layer 5 of the hermetic sealing cap 1 formed by the above-described method is disposed so as to be in contact with the upper surface of the ceramic frame 22. Thereafter, the solder layer 5 is again melted in a vacuum at a temperature of about 280 ° C. to about 310 ° C., whereby the hermetic sealing cap 1 is joined to the upper surface of the ceramic frame 22. At this time, as shown in FIG. 1, the Au layer 25 (see FIG. 11) diffuses into the solder layer 5 that also has Au—Sn alloy power. In this way, the electronic component storage package according to the first embodiment of the present invention is formed.
- the electronic component storage member 20 of the hermetic sealing cap 1 is The surface of the Ni plating layer 3 is exposed by removing the Au plating layer 4 of the acid plating region S 1 inside the bonding region S2 to be bonded and exposed to the oxidation plating region S1 from which the Au plating layer 4 is removed.
- the solder wettability of the acid plating region S 1 of the Ni plating layer 3 can be reduced, so that when the electronic component housing member 20 is hermetically sealed, Thus, it is possible to suppress the solder layer 5 from spreading inward on the Ni plating layer 3 of the hermetic sealing cap 1.
- the Au plating layer 4 that is less oxidized than the Ni plating layer 3 on the surface of the Ni plating layer 3, the surface of the Ni plating layer 3 is exposed and oxidized, so that the Au plating layer 4 Since it is not necessary to mask the bonding area S2 where the electronic component storage member 20 of the Au plating layer 4 is bonded in order to suppress the acidity of the surface of the bonding area S2 where the electronic component storage member 20 is bonded, Complicating the manufacturing process of the hermetic sealing cap 1 can be suppressed.
- the exposed acid region S1 of the Ni plating layer 3 is formed in a ring shape so that the electronic component housing member 20 is joined to the inside of the joining region S2.
- the region to be removed can be narrowed, so that the time required for the removal of the Au plating layer 4 using a laser can be shortened.
- the Au plating layer 4 in the region inside the exposed acid region S1 of the Ni plating layer 3, the exposed oxidation region of the Ni plating layer 3 is formed. Corrosion of the area inside S1 can be suppressed by the Au plating layer 4.
- Samples according to Examples 1 to 3 were manufactured using the same manufacturing process as the above-described hermetic sealing cap 1 according to the first embodiment.
- the samples according to Examples 1 to 3 were prepared using ring-shaped solder 5a having thicknesses of about 0.025 mm, about 0.030 mm, and about 0.038 mm, respectively.
- the sample according to Comparative Example 1 removes the inside of the joining region S2 where the electronic component housing member 20 on the lower surface of the Au plating layer 4 is joined.
- the sample according to Comparative Example 1 was manufactured using ring-shaped solder 5a having a thickness of about 0.038 mm. For these samples, the width and thickness of the solder layer were measured. The results are shown in FIG. 12 and FIG.
- FIGS. 16 and 17 show the measurement positions (A to H) of the width of the solder layer and the measurement positions (points I to P) of the solder layer.
- the width of the solder layer 5 of the sample according to Examples 1 to 3 is related to the thickness of the ring-shaped solder 5a used for forming the solder layer 5.
- the solder layer 5 is hermetically sealed by reducing the solder wettability by oxidizing the acid region S1 inside the bonding region S2 of the solder layer 5 to reduce the solder wettability. This is probably because we were able to suppress wetting and spreading on the surface of 1.
- the sample according to Comparative Example 1 has a larger solder layer width than the samples according to Examples 1 to 3, and in particular, the measurement positions (E, F, and V) of the four corners of the hermetic sealing cap. In G and H), it was found that the width of the solder layer was greatly increased. This is considered to be due to the following reasons. That is, in the sample according to Comparative Example 1, the solder layer spreads on the surface of the hermetic sealing cap and immediately, especially at the measurement positions (E, F, G and H) of the four corners of the hermetic sealing cap. This is thought to be because the solder layer has the ability to wet and spread on the surface of the hermetic sealing cap inward. A hatched area S3 in FIG.
- the width of the solder layer at the measurement positions (E, F, G and H) of the four corners of the hermetic sealing cap is The width of the solder layer at the center measurement position (A, B, C and D) on the four sides of the hermetic sealing cap is larger.
- the thickness of the solder layer 5 of the sample according to Example 1 was larger than the thickness of the solder layer of the sample according to Comparative Example 1. Specifically, the thickness of the solder layer 5 of the sample according to Example 1 was about 10 / zm larger than the thickness of the solder layer of the sample according to Comparative Example 1.
- the thickness of the solder layer of the sample according to Comparative Example 1 was approximately the same as the thickness of the solder layer 5 of the samples of Examples 2 and 3. This is thought to be due to the following reasons It is done. In other words, in the sample according to Comparative Example 1, the solder layer wets and spreads on the surface of the hermetic sealing cap, so it is considered that the thickness of the solder layer is reduced accordingly.
- the solder layer at the measurement positions (points I, J, K, and L) of the four corners of the hermetic sealing cap The thickness was larger than the thickness of the solder layer at the center measurement position (M point, N point, O point and P point) of the four sides of the hermetic sealing cap.
- the acid region S1 of the Ni plating layer 3 of the samples according to Examples 1 to 3 was measured by ESCA850 (manufactured by Shimadzu Corporation). In this experiment, it was found that a NiO layer (not shown) having a thickness of about 1 nm to about 2 nm was formed on the surface of the acid region S1 of the Ni plating layer 3. As described above, in the first embodiment, a NiO layer having a relatively large thickness (about 1 nm to about 2 nm) can be formed by oxidizing the surface of the Ni plating layer 3 using a laser. It is considered that the acid region S1 of the Ni plating layer 3 can be reliably oxidized.
- the sample according to Example 4 was manufactured using the same manufacturing process as the electronic component storage package according to the first embodiment described above.
- the sample according to Example 4 was prepared using the hermetic sealing cap 1 according to Example 1 above.
- a sample according to Comparative Example 2 was prepared using the sample according to Comparative Example 1 described above.
- the other structure and manufacturing process of the sample according to Comparative Example 2 are the same as those of the sample according to Example 4.
- the hermetic sealing cap was peeled off with the force of the electronic component housing member, and wetting and spreading of the solder layer were observed. The results are shown in FIG. 14 and FIG.
- the solder layer 5 remains on the surface of the hermetic sealing cap 1 after hermetic sealing, as in the case of the hermetic sealing cap 1 being manufactured. It has been found that it is possible to suppress spreading over the top. In the sample according to Comparative Example 2, it was found that the solder layer spreads further on the surface of the hermetic sealing cap even after hermetic sealing. Na A hatched area S4 in FIG. 18 shows an area in which the solder layer of the sample according to Comparative Example 2 spreads more than the sample according to Example 4.
- the electronic component storage package according to the second embodiment of the present invention is hermetically sealed on the upper surface of the ceramic frame 22 of the electronic component storage member 20 (see Fig. 1), as in the first embodiment. Cap 30 (see Figure 19) is joined. The remaining structure of the electronic component storage package according to the second embodiment is the same as that of the first embodiment.
- the structure of the hermetic sealing cap 30 according to the second embodiment of the present invention will be described with reference to FIG.
- the Au plating layer 32 is removed and the surface of the Ni plating layer 31 is exposed in the oxidized region S5, as in the first embodiment.
- the surface of the exposed Ni plating layer 31 is oxidized.
- the solder wettability of the oxide region S5 on the lower surface of the Ni plating layer 31 is lowered.
- the Ni plating layer 31 is the “first plating layer” of the present invention.
- the oxidized region S5 of the Ni plating layer 31 is formed in a ring shape having a width W3 of about 0.20 mm, and the four corners of the hermetic sealing cap 30 are formed. Around the part, it is formed to have a width W4 slightly larger than about 0.20 mm.
- an Au plating layer 32 is formed in a region inside the acid plating region S5 of the Ni plating layer 31. Further, the boundary line between the nickel plating layer 31 and the joining region S6 of the acid region S5 is formed by a line having four straight portions S5a along the outer periphery of the hermetic sealing cap 30. Au message
- the layer 32 is an example of the “second layer” in the present invention.
- the solder layer 33 is formed in the joining region S6 of the electronic component housing member 20 on the lower surface of the Ni plating layer 31 so as to have a predetermined thickness.
- the solder layer 33 (joining region S6) is arranged outside the intersection S5b of at least two straight portions S5a of the acid plating region S5 of the Ni plating layer 31. . That is, the boundary line between the acid plating region S5 of the Ni plating layer 31 and the joining region S6 is disposed outside the boundary line in the region other than the corner portion.
- the solder layer 33 has a width W5 of about 0.25 mm at a portion other than the corner portion of the hermetic sealing cap 30, and at the four corner portions of the hermetic sealing cap 30. 0. It has a width W6 of 265mm.
- the cap 30 for hermetic sealing is used. Since it is possible to suppress the solder layer 33 from becoming large at the four corners, it is possible to suppress the accumulation of solder at the four corners of the hermetic sealing cap 30. Become. As a result, the thickness force of the solder layer 33 at the four corners of the hermetic sealing cap 30 is suppressed from becoming larger than the thickness of the solder layer 33 at portions other than the four corners of the hermetic sealing cap 30. It becomes possible.
- the method for manufacturing the hermetic sealing cap 30 and the electronic component storage package according to the second embodiment is the same as that of the first embodiment, and a description thereof will be omitted.
- the sample according to Example 5 was manufactured using the same manufacturing process as the hermetic sealing cap 30 according to the second embodiment described above.
- the sample according to Example 5 was manufactured using ring-shaped solder 5a having a thickness of about 0.038 mm. For this sample, the thickness of the solder layer 33 was measured. The results are shown in FIG.
- the measurement positions (I point, J point, K point, and The difference between the thickness of the solder layer 33 at the point L) and the thickness of the solder layer 33 at the center measurement position (M point, N point, O point and P point) of the four sides of the hermetic sealing cap 30 is It turned out to be smaller.
- the joining region S6 where the solder layer 33 is formed is formed to have a width W5 of about 0.25 mm at a portion other than the corner portion of the hermetic sealing cap 30, and the airtight sealing cap 30 4
- a width W6 of about 0.265 mm which is slightly larger than the width W5
- Example 1 with a larger corner width W1 (Corner width W1: about Compared to 36 mm, width W2: 0.25) other than the corner, it is possible to prevent the solder layer 33 from becoming large at the four corners of the hermetic sealing cap 30. Therefore, it is possible to suppress the accumulation of solder at the four corners of the hermetic sealing cap 30.
- the thickness of the solder layer 33 of the sample according to Example 5 was larger than the thickness of the solder layer of the sample according to Comparative Example 1 in the same manner as the sample according to Example 1.
- the force shown in the example in which the solder layer is formed on the hermetic sealing cap in order to join the electronic component housing member is not limited to this.
- the solder layer may not be formed on the hermetic sealing cap.
- a ring-shaped solder is disposed between the joints of the hermetic sealing cap and the electronic component housing member, and the solder is melted. Good.
- the force showing an example in which the oxidized region of the Ni plating layer is formed to have a width of about 0.20 mm is not limited to this.
- Ni layer The oxidized region may be formed to have a width other than about 0.20 mm.
- the oxidized region of the Ni plating layer is preferably formed to have a width of about 0.02 mm or more.
- the oxidized region of the Ni plating layer is formed to have a width of about 0.02 mm or more, the solder layer force N formed outside the oxidized region of the Ni plating layer N It is possible to easily suppress the wetting and spreading beyond the oxidized region of the i plating layer and in contact with the Au plating layer formed inside the oxidized region of the Ni plating layer.
- the force showing an example in which the Au plating layer that is less oxidized than the Ni plating layer is formed on the surface of the Ni plating layer is not limited to this, On the surface of the Ni plating layer, a plating layer made of another metal that is less easily oxidized than the Ni plating layer may be formed.
- the force showing an example in which the Au plating layer is arranged inside the oxidized region of the Ni plating layer is not limited to this.
- the present invention is not limited to this. It is not necessary to form an Au plating layer inside the oxidized region.
- the present invention is not limited to this, and the solder layer Even if the Au content is other than 80% by mass, or solder with other composition may be used.
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Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
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US11/915,914 US7790988B2 (en) | 2006-02-15 | 2007-02-13 | Hermetic sealing cap, electronic component accommodation package, and method for producing hermetic sealing cap |
KR1020077019707A KR101115245B1 (ko) | 2006-02-15 | 2007-02-13 | 기밀 밀봉용 캡, 전자 부품 수납용 패키지 및 기밀 밀봉용캡의 제조 방법 |
CN2007800004975A CN101322242B (zh) | 2006-02-15 | 2007-02-13 | 气密密封用盖、电子器件收纳用封装体和气密密封用盖的制造方法 |
JP2007533799A JP4630338B2 (ja) | 2006-02-15 | 2007-02-13 | 気密封止用キャップ、電子部品収納用パッケージおよび気密封止用キャップの製造方法 |
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JP2006-037767 | 2006-02-15 | ||
JP2006037767 | 2006-02-15 |
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PCT/JP2007/052461 WO2007094284A1 (ja) | 2006-02-15 | 2007-02-13 | 気密封止用キャップ、電子部品収納用パッケージおよび気密封止用キャップの製造方法 |
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US (1) | US7790988B2 (ja) |
JP (1) | JP4630338B2 (ja) |
KR (1) | KR101115245B1 (ja) |
CN (1) | CN101322242B (ja) |
TW (1) | TWI380414B (ja) |
WO (1) | WO2007094284A1 (ja) |
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JP2009055283A (ja) * | 2007-08-27 | 2009-03-12 | Epson Toyocom Corp | 圧電デバイスおよびその製造方法 |
US20120126347A1 (en) * | 2010-11-19 | 2012-05-24 | Analog Devices, Inc. | Packages and methods for packaging |
JP2017011249A (ja) * | 2015-06-17 | 2017-01-12 | 株式会社ソーデナガノ | 電子部品用パッケージの金属カバー |
JP2017028255A (ja) * | 2015-07-15 | 2017-02-02 | 日立金属株式会社 | 気密封止用キャップおよび電子部品収納パッケージ |
JP2018014581A (ja) * | 2016-07-20 | 2018-01-25 | 日本電波工業株式会社 | パッケージ及び圧電デバイス |
JP2018074021A (ja) * | 2016-10-31 | 2018-05-10 | 日立金属株式会社 | 気密封止用リッドの製造方法 |
JP2018113282A (ja) * | 2017-01-06 | 2018-07-19 | 日立金属株式会社 | 気密封止用キャップおよび電子部品収納パッケージ |
US10183360B2 (en) | 2013-10-03 | 2019-01-22 | Hitachi Metals, Ltd. | Hermetic sealing cap, electronic component housing package, and method for manufacturing hermetic sealing cap |
JP2020053554A (ja) * | 2018-09-27 | 2020-04-02 | 日立金属株式会社 | 気密封止用キャップおよびその製造方法 |
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DE112009001079B4 (de) * | 2008-05-02 | 2020-02-06 | Hitachi Metals, Ltd. | Hermetisch abdichtende Kappe |
CA2704683A1 (en) * | 2010-05-28 | 2010-08-12 | Ibm Canada Limited - Ibm Canada Limitee | Grounded lid for micro-electronic assemblies |
US8975105B2 (en) * | 2011-06-20 | 2015-03-10 | Raytheon Company | Hermetically sealed wafer packages |
ITTO20110876A1 (it) * | 2011-09-30 | 2013-03-31 | Stmicroelectronics Malta Ltd | Metodo di saldatura di un cappuccio ad uno strato di supporto |
CN102658409B (zh) * | 2012-05-31 | 2014-12-31 | 中国电子科技集团公司第四十三研究所 | 电子封装外壳用钛合金环框的拼焊方法 |
CN103107141A (zh) * | 2013-02-16 | 2013-05-15 | 马国荣 | 局部镀金的盖板结构 |
JP6387818B2 (ja) * | 2014-12-11 | 2018-09-12 | 日立金属株式会社 | 気密封止用蓋材の製造方法 |
KR102335720B1 (ko) * | 2017-03-27 | 2021-12-07 | 삼성전자주식회사 | 표면 실장용 금속 유닛 및 이를 포함하는 전자 장치 |
CN113707618A (zh) * | 2021-08-26 | 2021-11-26 | 中国电子科技集团公司第五十八研究所 | 一种耐盐雾腐蚀平行缝焊合金盖板及其制备方法 |
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Also Published As
Publication number | Publication date |
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CN101322242B (zh) | 2010-09-01 |
CN101322242A (zh) | 2008-12-10 |
TWI380414B (en) | 2012-12-21 |
KR101115245B1 (ko) | 2012-03-13 |
KR20080093360A (ko) | 2008-10-21 |
US7790988B2 (en) | 2010-09-07 |
JP4630338B2 (ja) | 2011-02-09 |
JPWO2007094284A1 (ja) | 2009-07-09 |
US20090301749A1 (en) | 2009-12-10 |
TW200737432A (en) | 2007-10-01 |
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