WO2006132063A1 - Substrat multicouche et ensemble semi-conducteur - Google Patents

Substrat multicouche et ensemble semi-conducteur Download PDF

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Publication number
WO2006132063A1
WO2006132063A1 PCT/JP2006/309888 JP2006309888W WO2006132063A1 WO 2006132063 A1 WO2006132063 A1 WO 2006132063A1 JP 2006309888 W JP2006309888 W JP 2006309888W WO 2006132063 A1 WO2006132063 A1 WO 2006132063A1
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WO
WIPO (PCT)
Prior art keywords
porous fluororesin
base material
circuit board
porous
electrode
Prior art date
Application number
PCT/JP2006/309888
Other languages
English (en)
Japanese (ja)
Inventor
Yuichi Idomoto
Yasuhiro Okuda
Yasuhito Masuda
Fumihiro Hayashi
Original Assignee
Sumitomo Electric Industries, Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries, Ltd. filed Critical Sumitomo Electric Industries, Ltd.
Publication of WO2006132063A1 publication Critical patent/WO2006132063A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H01L23/49883—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials the conductive materials containing organic materials or pastes, e.g. for thick films
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/145—Organic substrates, e.g. plastic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49833—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0104—Properties and characteristics in general
    • H05K2201/0116—Porous, e.g. foam
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/015—Fluoropolymer, e.g. polytetrafluoroethylene [PTFE]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10378—Interposers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials

Definitions

  • the present invention relates to a multilayer substrate having a structure in which a porous fluororesin substrate having a cylindrical electrode made of a conductive through-hole and a circuit board are integrated in a state in which the respective electrodes can conduct.
  • the multilayer substrate of the present invention can be used for continuity inspection of a circuit board having a narrow electrode pitch or assembly of a semiconductor package having the circuit board.
  • the present invention also relates to a semiconductor package in which a circuit board and a semiconductor chip are assembled via the porous fluororesin base material.
  • Epoxy resin-impregnated glass cloth pre-preda is used as an adhesive sheet when bonding IC chip mounting boards to metal plates used for heat sinks and reinforcing materials.
  • this adhesive sheet has a large thickness, and the adhesive oozes out at the time of heat-bonding to contaminate the through hole, or the adhesive oozes out from the side surface and may cause a package failure. Also, when the adhesive is cured, bubbles may enter inside the adhesive and cause package cracks.
  • Japanese Patent Application Laid-Open No. 1-6 4 9 2 7 (hereinafter referred to as “Document 1”) has an adhesive resin layer formed on both sides of a porous fluororesin layer.
  • An IC package adhesive sheet has been proposed in which the fluororesin layer retains porous voids.
  • the IC package adhesive sheet is manufactured by a method in which an adhesive resin solution or melt such as epoxy resin is applied to both surfaces of a porous fluororesin sheet, or an adhesive resin sheet is stacked. ing. The adhesive resin is not completely impregnated in the thickness direction of the porous fluororesin layer, but retains the porous space of the porous fluororesin layer.
  • the IC package adhesive sheet is interposed between an IC chip mounting substrate and a metal plate (stiffener ring) and hot pressed.
  • a method of forming an IC package is disclosed.
  • “Electronic Materials” July 2003, pages 87-92 includes an adhesive sheet having the same layer structure as the above-mentioned IC package adhesive sheet in the technical field of electronic materials.
  • a method of using it as an adhesive sheet having a stress relaxation function has been proposed. With the downsizing of IC packages' higher density, the area array method has been adopted and BGA (Ball Grid Ar ray) using solder balls as the external terminals is progressing. The stress release mechanism is lost.
  • BGA Ball Grid Ar ray
  • a single-layer adhesive sheet in which a porous polytetrafluoroethylene (hereinafter abbreviated as “porous PTFE”) sheet is impregnated with an adhesive resin such as an epoxy resin A three-layer adhesive sheet in which a thick porous PTFE sheet is inserted and laminated between two single-layer adhesive sheets is disclosed.
  • porous PTFE sheets with an elastic modulus of about 10 to 20 OMPa at room temperature these adhesive sheets are given a stress relaxation function.
  • the three-layer adhesive sheet is interposed between the circuit board on which a large number of solder poles are arranged as external terminals in a grid pattern (area array) and the IC die (semiconductor chip), and thermocompression bonding is performed.
  • An example of an IC package is shown.
  • the mismatch of dimensional changes due to thermal expansion between them is alleviated.
  • Reference 2 shows an example in which the IC package is connected to a mounting board with solder balls of external terminals.
  • a three-layer adhesive sheet with stress relaxation function the stress between the IC die and the mounting board is isolated.
  • the electrodes and circuit of the IC die are used. Lead wire or bond for connection with substrate electrode It is necessary to use a ding wire.
  • Reference 2 above shows an example in which a hole is formed in the center of the three-layer adhesive sheet, and the electrode of the IC die and the electrode of the circuit board are electrically connected to each other through a lead wire or a bonding wire. .
  • this method it is difficult to reduce the distance between the lead wires and the bonding wires, so that it is not possible to cope with the case where the pitch between the electrodes of the circuit board is narrow.
  • stress is applied to the stress relaxation adhesive sheet, a load is applied to the lead wire or bonding wire, and the lead wire or bonding wire may be cut due to metal fatigue.
  • the circuit device disclosed in Document 3 is excellent in mechanical bonding strength between the flip chip and the interposer substrate, and between the interposer substrate and the heat spreader.
  • the circuit device has solder bumps mounted on the lower surface of the interposer substrate at a low density, and cannot accommodate an interposer substrate having a narrow pitch between electrodes.
  • a mold resin such as an epoxy resin does not have a stress relaxation function, the circuit device cannot sufficiently cope with an increase in various stresses and a drop impact. Disclosure of the invention
  • An object of the present invention is to provide a multilayer substrate in which a porous fluororesin base material having a cylindrical electrode that has a stress relaxation function and can also be applied to a circuit board having a narrow electrode pitch, and a circuit board. Is to provide.
  • Another object of the present invention is to provide a semiconductor package in which a porous fluororesin substrate, a circuit board, and a semiconductor chip are assembled without using a lead wire or a bonding wire that passes through a hole provided in the porous fluororesin layer. It is to provide.
  • porous fluorine A method of using, as a stress relaxation sheet, a porous fluororesin base material in which a plurality of through-holes are provided in the thickness direction of a resin sheet and a cylindrical electrode is formed on the inner wall surface of the through-hole by adhesion of a conductive metal I came up with it.
  • the porous fluororesin substrate used in the present invention has a cylindrical electrode in the thickness direction. Since the cylindrical electrode has a structure in which conductive metal such as plating particles adheres to the inner wall surface of the plurality of through holes provided in the porous fluororesin substrate, the thickness of the porous fluororesin sheet is increased. It does not impair elasticity, and is less likely to deteriorate even when subjected to repeated compressive forces.
  • the porous fluororesin base material is disposed between the circuit board and the semiconductor chip, and can serve as a kind of interposer having a stress relaxation function and a conduction function.
  • the porous fluororesin sheet By adjusting the size, pitch, and installation location of the through holes formed in the porous fluororesin sheet, if a cylindrical electrode that can be directly electrically connected to the circuit board electrode (internal terminal) is formed, the porous A lead wire that passes through a hole in the fluororesin sheet.
  • a multi-layer substrate that has a conduction function in addition to the stress relaxation function by integrating the porous fluororesin base material and the circuit board without using bonding wires. Can be obtained.
  • An adhesive layer or pressure-sensitive adhesive layer is provided on the porous fluororesin sheet, and a through-hole is formed through the adhesive layer or the pressure-sensitive adhesive layer.
  • the entire inner wall of the through-hole (adhesive layer or pressure-sensitive adhesive) Porous fluororesin substrate (porous fluororesin adhesive sheet or porous fluororesin pressure-sensitive adhesive sheet) with conductivity and adhesiveness or adhesiveness. ) Can be obtained.
  • a plurality of through-holes are provided in the thickness direction of the porous fluororesin sheet, and a porous electrode in which a cylindrical electrode is formed on the inner wall surface of the through-hole by adhesion of a conductive metal.
  • a multilayer substrate having a structure in which a fluororesin base and a circuit board are integrated in a state where the cylindrical electrode of the porous fluororesin base and the electrode of the circuit board are electrically connected .
  • the porous fluororesin sheet is provided with a plurality of through holes in the thickness direction of the porous fluororesin sheet, and a cylindrical electrode is formed on the inner wall surface of the through holes by the adhesion of a conductive metal.
  • the resin base material and the circuit board are integrated with the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board being electrically connected, and the porous fluororesin base material On the surface opposite to the circuit board side, the porous fluororesin base material and the semiconductor chip are electrically connected to the cylindrical electrode of the porous fluororesin base material and the electrode of the semiconductor chip.
  • FIG. 1 is a cross-sectional view showing an example of the layer structure of the multilayer substrate of the present invention.
  • FIG. 2 is a cross-sectional view showing an example of a porous fluororesin substrate provided with an adhesive layer and a cylindrical electrode of the present invention.
  • FIG. 3 is a cross-sectional view showing an example of a porous fluororesin base material having a structure in which the adhesive layer of the present invention and a cylindrical electrode are provided, and the open end of the cylindrical electrode is closed with a lid of a conductive material. It is. BEST MODE FOR CARRYING OUT THE INVENTION
  • fluororesin forming the porous fluororesin sheet used in the present invention examples include polytetrafluoroethylene (PTFE) and tetrafluoroethylene. / Hexafluoropropylene copolymer (FEP), tetrafluoroethylene / perfluoroalkyl butyl ether copolymer (PFA), polyvinylidene fluoride (PVDF), polyvinylidene fluoride copolymer And ethylene / tetrafluoroethylene copolymer (ETFE resin).
  • PTFE polytetrafluoroethylene
  • FEP Hexafluoropropylene copolymer
  • PFA tetrafluoroethylene / perfluoroalkyl butyl ether copolymer
  • PVDF polyvinylidene fluoride copolymer
  • ETFE resin ethylene / tetrafluoroethylene copolymer
  • PTFE is particularly preferred because of its excellent heat resistance, chemical resistance, processability, mechanical properties, and dielectric properties (low dielectric constant).
  • Examples of the method for producing the porous fluororesin sheet include a pore making method, a phase separation method, a solvent extraction method, a stretching method, and a laser irradiation method.
  • the porous fluororesin sheet preferably has a porosity (ASTM D-792) in the range of 20 to 80%.
  • the porous fluororesin sheet preferably has an average pore diameter of 10 m or less or a pebble point of 2 kPa or more. From the viewpoint of fine pitch formation of a normal electrode serving as a conducting part, the average pore diameter is 1 ⁇ m or less. Alternatively, the bubble point is more preferably 10 kPa or more.
  • the thickness of the porous fluororesin sheet can be appropriately selected according to the purpose of use and use location, but is usually 3 mm or less, preferably 1 mm or less, and the lower limit is usually 5 / zm, preferably 10 / zm.
  • a stretched porous PTFE sheet produced by a stretching method is particularly preferable because it has excellent heat resistance, processability, mechanical properties, dielectric properties, and the like and has a uniform pore size distribution.
  • the stretched porous PTFE sheet can be produced, for example, by the method described in JP-B-42-13560.
  • a liquid lubricant is mixed with PTFE green powder and extruded into a tube or plate by ram extrusion.
  • the plate is rolled with a rolling roll. After the extrusion rolling process, the liquid lubricant is removed from the extruded product or the rolled product as necessary.
  • an unsintered porous PTFE sheet is obtained.
  • Unsintered porous PTFE sheet has high strength when heated to a temperature of 327 ° C or higher, which is the melting point of PTFE, while being fixed so that it does not shrink.
  • An expanded porous PTFE sheet is obtained.
  • Tubular extrusions When uniaxially drawn and sintered, an expanded porous PTFE tube is obtained.
  • the stretched porous PTFE tube can be made into a sheet by cutting it in the longitudinal direction.
  • the stretched porous PTFE sheet has a fine mesh-like porous structure composed of a large number of very thin fibrils formed by PTFE and a large number of nodes connected to each other by the fibrils. Therefore, in the stretched porous PTFE sheet, the resin part of the porous structure is fibrils and nodes, and the inside of the porous structure is a space formed by the fibrils and nodes (“porous void” or “porous space” It is also called).
  • the stretched porous PTFE sheet has excellent elasticity in the film thickness direction, and also has excellent elastic recovery.
  • the porous fluororesin base material used in the present invention is provided with a plurality of through holes in the thickness direction of the porous fluororesin sheet, and a cylindrical electrode formed by adhesion of a conductive metal is formed on the inner wall surface of the through hole. It has a formed structure.
  • the porous fluororesin substrate used in the present invention may have an adhesive layer formed of an adhesive resin on one side or both sides.
  • the through hole is provided in all layers including the adhesive layer, and the entire inner wall of the through hole (including the adhesive layer portion) is electrically conductive. It has a structure in which a cylindrical electrode is formed by adhesion of a conductive metal.
  • an adhesive layer can be provided.
  • conductive metal is deposited by depositing plated particles by electroless plating or a combination of electroless plating and electrical plating.
  • a method of providing a plurality of through holes in the thickness direction of the porous fluororesin sheet and a method of forming a cylindrical electrode by adhesion of a conductive metal on the inner wall surface of the through holes are not particularly limited. The method described can be exemplified.
  • a resin material is preferably used as the material of the mask layer.
  • a porous fluororesin sheet formed from a fluororesin is preferably used.
  • a fluororesin nonporous sheet, a nonporous resin sheet composed of a resin material other than fluororesin, A porous resin sheet can also be used.
  • An adhesive tape or sheet can also be used as the mask layer. From the viewpoint of the balance between fusibility between layers and peelability, it is preferable to use a porous fluororesin sheet having the same quality as the porous fluororesin sheet as the material of the mask layer.
  • Mask layers are arranged on both sides of the porous fluororesin sheet and are generally integrated by fusion.
  • a stretched porous PTFE sheet is used as the porous fluororesin sheet, it is preferable to use the same stretched porous PTFE sheet as the mask layer.
  • These three layers can be formed into a laminate in which the respective layers are fused by thermocompression bonding. This laminate can be easily peeled off in a later step.
  • a plurality of through holes are formed in the laminated body in the thickness direction.
  • the method of forming the through-hole is as follows: i) mechanical drilling method, ii) etching by optical abrasion method, iii) ultrasonic head with at least one transducer at the tip And a method of punching by applying ultrasonic energy to the tip of the vibrator.
  • a machining method such as pressing, punching, or drilling can be employed.
  • the machining method for example, 1 0 0 A through hole having a relatively large diameter of ⁇ m or more, in many cases 200 ⁇ m or more, and even 300 ⁇ m or more can be formed at low cost. Through holes with smaller diameters can also be formed by machining.
  • the through-hole is formed by the optical ablation method
  • light is applied to the surface of the laminate through a light shielding sheet (mask) having a plurality of independent light transmission portions (openings) in a predetermined pattern.
  • This is a method of forming a pattern-like through hole by irradiating.
  • the portions where light is transmitted through and irradiated from the plurality of openings of the light shielding sheet are etched to form through holes.
  • a through hole having a relatively small diameter of 20 to 15 / m, in many cases 25 to: L 0 to m, or even 30 to 80 ⁇ m is formed. be able to.
  • holes with smaller diameters can be formed if necessary. Examples of irradiation light include synchrotron radiation and laser light.
  • a pattern-shaped through hole is formed by applying ultrasonic energy to the laminate using an ultrasonic head having at least one vibrator at the tip.
  • Ultrasonic energy is applied only to the vicinity where the tip of the vibrator contacts, and the temperature rises locally due to the vibrational energy of the ultrasonic wave, and the resin is easily cut and removed to form a through hole.
  • the through-holes When forming the through-holes, it is possible to employ a method of impregnating a soluble polymer such as polymethylol methacrylate or paraffin in a porous structure of the porous fluororesin sheet in a solution or in a molten state and solidifying it after solidification. .
  • This method is preferable because the porous structure of the inner wall of the through hole is easily retained.
  • the soluble polymer or paraffin can be removed by dissolving or melting.
  • the shape of the through-hole is arbitrary, such as a circle, an ellipse, a star, an octagon, a hexagon, a rectangle, and a triangle.
  • the diameter of the through-hole can be reduced to 5 to 1 0 0 // m, or even 5 to 30 ⁇ ⁇ , in applications where small-diameter through holes are suitable.
  • the diameter of the through-hole is usually more than 1 00 ⁇ ⁇ 3 ⁇ ⁇ ⁇ ⁇ ⁇ , often from 1 5 0 to 2 0 0 0 ⁇ m, Can be as large as 2 00 to 1 5 0 0 m.
  • the through hole matches the distribution of the electrodes on the circuit board. Accordingly, a plurality of patterns can be formed in a predetermined pattern.
  • a catalyst also referred to as a “plating catalyst” that promotes the reduction reaction of metal ions
  • the laminate is applied, for example, to a palladium mutin colloid catalyst application liquid. What is necessary is just to immerse, fully stirring.
  • a conductive metal is selectively attached to the inner wall surface.
  • an electroless plating method is suitable.
  • the catalyst for example, palladium mucin
  • the catalyst is activated. Specifically, it is immersed in an organic acid salt that is commercially available for activating the plating catalyst to dissolve tin and activate the catalyst.
  • an organic acid salt that is commercially available for activating the plating catalyst to dissolve tin and activate the catalyst.
  • conductive metal plating particles
  • a cylindrical electrode is formed. Examples of conductive metals include copper, nickel, silver, gold, and nickel alloys. When high conductivity is required, copper is preferably used.
  • the plating particles initially precipitate so as to be entangled with the resin portion (mainly fibrils) exposed on the inner wall surface of the through hole of the porous PTFE sheet, so by controlling the plating time, It can control the adhesion state of conductive metal.
  • a conductive metal layer is formed while maintaining a porous structure, and it is possible to provide elasticity in the film thickness direction as well as elasticity.
  • the thickness of the resin part having a fine porous structure is preferably 50 m or less.
  • the particle diameter of the conductive metal is preferably about 0.001 to 5 ⁇ .
  • the amount of the conductive metal deposited is preferably about 0.01 to 4. Og / ml.
  • the cylindrical electrode (conducting portion) produced above is preferably used with an antioxidant or coated with a noble metal or a noble metal alloy in order to improve oxidation prevention and electrical contact.
  • Precious metals include palladium, Umm, gold is preferred.
  • the thickness of the coating layer is preferably 0.05 to 0.5 m, more preferably 0.01 to 0.5 ⁇ . For example, when the conductive part is covered with gold, it is effective to cover the conductive metal layer with nickel of about 8 nm and then perform substitution gold plating.
  • a cylindrical electrode having a structure in which conductive metal particles adhere to the resin portion (fibril) is formed on the inner wall surface of the through hole.
  • a stress in the thickness direction is applied to the porous fluororesin substrate, the distance between the fibrils is reduced, so that the stress is relaxed and the structure of the cylindrical electrode is maintained without being destroyed. Therefore, even when a compressive force is repeatedly applied to the porous fluororesin base material, the cylindrical electrode hardly deteriorates.
  • the cylindrical electrode usually has a structure in which conductive metal adheres only to the inner wall surface of the through hole provided in the thickness direction of the porous fluororesin sheet.
  • one or both of the two open end portions of the cylindrical electrode may be closed to form a lid made of a conductive metal.
  • the lid when the lid is formed by closing the open end of the cylindrical electrode with a conductive material, the cylindrical electrode of the porous fluororesin substrate, the circuit electrode, and the electrode of the Z or semiconductor chip The contact area can be increased.
  • Porous fluororesin substrate having adhesive layer or adhesive layer
  • the porous fluororesin substrate of the present invention may be provided with an adhesive layer or a pressure-sensitive adhesive layer on one side or both sides.
  • the adhesive resin constituting the adhesive layer a resin material having adhesive ability is used.
  • adhesive resins include polyimide resins, epoxy resins, urethane resins, cyanate resins, silicone resins, polyamide resins, acrylic resins, A cyclic olefin resin containing a polar group, a heat-meltable fluororesin (for example, FEP and FFA), a modified polyphenylene ether resin, and the like can be mentioned.
  • a pressure-sensitive adhesive such as a pressure-sensitive adhesive can be used.
  • the porous fluororesin substrate having the adhesive layer or the pressure-sensitive adhesive layer of the present invention has a thickness direction of a multilayer sheet in which an adhesive resin layer or a pressure-sensitive adhesive layer is disposed on one side or both sides of the porous fluororesin sheet.
  • porous fluororesin substrate with an adhesive layer first of all, "adhesive resin layer Z porous fluororesin sheet Z adhesive resin layer” or “adhesive resin layer Z porous fluororesin sheet” A multilayer sheet having a layer structure is produced. Similarly, in order to produce a porous fluororesin substrate having an adhesive layer, first, “adhesive layer Z porous fluororesin sheet / adhesive layer” or “adhesive layer porous fluororesin sheet” A multilayer sheet having the following layer structure is prepared.
  • the porous fluororesin sheet As the porous fluororesin sheet, the aforementioned stretched porous PTFE sheet is used.
  • An adhesive resin layer (adhesive layer) is formed by applying a solution or melt of an adhesive resin to one or both sides of the porous fluororesin sheet, and applying heat-pressure bonding to a dry film formed from the adhesive resin. Form.
  • a similar method can be employed when forming the pressure-sensitive adhesive layer.
  • the adhesive resin layer or the pressure-sensitive adhesive layer is solidified in a form in which a part of the adhesive resin or the pressure-sensitive adhesive penetrates into the porous structure near the surface of the porous fluororesin sheet. Hold the porous structure.
  • the thickness of the adhesive resin layer or the pressure-sensitive adhesive layer is usually 5 to 300, preferably 8 to 200 / m, more preferably 10 to 100 ⁇ m. If the thickness of the adhesive resin layer or the pressure-sensitive adhesive layer is too thin, the adhesive strength or adhesive strength will be insufficient. If the thickness of the adhesive resin layer or pressure-sensitive adhesive layer is too thick, cracks will occur in the adhesive resin layer or pressure-sensitive adhesive layer. Easy to enter.
  • a porous fluororesin sheet provided with an adhesive resin layer or a pressure-sensitive adhesive layer has a mask layer disposed on both sides thereof and forms a plurality of through holes in the film thickness direction. If the adhesive resin is thermosetting, after placing the mask layer, if it is in a semi-cured state (the heat curing is stopped halfway and not completely cured), the adhesion of the mask layer is improved. In addition, it is preferable because the through-hole can be formed smoothly.
  • the mask material the above-described resin materials can be used.
  • a catalyst is applied, and after removing the mask layer, a conductive metal is attached to the through hole to which the catalyst is attached.
  • the same method as described above can be adopted for the adhesion of the catalyst and the conductive metal.
  • the entire surface including the adhesive resin part or the adhesive part forms a cylindrical electrode by the adhesion of the conductive metal.
  • the porous fluororesin substrate having such an adhesive layer or pressure-sensitive adhesive layer can be used as an adhesive sheet or pressure-sensitive adhesive sheet having a stress relaxation function.
  • the multilayer substrate of the present invention has a porous fluororesin base in which a plurality of through holes are provided in the thickness direction of the porous fluororesin sheet, and a cylindrical electrode is formed on the inner wall surface of the through holes by adhesion of conductive metal.
  • a multilayer substrate having a structure in which a material and a circuit board are integrated in a state where the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board are electrically connected.
  • an electronic circuit board of an electronic / electrical equipment set has a configuration in which various components are mounted on a printed wiring board having a wiring rule of hundreds to thousands of microns.
  • the LSI chip which is the heart, has metal electrodes on the outside of the chip in units of tens to hundreds of microns in order to electrically connect circuits formed in submicron units to the outside. It is mounted on a printed wiring board (mother-one board) via a board (interposer board) or module board (daughter board).
  • Circuit boards used in the present invention include semiconductor chips (IC, LSI, VLS A typical example is a package substrate for mounting a module such as I).
  • the package substrate has a circuit pattern and electrodes (internal electrodes or internal terminals), and further has external terminals.
  • IC semiconductor chips
  • LSI semiconductor integrated circuit
  • VLS VLS
  • a typical example is a package substrate for mounting a module such as I).
  • the package substrate has a circuit pattern and electrodes (internal electrodes or internal terminals), and further has external terminals.
  • by mounting a semiconductor chip on a circuit board it can be electrically connected to an external circuit, and at the same time, it protects the semiconductor chip from the external environment such as temperature and humidity, and the semiconductor due to vibration and shock. Prevents chip breakage and deterioration, and dissipates heat during operation.
  • area array terminal packages such as a pole grid array (BGA) using solder poles as external terminals have recently emerged.
  • BGA pole grid array
  • BGA is an area array type package in which solder pole terminals are provided in a grid array (lattice arrangement) on the surface of the package substrate instead of the conventional lead terminals. BGA is easy to increase the number of pins, has high mounting density, and can be surface mounted by batch reflow.
  • the BGA has a problem that the stress is not released compared to the lead terminal because the external terminal (connection terminal) is a hard solder pole. Therefore, such an area array type package has no function of reducing the stress and thermal stress, also resistant to also issue power s to bending stress or drop impact.
  • Document 2 proposes a method of relieving stress by interposing an adhesive sheet including a porous PTFE layer between an IC die and a circuit board.
  • the IC die and the circuit board electrode internal terminal
  • the lead wire is not used without the bonding wire. Enables electrical connection between the semiconductor chip and the circuit board via the cylindrical electrode of the resin base material, and can provide a stress relaxation function.
  • the porous fluororesin substrate with cylindrical electrodes is integrated with the circuit electrodes to form a multilayer substrate, which protects the cylindrical electrodes from damage during transportation and facilitates semiconductor chip package mounting. can do.
  • the circuit board can be screened by conducting a continuity test on the circuit board in the form of such a multilayer board.
  • FIG. 1 shows a cross-sectional view of an example of a multilayer substrate.
  • the circuit board 1 is composed of a base material 2, an electrode 3 and an external terminal 4.
  • a solder pole can be used, but it is not limited to this.
  • a porous fluororesin base material 5 on which a cylindrical electrode 6 is formed is disposed and integrated.
  • the porous fluororesin base material and the circuit board have a structure in which the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board are integrated in an electrically connected state.
  • the integration of the porous fluororesin substrate and the circuit board includes adhesion with an adhesive, adhesion with an adhesive, resistance welding, mechanical bonding, and the like, which can be appropriately selected according to the purpose of use.
  • the porous fluororesin substrate and the circuit board are adhered to each other by a conductive adhesive provided on the circuit board electrode, an insulating adhesive provided on a part other than the electrode of the circuit board, or both of them. be able to.
  • Conductive adhesive or insulating adhesive is applied in a predetermined pattern on the circuit board. These adhesives may be applied by printing. Examples of the insulating adhesive include the adhesive resins described above. Examples of conductive adhesives are thermosetting resins such as epoxy resins and phenol resins, and thermoplastic resins such as polyester resins, polyurethane resins, and acrylic resins filled with a large amount of conductive fillers. Mechanical bonding and electrical connection can be performed simultaneously.
  • the thickness of the adhesive layer is not particularly limited, but is usually about 5 to 200 / ⁇ .
  • porous fluororesin base material As the porous fluororesin base material, a plurality of through-holes penetrating all layers in the thickness direction of the multilayer sheet in which the adhesive resin layer is disposed on one side or both sides of the porous fluororesin sheet are provided, and the inner wall of the through-hole Adhesion to circuit board using porous fluororesin base material with adhesive layer with structure in which cylindrical electrode is formed by adhesion of conductive metal on the entire surface May be.
  • the porous fluororesin base material and the circuit board are bonded together by an adhesive layer of the porous fluororesin base material.
  • porous fluororesin base material a plurality of through holes penetrating all the layers in the thickness direction of the multilayer sheet in which the adhesive resin layer is disposed on one side of the porous fluororesin sheet are provided.
  • a porous fluororesin base material having an adhesive layer having a structure in which a cylindrical electrode is formed on the entire inner wall by adhesion of a conductive metal and the porous fluororesin base material and the circuit board are It can be adhered with an adhesive on the surface of the fluorocarbon resin base material on which no adhesive layer is formed.
  • Figure 2 shows the porous fluororesin sheet 2.2.
  • Multiple holes that penetrate all layers in the thickness direction of the multilayer sheet 2 5 A cross-sectional view of a porous fluororesin substrate 21 having an adhesive layer having a structure in which a cylindrical electrode 26 is formed on the entire inner wall of the through hole 25 by the attachment of a conductive metal is shown.
  • FIG. 3 shows a porous fluororesin having a structure in which both the opening ends of the normal electrode are closed by lid bodies 27 and 2 8 formed of a conductive material in the porous fluororesin base material 21 described above. The dough is shown.
  • an adhesive layer may be used.
  • a conductive adhesive, an insulating adhesive, or both in place of the adhesive the porous fluororesin substrate and the circuit board can be adhered. If the porous fluororesin base material and the circuit board are bonded and integrated with an adhesive, for example, it is difficult to replace the porous fluororesin base material, but the adhesive is integrated using an adhesive. In some cases, the porous fluororesin substrate can be replaced with a new porous fluororesin substrate if necessary.
  • resistance welding can be performed between the electrodes using the heat generated by energization. Resistance welding may be used in combination with other integration means.
  • a mechanical bonding method such as a method of pinning the porous fluororesin base material to the circuit board can be used.
  • the porous fluororesin base material is sandwiched and fixed between two circuit substrates.
  • the porous fluororesin base material and the first circuit board include the cylindrical electrode of the porous fluororesin base material and the first circuit.
  • the porous fluororesin base and the second circuit board are Examples include a multilayer substrate having a structure in which a cylindrical electrode of a porous fluororesin base material and an electrode of the second circuit board are integrated in an electrically connected state.
  • This multilayer substrate has a structure in which the porous fluororesin substrate is integrated by being sandwiched between two circuit substrates.
  • the two circuit boards can be joined by a mechanical method such as pinning. When such a mechanical method is adopted, when a problem such as poor conduction occurs in the porous fluororesin base material, it becomes easy to remove the pin and replace it with a new porous fluororesin base material.
  • the semiconductor package of the present invention has a porous fluororesin base in which a plurality of through-holes are provided in the thickness direction of the porous fluororesin sheet, and a cylindrical electrode is formed on the inner wall surface of the through-hole by adhesion of a conductive metal.
  • the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board are integrated with each other in a state where the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board are electrically connected.
  • the porous fluororesin substrate and the semiconductor chip are electrically connected to the cylindrical electrode of the porous fluororesin substrate and the electrode of the semiconductor chip.
  • a plurality of through holes penetrating all layers in the thickness direction of a multilayer sheet in which an adhesive resin layer is disposed on one or both sides of a porous fluororesin sheet are provided, and a conductive metal is formed on the entire inner wall of the through hole.
  • a porous fluororesin base material having a bonding layer having a structure in which a cylindrical electrode is formed by adhesion of the substrate and a circuit board are formed of the porous fluororesin base material
  • the electrode and the electrode of the circuit board are electrically connected, they are bonded by the adhesive layer or the adhesive, and further, on the surface opposite to the bonding surface with the circuit board, the porous fluorine A semiconductor having a structure in which a resin substrate and a semiconductor chip are bonded by the adhesive layer in a state where the cylindrical electrode of the porous fluororesin substrate and the electrode of the semiconductor chip are electrically connected Name the package.
  • a pressure-sensitive adhesive layer can be used instead of the adhesive layer.
  • it can be integrated using mechanical bonding such as adhesion using an adhesive, resistance welding, pinning, and the like.
  • Examples of semiconductor chips include I C, L S I, and V L S I.
  • the porous fluororesin base material and the circuit board are integrated with the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board being electrically connected directly.
  • the cylindrical electrode of the porous fluororesin base material and the electrode of the semiconductor chip are electrically connected, but the size of the semiconductor chip is too small compared to the size of the porous fluororesin base material. May be connected using a long lead electrode or the like.
  • the porous fluororesin substrate functions as a kind of interposer.
  • the cylindrical electrode of the porous fluororesin base material is a conductive metal (plating particles) attached to the fibrils of the porous fluororesin, so when a compressive force is applied to the porous fluororesin base material, Or, since the space between the fibrils shrinks, the cylindrical electrode is not easily destroyed.
  • the cylindrical electrode has increased conductivity due to the light compressive force applied by mounting the semiconductor chip.
  • a multilayer substrate in which a porous fluororesin base material and a circuit board are integrated, which has a stress relaxation function and can also cope with a circuit board having a narrow electrode pitch.
  • This multilayer substrate can be used for continuity detection of a circuit board having a narrow electrode pitch or for assembling a semiconductor package having the circuit board.
  • a porous fluororesin substrate having a cylindrical electrode composed of a conductive through-hole and an adhesive layer or an adhesive layer.
  • This porous fluororesin base material can be disposed between a semiconductor chip and a circuit board as an adhesive sheet or pressure-sensitive adhesive sheet having a stress relaxation function.
  • a semiconductor package in which a porous fluororesin base material, a circuit board, and a semiconductor chip are assembled without using lead wires and bonding wires.
  • Example 1 Example 1
  • Porosity (ASTM D-792) 60%, average pore diameter 0.1 // 111, 0.5 mm thick stretched porous PTFE sheet on both sides of the base film, porosity 60%, average pore diameter 0.1 ⁇
  • Two stretched porous PTFE sheets with a thickness of 30 were stacked as a mask. This was sandwiched between two stainless steel plates with a thickness of 3 mm and heat-treated at 350 ° C. for 30 minutes. After the heat treatment, the laminate was quenched with water from the top of the stainless steel plate to obtain a laminate having a “mask layer / base film mask layer” layer structure in which the above three layers were fused.
  • a methacrylic resin solution (25% by weight) was prepared by dissolving 25 parts by weight of methacrylic resin (PMMA; trade name “LG6A”, manufactured by Sumitomo Chemical Co., Ltd.) in 75 parts by weight of acetone at room temperature.
  • the laminate produced above was slowly immersed in the methacrylic resin solution while taking care not to leave air in the porous structure. After confirming that the laminate became translucent and the methacrylic resin solution was completely impregnated in the porous structure, the laminate was taken out and naturally dried at room temperature for about 18 hours.
  • a drill was operated under the conditions of a rotational speed of 100 000 / min and a feed speed of 0.0 1 mmZr e v., And through holes having a diameter of 400 ⁇ m were drilled at a plurality of positions at a pitch of 1 mm. After drilling, use a Soxhlet extractor as a solvent. The methacrylic resin was dissolved and extracted by using rucetyl ketone.
  • the laminate was hydrophilized by immersing in ethanol for 1 minute, and then immersed in Meltex P C-321 manufactured by Meltex Co., Ltd. diluted to 10 OmlZL for 4 minutes at 60 ° C for conditioning. Furthermore, after immersing the laminate in 10% sulfuric acid for 1 minute, as a pre-dip, immerse it in a solution of Meltex Co., Ltd. PC-236 dissolved in 0.8% hydrochloric acid at a rate of 180 gZL for 2 minutes. did.
  • the base film was immersed in the electroless copper plating solution with sufficient air stirring for 20 minutes to deposit copper particles on the inner wall surface of the through-hole to make it conductive.
  • gold plating was performed to improve the contact with the fender and circuit board electrodes.
  • the substitution gold plating method from nickel was adopted by the following method. After immersing the laminate with copper particles attached to the inner wall surface of the through-hole as a pre-dip in Atotech's Activator One-Ship Tech SIT Additive (8 Oml / L) for 3 minutes, as a catalyst, Wattec One-Site Tech SIT Dip for 1 minute in a bath solution of solid tank (125mlZL, Actecacto One-Spot Tech SIT Additive (80mlZL), and further for 1 minute in Atotech One-Spot Tech SIT Post Dip (25mlZL), and add the catalyst to the copper particles. Attached on top.
  • an electroless two bath constructed with sodium hypophosphite (20 g / L), trisodium citrate (40 g / L), ammonium borate (13 g / L) and nickel sulfate (22 g / L).
  • the base film was immersed in the nickel plating solution for 5 minutes, and the copper particles were nickel-coated.
  • Meltex replacement gold plating solution [Melplate AU— 6630 A (200 ml / L, Melplate AU_ 6630 B (100 m I / L), Melplate AU— 6630 C (20 ml / L), sodium sulfite sodium
  • the base film was immersed in an aqueous solution (1.Og / L as gold) for 5 minutes, and a gold coat of copper particles was applied.
  • porous fluororesin base material having a cylindrical electrode in which only the inner wall surface of the through hole was made conductive using the stretched porous PTFE sheet as a base film was obtained.
  • the diameter of the cylindrical electrode was 400 m and the pitch was lmm.
  • porous fluororesin base material and a circuit board coated with a polyimide thermosetting adhesive on a portion other than the electrode part, the cylindrical electrode of the porous fluororesin base material, and the electrode of the circuit board Were bonded in an electrically connected state to produce a multilayer substrate.
  • a compressive force was applied lightly from the porous fluororesin base material of this multilayer substrate, conduction between the two electrodes could be confirmed.
  • Example 1 on both sides of a base film made of an expanded porous PTFE sheet having a porosity (AS TM D—792) of 60%, an average pore diameter of 0.1 / xm, and a thickness of 0.5 mm, a polyimide-based heat A curable adhesive was applied to form an adhesive resin layer having a thickness of 30 ⁇ m.
  • porous fluororesin base material and the circuit board were bonded together in a state where the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board were electrically connected to produce a multilayer substrate.
  • a compressive force was applied lightly from the porous fluororesin substrate of this multilayer substrate, conduction between both electrodes could be confirmed.
  • the multilayer substrate of the present invention can be used for continuity inspection of a circuit board having a narrow electrode pitch or assembly of a semiconductor package having the circuit board.
  • the porous fluororesin substrate having the adhesive layer or pressure-sensitive adhesive layer and the cylindrical electrode of the present invention is used in the technical field of electronic materials as an adhesive sheet or pressure-sensitive adhesive sheet having both a stress relaxation function and a conduction function. be able to.
  • the semiconductor package of the present invention can be used by being mounted on various mounting boards.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

La présente invention concerne un substrat multicouche présentant une structure où une base fluoroplastique poreuse et une carte de circuit intégré sont intégrées de telle sorte que des électrodes cylindriques de la base fluoroplastique poreuse sont connectées électriquement avec des électrodes de la carte de circuit imprimé. La base fluoroplastique poreuse est obtenue en perçant une pluralité de trous traversants dans la direction de l'épaisseur d'une feuille fluoroplastique poreuse et en déposant un métal conducteur sur la surface des parois internes des trous traversants, formant ainsi des électrodes cylindriques sur cette base. La présente invention concerne également un ensemble semi-conducteur comprenant un tel substrat multicouche.
PCT/JP2006/309888 2005-06-07 2006-05-11 Substrat multicouche et ensemble semi-conducteur WO2006132063A1 (fr)

Applications Claiming Priority (2)

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JP2005-166808 2005-06-07
JP2005166808A JP2006344646A (ja) 2005-06-07 2005-06-07 多層基板及び半導体パッケージ

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Cited By (1)

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Publication number Priority date Publication date Assignee Title
US20210104854A1 (en) * 2017-05-18 2021-04-08 Shin-Etsu Polymer Co., Ltd. Electrical connector and method for producing same

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8035218B2 (en) * 2009-11-03 2011-10-11 Intel Corporation Microelectronic package and method of manufacturing same
JP6258290B2 (ja) 2013-02-26 2018-01-10 タツタ電線株式会社 フレキシブルプリント配線板用補強部材、フレキシブルプリント配線板、及び、シールドプリント配線板

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JPH05175650A (ja) * 1991-12-25 1993-07-13 Tokuyama Soda Co Ltd 回路基板の製造方法
JP2000082553A (ja) * 1998-09-08 2000-03-21 Tokyo Cosmos Electric Co Ltd Ｉｃ用ソケット
JP2005039241A (ja) * 2003-06-24 2005-02-10 Ngk Spark Plug Co Ltd 半導体素子付き中継基板、中継基板付き基板、半導体素子と中継基板と基板とからなる構造体
JP2005046993A (ja) * 2003-06-06 2005-02-24 Sumitomo Electric Ind Ltd 穿孔された多孔質樹脂基材及び穿孔内壁面を導電化した多孔質樹脂基材の製造方法

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JPH05175650A (ja) * 1991-12-25 1993-07-13 Tokuyama Soda Co Ltd 回路基板の製造方法
JP2000082553A (ja) * 1998-09-08 2000-03-21 Tokyo Cosmos Electric Co Ltd Ｉｃ用ソケット
JP2005046993A (ja) * 2003-06-06 2005-02-24 Sumitomo Electric Ind Ltd 穿孔された多孔質樹脂基材及び穿孔内壁面を導電化した多孔質樹脂基材の製造方法
JP2005039241A (ja) * 2003-06-24 2005-02-10 Ngk Spark Plug Co Ltd 半導体素子付き中継基板、中継基板付き基板、半導体素子と中継基板と基板とからなる構造体

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20210104854A1 (en) * 2017-05-18 2021-04-08 Shin-Etsu Polymer Co., Ltd. Electrical connector and method for producing same
US11637406B2 (en) * 2017-05-18 2023-04-25 Shin-Etsu Polymer Co., Ltd. Electrical connector and method for producing same

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