WO2006132063A1 - Multilayer substrate and semiconductor package - Google Patents

Multilayer substrate and semiconductor package Download PDF

Info

Publication number
WO2006132063A1
WO2006132063A1 PCT/JP2006/309888 JP2006309888W WO2006132063A1 WO 2006132063 A1 WO2006132063 A1 WO 2006132063A1 JP 2006309888 W JP2006309888 W JP 2006309888W WO 2006132063 A1 WO2006132063 A1 WO 2006132063A1
Authority
WO
WIPO (PCT)
Prior art keywords
porous fluororesin
base material
circuit board
porous
electrode
Prior art date
Application number
PCT/JP2006/309888
Other languages
French (fr)
Japanese (ja)
Inventor
Yuichi Idomoto
Yasuhiro Okuda
Yasuhito Masuda
Fumihiro Hayashi
Original Assignee
Sumitomo Electric Industries, Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries, Ltd. filed Critical Sumitomo Electric Industries, Ltd.
Publication of WO2006132063A1 publication Critical patent/WO2006132063A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H01L23/49883Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials the conductive materials containing organic materials or pastes, e.g. for thick films
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/145Organic substrates, e.g. plastic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49833Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0271Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4688Composite multilayer circuits, i.e. comprising insulating layers having different properties
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0104Properties and characteristics in general
    • H05K2201/0116Porous, e.g. foam
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0137Materials
    • H05K2201/015Fluoropolymer, e.g. polytetrafluoroethylene [PTFE]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10378Interposers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials

Definitions

  • the present invention relates to a multilayer substrate having a structure in which a porous fluororesin substrate having a cylindrical electrode made of a conductive through-hole and a circuit board are integrated in a state in which the respective electrodes can conduct.
  • the multilayer substrate of the present invention can be used for continuity inspection of a circuit board having a narrow electrode pitch or assembly of a semiconductor package having the circuit board.
  • the present invention also relates to a semiconductor package in which a circuit board and a semiconductor chip are assembled via the porous fluororesin base material.
  • Epoxy resin-impregnated glass cloth pre-preda is used as an adhesive sheet when bonding IC chip mounting boards to metal plates used for heat sinks and reinforcing materials.
  • this adhesive sheet has a large thickness, and the adhesive oozes out at the time of heat-bonding to contaminate the through hole, or the adhesive oozes out from the side surface and may cause a package failure. Also, when the adhesive is cured, bubbles may enter inside the adhesive and cause package cracks.
  • Japanese Patent Application Laid-Open No. 1-6 4 9 2 7 (hereinafter referred to as “Document 1”) has an adhesive resin layer formed on both sides of a porous fluororesin layer.
  • An IC package adhesive sheet has been proposed in which the fluororesin layer retains porous voids.
  • the IC package adhesive sheet is manufactured by a method in which an adhesive resin solution or melt such as epoxy resin is applied to both surfaces of a porous fluororesin sheet, or an adhesive resin sheet is stacked. ing. The adhesive resin is not completely impregnated in the thickness direction of the porous fluororesin layer, but retains the porous space of the porous fluororesin layer.
  • the IC package adhesive sheet is interposed between an IC chip mounting substrate and a metal plate (stiffener ring) and hot pressed.
  • a method of forming an IC package is disclosed.
  • “Electronic Materials” July 2003, pages 87-92 includes an adhesive sheet having the same layer structure as the above-mentioned IC package adhesive sheet in the technical field of electronic materials.
  • a method of using it as an adhesive sheet having a stress relaxation function has been proposed. With the downsizing of IC packages' higher density, the area array method has been adopted and BGA (Ball Grid Ar ray) using solder balls as the external terminals is progressing. The stress release mechanism is lost.
  • BGA Ball Grid Ar ray
  • a single-layer adhesive sheet in which a porous polytetrafluoroethylene (hereinafter abbreviated as “porous PTFE”) sheet is impregnated with an adhesive resin such as an epoxy resin A three-layer adhesive sheet in which a thick porous PTFE sheet is inserted and laminated between two single-layer adhesive sheets is disclosed.
  • porous PTFE sheets with an elastic modulus of about 10 to 20 OMPa at room temperature these adhesive sheets are given a stress relaxation function.
  • the three-layer adhesive sheet is interposed between the circuit board on which a large number of solder poles are arranged as external terminals in a grid pattern (area array) and the IC die (semiconductor chip), and thermocompression bonding is performed.
  • An example of an IC package is shown.
  • the mismatch of dimensional changes due to thermal expansion between them is alleviated.
  • Reference 2 shows an example in which the IC package is connected to a mounting board with solder balls of external terminals.
  • a three-layer adhesive sheet with stress relaxation function the stress between the IC die and the mounting board is isolated.
  • the electrodes and circuit of the IC die are used. Lead wire or bond for connection with substrate electrode It is necessary to use a ding wire.
  • Reference 2 above shows an example in which a hole is formed in the center of the three-layer adhesive sheet, and the electrode of the IC die and the electrode of the circuit board are electrically connected to each other through a lead wire or a bonding wire. .
  • this method it is difficult to reduce the distance between the lead wires and the bonding wires, so that it is not possible to cope with the case where the pitch between the electrodes of the circuit board is narrow.
  • stress is applied to the stress relaxation adhesive sheet, a load is applied to the lead wire or bonding wire, and the lead wire or bonding wire may be cut due to metal fatigue.
  • the circuit device disclosed in Document 3 is excellent in mechanical bonding strength between the flip chip and the interposer substrate, and between the interposer substrate and the heat spreader.
  • the circuit device has solder bumps mounted on the lower surface of the interposer substrate at a low density, and cannot accommodate an interposer substrate having a narrow pitch between electrodes.
  • a mold resin such as an epoxy resin does not have a stress relaxation function, the circuit device cannot sufficiently cope with an increase in various stresses and a drop impact. Disclosure of the invention
  • An object of the present invention is to provide a multilayer substrate in which a porous fluororesin base material having a cylindrical electrode that has a stress relaxation function and can also be applied to a circuit board having a narrow electrode pitch, and a circuit board. Is to provide.
  • Another object of the present invention is to provide a semiconductor package in which a porous fluororesin substrate, a circuit board, and a semiconductor chip are assembled without using a lead wire or a bonding wire that passes through a hole provided in the porous fluororesin layer. It is to provide.
  • porous fluorine A method of using, as a stress relaxation sheet, a porous fluororesin base material in which a plurality of through-holes are provided in the thickness direction of a resin sheet and a cylindrical electrode is formed on the inner wall surface of the through-hole by adhesion of a conductive metal I came up with it.
  • the porous fluororesin substrate used in the present invention has a cylindrical electrode in the thickness direction. Since the cylindrical electrode has a structure in which conductive metal such as plating particles adheres to the inner wall surface of the plurality of through holes provided in the porous fluororesin substrate, the thickness of the porous fluororesin sheet is increased. It does not impair elasticity, and is less likely to deteriorate even when subjected to repeated compressive forces.
  • the porous fluororesin base material is disposed between the circuit board and the semiconductor chip, and can serve as a kind of interposer having a stress relaxation function and a conduction function.
  • the porous fluororesin sheet By adjusting the size, pitch, and installation location of the through holes formed in the porous fluororesin sheet, if a cylindrical electrode that can be directly electrically connected to the circuit board electrode (internal terminal) is formed, the porous A lead wire that passes through a hole in the fluororesin sheet.
  • a multi-layer substrate that has a conduction function in addition to the stress relaxation function by integrating the porous fluororesin base material and the circuit board without using bonding wires. Can be obtained.
  • An adhesive layer or pressure-sensitive adhesive layer is provided on the porous fluororesin sheet, and a through-hole is formed through the adhesive layer or the pressure-sensitive adhesive layer.
  • the entire inner wall of the through-hole (adhesive layer or pressure-sensitive adhesive) Porous fluororesin substrate (porous fluororesin adhesive sheet or porous fluororesin pressure-sensitive adhesive sheet) with conductivity and adhesiveness or adhesiveness. ) Can be obtained.
  • a plurality of through-holes are provided in the thickness direction of the porous fluororesin sheet, and a porous electrode in which a cylindrical electrode is formed on the inner wall surface of the through-hole by adhesion of a conductive metal.
  • a multilayer substrate having a structure in which a fluororesin base and a circuit board are integrated in a state where the cylindrical electrode of the porous fluororesin base and the electrode of the circuit board are electrically connected .
  • the porous fluororesin sheet is provided with a plurality of through holes in the thickness direction of the porous fluororesin sheet, and a cylindrical electrode is formed on the inner wall surface of the through holes by the adhesion of a conductive metal.
  • the resin base material and the circuit board are integrated with the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board being electrically connected, and the porous fluororesin base material On the surface opposite to the circuit board side, the porous fluororesin base material and the semiconductor chip are electrically connected to the cylindrical electrode of the porous fluororesin base material and the electrode of the semiconductor chip.
  • FIG. 1 is a cross-sectional view showing an example of the layer structure of the multilayer substrate of the present invention.
  • FIG. 2 is a cross-sectional view showing an example of a porous fluororesin substrate provided with an adhesive layer and a cylindrical electrode of the present invention.
  • FIG. 3 is a cross-sectional view showing an example of a porous fluororesin base material having a structure in which the adhesive layer of the present invention and a cylindrical electrode are provided, and the open end of the cylindrical electrode is closed with a lid of a conductive material. It is. BEST MODE FOR CARRYING OUT THE INVENTION
  • fluororesin forming the porous fluororesin sheet used in the present invention examples include polytetrafluoroethylene (PTFE) and tetrafluoroethylene. / Hexafluoropropylene copolymer (FEP), tetrafluoroethylene / perfluoroalkyl butyl ether copolymer (PFA), polyvinylidene fluoride (PVDF), polyvinylidene fluoride copolymer And ethylene / tetrafluoroethylene copolymer (ETFE resin).
  • PTFE polytetrafluoroethylene
  • FEP Hexafluoropropylene copolymer
  • PFA tetrafluoroethylene / perfluoroalkyl butyl ether copolymer
  • PVDF polyvinylidene fluoride copolymer
  • ETFE resin ethylene / tetrafluoroethylene copolymer
  • PTFE is particularly preferred because of its excellent heat resistance, chemical resistance, processability, mechanical properties, and dielectric properties (low dielectric constant).
  • Examples of the method for producing the porous fluororesin sheet include a pore making method, a phase separation method, a solvent extraction method, a stretching method, and a laser irradiation method.
  • the porous fluororesin sheet preferably has a porosity (ASTM D-792) in the range of 20 to 80%.
  • the porous fluororesin sheet preferably has an average pore diameter of 10 m or less or a pebble point of 2 kPa or more. From the viewpoint of fine pitch formation of a normal electrode serving as a conducting part, the average pore diameter is 1 ⁇ m or less. Alternatively, the bubble point is more preferably 10 kPa or more.
  • the thickness of the porous fluororesin sheet can be appropriately selected according to the purpose of use and use location, but is usually 3 mm or less, preferably 1 mm or less, and the lower limit is usually 5 / zm, preferably 10 / zm.
  • a stretched porous PTFE sheet produced by a stretching method is particularly preferable because it has excellent heat resistance, processability, mechanical properties, dielectric properties, and the like and has a uniform pore size distribution.
  • the stretched porous PTFE sheet can be produced, for example, by the method described in JP-B-42-13560.
  • a liquid lubricant is mixed with PTFE green powder and extruded into a tube or plate by ram extrusion.
  • the plate is rolled with a rolling roll. After the extrusion rolling process, the liquid lubricant is removed from the extruded product or the rolled product as necessary.
  • an unsintered porous PTFE sheet is obtained.
  • Unsintered porous PTFE sheet has high strength when heated to a temperature of 327 ° C or higher, which is the melting point of PTFE, while being fixed so that it does not shrink.
  • An expanded porous PTFE sheet is obtained.
  • Tubular extrusions When uniaxially drawn and sintered, an expanded porous PTFE tube is obtained.
  • the stretched porous PTFE tube can be made into a sheet by cutting it in the longitudinal direction.
  • the stretched porous PTFE sheet has a fine mesh-like porous structure composed of a large number of very thin fibrils formed by PTFE and a large number of nodes connected to each other by the fibrils. Therefore, in the stretched porous PTFE sheet, the resin part of the porous structure is fibrils and nodes, and the inside of the porous structure is a space formed by the fibrils and nodes (“porous void” or “porous space” It is also called).
  • the stretched porous PTFE sheet has excellent elasticity in the film thickness direction, and also has excellent elastic recovery.
  • the porous fluororesin base material used in the present invention is provided with a plurality of through holes in the thickness direction of the porous fluororesin sheet, and a cylindrical electrode formed by adhesion of a conductive metal is formed on the inner wall surface of the through hole. It has a formed structure.
  • the porous fluororesin substrate used in the present invention may have an adhesive layer formed of an adhesive resin on one side or both sides.
  • the through hole is provided in all layers including the adhesive layer, and the entire inner wall of the through hole (including the adhesive layer portion) is electrically conductive. It has a structure in which a cylindrical electrode is formed by adhesion of a conductive metal.
  • an adhesive layer can be provided.
  • conductive metal is deposited by depositing plated particles by electroless plating or a combination of electroless plating and electrical plating.
  • a method of providing a plurality of through holes in the thickness direction of the porous fluororesin sheet and a method of forming a cylindrical electrode by adhesion of a conductive metal on the inner wall surface of the through holes are not particularly limited. The method described can be exemplified.
  • a resin material is preferably used as the material of the mask layer.
  • a porous fluororesin sheet formed from a fluororesin is preferably used.
  • a fluororesin nonporous sheet, a nonporous resin sheet composed of a resin material other than fluororesin, A porous resin sheet can also be used.
  • An adhesive tape or sheet can also be used as the mask layer. From the viewpoint of the balance between fusibility between layers and peelability, it is preferable to use a porous fluororesin sheet having the same quality as the porous fluororesin sheet as the material of the mask layer.
  • Mask layers are arranged on both sides of the porous fluororesin sheet and are generally integrated by fusion.
  • a stretched porous PTFE sheet is used as the porous fluororesin sheet, it is preferable to use the same stretched porous PTFE sheet as the mask layer.
  • These three layers can be formed into a laminate in which the respective layers are fused by thermocompression bonding. This laminate can be easily peeled off in a later step.
  • a plurality of through holes are formed in the laminated body in the thickness direction.
  • the method of forming the through-hole is as follows: i) mechanical drilling method, ii) etching by optical abrasion method, iii) ultrasonic head with at least one transducer at the tip And a method of punching by applying ultrasonic energy to the tip of the vibrator.
  • a machining method such as pressing, punching, or drilling can be employed.
  • the machining method for example, 1 0 0 A through hole having a relatively large diameter of ⁇ m or more, in many cases 200 ⁇ m or more, and even 300 ⁇ m or more can be formed at low cost. Through holes with smaller diameters can also be formed by machining.
  • the through-hole is formed by the optical ablation method
  • light is applied to the surface of the laminate through a light shielding sheet (mask) having a plurality of independent light transmission portions (openings) in a predetermined pattern.
  • This is a method of forming a pattern-like through hole by irradiating.
  • the portions where light is transmitted through and irradiated from the plurality of openings of the light shielding sheet are etched to form through holes.
  • a through hole having a relatively small diameter of 20 to 15 / m, in many cases 25 to: L 0 to m, or even 30 to 80 ⁇ m is formed. be able to.
  • holes with smaller diameters can be formed if necessary. Examples of irradiation light include synchrotron radiation and laser light.
  • a pattern-shaped through hole is formed by applying ultrasonic energy to the laminate using an ultrasonic head having at least one vibrator at the tip.
  • Ultrasonic energy is applied only to the vicinity where the tip of the vibrator contacts, and the temperature rises locally due to the vibrational energy of the ultrasonic wave, and the resin is easily cut and removed to form a through hole.
  • the through-holes When forming the through-holes, it is possible to employ a method of impregnating a soluble polymer such as polymethylol methacrylate or paraffin in a porous structure of the porous fluororesin sheet in a solution or in a molten state and solidifying it after solidification. .
  • This method is preferable because the porous structure of the inner wall of the through hole is easily retained.
  • the soluble polymer or paraffin can be removed by dissolving or melting.
  • the shape of the through-hole is arbitrary, such as a circle, an ellipse, a star, an octagon, a hexagon, a rectangle, and a triangle.
  • the diameter of the through-hole can be reduced to 5 to 1 0 0 // m, or even 5 to 30 ⁇ ⁇ , in applications where small-diameter through holes are suitable.
  • the diameter of the through-hole is usually more than 1 00 ⁇ ⁇ 3 ⁇ ⁇ ⁇ ⁇ ⁇ , often from 1 5 0 to 2 0 0 0 ⁇ m, Can be as large as 2 00 to 1 5 0 0 m.
  • the through hole matches the distribution of the electrodes on the circuit board. Accordingly, a plurality of patterns can be formed in a predetermined pattern.
  • a catalyst also referred to as a “plating catalyst” that promotes the reduction reaction of metal ions
  • the laminate is applied, for example, to a palladium mutin colloid catalyst application liquid. What is necessary is just to immerse, fully stirring.
  • a conductive metal is selectively attached to the inner wall surface.
  • an electroless plating method is suitable.
  • the catalyst for example, palladium mucin
  • the catalyst is activated. Specifically, it is immersed in an organic acid salt that is commercially available for activating the plating catalyst to dissolve tin and activate the catalyst.
  • an organic acid salt that is commercially available for activating the plating catalyst to dissolve tin and activate the catalyst.
  • conductive metal plating particles
  • a cylindrical electrode is formed. Examples of conductive metals include copper, nickel, silver, gold, and nickel alloys. When high conductivity is required, copper is preferably used.
  • the plating particles initially precipitate so as to be entangled with the resin portion (mainly fibrils) exposed on the inner wall surface of the through hole of the porous PTFE sheet, so by controlling the plating time, It can control the adhesion state of conductive metal.
  • a conductive metal layer is formed while maintaining a porous structure, and it is possible to provide elasticity in the film thickness direction as well as elasticity.
  • the thickness of the resin part having a fine porous structure is preferably 50 m or less.
  • the particle diameter of the conductive metal is preferably about 0.001 to 5 ⁇ .
  • the amount of the conductive metal deposited is preferably about 0.01 to 4. Og / ml.
  • the cylindrical electrode (conducting portion) produced above is preferably used with an antioxidant or coated with a noble metal or a noble metal alloy in order to improve oxidation prevention and electrical contact.
  • Precious metals include palladium, Umm, gold is preferred.
  • the thickness of the coating layer is preferably 0.05 to 0.5 m, more preferably 0.01 to 0.5 ⁇ . For example, when the conductive part is covered with gold, it is effective to cover the conductive metal layer with nickel of about 8 nm and then perform substitution gold plating.
  • a cylindrical electrode having a structure in which conductive metal particles adhere to the resin portion (fibril) is formed on the inner wall surface of the through hole.
  • a stress in the thickness direction is applied to the porous fluororesin substrate, the distance between the fibrils is reduced, so that the stress is relaxed and the structure of the cylindrical electrode is maintained without being destroyed. Therefore, even when a compressive force is repeatedly applied to the porous fluororesin base material, the cylindrical electrode hardly deteriorates.
  • the cylindrical electrode usually has a structure in which conductive metal adheres only to the inner wall surface of the through hole provided in the thickness direction of the porous fluororesin sheet.
  • one or both of the two open end portions of the cylindrical electrode may be closed to form a lid made of a conductive metal.
  • the lid when the lid is formed by closing the open end of the cylindrical electrode with a conductive material, the cylindrical electrode of the porous fluororesin substrate, the circuit electrode, and the electrode of the Z or semiconductor chip The contact area can be increased.
  • Porous fluororesin substrate having adhesive layer or adhesive layer
  • the porous fluororesin substrate of the present invention may be provided with an adhesive layer or a pressure-sensitive adhesive layer on one side or both sides.
  • the adhesive resin constituting the adhesive layer a resin material having adhesive ability is used.
  • adhesive resins include polyimide resins, epoxy resins, urethane resins, cyanate resins, silicone resins, polyamide resins, acrylic resins, A cyclic olefin resin containing a polar group, a heat-meltable fluororesin (for example, FEP and FFA), a modified polyphenylene ether resin, and the like can be mentioned.
  • a pressure-sensitive adhesive such as a pressure-sensitive adhesive can be used.
  • the porous fluororesin substrate having the adhesive layer or the pressure-sensitive adhesive layer of the present invention has a thickness direction of a multilayer sheet in which an adhesive resin layer or a pressure-sensitive adhesive layer is disposed on one side or both sides of the porous fluororesin sheet.
  • porous fluororesin substrate with an adhesive layer first of all, "adhesive resin layer Z porous fluororesin sheet Z adhesive resin layer” or “adhesive resin layer Z porous fluororesin sheet” A multilayer sheet having a layer structure is produced. Similarly, in order to produce a porous fluororesin substrate having an adhesive layer, first, “adhesive layer Z porous fluororesin sheet / adhesive layer” or “adhesive layer porous fluororesin sheet” A multilayer sheet having the following layer structure is prepared.
  • the porous fluororesin sheet As the porous fluororesin sheet, the aforementioned stretched porous PTFE sheet is used.
  • An adhesive resin layer (adhesive layer) is formed by applying a solution or melt of an adhesive resin to one or both sides of the porous fluororesin sheet, and applying heat-pressure bonding to a dry film formed from the adhesive resin. Form.
  • a similar method can be employed when forming the pressure-sensitive adhesive layer.
  • the adhesive resin layer or the pressure-sensitive adhesive layer is solidified in a form in which a part of the adhesive resin or the pressure-sensitive adhesive penetrates into the porous structure near the surface of the porous fluororesin sheet. Hold the porous structure.
  • the thickness of the adhesive resin layer or the pressure-sensitive adhesive layer is usually 5 to 300, preferably 8 to 200 / m, more preferably 10 to 100 ⁇ m. If the thickness of the adhesive resin layer or the pressure-sensitive adhesive layer is too thin, the adhesive strength or adhesive strength will be insufficient. If the thickness of the adhesive resin layer or pressure-sensitive adhesive layer is too thick, cracks will occur in the adhesive resin layer or pressure-sensitive adhesive layer. Easy to enter.
  • a porous fluororesin sheet provided with an adhesive resin layer or a pressure-sensitive adhesive layer has a mask layer disposed on both sides thereof and forms a plurality of through holes in the film thickness direction. If the adhesive resin is thermosetting, after placing the mask layer, if it is in a semi-cured state (the heat curing is stopped halfway and not completely cured), the adhesion of the mask layer is improved. In addition, it is preferable because the through-hole can be formed smoothly.
  • the mask material the above-described resin materials can be used.
  • a catalyst is applied, and after removing the mask layer, a conductive metal is attached to the through hole to which the catalyst is attached.
  • the same method as described above can be adopted for the adhesion of the catalyst and the conductive metal.
  • the entire surface including the adhesive resin part or the adhesive part forms a cylindrical electrode by the adhesion of the conductive metal.
  • the porous fluororesin substrate having such an adhesive layer or pressure-sensitive adhesive layer can be used as an adhesive sheet or pressure-sensitive adhesive sheet having a stress relaxation function.
  • the multilayer substrate of the present invention has a porous fluororesin base in which a plurality of through holes are provided in the thickness direction of the porous fluororesin sheet, and a cylindrical electrode is formed on the inner wall surface of the through holes by adhesion of conductive metal.
  • a multilayer substrate having a structure in which a material and a circuit board are integrated in a state where the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board are electrically connected.
  • an electronic circuit board of an electronic / electrical equipment set has a configuration in which various components are mounted on a printed wiring board having a wiring rule of hundreds to thousands of microns.
  • the LSI chip which is the heart, has metal electrodes on the outside of the chip in units of tens to hundreds of microns in order to electrically connect circuits formed in submicron units to the outside. It is mounted on a printed wiring board (mother-one board) via a board (interposer board) or module board (daughter board).
  • Circuit boards used in the present invention include semiconductor chips (IC, LSI, VLS A typical example is a package substrate for mounting a module such as I).
  • the package substrate has a circuit pattern and electrodes (internal electrodes or internal terminals), and further has external terminals.
  • IC semiconductor chips
  • LSI semiconductor integrated circuit
  • VLS VLS
  • a typical example is a package substrate for mounting a module such as I).
  • the package substrate has a circuit pattern and electrodes (internal electrodes or internal terminals), and further has external terminals.
  • by mounting a semiconductor chip on a circuit board it can be electrically connected to an external circuit, and at the same time, it protects the semiconductor chip from the external environment such as temperature and humidity, and the semiconductor due to vibration and shock. Prevents chip breakage and deterioration, and dissipates heat during operation.
  • area array terminal packages such as a pole grid array (BGA) using solder poles as external terminals have recently emerged.
  • BGA pole grid array
  • BGA is an area array type package in which solder pole terminals are provided in a grid array (lattice arrangement) on the surface of the package substrate instead of the conventional lead terminals. BGA is easy to increase the number of pins, has high mounting density, and can be surface mounted by batch reflow.
  • the BGA has a problem that the stress is not released compared to the lead terminal because the external terminal (connection terminal) is a hard solder pole. Therefore, such an area array type package has no function of reducing the stress and thermal stress, also resistant to also issue power s to bending stress or drop impact.
  • Document 2 proposes a method of relieving stress by interposing an adhesive sheet including a porous PTFE layer between an IC die and a circuit board.
  • the IC die and the circuit board electrode internal terminal
  • the lead wire is not used without the bonding wire. Enables electrical connection between the semiconductor chip and the circuit board via the cylindrical electrode of the resin base material, and can provide a stress relaxation function.
  • the porous fluororesin substrate with cylindrical electrodes is integrated with the circuit electrodes to form a multilayer substrate, which protects the cylindrical electrodes from damage during transportation and facilitates semiconductor chip package mounting. can do.
  • the circuit board can be screened by conducting a continuity test on the circuit board in the form of such a multilayer board.
  • FIG. 1 shows a cross-sectional view of an example of a multilayer substrate.
  • the circuit board 1 is composed of a base material 2, an electrode 3 and an external terminal 4.
  • a solder pole can be used, but it is not limited to this.
  • a porous fluororesin base material 5 on which a cylindrical electrode 6 is formed is disposed and integrated.
  • the porous fluororesin base material and the circuit board have a structure in which the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board are integrated in an electrically connected state.
  • the integration of the porous fluororesin substrate and the circuit board includes adhesion with an adhesive, adhesion with an adhesive, resistance welding, mechanical bonding, and the like, which can be appropriately selected according to the purpose of use.
  • the porous fluororesin substrate and the circuit board are adhered to each other by a conductive adhesive provided on the circuit board electrode, an insulating adhesive provided on a part other than the electrode of the circuit board, or both of them. be able to.
  • Conductive adhesive or insulating adhesive is applied in a predetermined pattern on the circuit board. These adhesives may be applied by printing. Examples of the insulating adhesive include the adhesive resins described above. Examples of conductive adhesives are thermosetting resins such as epoxy resins and phenol resins, and thermoplastic resins such as polyester resins, polyurethane resins, and acrylic resins filled with a large amount of conductive fillers. Mechanical bonding and electrical connection can be performed simultaneously.
  • the thickness of the adhesive layer is not particularly limited, but is usually about 5 to 200 / ⁇ .
  • porous fluororesin base material As the porous fluororesin base material, a plurality of through-holes penetrating all layers in the thickness direction of the multilayer sheet in which the adhesive resin layer is disposed on one side or both sides of the porous fluororesin sheet are provided, and the inner wall of the through-hole Adhesion to circuit board using porous fluororesin base material with adhesive layer with structure in which cylindrical electrode is formed by adhesion of conductive metal on the entire surface May be.
  • the porous fluororesin base material and the circuit board are bonded together by an adhesive layer of the porous fluororesin base material.
  • porous fluororesin base material a plurality of through holes penetrating all the layers in the thickness direction of the multilayer sheet in which the adhesive resin layer is disposed on one side of the porous fluororesin sheet are provided.
  • a porous fluororesin base material having an adhesive layer having a structure in which a cylindrical electrode is formed on the entire inner wall by adhesion of a conductive metal and the porous fluororesin base material and the circuit board are It can be adhered with an adhesive on the surface of the fluorocarbon resin base material on which no adhesive layer is formed.
  • Figure 2 shows the porous fluororesin sheet 2.2.
  • Multiple holes that penetrate all layers in the thickness direction of the multilayer sheet 2 5 A cross-sectional view of a porous fluororesin substrate 21 having an adhesive layer having a structure in which a cylindrical electrode 26 is formed on the entire inner wall of the through hole 25 by the attachment of a conductive metal is shown.
  • FIG. 3 shows a porous fluororesin having a structure in which both the opening ends of the normal electrode are closed by lid bodies 27 and 2 8 formed of a conductive material in the porous fluororesin base material 21 described above. The dough is shown.
  • an adhesive layer may be used.
  • a conductive adhesive, an insulating adhesive, or both in place of the adhesive the porous fluororesin substrate and the circuit board can be adhered. If the porous fluororesin base material and the circuit board are bonded and integrated with an adhesive, for example, it is difficult to replace the porous fluororesin base material, but the adhesive is integrated using an adhesive. In some cases, the porous fluororesin substrate can be replaced with a new porous fluororesin substrate if necessary.
  • resistance welding can be performed between the electrodes using the heat generated by energization. Resistance welding may be used in combination with other integration means.
  • a mechanical bonding method such as a method of pinning the porous fluororesin base material to the circuit board can be used.
  • the porous fluororesin base material is sandwiched and fixed between two circuit substrates.
  • the porous fluororesin base material and the first circuit board include the cylindrical electrode of the porous fluororesin base material and the first circuit.
  • the porous fluororesin base and the second circuit board are Examples include a multilayer substrate having a structure in which a cylindrical electrode of a porous fluororesin base material and an electrode of the second circuit board are integrated in an electrically connected state.
  • This multilayer substrate has a structure in which the porous fluororesin substrate is integrated by being sandwiched between two circuit substrates.
  • the two circuit boards can be joined by a mechanical method such as pinning. When such a mechanical method is adopted, when a problem such as poor conduction occurs in the porous fluororesin base material, it becomes easy to remove the pin and replace it with a new porous fluororesin base material.
  • the semiconductor package of the present invention has a porous fluororesin base in which a plurality of through-holes are provided in the thickness direction of the porous fluororesin sheet, and a cylindrical electrode is formed on the inner wall surface of the through-hole by adhesion of a conductive metal.
  • the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board are integrated with each other in a state where the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board are electrically connected.
  • the porous fluororesin substrate and the semiconductor chip are electrically connected to the cylindrical electrode of the porous fluororesin substrate and the electrode of the semiconductor chip.
  • a plurality of through holes penetrating all layers in the thickness direction of a multilayer sheet in which an adhesive resin layer is disposed on one or both sides of a porous fluororesin sheet are provided, and a conductive metal is formed on the entire inner wall of the through hole.
  • a porous fluororesin base material having a bonding layer having a structure in which a cylindrical electrode is formed by adhesion of the substrate and a circuit board are formed of the porous fluororesin base material
  • the electrode and the electrode of the circuit board are electrically connected, they are bonded by the adhesive layer or the adhesive, and further, on the surface opposite to the bonding surface with the circuit board, the porous fluorine A semiconductor having a structure in which a resin substrate and a semiconductor chip are bonded by the adhesive layer in a state where the cylindrical electrode of the porous fluororesin substrate and the electrode of the semiconductor chip are electrically connected Name the package.
  • a pressure-sensitive adhesive layer can be used instead of the adhesive layer.
  • it can be integrated using mechanical bonding such as adhesion using an adhesive, resistance welding, pinning, and the like.
  • Examples of semiconductor chips include I C, L S I, and V L S I.
  • the porous fluororesin base material and the circuit board are integrated with the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board being electrically connected directly.
  • the cylindrical electrode of the porous fluororesin base material and the electrode of the semiconductor chip are electrically connected, but the size of the semiconductor chip is too small compared to the size of the porous fluororesin base material. May be connected using a long lead electrode or the like.
  • the porous fluororesin substrate functions as a kind of interposer.
  • the cylindrical electrode of the porous fluororesin base material is a conductive metal (plating particles) attached to the fibrils of the porous fluororesin, so when a compressive force is applied to the porous fluororesin base material, Or, since the space between the fibrils shrinks, the cylindrical electrode is not easily destroyed.
  • the cylindrical electrode has increased conductivity due to the light compressive force applied by mounting the semiconductor chip.
  • a multilayer substrate in which a porous fluororesin base material and a circuit board are integrated, which has a stress relaxation function and can also cope with a circuit board having a narrow electrode pitch.
  • This multilayer substrate can be used for continuity detection of a circuit board having a narrow electrode pitch or for assembling a semiconductor package having the circuit board.
  • a porous fluororesin substrate having a cylindrical electrode composed of a conductive through-hole and an adhesive layer or an adhesive layer.
  • This porous fluororesin base material can be disposed between a semiconductor chip and a circuit board as an adhesive sheet or pressure-sensitive adhesive sheet having a stress relaxation function.
  • a semiconductor package in which a porous fluororesin base material, a circuit board, and a semiconductor chip are assembled without using lead wires and bonding wires.
  • Example 1 Example 1
  • Porosity (ASTM D-792) 60%, average pore diameter 0.1 // 111, 0.5 mm thick stretched porous PTFE sheet on both sides of the base film, porosity 60%, average pore diameter 0.1 ⁇
  • Two stretched porous PTFE sheets with a thickness of 30 were stacked as a mask. This was sandwiched between two stainless steel plates with a thickness of 3 mm and heat-treated at 350 ° C. for 30 minutes. After the heat treatment, the laminate was quenched with water from the top of the stainless steel plate to obtain a laminate having a “mask layer / base film mask layer” layer structure in which the above three layers were fused.
  • a methacrylic resin solution (25% by weight) was prepared by dissolving 25 parts by weight of methacrylic resin (PMMA; trade name “LG6A”, manufactured by Sumitomo Chemical Co., Ltd.) in 75 parts by weight of acetone at room temperature.
  • the laminate produced above was slowly immersed in the methacrylic resin solution while taking care not to leave air in the porous structure. After confirming that the laminate became translucent and the methacrylic resin solution was completely impregnated in the porous structure, the laminate was taken out and naturally dried at room temperature for about 18 hours.
  • a drill was operated under the conditions of a rotational speed of 100 000 / min and a feed speed of 0.0 1 mmZr e v., And through holes having a diameter of 400 ⁇ m were drilled at a plurality of positions at a pitch of 1 mm. After drilling, use a Soxhlet extractor as a solvent. The methacrylic resin was dissolved and extracted by using rucetyl ketone.
  • the laminate was hydrophilized by immersing in ethanol for 1 minute, and then immersed in Meltex P C-321 manufactured by Meltex Co., Ltd. diluted to 10 OmlZL for 4 minutes at 60 ° C for conditioning. Furthermore, after immersing the laminate in 10% sulfuric acid for 1 minute, as a pre-dip, immerse it in a solution of Meltex Co., Ltd. PC-236 dissolved in 0.8% hydrochloric acid at a rate of 180 gZL for 2 minutes. did.
  • the base film was immersed in the electroless copper plating solution with sufficient air stirring for 20 minutes to deposit copper particles on the inner wall surface of the through-hole to make it conductive.
  • gold plating was performed to improve the contact with the fender and circuit board electrodes.
  • the substitution gold plating method from nickel was adopted by the following method. After immersing the laminate with copper particles attached to the inner wall surface of the through-hole as a pre-dip in Atotech's Activator One-Ship Tech SIT Additive (8 Oml / L) for 3 minutes, as a catalyst, Wattec One-Site Tech SIT Dip for 1 minute in a bath solution of solid tank (125mlZL, Actecacto One-Spot Tech SIT Additive (80mlZL), and further for 1 minute in Atotech One-Spot Tech SIT Post Dip (25mlZL), and add the catalyst to the copper particles. Attached on top.
  • an electroless two bath constructed with sodium hypophosphite (20 g / L), trisodium citrate (40 g / L), ammonium borate (13 g / L) and nickel sulfate (22 g / L).
  • the base film was immersed in the nickel plating solution for 5 minutes, and the copper particles were nickel-coated.
  • Meltex replacement gold plating solution [Melplate AU— 6630 A (200 ml / L, Melplate AU_ 6630 B (100 m I / L), Melplate AU— 6630 C (20 ml / L), sodium sulfite sodium
  • the base film was immersed in an aqueous solution (1.Og / L as gold) for 5 minutes, and a gold coat of copper particles was applied.
  • porous fluororesin base material having a cylindrical electrode in which only the inner wall surface of the through hole was made conductive using the stretched porous PTFE sheet as a base film was obtained.
  • the diameter of the cylindrical electrode was 400 m and the pitch was lmm.
  • porous fluororesin base material and a circuit board coated with a polyimide thermosetting adhesive on a portion other than the electrode part, the cylindrical electrode of the porous fluororesin base material, and the electrode of the circuit board Were bonded in an electrically connected state to produce a multilayer substrate.
  • a compressive force was applied lightly from the porous fluororesin base material of this multilayer substrate, conduction between the two electrodes could be confirmed.
  • Example 1 on both sides of a base film made of an expanded porous PTFE sheet having a porosity (AS TM D—792) of 60%, an average pore diameter of 0.1 / xm, and a thickness of 0.5 mm, a polyimide-based heat A curable adhesive was applied to form an adhesive resin layer having a thickness of 30 ⁇ m.
  • porous fluororesin base material and the circuit board were bonded together in a state where the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board were electrically connected to produce a multilayer substrate.
  • a compressive force was applied lightly from the porous fluororesin substrate of this multilayer substrate, conduction between both electrodes could be confirmed.
  • the multilayer substrate of the present invention can be used for continuity inspection of a circuit board having a narrow electrode pitch or assembly of a semiconductor package having the circuit board.
  • the porous fluororesin substrate having the adhesive layer or pressure-sensitive adhesive layer and the cylindrical electrode of the present invention is used in the technical field of electronic materials as an adhesive sheet or pressure-sensitive adhesive sheet having both a stress relaxation function and a conduction function. be able to.
  • the semiconductor package of the present invention can be used by being mounted on various mounting boards.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

Disclosed is a multilayer substrate having a structure wherein a porous fluoroplastic base and a circuit board are integrated in such a manner that cylindrical electrodes of the porous fluoroplastic base are electrically connected with electrodes of the circuit board. The porous fluoroplastic base is obtained by forming a plurality of through holes in the thickness direction of a porous fluoroplastic sheet and depositing a conductive metal on the inner wall surfaces of the through holes, thereby forming cylindrical electrodes thereon. Also disclosed is a semiconductor package comprising such a multilayer substrate.

Description

明細書 多層基板及び半導体パッケージ 技術分野  Multilayer substrate and semiconductor package Technical Field
本発明は、 導電化した貫通孔からなる筒状電極を有する多孔質フッ素樹脂基 材と回路基板とが、 それぞれの電極が導通可能な状態で一体化された構造の多 層基板に関する。  The present invention relates to a multilayer substrate having a structure in which a porous fluororesin substrate having a cylindrical electrode made of a conductive through-hole and a circuit board are integrated in a state in which the respective electrodes can conduct.
本発明の多層基板は、 電極ピッチが狭い回路基板の導通検査または該回路基 板を有する半導体パッケージの組み立てに用いることができる。 また、 本発明 は、 前記多孔質フッ素樹脂基材を介して、 回路基板と半導体チップとを組み立 てた半導体パッケージに関する。 背景技術  The multilayer substrate of the present invention can be used for continuity inspection of a circuit board having a narrow electrode pitch or assembly of a semiconductor package having the circuit board. The present invention also relates to a semiconductor package in which a circuit board and a semiconductor chip are assembled via the porous fluororesin base material. Background art
I Cチップ実装基板と、 ヒートシンクや捕強材の目的で使用されている金属 板とを接着する場合、 ェポキシ樹脂含浸ガラスクロスプリプレダが接着用シー トとして用いられている。 しかし、 この接着用シートは、 厚みが大きく、 加熱 接着時に接着剤が染み出してスルーホールを汚染したり、 接着剤が側面からは み出してパッケージ不良となったりすることがある。 また、 接着剤の硬化時 に、 接着剤内部に気泡が入り、 パッケージクラックが発生することがある。 上記問題を解決するために、 特開平 1 ◦一 6 4 9 2 7号公報 (以下 「文献 1」 という) には、 多孔質フッ素樹脂層の両面に接着性樹脂層が形成され、 該 多孔質フッ素樹脂層は多孔性空隙を保持している I Cパッケージ接着用シート が提案されている。  Epoxy resin-impregnated glass cloth pre-preda is used as an adhesive sheet when bonding IC chip mounting boards to metal plates used for heat sinks and reinforcing materials. However, this adhesive sheet has a large thickness, and the adhesive oozes out at the time of heat-bonding to contaminate the through hole, or the adhesive oozes out from the side surface and may cause a package failure. Also, when the adhesive is cured, bubbles may enter inside the adhesive and cause package cracks. In order to solve the above-mentioned problem, Japanese Patent Application Laid-Open No. 1-6 4 9 2 7 (hereinafter referred to as “Document 1”) has an adhesive resin layer formed on both sides of a porous fluororesin layer. An IC package adhesive sheet has been proposed in which the fluororesin layer retains porous voids.
該 I Cパッケージ接着用シートは、 多孔質フッ素樹脂シートの両面に、 ェポ キシ樹脂等の接着性樹脂の溶液や溶融液を塗布したり、 接着性樹脂シートを積 層したりする方法により製造されている。 接着性樹脂は、 多孔質フッ素樹脂層 の厚さ方向に対して全面的には含浸させずに、 多孔質フッ素榭脂層の多孔性空 隙を保持するようにしている。 上記文献 1には、 該 I Cパッケージ接着用シートを、 I Cチップ実装基板と 金属板 (スティフナーリング) との間に介在させ、 熱プレスすることにより、The IC package adhesive sheet is manufactured by a method in which an adhesive resin solution or melt such as epoxy resin is applied to both surfaces of a porous fluororesin sheet, or an adhesive resin sheet is stacked. ing. The adhesive resin is not completely impregnated in the thickness direction of the porous fluororesin layer, but retains the porous space of the porous fluororesin layer. In Document 1 above, the IC package adhesive sheet is interposed between an IC chip mounting substrate and a metal plate (stiffener ring) and hot pressed.
I Cパッケージを形成する方法が開示されている。 A method of forming an IC package is disclosed.
「電子材料」 2003年 7月号第 87〜92頁 (以下、 「文献 2」 という) には、 上記 I Cパッケージ接着用シートと同様の層構成を持つ接着用シート を、 電子材料の技術分野において、 応力緩和機能を有する接着シートとして使 用する方法が提案されている。 I Cパッケージの小型化 '高密度化に伴い、 ェ リアアレイ方式が採用され、 かつ、 外部端子として、 はんだボールを用いた B GA (B a l l G r i d Ar r a y) 化が進んでいるが、 その反面、 スト レス解放機構が失われている。 応力緩和接着シートを用いることにより、 例え ば、 熱ス トレスや曲げス トレスなどの各種ス トレスを緩和し、 さらには、 落下 衝撃に対する耐性を付与することが期待される。  “Electronic Materials” July 2003, pages 87-92 (hereinafter referred to as “Literature 2”) includes an adhesive sheet having the same layer structure as the above-mentioned IC package adhesive sheet in the technical field of electronic materials. A method of using it as an adhesive sheet having a stress relaxation function has been proposed. With the downsizing of IC packages' higher density, the area array method has been adopted and BGA (Ball Grid Ar ray) using solder balls as the external terminals is progressing. The stress release mechanism is lost. By using a stress relaxation adhesive sheet, for example, it is expected to relieve various stresses such as heat stress and bending stress, and to give resistance to drop impact.
上記文献 2には、 応力緩和接着シートの構成として、 多孔質ポリテトラブル ォロエチレン (以下、 「多孔質 PTFE」 と略記) シートにエポキシ樹脂等の 接着性樹脂を含浸させた単層接着シートと、 2枚の単層接着シート間に厚い多 孔質 PTFEシートを揷入して積層した 3層接着シートとが開示されている。 常温での弾性率が 10〜20 OMP a程度の多孔質 PTFEシートを使用する ことにより、 これらの接着シートに応力緩和機能を付与している。  In the above-mentioned document 2, as a configuration of the stress relaxation adhesive sheet, a single-layer adhesive sheet in which a porous polytetrafluoroethylene (hereinafter abbreviated as “porous PTFE”) sheet is impregnated with an adhesive resin such as an epoxy resin, A three-layer adhesive sheet in which a thick porous PTFE sheet is inserted and laminated between two single-layer adhesive sheets is disclosed. By using porous PTFE sheets with an elastic modulus of about 10 to 20 OMPa at room temperature, these adhesive sheets are given a stress relaxation function.
上記文献 2には、 外部端子として多数のはんだポールを格子状 (エリアァレ ィ状) に配置した回路基板と I Cダイ (半導体チップ) との間に、 前記 3層接 着シートを介在させて加熱圧着した I Cパッケージの例が示されている。 回路 基板と I Cダイとの間に 3層接着シートを介在させることにより、 両者間の熱 膨張による寸法変化のミスマッチを緩和している。 また、 文献 2には、 該 I C パッケージを、 外部端子のはんだボールにより実装基板に接続した例が示され ている。 応力緩和機能を有する 3層接着シートが介在していることにより、 I Cダイと実装基板との間のストレスが隔離される。  In Document 2 above, the three-layer adhesive sheet is interposed between the circuit board on which a large number of solder poles are arranged as external terminals in a grid pattern (area array) and the IC die (semiconductor chip), and thermocompression bonding is performed. An example of an IC package is shown. By interposing a three-layer adhesive sheet between the circuit board and the IC die, the mismatch of dimensional changes due to thermal expansion between them is alleviated. Reference 2 shows an example in which the IC package is connected to a mounting board with solder balls of external terminals. By interposing a three-layer adhesive sheet with stress relaxation function, the stress between the IC die and the mounting board is isolated.
しかし、 はんだポールを格子状に配置した回路基板 (例えば、 テープ基板) と I Cダイとの間に、 文献 2に開示されている応力緩和接着シートを介在させ る方式では、 I Cダイの電極と回路基板の電極との接続にリード線またはボン デイングワイヤを用いる必要がある。 However, in the method in which the stress relaxation adhesive sheet disclosed in Reference 2 is interposed between a circuit board (for example, a tape substrate) in which solder poles are arranged in a grid and the IC die, the electrodes and circuit of the IC die are used. Lead wire or bond for connection with substrate electrode It is necessary to use a ding wire.
上記文献 2には、 3層接着シートの中央部に穴をあけ、 この穴にリード線や ボンディングワイヤを通して、 I Cダイの電極と回路基板の電極とを電気的に 接続した例が図示されている。 この方式では、 リード線同士やボンディングヮ ィャ同士の間隔を狭めることが困難であるため、 回路基板の電極間が狭ピッチ になったときに対応することができない。 また、 応力緩和接着シートに応力が 加わると、 リード線またはボンディングワイヤにも負荷がかかるため、 リード 線またはボンディングワイヤが金属疲労により切断するおそれがある。  Reference 2 above shows an example in which a hole is formed in the center of the three-layer adhesive sheet, and the electrode of the IC die and the electrode of the circuit board are electrically connected to each other through a lead wire or a bonding wire. . In this method, it is difficult to reduce the distance between the lead wires and the bonding wires, so that it is not possible to cope with the case where the pitch between the electrodes of the circuit board is narrow. In addition, if stress is applied to the stress relaxation adhesive sheet, a load is applied to the lead wire or bonding wire, and the lead wire or bonding wire may be cut due to metal fatigue.
米国特許第 6, 4 8 6, 5 6 2号明細書 (以下、 「文献 3」 という) には、 フリ ップチップの下面とインターポーザ基板 (回路基板) の上面との間隙をモ 一ルド樹脂で充填させるとともに、 該モールド樹脂によって、 インターポーザ 基板の上面とヒートスプレッダの下面との間隙をも充填させた回路装置 (例え ば、 B G Aパッケージ) が提案されている。  In US Pat. No. 6,4 8 6,5 62 (hereinafter referred to as “Document 3”), the gap between the bottom surface of the flip chip and the top surface of the interposer substrate (circuit board) is filled with mold resin. In addition, a circuit device (for example, a BGA package) in which the gap between the upper surface of the interposer substrate and the lower surface of the heat spreader is filled with the mold resin has been proposed.
上記文献 3に開示されている回路装置は、 フリップチップとインターポーザ 基板間、 インターポーザ基板とヒートスプレッダ間の機械的な接合強度に優れ ている。 しかし、 該回路装置は、 インターポーザ基板の下面に、 はんだバンプ が低密度に装着されたものであって、 電極間が狭ピッチのィンターポーザ基板 に対応することができない。 さらに、 エポキシ樹脂などのモールド樹脂は、 応 力緩和機能を持たないため、 該回路装置は、 各種ストレスの増大や落下衝撃に 対して十分に対応することができない。 発明の開示  The circuit device disclosed in Document 3 is excellent in mechanical bonding strength between the flip chip and the interposer substrate, and between the interposer substrate and the heat spreader. However, the circuit device has solder bumps mounted on the lower surface of the interposer substrate at a low density, and cannot accommodate an interposer substrate having a narrow pitch between electrodes. Furthermore, since a mold resin such as an epoxy resin does not have a stress relaxation function, the circuit device cannot sufficiently cope with an increase in various stresses and a drop impact. Disclosure of the invention
本発明の課題は、 応力緩和機能を有するとともに、 電極ピッチが狭い回路基 板にも対応することができる筒状電極を備えた多孔質フッ素樹脂基材と、 回路 基板とを一体化した多層基板を提供することにある。  An object of the present invention is to provide a multilayer substrate in which a porous fluororesin base material having a cylindrical electrode that has a stress relaxation function and can also be applied to a circuit board having a narrow electrode pitch, and a circuit board. Is to provide.
また、 本発明の課題は、 多孔質フッ素樹脂層に設けた穴を通過するリード線 またはボンディングワイヤを使用することなく、 多孔質フッ素樹脂基材と回路 基板と半導体チップとを組み立てた半導体パッケージを提供することにある。 本発明者らは、 前記課題を解決するために鋭意研究した結果、 多孔質フッ素 樹脂シートの厚み方向に複数の貫通孔が設けられ、 該貫通孔の内壁面には導電 性金属の付着による筒状電極が形成された多孔質フッ素樹脂基材を、 応力緩和 シートとして使用する方法に想到した。 Another object of the present invention is to provide a semiconductor package in which a porous fluororesin substrate, a circuit board, and a semiconductor chip are assembled without using a lead wire or a bonding wire that passes through a hole provided in the porous fluororesin layer. It is to provide. As a result of intensive studies to solve the above problems, the present inventors have found that porous fluorine A method of using, as a stress relaxation sheet, a porous fluororesin base material in which a plurality of through-holes are provided in the thickness direction of a resin sheet and a cylindrical electrode is formed on the inner wall surface of the through-hole by adhesion of a conductive metal I came up with it.
本発明で使用する多孔質フッ素樹脂基材は、 厚み方向に筒状の電極を有して いる。 該筒状電極は、 多孔質フッ素樹脂基材に設けた複数の貫通孔の内壁面に めっき粒子などの導電性金属が付着した構造を有しているため、 多孔質フッ素 樹脂シートの厚み方向の弾力性を損なうことがなく、 かつ、 繰り返しの圧縮力 を受けても劣化が起こりにくいものである。  The porous fluororesin substrate used in the present invention has a cylindrical electrode in the thickness direction. Since the cylindrical electrode has a structure in which conductive metal such as plating particles adheres to the inner wall surface of the plurality of through holes provided in the porous fluororesin substrate, the thickness of the porous fluororesin sheet is increased. It does not impair elasticity, and is less likely to deteriorate even when subjected to repeated compressive forces.
該多孔質フッ素樹脂基材は、 回路基板と半導体チップとの間に配置され、 応 力緩和機能と導通機能とを有する一種のインターポーザとしての役割を果たす ことができる。  The porous fluororesin base material is disposed between the circuit board and the semiconductor chip, and can serve as a kind of interposer having a stress relaxation function and a conduction function.
多孔質フッ素樹脂シートに形成する貫通孔の大きさやピッチ、 設置箇所など を調整することにより、 回路基板の電極 (内部端子) と直接電気的に接続可能 な筒状電極を形成すれば、 多孔質フッ素樹脂シートの穴を通過するリ一ド線ゃ ボンディングワイヤを用いることなく、 多孔質フッ素樹脂基材と回路基板とを 一体化させることにより、 応力緩和機能に加えて、 導通機能を有する多層基板 を得ることができる。  By adjusting the size, pitch, and installation location of the through holes formed in the porous fluororesin sheet, if a cylindrical electrode that can be directly electrically connected to the circuit board electrode (internal terminal) is formed, the porous A lead wire that passes through a hole in the fluororesin sheet. A multi-layer substrate that has a conduction function in addition to the stress relaxation function by integrating the porous fluororesin base material and the circuit board without using bonding wires. Can be obtained.
多孔質フッ素樹脂シートに接着剤層もしくは粘着剤層を設け、 該接着剤層も しくは粘着剤層をも貫通して貫通孔を形成し、 貫通孔の内壁全面 (接着剤層も しくは粘着剤層の部位を含む) に導電性金属を付着させれば、 導電性と接着性 もしくは粘着性とを備えた多孔質フッ素樹脂基材 (多孔質フッ素樹脂接着シー トまたは多孔質フッ素樹脂粘着シート) を得ることができる。 この多孔質フッ 素樹脂基材を回路基板と半導体チップとの間に配置し、 かつ、 該多孔質フッ素 樹脂基材の筒状電極により回路基板の電極と半導体チップの電極を接続するこ とにより、 回路基板の狭ピッチ化に対応することができる半導体パッケージを 得ることができる。  An adhesive layer or pressure-sensitive adhesive layer is provided on the porous fluororesin sheet, and a through-hole is formed through the adhesive layer or the pressure-sensitive adhesive layer. The entire inner wall of the through-hole (adhesive layer or pressure-sensitive adhesive) Porous fluororesin substrate (porous fluororesin adhesive sheet or porous fluororesin pressure-sensitive adhesive sheet) with conductivity and adhesiveness or adhesiveness. ) Can be obtained. By disposing the porous fluororesin base material between the circuit board and the semiconductor chip, and connecting the electrode of the circuit board and the electrode of the semiconductor chip by the cylindrical electrode of the porous fluororesin base material A semiconductor package that can cope with the narrow pitch of the circuit board can be obtained.
多孔質フッ素樹脂基材と回路基板との一体化、 あるいは回路基板と多孔質フ ッ素樹脂基材と半導体チップとの一体化には、 接着剤や粘着剤のほかに、 抵抗 溶接や機械的結合などの手法を利用することもできる。 本発明は、 これらの知 見に基づいて完成するに至ったものである。 かくして、 本発明によれば、 多孔質フッ素樹脂シートの厚み方向に複数の貫 通孔が設けられ、 該貫通孔の内壁面には導電性金属の付着による筒状電極が形 成された多孔質フッ素樹脂基材と回路基板とが、 該多孔質フッ素樹脂基材の筒 状電極と該回路基板の電極とが電気的に接続された状態で一体化された構造を 有する多層基板が提供される。 For the integration of the porous fluororesin base and the circuit board, or the integration of the circuit board, the porous fluororesin base and the semiconductor chip, in addition to adhesives and adhesives, resistance welding and mechanical Techniques such as combining can also be used. The present invention provides these knowledge. It came to be completed based on seeing. Thus, according to the present invention, a plurality of through-holes are provided in the thickness direction of the porous fluororesin sheet, and a porous electrode in which a cylindrical electrode is formed on the inner wall surface of the through-hole by adhesion of a conductive metal. Provided is a multilayer substrate having a structure in which a fluororesin base and a circuit board are integrated in a state where the cylindrical electrode of the porous fluororesin base and the electrode of the circuit board are electrically connected .
また、 本発明によれば、 多孔質フッ素樹脂シートの厚み方向に複数の貫通孔 が設けられ、 該貫通孔の内壁面には導電性金属の付着による筒状電極が形成さ れた多孔質フッ素樹脂基材と回路基板とが、 該多孔質フッ素樹脂基材の筒状電 極と該回路基板の電極とが電気的に接続された状態で一体化され、 さらに、 該 多孔質フッ素樹脂基材の該回路基板側とは反対側の面で、 該多孔質フッ素樹脂 基材と半導体チップとが、 該多孔質フッ素樹脂基材の筒状電極と該半導体チッ プの電極とが電気的に接続された状態で一体化された構造を有する半導体パッ ケージが提供される。 図面の簡単な説明  Further, according to the present invention, the porous fluororesin sheet is provided with a plurality of through holes in the thickness direction of the porous fluororesin sheet, and a cylindrical electrode is formed on the inner wall surface of the through holes by the adhesion of a conductive metal. The resin base material and the circuit board are integrated with the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board being electrically connected, and the porous fluororesin base material On the surface opposite to the circuit board side, the porous fluororesin base material and the semiconductor chip are electrically connected to the cylindrical electrode of the porous fluororesin base material and the electrode of the semiconductor chip. A semiconductor package having an integrated structure is provided. Brief Description of Drawings
図 1は、 本発明の多層基板の層構成の一例を示す断面図である。  FIG. 1 is a cross-sectional view showing an example of the layer structure of the multilayer substrate of the present invention.
図 2は、 本発明の接着剤層と筒状電極とを備えた多孔質フッ素樹脂基材のー 例を示す断面図である。  FIG. 2 is a cross-sectional view showing an example of a porous fluororesin substrate provided with an adhesive layer and a cylindrical electrode of the present invention.
図 3は、 本発明の接着剤層と筒状電極とを備え、 筒状電極の開口端部が導電 性材料の蓋体により閉塞された構造の多孔質フッ素樹脂基材の一例を示す断面 図である。 発明を実施するための最良の形態  FIG. 3 is a cross-sectional view showing an example of a porous fluororesin base material having a structure in which the adhesive layer of the present invention and a cylindrical electrode are provided, and the open end of the cylindrical electrode is closed with a lid of a conductive material. It is. BEST MODE FOR CARRYING OUT THE INVENTION
1 . 多孔質フッ素樹脂シート 1. Porous fluororesin sheet
本発明で使用する多孔質フッ素樹脂シートを形成するフッ素樹脂としては、 例えば、 ポリテトラフルォロエチレン (P T F E) 、 テトラフルォロエチレン /へキサフルォロプロピレン共重合体 (FEP) 、 テトラフルォロエチレン/ パーフルォロアルキルビュルエーテル共重合体 (PFA) 、 ポリフッ化ビニリ デン (PVDF) 、 ポリフッ化ビ二リデン共重合体、 エチレン/テトラフルォ 口エチレン共重合体 (ETFE樹脂) などが挙げられる。 Examples of the fluororesin forming the porous fluororesin sheet used in the present invention include polytetrafluoroethylene (PTFE) and tetrafluoroethylene. / Hexafluoropropylene copolymer (FEP), tetrafluoroethylene / perfluoroalkyl butyl ether copolymer (PFA), polyvinylidene fluoride (PVDF), polyvinylidene fluoride copolymer And ethylene / tetrafluoroethylene copolymer (ETFE resin).
これらのフッ素樹脂の中でも、 耐熱性、 耐薬品性、 加工性、 機械的特性、 誘 電特性 (低誘電率) などが優れている点で、 PTFEが特に好ましい。  Among these fluororesins, PTFE is particularly preferred because of its excellent heat resistance, chemical resistance, processability, mechanical properties, and dielectric properties (low dielectric constant).
多孔質フッ素樹脂シートを作製する方法としては、 造孔法、 相分離法、 溶媒 抽出法、 延伸法、 レーザー照射法などが挙げられる。 多孔質フッ素樹脂シート は、 気孔率 (ASTM D- 792) が 20〜 80 %の範囲内にあることが好 ましい。 多孔質フッ素樹脂シートは、 平均孔径が 10 m以下またはパブルポ イントが 2 k P a以上であることが好ましく、 導通部となる通常電極のフアイ ンピッチ化の観点からは、 平均孔径が 1 μ m以下またはバブルボイントが 10 k P a以上であることがより好ましい。  Examples of the method for producing the porous fluororesin sheet include a pore making method, a phase separation method, a solvent extraction method, a stretching method, and a laser irradiation method. The porous fluororesin sheet preferably has a porosity (ASTM D-792) in the range of 20 to 80%. The porous fluororesin sheet preferably has an average pore diameter of 10 m or less or a pebble point of 2 kPa or more. From the viewpoint of fine pitch formation of a normal electrode serving as a conducting part, the average pore diameter is 1 μm or less. Alternatively, the bubble point is more preferably 10 kPa or more.
多孔質フッ素樹脂シートの厚みは、 使用目的や使用箇所に応じて適宜選択す ることができるが、 通常 3 mm以下、 好ましくは 1 mm以下であり、 その下限 は、 通常 5 /zm、 好ましくは 10 /zmである。  The thickness of the porous fluororesin sheet can be appropriately selected according to the purpose of use and use location, but is usually 3 mm or less, preferably 1 mm or less, and the lower limit is usually 5 / zm, preferably 10 / zm.
多孔質フッ素樹脂シートの中でも、 延伸法により製造された延伸多孔質 PT FEシートは、 耐熱性、 加工性、 機械的特性、 誘電特性などに優れ、 均一な孔 径分布を有するため、 特に好ましい。 延伸多孔質 PTFEシートは、 例えば、 特公昭 42— 13560号公報に記載の方法により製造することができる。 ま ず、 PTFEの未焼結粉末に液体潤滑剤を混合し、 ラム押し出しによってチュ ーブ状または板状に押し出す。 厚みの薄いシートが所望の場合は、 圧延ロール によって板状体の圧延を行う。 押出圧延工程の後、 必要に応じて、 押出成形品 または圧延成形品から液体潤滑剤を除去する。  Among porous fluororesin sheets, a stretched porous PTFE sheet produced by a stretching method is particularly preferable because it has excellent heat resistance, processability, mechanical properties, dielectric properties, and the like and has a uniform pore size distribution. The stretched porous PTFE sheet can be produced, for example, by the method described in JP-B-42-13560. First, a liquid lubricant is mixed with PTFE green powder and extruded into a tube or plate by ram extrusion. When a thin sheet is desired, the plate is rolled with a rolling roll. After the extrusion rolling process, the liquid lubricant is removed from the extruded product or the rolled product as necessary.
こうして得られた板状の押出成形品または圧延成形品を一軸方向または二軸 方向に延伸すると、 未焼結の多孔質 PTFEシートが得られる。 未焼結の多孔 質 PTFEシートは、 収縮が起こらないように固定しながら、 PTFEの融点 である 327°C以上の温度に加熱して、 延伸した構造を焼結して固定すると、 強度の高い延伸多孔質 PTFEシートが得られる。 チューブ状の押出成形品を 一軸延伸して焼結すると、 延伸多孔質 P T F Eチューブが得られる。 延伸多孔 質 P T F Eチューブは、 長手方向に切り開くことにより、 シートにすることが できる。 When the plate-like extruded or rolled product thus obtained is stretched uniaxially or biaxially, an unsintered porous PTFE sheet is obtained. Unsintered porous PTFE sheet has high strength when heated to a temperature of 327 ° C or higher, which is the melting point of PTFE, while being fixed so that it does not shrink. An expanded porous PTFE sheet is obtained. Tubular extrusions When uniaxially drawn and sintered, an expanded porous PTFE tube is obtained. The stretched porous PTFE tube can be made into a sheet by cutting it in the longitudinal direction.
延伸多孔質 P T F Eシートは、 それぞれ P T F Eにより形成された非常に細 い多数のフィブリルと該フイブリルによって互いに連結された多数のノードと からなる微細網目状の多孔質構造を有している。 したがって、 延伸多孔質 P T F Eシートにおいて、 多孔質構造の樹脂部は、 フィブリルとノードであり、 多 孔質構造内は、 フィブリルとノードによって形成される空間 ( 「多孔性空隙」 または 「多孔性空間」 ともいう) である。 延伸多孔質 P T F Eシートは、 膜厚 方向の弾力性に優れており、 弾性回復性にも優れている。  The stretched porous PTFE sheet has a fine mesh-like porous structure composed of a large number of very thin fibrils formed by PTFE and a large number of nodes connected to each other by the fibrils. Therefore, in the stretched porous PTFE sheet, the resin part of the porous structure is fibrils and nodes, and the inside of the porous structure is a space formed by the fibrils and nodes (“porous void” or “porous space” It is also called). The stretched porous PTFE sheet has excellent elasticity in the film thickness direction, and also has excellent elastic recovery.
2 . 多孔質フッ素樹脂基材 2. Porous fluoropolymer substrate
本発明で使用する多孔質フッ素樹脂基材は、 多孔質フッ素樹脂シートの厚み 方向に複数の貫通孔が設けられ、 該貫通孔の内壁面には導電性金属の付着によ る筒状電極が形成された構造を有するものである。  The porous fluororesin base material used in the present invention is provided with a plurality of through holes in the thickness direction of the porous fluororesin sheet, and a cylindrical electrode formed by adhesion of a conductive metal is formed on the inner wall surface of the through hole. It has a formed structure.
本発明で使用する多孔質フッ素樹脂基材は、 その片面または両面に、 接着性 樹脂により形成された接着剤層を有するものであってもよい。 多孔質フッ素樹 脂基材が接着剤層を有する場合には、 貫通孔は、 接着剤層を含む全層に設けら れ、 かつ、 貫通孔の内壁全面 (接着層部位を含む) には導電性金属の付着によ る筒状電極が形成された構造を有するものである。 上記接着剤層に代えて、 粘 着剤層を設けることもできる。  The porous fluororesin substrate used in the present invention may have an adhesive layer formed of an adhesive resin on one side or both sides. When the porous fluororesin substrate has an adhesive layer, the through hole is provided in all layers including the adhesive layer, and the entire inner wall of the through hole (including the adhesive layer portion) is electrically conductive. It has a structure in which a cylindrical electrode is formed by adhesion of a conductive metal. Instead of the adhesive layer, an adhesive layer can be provided.
導電性金属の付着は、 一般に、 無電解めつきまたは無電解めつきと電気めつ きとの組み合わせにより、 めっき粒子を付着させることにより行う。  In general, conductive metal is deposited by depositing plated particles by electroless plating or a combination of electroless plating and electrical plating.
多孔質フッ素樹脂シートの厚み方向に複数の貫通孔を設ける方法、 及び該貫 通孔の内壁面に導電性金属の付着による筒状電極を形成する方法は、 特に限定 されないが、 例えば、 以下に述べる方法を例示することができる。  A method of providing a plurality of through holes in the thickness direction of the porous fluororesin sheet and a method of forming a cylindrical electrode by adhesion of a conductive metal on the inner wall surface of the through holes are not particularly limited. The method described can be exemplified.
例えば、 下記の工程 a〜e :  For example, the following steps a to e:
( a ) 多孔質フッ素樹脂シートの両面に、 マスク層として樹脂層を積層して、 3層構成の積層体を形成する工程 a ; ( b ) 積層体に、 その厚み方向に貫通する複数の貫通孔 (穿孔) を形成するェ 程 b ; (a) a step of laminating a resin layer as a mask layer on both sides of the porous fluororesin sheet to form a three-layer laminate a; (b) forming a plurality of through holes (perforations) penetrating in the thickness direction in the laminate b;
( c ) 貫通孔の内壁面を含む積層体の表面に、 金属イオンの還元反応を促進す る触媒を付着させる工程 c ;  (c) attaching a catalyst that promotes the reduction reaction of metal ions to the surface of the laminate including the inner wall surface of the through-hole c;
( d ) 多孔質フッ素樹脂シートからマスク層を剥離する工程 d ;及び  (d) a step of peeling the mask layer from the porous fluororesin sheet d; and
( e ) 該触媒を利用して、 貫通孔の内壁面に導電性金属を付着させる工程 e ; を含む貫通孔の内壁面を導電化した多孔質フッ素樹脂基材の製造方法が挙げら れる。 前記工程に、 必要に応じて、 貫通孔のエッチング工程などの付加的なェ 程を配置してもよい。  (e) A method of producing a porous fluororesin base material in which the inner wall surface of the through-hole including the step e is attached to the inner wall surface of the through-hole using the catalyst. If necessary, an additional step such as a through hole etching step may be arranged in the step.
マスク層の材料としては、 樹脂材料が好ましく用いられる。 該榭脂材料とし ては、 フッ素樹脂から形成された多孔質フッ素樹脂シートを用いることが好ま しいが、 フッ素樹脂無孔質シートや、 フッ素樹脂以外の樹脂材料からなる無孔 '質樹脂シートや多孔質樹脂シートを使用することもできる。 マスク層として、 粘着テープまたはシートを用いることもできる。 各層間の融着性と剥離性との バランスの観点からは、 マスク層の材料としては、 多孔質フッ素樹脂シートと 同質の多孔質フッ素樹脂シートを用いることが好ましい。  A resin material is preferably used as the material of the mask layer. As the resin material, a porous fluororesin sheet formed from a fluororesin is preferably used. However, a fluororesin nonporous sheet, a nonporous resin sheet composed of a resin material other than fluororesin, A porous resin sheet can also be used. An adhesive tape or sheet can also be used as the mask layer. From the viewpoint of the balance between fusibility between layers and peelability, it is preferable to use a porous fluororesin sheet having the same quality as the porous fluororesin sheet as the material of the mask layer.
多孔質フッ素樹脂シートの両面にマスク層を配置して、 一般に、 融着により 一体化させる。 多孔質フッ素樹脂シートとして延伸多孔質 P T F Eシートを用 いる場合は、 マスク層としても同質の延伸多孔質 P T F Eシートを用いること が好ましい。 これら 3層は、 加熱圧着することにより、 各層間が融着した積層 体とすることができる。 この積層体は、 後の工程で容易に剥離することができ る。  Mask layers are arranged on both sides of the porous fluororesin sheet and are generally integrated by fusion. When a stretched porous PTFE sheet is used as the porous fluororesin sheet, it is preferable to use the same stretched porous PTFE sheet as the mask layer. These three layers can be formed into a laminate in which the respective layers are fused by thermocompression bonding. This laminate can be easily peeled off in a later step.
この積層体に、 その厚み方向に複数の貫通孔を形成する。 貫通孔を形成する 方法としては、 i ) 機械的に穿孔する方法、 ii) 光アブレーシヨン法によりェ ツチングする方法、 iii) 先端部に少なくとも 1本の振動子を備えた超音波へ ッドを用い、 該振動子の先端を押し付けて超音波エネルギーを加えて穿孔する 方法などが挙げられる。  A plurality of through holes are formed in the laminated body in the thickness direction. The method of forming the through-hole is as follows: i) mechanical drilling method, ii) etching by optical abrasion method, iii) ultrasonic head with at least one transducer at the tip And a method of punching by applying ultrasonic energy to the tip of the vibrator.
機械的に穿孔するには、 例えば、 プレス加工、 パンチング法、 ドリル法など の機械加工法を採用することができる。 機械加工法によれば、 例えば、 1 0 0 μ m以上、 多くの場合 2 0 0 μ m以上、 さらには 3 0 0 μ m以上の比較的大き な直径を持つ貫通孔を安価に形成することができる。 機械加工により、 これよ り小さな直径の貫通孔を形成することもできる。 For mechanical drilling, for example, a machining method such as pressing, punching, or drilling can be employed. According to the machining method, for example, 1 0 0 A through hole having a relatively large diameter of μm or more, in many cases 200 μm or more, and even 300 μm or more can be formed at low cost. Through holes with smaller diameters can also be formed by machining.
光アブレーション法により貫通孔を形成する場合は、 所定のパターン状にそ れぞれ独立した複数の光透過部 (開口部) を有する光遮蔽シート (マスク) を 介して、 積層体の表面に光を照射することにより、 パターン状の貫通孔を形成 する方法である。 光遮蔽シートの複数の開口部より光が透過し照射された箇所 は、 エッチングされて貫通孔が形成される。 この方法によれば、 例えば、 2 0 〜1 5 0 / m、 多くの場合 2 5〜: L 0 0 m、 さらには 3 0〜 8 0 μ mの比較 的小さな直径を持つ貫通孔を形成することができる。 光アブレーシヨン法によ り、 必要に応じて、 これより小さな直径の穿孔を形成することもできる。 照射 光としては、 シンクロ トロン放射光、 レーザー光などが挙げられる。  When the through-hole is formed by the optical ablation method, light is applied to the surface of the laminate through a light shielding sheet (mask) having a plurality of independent light transmission portions (openings) in a predetermined pattern. This is a method of forming a pattern-like through hole by irradiating. The portions where light is transmitted through and irradiated from the plurality of openings of the light shielding sheet are etched to form through holes. According to this method, for example, a through hole having a relatively small diameter of 20 to 15 / m, in many cases 25 to: L 0 to m, or even 30 to 80 μm is formed. be able to. With the optical ablation method, holes with smaller diameters can be formed if necessary. Examples of irradiation light include synchrotron radiation and laser light.
超音波法では、 先端部に少なくとも 1本の振動子を有する超音波へッドを用 いて、 積層体に超音波エネルギーを加えることにより、 パターン状の貫通孔を 形成する。 振動子の先端が接触した近傍のみに超音波エネルギーが加えられ、 超音波による振動エネルギーによって局所的に温度が上昇し、 容易に樹脂が切 断され除去されて、 貫通孔が形成される。  In the ultrasonic method, a pattern-shaped through hole is formed by applying ultrasonic energy to the laminate using an ultrasonic head having at least one vibrator at the tip. Ultrasonic energy is applied only to the vicinity where the tip of the vibrator contacts, and the temperature rises locally due to the vibrational energy of the ultrasonic wave, and the resin is easily cut and removed to form a through hole.
貫通孔の形成に際し、 多孔質フッ素樹脂シートの多孔質構造内に、 ポリメチ ノレメタクリレートなどの可溶性ポリマーまたはパラフィンを溶液または溶融状 態で含浸させ、 固化させてから穿孔する方法を採用することもできる。 この方 法によれば、 貫通孔内壁の多孔質構造を保持し易いので好ましい。 穿孔後、 可 溶性ポリマーまたはパラフィンは、 溶解もしくは溶融させて除去することがで さる。  When forming the through-holes, it is possible to employ a method of impregnating a soluble polymer such as polymethylol methacrylate or paraffin in a porous structure of the porous fluororesin sheet in a solution or in a molten state and solidifying it after solidification. . This method is preferable because the porous structure of the inner wall of the through hole is easily retained. After drilling, the soluble polymer or paraffin can be removed by dissolving or melting.
貫通孔の形状は、 円形、 楕円形、 星型、 八角形、 六角形、 四角形、 三角形な ど任意である。 貫通孔の直径は、 小径の貫通孔が適した用途分野では、 通常 5 ~ 1 0 0 // m、 さらには 5〜3 0 μ πιにまで小さくすることができる。 他方、 比較的大径の貫通孔が適した分野では、 貫通孔の直径を通常 1 0 0 μ πι超過 3 Ο Ο Ο μ πι以下、 多くの場合 1 5 0〜2 0 0 0 μ m、 さらには 2 0 0〜1 5 0 0 mにまで大きくすることができる。 貫通孔は、 回路基板の電極の分布に合 わせて、 所定のパターン状に複数個形成することができる。 The shape of the through-hole is arbitrary, such as a circle, an ellipse, a star, an octagon, a hexagon, a rectangle, and a triangle. The diameter of the through-hole can be reduced to 5 to 1 0 0 // m, or even 5 to 30 μ πι, in applications where small-diameter through holes are suitable. On the other hand, in areas where relatively large through-holes are suitable, the diameter of the through-hole is usually more than 1 00 μ πι 3 以下 Ο Ο μ πι, often from 1 5 0 to 2 0 0 0 μm, Can be as large as 2 00 to 1 5 0 0 m. The through hole matches the distribution of the electrodes on the circuit board. Accordingly, a plurality of patterns can be formed in a predetermined pattern.
貫通孔の內壁面を含む積層体の表面に、 金属イオンの還元反応を促進する触 媒 ( 「めっき触媒」 ともいう) を付着させるには、 積層体を、 例えばパラジゥ ムースズコロイド触媒付与液に十分に撹拌しながら浸漬すればよい。 貫通孔の 内壁面に付着して残留する触媒を利用して、 該内壁面に選択的に導電性金属を 付着させる。 導電性金属を付着させる方法としては、 無電解めつき法が好適で ある。  In order to attach a catalyst (also referred to as a “plating catalyst”) that promotes the reduction reaction of metal ions to the surface of the laminate including the wall surface of the through-hole, the laminate is applied, for example, to a palladium mutin colloid catalyst application liquid. What is necessary is just to immerse, fully stirring. Using the catalyst remaining on the inner wall surface of the through hole, a conductive metal is selectively attached to the inner wall surface. As a method for attaching the conductive metal, an electroless plating method is suitable.
無電解めつきを行う前に貫通孔の内壁面に残留した触媒 (例えば、 パラジゥ ムースズ) を活性化する。 具体的には、 めっき触媒活性化用として市販されて いる有機酸塩等に浸漬することで、 スズを溶解し、 触媒を活性化する。 貫通孔 の内壁面に触媒を付与した多孔質フッ素樹脂シートを無電解めつき液に浸漬す ることにより、 触媒が付着した貫通孔の内壁面のみに導電性金属 (めっき粒 子) を析出させることができる。 この方法によって、 筒状電極が形成される。 導電性金属としては、 銅、 ニッケル、 銀、 金、 ニッケル合金などが挙げられる 高導電性が必要な場合は、 銅を使用することが好ましい。  Before electroless plating, the catalyst (for example, palladium mucin) remaining on the inner wall of the through hole is activated. Specifically, it is immersed in an organic acid salt that is commercially available for activating the plating catalyst to dissolve tin and activate the catalyst. By immersing a porous fluororesin sheet with a catalyst applied to the inner wall surface of the through hole in an electroless plating solution, conductive metal (plating particles) is deposited only on the inner wall surface of the through hole to which the catalyst has adhered. be able to. By this method, a cylindrical electrode is formed. Examples of conductive metals include copper, nickel, silver, gold, and nickel alloys. When high conductivity is required, copper is preferably used.
延伸多孔質 P T F Eシートを用いた場合、 めっき粒子は、 初め多孔質 P T F Eシートの貫通孔の内壁面に露出した樹脂部 (主としてフィブリル) に絡むよ うに析出するので、 めっき時間をコントロールすることにより、 導電性金属の 付着状態をコントロールすることができる。 適度なめっき量とすることによ り、 多孔質構造を維持した状態で導電性金属層が形成され、 弾力性と同時に膜 厚方向への導電性も与えることが可能となる。  When the stretched porous PTFE sheet is used, the plating particles initially precipitate so as to be entangled with the resin portion (mainly fibrils) exposed on the inner wall surface of the through hole of the porous PTFE sheet, so by controlling the plating time, It can control the adhesion state of conductive metal. By setting an appropriate amount of plating, a conductive metal layer is formed while maintaining a porous structure, and it is possible to provide elasticity in the film thickness direction as well as elasticity.
微細多孔質構造の樹脂部の太さ (例えば、 延伸多孔質 P T F Eシートのフィ ブリルの太さ) は、 5 0 m以下であることが好ましい。 導電性金属の粒子径 は、 0 . 0 0 1〜5 μ πι程度であることが好ましい。 導電性金属の付着量は、 多孔質構造と弾力性を維持するために、 0 . 0 1〜4 . O g /m l程度とする ことが好ましい。  The thickness of the resin part having a fine porous structure (for example, the thickness of the fibrils of the stretched porous PTFE sheet) is preferably 50 m or less. The particle diameter of the conductive metal is preferably about 0.001 to 5 μπι. In order to maintain the porous structure and elasticity, the amount of the conductive metal deposited is preferably about 0.01 to 4. Og / ml.
上記で作製された筒状電極 (導通部) は、 酸化防止及び電気的接触性を高め るため、 酸化防止剤を使用するか、 貴金属または貴金属の合金で被覆しておく ことが好ましい。 貴金属としては、 電気抵抗の小さい点で、 パラジウム、 ロジ ゥム、 金が好ましい。 被覆層の厚さは、 好ましくは 0 . 0 0 5〜0 . 5 m、 より好ましくは 0 . 0 1〜0 . Ι μ πιである。 例えば、 導通部を金で被覆する 場合、 8 n m程度のニッケルで導電性金属層を被覆した後、 置換金めつきを行 う方法が効果的である。 The cylindrical electrode (conducting portion) produced above is preferably used with an antioxidant or coated with a noble metal or a noble metal alloy in order to improve oxidation prevention and electrical contact. Precious metals include palladium, Umm, gold is preferred. The thickness of the coating layer is preferably 0.05 to 0.5 m, more preferably 0.01 to 0.5 μππι. For example, when the conductive part is covered with gold, it is effective to cover the conductive metal layer with nickel of about 8 nm and then perform substitution gold plating.
多孔質フッ素樹脂シートとして延伸多孔質 P T F Eシートを使用すると、 貫 通孔の内壁面で、 樹脂部 (フイブリル) に導電性金属粒子が付着した構造の筒 状電極が形成される。 この多孔質フッ素樹脂基材に厚み方向の応力が加わる と、 フィブリル間の距離が縮むことにより、 応力が緩和され、 筒状電極の構造 も破壊されることなく維持される。 したがって、 多孔質フッ素樹脂基材に繰り 返し圧縮力が加えられても、 筒状電極の劣化が起こり難い。  When a stretched porous PTFE sheet is used as the porous fluororesin sheet, a cylindrical electrode having a structure in which conductive metal particles adhere to the resin portion (fibril) is formed on the inner wall surface of the through hole. When a stress in the thickness direction is applied to the porous fluororesin substrate, the distance between the fibrils is reduced, so that the stress is relaxed and the structure of the cylindrical electrode is maintained without being destroyed. Therefore, even when a compressive force is repeatedly applied to the porous fluororesin base material, the cylindrical electrode hardly deteriorates.
筒状電極は、 通常、 多孔質フッ素樹脂シートの厚み方向に設けられた貫通孔 の内壁面のみに導電性金属が付着した構造を有するものであるが、 無電解めつ き量を調節する力、 無電解めつきに加えて電気めつきを行うことにより、 該筒 状電極の 2つの開口端部の一方または両方を閉塞させて、 導電性金属からなる 蓋体を形成させてもよい。 めっき量を増やすと、 開口端部の縁からめっき粒子 が成長し、 配向端部を閉塞させる。  The cylindrical electrode usually has a structure in which conductive metal adheres only to the inner wall surface of the through hole provided in the thickness direction of the porous fluororesin sheet. In addition to electroless plating, one or both of the two open end portions of the cylindrical electrode may be closed to form a lid made of a conductive metal. When the plating amount is increased, plating particles grow from the edge of the opening end, and the orientation end is blocked.
貫通孔の内壁面に付着させる導電性金属の量を増やすことなく、 開口端部を 閉塞させる方法として、 導電性金属粒子を含有する高粘度のペーストを開口端 部に塗布する方法がある。  As a method of closing the opening end without increasing the amount of conductive metal attached to the inner wall surface of the through hole, there is a method of applying a high-viscosity paste containing conductive metal particles to the opening end.
このような方法により、 筒状電極の開口端部を導電性材料により閉塞して蓋 体を形成すると、 多孔質フッ素樹脂基材の筒状電極と、 回路電極及び Zまたは 半導体チップの電極との接触面積を増やすことができる。  By such a method, when the lid is formed by closing the open end of the cylindrical electrode with a conductive material, the cylindrical electrode of the porous fluororesin substrate, the circuit electrode, and the electrode of the Z or semiconductor chip The contact area can be increased.
3 . 接着剤層またな粘着剤層を有する多孔質フッ素樹脂基材 3. Porous fluororesin substrate having adhesive layer or adhesive layer
本発明の多孔質フッ素樹脂基材には、 その片面または両面に接着剤層または 粘着剤層を設けたものとすることができる。  The porous fluororesin substrate of the present invention may be provided with an adhesive layer or a pressure-sensitive adhesive layer on one side or both sides.
接着剤層を構成する接着性樹脂としては、 接着能を有する樹脂材料が用いら れる。 接着性樹脂としては、 例えば、 ポリイミド樹脂、 エポキシ樹脂、 ウレタ ン樹脂、 シァネート樹脂、 シリコーン樹脂、 ポリアミド樹脂、 アクリル樹脂、 極性基を含有する環状ォレフィン樹脂、 熱溶融性フッ素樹脂 (例えば、 F E P 及び F F A) 、 変性ポリフエ二レンエーテル樹脂などを挙げることができる 力 これらに限定されない。 粘着剤層を形成する粘着剤としては、 感圧接着剤 などの粘着剤を使用することができる。 接着性樹脂及び粘着剤としては、 電気 絶縁性のものを使用する。 これらの中でも、 耐熱性の観点からは、 ポリイミド 樹脂 (ポリイミド系熱硬化型接着剤) が好ましい。 As the adhesive resin constituting the adhesive layer, a resin material having adhesive ability is used. Examples of adhesive resins include polyimide resins, epoxy resins, urethane resins, cyanate resins, silicone resins, polyamide resins, acrylic resins, A cyclic olefin resin containing a polar group, a heat-meltable fluororesin (for example, FEP and FFA), a modified polyphenylene ether resin, and the like can be mentioned. As the pressure-sensitive adhesive forming the pressure-sensitive adhesive layer, a pressure-sensitive adhesive such as a pressure-sensitive adhesive can be used. Use an electrically insulating resin and adhesive. Among these, from the viewpoint of heat resistance, a polyimide resin (polyimide thermosetting adhesive) is preferable.
本発明の接着剤層またな粘着剤層を有する多孔質フッ素樹脂基材は、 多孔質 フッ素樹脂シートの片面または両面に接着性樹脂層もしくは粘着剤層が配置さ れた多層シートの厚み方向に全層を貫通する複数の貫通孔が設けられ、 該貫通 孔の内壁全面に導電性金属の付着による筒状電極が形成された構造の接着剤層 もしくは粘着剤層を有する多孔質フッ素樹脂基材である。  The porous fluororesin substrate having the adhesive layer or the pressure-sensitive adhesive layer of the present invention has a thickness direction of a multilayer sheet in which an adhesive resin layer or a pressure-sensitive adhesive layer is disposed on one side or both sides of the porous fluororesin sheet. A porous fluororesin substrate having an adhesive layer or a pressure-sensitive adhesive layer having a structure in which a plurality of through-holes penetrating all layers are provided, and a cylindrical electrode is formed on the entire inner wall of the through-hole by adhesion of conductive metal It is.
接着剤層を持つ多孔質フッ素樹脂基材を作製するには、 先ず、 「接着性樹脂 層 Z多孔質フッ素樹脂シート Z接着性樹脂層」 または 「接着性樹脂層 Z多孔質 フッ素樹脂シート」 の層構成を持つ多層シートを作製する。 同様に、 粘着剤層 を有する多孔質フッ素樹脂基材を作製するには、 先ず、 「粘着剤層 Z多孔質フ ッ素樹脂シート/粘着剤層」 または 「粘着剤層 多孔質フッ素樹脂シート」 の 層構成を有する多層シートを作製する。  To produce a porous fluororesin substrate with an adhesive layer, first of all, "adhesive resin layer Z porous fluororesin sheet Z adhesive resin layer" or "adhesive resin layer Z porous fluororesin sheet" A multilayer sheet having a layer structure is produced. Similarly, in order to produce a porous fluororesin substrate having an adhesive layer, first, “adhesive layer Z porous fluororesin sheet / adhesive layer” or “adhesive layer porous fluororesin sheet” A multilayer sheet having the following layer structure is prepared.
多孔質フッ素樹脂シートとしては、 前述の延伸多孔質 P T F Eシートなどを 使用する。 この多孔質フッ素樹脂シートの片面または両面に、 接着性樹脂の溶 液もしくは溶融液を塗布する 、 接着性樹脂から形成されたドライフィルムを 加熱圧着することにより、 接着性樹脂層 (接着剤層) を形成する。 粘着剤層を 形成する場合も、 同様の手法を採用することができる。  As the porous fluororesin sheet, the aforementioned stretched porous PTFE sheet is used. An adhesive resin layer (adhesive layer) is formed by applying a solution or melt of an adhesive resin to one or both sides of the porous fluororesin sheet, and applying heat-pressure bonding to a dry film formed from the adhesive resin. Form. A similar method can be employed when forming the pressure-sensitive adhesive layer.
接着性樹脂層または粘着剤層は、 多孔質フッ素樹脂シートの表面近傍の多孔 質構造内に接着性樹脂もしくは粘着剤の一部が浸透した形態で固化させること により、 多孔質フッ素樹脂シート本体の多孔質構造を保持させる。 接着性樹脂 層または粘着剤層の厚みは、 通常5〜3 0 0 01、 好ましくは 8〜2 0 0 / m、 より好ましくは 1 0〜 1 0 0 μ mである。 接着性樹脂層または粘着剤層の 厚みが薄すぎると、 接着力もしくは粘着力が不十分となる。 接着性樹脂層また は粘着剤層の厚みが厚すぎると、 接着性樹脂層もしくは粘着剤層にクラックが 入り易くなる。 The adhesive resin layer or the pressure-sensitive adhesive layer is solidified in a form in which a part of the adhesive resin or the pressure-sensitive adhesive penetrates into the porous structure near the surface of the porous fluororesin sheet. Hold the porous structure. The thickness of the adhesive resin layer or the pressure-sensitive adhesive layer is usually 5 to 300, preferably 8 to 200 / m, more preferably 10 to 100 μm. If the thickness of the adhesive resin layer or the pressure-sensitive adhesive layer is too thin, the adhesive strength or adhesive strength will be insufficient. If the thickness of the adhesive resin layer or pressure-sensitive adhesive layer is too thick, cracks will occur in the adhesive resin layer or pressure-sensitive adhesive layer. Easy to enter.
接着性樹脂層または粘着剤層を設けた多孔質フッ素樹脂シートは、 その両面 にマスク層を配置し、 膜厚方向に複数の貫通孔を形成する。 接着性樹脂が熱硬 化性の場合には、 マスク層を配置した後、 半硬化状態 (熱硬化を途中で中止 し、 完全には硬化させない状態) とすると、 マスク層の密着性を向上させると ともに、 貫通孔の形成を円滑に行うことができるので好ましい。 マスク材料と しては、 前述の樹脂材料などを用いることができる。  A porous fluororesin sheet provided with an adhesive resin layer or a pressure-sensitive adhesive layer has a mask layer disposed on both sides thereof and forms a plurality of through holes in the film thickness direction. If the adhesive resin is thermosetting, after placing the mask layer, if it is in a semi-cured state (the heat curing is stopped halfway and not completely cured), the adhesion of the mask layer is improved. In addition, it is preferable because the through-hole can be formed smoothly. As the mask material, the above-described resin materials can be used.
貫通孔を形成した後、 触媒を付与し、 そして、 マスク層を除去してから、 触 媒が付着した貫通孔に導電性金属を付着させる。 触媒の付着及び導電性金属の 付着には、 前述と同様の方法を採用することができる。 貫通孔の内壁面は、 接 着性樹脂部位または粘着剤部位を含む全面が導電性金属の付着により筒状電極 を形成している。 このような接着剤層または粘着剤層を有する多孔質フッ素樹 脂基材は、 応力緩和機能を有する接着シートもしくは粘着シートとして使用す ることができる。  After forming the through hole, a catalyst is applied, and after removing the mask layer, a conductive metal is attached to the through hole to which the catalyst is attached. The same method as described above can be adopted for the adhesion of the catalyst and the conductive metal. On the inner wall surface of the through hole, the entire surface including the adhesive resin part or the adhesive part forms a cylindrical electrode by the adhesion of the conductive metal. The porous fluororesin substrate having such an adhesive layer or pressure-sensitive adhesive layer can be used as an adhesive sheet or pressure-sensitive adhesive sheet having a stress relaxation function.
4 . 多層基板 4. Multilayer board
本発明の多層基板は、 多孔質フッ素樹脂シートの厚み方向に複数の貫通孔が 設けられ、 該貫通孔の内壁面には導電性金属の付着による筒状電極が形成され た多孔質フッ素樹脂基材と回路基板とが、 該多孔質フッ素樹脂基材の筒状電極 と該回路基板の電極とが電気的に接続された状態で一体化された構造を有する 多層基板である。  The multilayer substrate of the present invention has a porous fluororesin base in which a plurality of through holes are provided in the thickness direction of the porous fluororesin sheet, and a cylindrical electrode is formed on the inner wall surface of the through holes by adhesion of conductive metal. A multilayer substrate having a structure in which a material and a circuit board are integrated in a state where the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board are electrically connected.
一般に、 電子'電気機器セットの電子回路基板は、 数百から数千ミクロン単 位の配線ルールを有するプリント配線板に種々の部品が搭載された構成を有し ている。 この中で心臓部に当る L S Iチップは、 サブミクロン単位で形成され た回路を外部に電気的接続するために、 数十から数百ミクロン単位で金属電極 がチップ外周辺に設けられており、 パッケージ基板 (インターポーザ基板) や モジュール用基板 (ドータボード) を介して、 プリント配線板 (マザ一ポー ド) に搭載されている。  In general, an electronic circuit board of an electronic / electrical equipment set has a configuration in which various components are mounted on a printed wiring board having a wiring rule of hundreds to thousands of microns. Among these, the LSI chip, which is the heart, has metal electrodes on the outside of the chip in units of tens to hundreds of microns in order to electrically connect circuits formed in submicron units to the outside. It is mounted on a printed wiring board (mother-one board) via a board (interposer board) or module board (daughter board).
本発明で使用する回路基板としては、 半導体チップ (I C、 L S I、 V L S Iなど) をモジュール実装するためのパッケージ基板が代表的なものである。 このパッケージ基板は、 回路パターンと電極 (内部電極または内部端子) を有 し、 さらに、 外部端子を有している。 一般に、 半導体チップを回路基板にパッ ケージ実装することにより、 外部回路との間で電気的に接続可能にすると同時 に、 温度や湿度などの外部環境から半導体チップを保護し、 振動や衝撃による 半導体チップの破損や劣化を防ぎ、 さらには、 作動時の発熱を放散する。 表面実装型パッケージ技術が発展するに伴い、 近年、 外部端子としてはんだ ポールを用いたポールグリッドアレイ (B G A) などのエリアアレイ端子型パ ッケージが出現している。 B G Aは、 従来のリード端子の代わりに、 はんだポ ールの端子がパッケージ基板の面上にグリッドアレイ (格子配列) に設けられ たエリアアレイ型パッケージである。 B G Aは、 多ピン化が容易で実装密度が 高く、 一括リフローにより表面実装することができる。 Circuit boards used in the present invention include semiconductor chips (IC, LSI, VLS A typical example is a package substrate for mounting a module such as I). The package substrate has a circuit pattern and electrodes (internal electrodes or internal terminals), and further has external terminals. In general, by mounting a semiconductor chip on a circuit board, it can be electrically connected to an external circuit, and at the same time, it protects the semiconductor chip from the external environment such as temperature and humidity, and the semiconductor due to vibration and shock. Prevents chip breakage and deterioration, and dissipates heat during operation. With the development of surface-mount package technology, area array terminal packages such as a pole grid array (BGA) using solder poles as external terminals have recently emerged. BGA is an area array type package in which solder pole terminals are provided in a grid array (lattice arrangement) on the surface of the package substrate instead of the conventional lead terminals. BGA is easy to increase the number of pins, has high mounting density, and can be surface mounted by batch reflow.
ところが、 B G Aは、 外部端子 (接続端子) が硬いはんだポールであるた め、 リード端子に比べて、 ス トレスが開放されないという問題点を有してい る。 そのため、 このようなエリアアレイ型パッケージは、 応力や熱ストレスを 緩和する機能を持たず、 また、 曲げストレスや落下衝撃に対する耐性にも問題 力 sある。 However, the BGA has a problem that the stress is not released compared to the lead terminal because the external terminal (connection terminal) is a hard solder pole. Therefore, such an area array type package has no function of reducing the stress and thermal stress, also resistant to also issue power s to bending stress or drop impact.
前記文献 2には、 I Cダイと回路基板との間に多孔質 P T F E層を含む接着 シートを介在させることにより、 応力を緩和させる方法が提案されている。 し かし、 この方法では、 I Cダイと回路基板の電極 (内部端子) との間をリード 線やボンディングワイヤによって接続しなければならない。 そのために、 接着 シートに穴を開けて、 その穴にリード線ゃポンデイングワイヤを通す必要があ る。 リード線などを接続に用いると、 回路基板の電極の狭ピッチ化に対応する ことができず、 また、 リード線などに繰り返し加えられる応力により、 破断の 危険性が増大する。  Document 2 proposes a method of relieving stress by interposing an adhesive sheet including a porous PTFE layer between an IC die and a circuit board. However, in this method, the IC die and the circuit board electrode (internal terminal) must be connected by lead wires or bonding wires. For this purpose, it is necessary to make a hole in the adhesive sheet and pass the bonding wire through the hole. If a lead wire or the like is used for connection, the pitch of the circuit board electrodes cannot be reduced, and the risk of breakage increases due to the stress repeatedly applied to the lead wire and the like.
これに対して、 本発明の,筒状電極を備えた多孔質フッ素樹脂基材を半導体チ ップと回路基板との間に配置すると、 リード線ゃポンデイングワイヤを用いる ことなく、 多孔質フッ素樹脂基材の筒状電極を介して半導体チップと回路基板 との間の電気的接続を可能とし、 かつ、 応力緩和機能を付与することができ る。 On the other hand, when the porous fluororesin base material provided with the cylindrical electrode of the present invention is disposed between the semiconductor chip and the circuit board, the lead wire is not used without the bonding wire. Enables electrical connection between the semiconductor chip and the circuit board via the cylindrical electrode of the resin base material, and can provide a stress relaxation function. The
筒状電極を有する多孔質フッ素樹脂基材は、 回路電極と一体化して多層基板 とすることにより、 輸送時における筒状電極の破損が保護されるとともに、 半 導体チップのパッケージ実装作業を容易にすることができる。 また、 このよう な多層基板の形態で、 回路基板の導通検查を行い、 回路基板をスクリーニング することができる。  The porous fluororesin substrate with cylindrical electrodes is integrated with the circuit electrodes to form a multilayer substrate, which protects the cylindrical electrodes from damage during transportation and facilitates semiconductor chip package mounting. can do. In addition, the circuit board can be screened by conducting a continuity test on the circuit board in the form of such a multilayer board.
図 1に、 多層基板の一例を示す断面図を示す。 回路基板 1は、 基材 2と電極 3と外部端子 4とで構成されている。 外部端子としては、 はんだポールを用い ることができるが、 これに限定されない。 回路基板の上に、 筒状電極 6が形成 された多孔質フッ素樹脂基材 5が配置され、 一体化されている。 多孔質フッ素 樹脂基材と回路基板とは、 該多孔質フッ素樹脂基材の筒状電極と該回路基板の 電極とが電気的に接続された状態で一体化された構造を有している。  Figure 1 shows a cross-sectional view of an example of a multilayer substrate. The circuit board 1 is composed of a base material 2, an electrode 3 and an external terminal 4. As the external terminal, a solder pole can be used, but it is not limited to this. On the circuit board, a porous fluororesin base material 5 on which a cylindrical electrode 6 is formed is disposed and integrated. The porous fluororesin base material and the circuit board have a structure in which the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board are integrated in an electrically connected state.
多孔質フッ素樹脂基材と回路基板との一体化には、 接着剤による接着、 粘着 剤による粘着、 抵抗溶接、 機械的結合などがあり、 使用目的に応じて適宜選択 することができる。  The integration of the porous fluororesin substrate and the circuit board includes adhesion with an adhesive, adhesion with an adhesive, resistance welding, mechanical bonding, and the like, which can be appropriately selected according to the purpose of use.
多孔質フッ素樹脂基材と回路基板とは、 該回路基板の電極上に設けた導電性 接着剤、 該回路基板の電極以外の部分に設けた絶縁性接着剤、 またはこれら両 方により、 接着することができる。 導電性接着剤や絶縁性接着剤は、 回路基板 上に所定のパターンで塗布する。 これらの接着剤は、 印刷により塗布してもよ い。 絶縁性接着剤としては、 前述の接着性樹脂を例示することができる。 導電 性接着剤としては、 エポキシ樹脂やフ.エノール樹脂等の熱硬化性や、 ポリエス テル樹脂、 ポリウレタン樹脂、 アクリル樹脂等の熱可塑性樹脂に、 導電性フィ ラーを多量に充填したものであり、 機械的接合と電気的接続を同時に行うこと ができる。 接着剤層の厚みは、 特に限定されないが、 通常 5〜 2 0 0 /ί ηι程度 である。  The porous fluororesin substrate and the circuit board are adhered to each other by a conductive adhesive provided on the circuit board electrode, an insulating adhesive provided on a part other than the electrode of the circuit board, or both of them. be able to. Conductive adhesive or insulating adhesive is applied in a predetermined pattern on the circuit board. These adhesives may be applied by printing. Examples of the insulating adhesive include the adhesive resins described above. Examples of conductive adhesives are thermosetting resins such as epoxy resins and phenol resins, and thermoplastic resins such as polyester resins, polyurethane resins, and acrylic resins filled with a large amount of conductive fillers. Mechanical bonding and electrical connection can be performed simultaneously. The thickness of the adhesive layer is not particularly limited, but is usually about 5 to 200 / ίηι.
多孔質フッ素樹脂基材として、 多孔質フッ素樹脂シートの片面または両面に 接着性樹脂層が配置された多層シートの厚み方向に全層を貫通する複数の貫通 孔が設けられ、 該貫通孔の内壁全面に導電性金属の付着による筒状電極が形成 された構造の接着層を有する多孔質フッ素樹脂基材を用いて、 回路基板と接着 してもよい。 この場合、 該多孔質フッ素樹脂基材と該回路基板とを、 該多孔質 フッ素樹脂基材の接着層により接着する。 As the porous fluororesin base material, a plurality of through-holes penetrating all layers in the thickness direction of the multilayer sheet in which the adhesive resin layer is disposed on one side or both sides of the porous fluororesin sheet are provided, and the inner wall of the through-hole Adhesion to circuit board using porous fluororesin base material with adhesive layer with structure in which cylindrical electrode is formed by adhesion of conductive metal on the entire surface May be. In this case, the porous fluororesin base material and the circuit board are bonded together by an adhesive layer of the porous fluororesin base material.
さらに、 多孔質フッ素樹脂基材として、 多孔質フッ素樹脂シートの片面に接 着性樹脂層が配置された多層シートの厚み方向に全層を貫通する複数の貫通孔 が設けられ、 該貫通孔の内壁全面に導電性金属の付着による筒状電極が形成さ れた構造の接着層を有する多孔質フッ素樹脂基材を使用し、 該多孔質フッ素樹 脂基材と該回路基板とを、 該多孔質フッ素樹脂基材の接着層が形成されていな い面で、 接着剤により接着することができる。  Further, as the porous fluororesin base material, a plurality of through holes penetrating all the layers in the thickness direction of the multilayer sheet in which the adhesive resin layer is disposed on one side of the porous fluororesin sheet are provided. Using a porous fluororesin base material having an adhesive layer having a structure in which a cylindrical electrode is formed on the entire inner wall by adhesion of a conductive metal, and the porous fluororesin base material and the circuit board are It can be adhered with an adhesive on the surface of the fluorocarbon resin base material on which no adhesive layer is formed.
図 2に、 多孔質フッ素樹脂シート 2. 2の両面に接着性樹脂層 (接着剤層) 2 3, 2 4が配置された多層シートの厚み方向に全層を貫通する複数の貫通孔 2 5が設けられ、 該貫通孔 2 5の内壁全面に導電性金属の付着による筒状電極 2 6が形成された構造の接着剤層を有する多孔質フッ素樹脂基材 2 1の断面図を 示す。  Figure 2 shows the porous fluororesin sheet 2.2. Adhesive resin layer (adhesive layer) 2 2 on both sides 2 3 and 2 4 Multiple holes that penetrate all layers in the thickness direction of the multilayer sheet 2 5 A cross-sectional view of a porous fluororesin substrate 21 having an adhesive layer having a structure in which a cylindrical electrode 26 is formed on the entire inner wall of the through hole 25 by the attachment of a conductive metal is shown.
図 3には、 上記多孔質フッ素樹脂基材 2 1において、 通常電極の開口端部の 両方が導電性材料から形成された蓋体 2 7, 2 8によって閉塞された構造の多 孔質フッ素樹脂生地が示されている。  FIG. 3 shows a porous fluororesin having a structure in which both the opening ends of the normal electrode are closed by lid bodies 27 and 2 8 formed of a conductive material in the porous fluororesin base material 21 described above. The dough is shown.
接着剤層に代えて、 粘着剤層を用いてもよい。 前記接着剤に代えて、 導電性 粘着剤、 絶縁性粘着剤、 またはこれら両方を使用することにより、 多孔質フッ 素樹脂基材と回路基板とを粘着させることができる。 多孔質フッ素樹脂基材と 回路基板とを接着剤により接着させて一体化させると、 例えば、 多孔質フッ素 樹脂基材を取り替えることが困難であるが、 粘着剤を用いて粘着により一体化 させた場合には、 必要に応じて、 多孔質フッ素樹脂基材を新しい多孔質フッ素 樹脂基材に交換することができる。  Instead of the adhesive layer, an adhesive layer may be used. By using a conductive adhesive, an insulating adhesive, or both in place of the adhesive, the porous fluororesin substrate and the circuit board can be adhered. If the porous fluororesin base material and the circuit board are bonded and integrated with an adhesive, for example, it is difficult to replace the porous fluororesin base material, but the adhesive is integrated using an adhesive. In some cases, the porous fluororesin substrate can be replaced with a new porous fluororesin substrate if necessary.
多孔質フッ素樹脂基材の筒状電極と回路基板の電極を電気的に接続した状態 で配置し、 通電することにより、 通電により生じる発熱を利用して、 電極間を 抵抗溶接することができる。 抵抗溶接は、 他の一体化手段と併用してもよい。 多孔質フッ素樹脂基材と回路基板との一体化には、 該多孔質フッ素樹脂基材 を回路基板にピン留めする方法などの機械的な結合方法を利用することができ る。 多層基板の使用目的によっては、 該多孔質フッ素樹脂基材を 2つの回路基板 でサンドイッチ状に挟み込んで固定する方法もある。 具体的には、 多孔質フッ 素榭脂基材の片面で、 該多孔質フッ素樹脂基材と第一の回路基板とが、 該多孔 質フッ素樹脂基材の筒状電極と該第一の回路基板の電極とが電気的に接続され た状態で一体化され、 さらに、 該多孔質フッ素樹脂基材の他面で、 該多孔質フ ッ素樹脂基材と第二の回路基板とが、 該多孔質フッ素樹脂基材の筒状電極と該 第二の回路基板の電極とが電気的に接続された状態で一体化された構造の多層 基板が挙げられる。 この多層基板は、 該多孔質フッ素樹脂基材が 2つの回路基 板の間に挟み込まれて一体化された構造を有している。 2つの回路基板は、 ピ ン留めなどの機械的方法により結合することができる。 このような機械的方法 を採用すると、 多孔質フッ素樹脂基材に導通不良などの問題が生じた場合に は、 ピンを外して新しい多孔質フッ素樹脂基材と交換することが容易となる。 By placing the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board in an electrically connected state and energizing them, resistance welding can be performed between the electrodes using the heat generated by energization. Resistance welding may be used in combination with other integration means. For the integration of the porous fluororesin base material and the circuit board, a mechanical bonding method such as a method of pinning the porous fluororesin base material to the circuit board can be used. Depending on the purpose of use of the multilayer substrate, there is a method in which the porous fluororesin base material is sandwiched and fixed between two circuit substrates. Specifically, on one side of the porous fluorine resin base material, the porous fluororesin base material and the first circuit board include the cylindrical electrode of the porous fluororesin base material and the first circuit. Integrated with the electrodes of the substrate being electrically connected, and on the other surface of the porous fluororesin base, the porous fluororesin base and the second circuit board are Examples include a multilayer substrate having a structure in which a cylindrical electrode of a porous fluororesin base material and an electrode of the second circuit board are integrated in an electrically connected state. This multilayer substrate has a structure in which the porous fluororesin substrate is integrated by being sandwiched between two circuit substrates. The two circuit boards can be joined by a mechanical method such as pinning. When such a mechanical method is adopted, when a problem such as poor conduction occurs in the porous fluororesin base material, it becomes easy to remove the pin and replace it with a new porous fluororesin base material.
5 . 半導体パッケージ 5. Semiconductor package
本発明の半導体パッケージは、 多孔質フッ素樹脂シートの厚み方向に複数の 貫通孔が設けられ、 該貫通孔の内壁面には導電性金属の付着による筒状電極が 形成された多孔質フッ素樹脂基材と回路基板とが、 該多孔質フッ素樹脂基材の 筒状電極と該回路基板の電極とが電気的に接続された状態で一体化され、 さら に、 該多孔質フッ素樹脂基材の該回路基板側とは反対側の面で、 該多孔質フッ 素樹脂基材と半導体チップとが、 該多孔質フッ素樹脂基材の筒状電極と該半導 体チップの電極とが電気的に接続された状態で一体化された構造を有する半導 体パッケージである。  The semiconductor package of the present invention has a porous fluororesin base in which a plurality of through-holes are provided in the thickness direction of the porous fluororesin sheet, and a cylindrical electrode is formed on the inner wall surface of the through-hole by adhesion of a conductive metal. The cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board are integrated with each other in a state where the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board are electrically connected. On the surface opposite to the circuit board side, the porous fluororesin substrate and the semiconductor chip are electrically connected to the cylindrical electrode of the porous fluororesin substrate and the electrode of the semiconductor chip. This is a semiconductor package having an integrated structure.
多孔質フッ素樹脂基材と回路基板との一体化、 及び多孔質フッ素樹脂基材と 半導体チップとの一体化には、 接着剤による接着、 粘着剤による粘着、 抵抗溶 接、 ピン留めなどの機械的結合などを利用することができる。  For the integration of the porous fluororesin base material and the circuit board, and the integration of the porous fluororesin base material and the semiconductor chip, adhesive bonding, adhesive sticking, resistance welding, pinning, etc. Can be used.
例えば、 多孔質フッ素樹脂シートの片面または両面に接着性樹脂層が配置さ れた多層シートの厚み方向に全層を貫通する複数の貫通孔が設けられ、 該貫通 孔の内壁全面に導電性金属の付着による筒状電極が形成された構造の接着層を 有する多孔質フッ素樹脂基材と回路基板とが、 該多孔質フッ素樹脂基材の筒状 電極と該回路基板の電極とが電気的に接続された状態で、 該接着剤層もしくは 接着剤により接着され、 さらに、 該回路基板との接着面とは反対側の面で、 該 多孔質フッ素樹脂基材と半導体チップとが、 該多孔質フッ素樹脂基材の筒状電 極と該半導体チップの電極とが電気的に接続された状態で、 該接着剤層により 接着された構造を有する半導体パッケージを挙げることができる。 For example, a plurality of through holes penetrating all layers in the thickness direction of a multilayer sheet in which an adhesive resin layer is disposed on one or both sides of a porous fluororesin sheet are provided, and a conductive metal is formed on the entire inner wall of the through hole. A porous fluororesin base material having a bonding layer having a structure in which a cylindrical electrode is formed by adhesion of the substrate and a circuit board are formed of the porous fluororesin base material In the state where the electrode and the electrode of the circuit board are electrically connected, they are bonded by the adhesive layer or the adhesive, and further, on the surface opposite to the bonding surface with the circuit board, the porous fluorine A semiconductor having a structure in which a resin substrate and a semiconductor chip are bonded by the adhesive layer in a state where the cylindrical electrode of the porous fluororesin substrate and the electrode of the semiconductor chip are electrically connected Name the package.
接着剤層に代えて、 粘着剤層を用いることができる。 また、 接着剤を用いた 接着に代えて、 粘着剤を用いた粘着、 抵抗溶接、 ピン留めなどの機械的結合な どを利用して一体化することができる。  Instead of the adhesive layer, a pressure-sensitive adhesive layer can be used. In addition, instead of bonding using an adhesive, it can be integrated using mechanical bonding such as adhesion using an adhesive, resistance welding, pinning, and the like.
半導体チップとしては、 I C、 L S I , V L S Iなどが挙げられる。 多孔質 フッ素樹脂基材と回路基板とは、 該多孔質フッ素樹脂基材の筒状電極と該回路 基板の電極とが電気的に直接接続された状態で一体化される。 多孔質フッ素樹 脂基材の筒状電極と該半導体チップの電極とは、 電気的に接続するが、 多孔質 フッ素樹脂基材の大きさに比べて、 半導体チップの大きさが小さすぎる場合に は、 長いリード電極などを用いて接続してもよい。  Examples of semiconductor chips include I C, L S I, and V L S I. The porous fluororesin base material and the circuit board are integrated with the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board being electrically connected directly. The cylindrical electrode of the porous fluororesin base material and the electrode of the semiconductor chip are electrically connected, but the size of the semiconductor chip is too small compared to the size of the porous fluororesin base material. May be connected using a long lead electrode or the like.
このようなタイプの表面実装型パッケージでは、 多孔質フッ素樹脂基材が一 種のインターポーザとして機能している。 多孔質フッ素樹脂基材が介在するこ とにより、 半導体チップに加えられた応力が、 外部端子により接続された実装 基板と遮断される。 多孔質フッ素樹脂基材の筒状電極は、 多孔質フッ素樹脂の フィブリルに付着した導電性金属 (めっき粒子) であるため、 多孔質フッ素樹 脂基材に圧縮力が加えられた場合に、 フィブリルまたはフィブリル間が縮むた め、 筒状電極が破壊され難い。 筒状電極は、 半導体チップを搭載することによ り加えられる軽い圧縮力により、 導電性が増大する。 発明の効果  In this type of surface-mount package, the porous fluororesin substrate functions as a kind of interposer. By interposing the porous fluororesin base material, the stress applied to the semiconductor chip is cut off from the mounting substrate connected by the external terminals. The cylindrical electrode of the porous fluororesin base material is a conductive metal (plating particles) attached to the fibrils of the porous fluororesin, so when a compressive force is applied to the porous fluororesin base material, Or, since the space between the fibrils shrinks, the cylindrical electrode is not easily destroyed. The cylindrical electrode has increased conductivity due to the light compressive force applied by mounting the semiconductor chip. The invention's effect
本発明によれば、 応力緩和機能を有するとともに、 電極ピッチが狭い回路基 板にも対応することができる多孔質フッ素樹脂基材と回路基板とを一体化した 多層基板が提供される。 この多層基板は、 電極ピッチが狭い回路基板の導通検 查または該回路基板を有する半導体パッケージの組み立てに用いることができ る。 本発明によれば、 導電化した貫通孔からなる筒状電極と接着剤層もしくは粘 着剤層とを有する多孔質フッ素樹脂基材が提供される。 この多孔質フッ素樹脂 基材は、 応力緩和機能を有する接着シートもしくは粘着シートとして、 半導体 チップと回路基板との間に配置することができる。 According to the present invention, there is provided a multilayer substrate in which a porous fluororesin base material and a circuit board are integrated, which has a stress relaxation function and can also cope with a circuit board having a narrow electrode pitch. This multilayer substrate can be used for continuity detection of a circuit board having a narrow electrode pitch or for assembling a semiconductor package having the circuit board. According to the present invention, there is provided a porous fluororesin substrate having a cylindrical electrode composed of a conductive through-hole and an adhesive layer or an adhesive layer. This porous fluororesin base material can be disposed between a semiconductor chip and a circuit board as an adhesive sheet or pressure-sensitive adhesive sheet having a stress relaxation function.
本発明によれば、 リード線及びボンディングワイヤを使用することなく、 多 孔質フッ素樹脂基材と回路基板と半導体チップとを組み立てた半導体パッケー ジが提供される。 実施例  According to the present invention, there is provided a semiconductor package in which a porous fluororesin base material, a circuit board, and a semiconductor chip are assembled without using lead wires and bonding wires. Example
以下に実施例を挙げて、 本発明についてより具体的に説明するが、 本発明 は、 これらの実施例のみに限定されるものではない。 実施例 1  Hereinafter, the present invention will be described more specifically by way of examples. However, the present invention is not limited to only these examples. Example 1
気孔率 (ASTM D- 792) 60%、 平均孔径 0. 1 // 111、 厚み0. 5 mmの延伸多孔質 PTFEシートからなる基膜の両面に、 気孔率 60%、 平均 孔径 0. 1 μπι、 厚み 30 の延伸多孔質 PTFEシート 2枚をマスクとし て重ね合わせた。 これを厚さ 3mmのステンレス板 2枚の間に挟み、 350°C で 30分間加熱処理した。 加熱処理後、 ステンレス板の上から水にて急冷し、 上記 3層が融着した 「マスク層/基膜 マスク層」 の層構成を有する積層体を 得た。  Porosity (ASTM D-792) 60%, average pore diameter 0.1 // 111, 0.5 mm thick stretched porous PTFE sheet on both sides of the base film, porosity 60%, average pore diameter 0.1 μπι Two stretched porous PTFE sheets with a thickness of 30 were stacked as a mask. This was sandwiched between two stainless steel plates with a thickness of 3 mm and heat-treated at 350 ° C. for 30 minutes. After the heat treatment, the laminate was quenched with water from the top of the stainless steel plate to obtain a laminate having a “mask layer / base film mask layer” layer structure in which the above three layers were fused.
メタクリル樹脂 (P MM A;住友化学工業製、 商品名 「LG6A」 ) 25重 量部をアセトン 75重量部に室温で溶解して、 濃度 25重量%のメタクリル樹 脂溶液を調製した。 上記で作製した積層体を、 その多孔質構造内に空気が残ら ないように注意しながらゆつくりとメタクリル樹脂溶液中に浸漬した。 積層体 が半透明になり、 その多孔質構造内にメタクリル樹脂溶液が完全に含浸したこ とを確認した後、 取り出して、 約 18時間、 室温で自然乾燥させた。  A methacrylic resin solution (25% by weight) was prepared by dissolving 25 parts by weight of methacrylic resin (PMMA; trade name “LG6A”, manufactured by Sumitomo Chemical Co., Ltd.) in 75 parts by weight of acetone at room temperature. The laminate produced above was slowly immersed in the methacrylic resin solution while taking care not to leave air in the porous structure. After confirming that the laminate became translucent and the methacrylic resin solution was completely impregnated in the porous structure, the laminate was taken out and naturally dried at room temperature for about 18 hours.
この積層体に、 回転速度 1 00000/分、 送り速度 0. 0 1 mmZr e v. の条件でドリルを作動させて、 ピッチ lmmで、 複数箇所に直径 400 μ mの貫通孔を穿孔した。 穿孔後、 ソックスレー抽出器を用い、 溶剤としてメチ ルェチルケトンを用いて、 メタクリル樹脂を溶解させ、 抽出除去した。 In this laminate, a drill was operated under the conditions of a rotational speed of 100 000 / min and a feed speed of 0.0 1 mmZr e v., And through holes having a diameter of 400 μm were drilled at a plurality of positions at a pitch of 1 mm. After drilling, use a Soxhlet extractor as a solvent. The methacrylic resin was dissolved and extracted by using rucetyl ketone.
上記積層体をナトリウム一ナフタレンエッチング溶液 (Ac t o n Te c hn o l o g i e s, I n c. 製、 商品名 「F 1 u o r o E t c h」 ) 中に撹 拌しながら 10分間浸漬したところ、 その表面が白色から褐色に変色した。 該 積層体をエッチング液から取り出して、 水で洗浄し、 さらにエタノールで洗浄 した後、 再び水で洗浄した。 次に、 洗浄した積層体を 60°Cの過酸化水素水 (濃度 30重量%) 中に約 20時間浸漬したところ、 褐色がほぼ完全に元の白 色に戻っていることが確認された。 この積層体を過酸化水素水から取り出し、 水で洗浄後、 乾燥させた。 貫通孔内壁面を走査型電子顕微鏡 (SEM) で観察 したところ、 内壁面の全体にわたって延伸多孔質 PTFEが本来有するフイブ リルとノードからなる微細多孔質構造を保持していることが確認された。 上記積層体をエタノール中に 1分間浸漬して親水化した後、 10 OmlZL に希釈したメルテックス (株) 製メルプレート P C— 321に 60 °Cで 4分間 浸漬し、 コンディショニングを行った。 さらに、 該積層体を 10%硫酸中に 1 分間浸漬した後、 プレディップとして、 0. 8%塩酸にメルテックス (株) 製 ェンプレート PC— 236を 180 gZLの割合で溶解した液に 2分間浸漬し た。  When the above laminate was immersed in a sodium mononaphthalene etching solution (trade name “F 1 uoro Etch”, manufactured by Acton Te chnologies, Inc.) for 10 minutes with stirring, the surface was white. The color turned brown. The laminate was taken out of the etching solution, washed with water, further washed with ethanol, and then washed again with water. Next, when the washed laminate was immersed in a hydrogen peroxide solution (concentration 30% by weight) at 60 ° C for about 20 hours, it was confirmed that the brown color was almost completely restored to the original white color. The laminate was taken out of the hydrogen peroxide solution, washed with water, and dried. When the inner wall surface of the through-hole was observed with a scanning electron microscope (SEM), it was confirmed that the entire porous inner wall surface maintained a fine porous structure consisting of fibrils and nodes inherent to the expanded porous PTFE. The laminate was hydrophilized by immersing in ethanol for 1 minute, and then immersed in Meltex P C-321 manufactured by Meltex Co., Ltd. diluted to 10 OmlZL for 4 minutes at 60 ° C for conditioning. Furthermore, after immersing the laminate in 10% sulfuric acid for 1 minute, as a pre-dip, immerse it in a solution of Meltex Co., Ltd. PC-236 dissolved in 0.8% hydrochloric acid at a rate of 180 gZL for 2 minutes. did.
該積層体を、 メルテックス (株) 製ェンプレートァクチベータ 444を 3 %、 ェンプレートァクチベータアディティブを 1%、 塩酸を 3%溶解した水溶 液にメルテックス (株) 製ェンプレート P C— 236を 150 gZLの割合で 溶解した液に 5分間浸漬して、 スズーパラジウムコロイド粒子を積層体の表面 及び穿孔の内壁面に付着させた。 次に、 積層体を、 メルテックス (株) 製ェン プレート PA— 360を 50m l ZLの割合で純水により希釈した液に浸漬 し、 スズを溶解して、 触媒を活性化した。 その後、 両面のマスク層を剥離し て、 貫通孔の内壁面のみに触媒パラジウム粒子が付着した延伸多孔質 PTFE シート (基膜) を得た。  Meltex Co., Ltd. ENPLATE ACTIVATOR 444 3%, ENPLATE ACTIVATOR ADDITIVE 1%, hydrochloric acid 3% dissolved in water solution Meltex Co., Ltd. ENPLATE PC — 236 was dissolved in a solution of 150 gZL for 5 minutes to allow the tin-palladium colloidal particles to adhere to the surface of the laminate and the inner wall of the perforations. Next, the laminate was immersed in a solution obtained by diluting Meltex Co., Ltd. Enplate PA-360 with pure water at a ratio of 50 ml ZL to dissolve tin and activate the catalyst. Thereafter, the mask layers on both sides were peeled off to obtain an expanded porous PTFE sheet (base film) in which catalytic palladium particles adhered only to the inner wall surface of the through hole.
メルテックス (株) 製メルプレート Cu— 3000 A、 メルプレート Cu— 3000 B、 メノレプレート Cu_3000C、 メノレプレート Cu_3000D をそれぞれ 5 %、 メルプレート Cu— 3000スタビライザを 0. 1 %で建浴 した無電解銅めつき液に、 十分エア撹拌を行いながら、 上記基膜を 20分間浸 漬して、 貫通孔の内壁面に銅粒子を析出させて導電化した。 次いで、 防鲭、 回 路基板電極との接触性向上のために、 金めつきを行った。 Meltex Cu-3000 A, Melplate Cu- 3000 B, Menore plate Cu_3000C, Menore plate Cu_3000D, 5% each, Melplate Cu-3000 Stabilizer 0.1% The base film was immersed in the electroless copper plating solution with sufficient air stirring for 20 minutes to deposit copper particles on the inner wall surface of the through-hole to make it conductive. Next, gold plating was performed to improve the contact with the fender and circuit board electrodes.
金めつきは、 以下の方法により、 ニッケルからの置換金めつき法を採用し た。 貫通孔の内壁面に銅粒子を付着させた積層体を、 プレディップとしてアト テック製ァクチベータォ一口テック S I Tアディティブ (8 Oml/L) に 3 分間浸漬した後、 触媒付与としてァトテック製ォ一口テック S I Tァクチべ一 タコンク (125mlZL、 ァトテック製ァクチベータォ一口テック S I Tァ ディティブ (80mlZL) の建浴液に 1分間浸漬し、 さらにアトテック製ォ 一口テック S I Tポストディップ (25mlZL) に 1分間浸漬して、 触媒を 銅粒子上に付着させた。  For the gold plating, the substitution gold plating method from nickel was adopted by the following method. After immersing the laminate with copper particles attached to the inner wall surface of the through-hole as a pre-dip in Atotech's Activator One-Ship Tech SIT Additive (8 Oml / L) for 3 minutes, as a catalyst, Wattec One-Site Tech SIT Dip for 1 minute in a bath solution of solid tank (125mlZL, Actecacto One-Spot Tech SIT Additive (80mlZL), and further for 1 minute in Atotech One-Spot Tech SIT Post Dip (25mlZL), and add the catalyst to the copper particles. Attached on top.
次に、 次亜燐酸ナトリウム (20 g/L) 、 クェン酸三ナトリウム (40 g /L) 、 ホウ酸アンモニゥム (13 g/L) 、 硫酸ニッケル (22 g/L) で 建浴した無電解二ッケルめっき液に基膜を 5分間浸漬し、 銅粒子をュッケルコ ートした。  Next, an electroless two bath constructed with sodium hypophosphite (20 g / L), trisodium citrate (40 g / L), ammonium borate (13 g / L) and nickel sulfate (22 g / L). The base film was immersed in the nickel plating solution for 5 minutes, and the copper particles were nickel-coated.
その後、 メルテックス製置換金めつき液 [メルプレート AU— 6630 A (200ml/L、 メルプレート AU_ 6630 B ( 100 m I /L) 、 メル プレート AU— 6630 C (20ml /L) 、 亜硫酸金ナトリゥム水溶液 (金 として 1. O g/L) ] 中に基膜を 5分間浸漬し、 銅粒子の金コートを行つ た。  Subsequently, Meltex replacement gold plating solution [Melplate AU— 6630 A (200 ml / L, Melplate AU_ 6630 B (100 m I / L), Melplate AU— 6630 C (20 ml / L), sodium sulfite sodium The base film was immersed in an aqueous solution (1.Og / L as gold) for 5 minutes, and a gold coat of copper particles was applied.
このようにして、 延伸多孔質 PTFEシートを基膜とし、 貫通孔の内壁面の みを導電化した筒状電極を有する多孔質フッ素樹脂基材を得た。 筒状電極の直 径は 400 mで、 ピッチは lmmであった。  In this way, a porous fluororesin base material having a cylindrical electrode in which only the inner wall surface of the through hole was made conductive using the stretched porous PTFE sheet as a base film was obtained. The diameter of the cylindrical electrode was 400 m and the pitch was lmm.
この多孔質フッ素樹脂基材と、 電極部以外の部分にポリイミ ド系熱硬化性接 着剤を塗布した回路基板とを、 該多孔質フッ素樹脂基材の筒状電極と該回路基 板の電極とが電気的に接続された状態で接着して多層基板を作製した。 この多 層基板の多孔質フッ素樹脂基材上から軽く圧縮力を加えたところ、 両電極間の 導通を確認することができた。 実施例 2 The porous fluororesin base material and a circuit board coated with a polyimide thermosetting adhesive on a portion other than the electrode part, the cylindrical electrode of the porous fluororesin base material, and the electrode of the circuit board Were bonded in an electrically connected state to produce a multilayer substrate. When a compressive force was applied lightly from the porous fluororesin base material of this multilayer substrate, conduction between the two electrodes could be confirmed. Example 2
実施例 1において、 気孔率 (A S TM D— 7 9 2 ) 6 0 %、 平均孔径 0 . l /x m、 厚み 0 . 5 mmの延伸多孔質 P T F Eシートからなる基膜の両面に、 ポリイミド系熱硬化性接着剤を塗布して、 厚さ 3 0 μ mの接着性樹脂層を形成 した。  In Example 1, on both sides of a base film made of an expanded porous PTFE sheet having a porosity (AS TM D—792) of 60%, an average pore diameter of 0.1 / xm, and a thickness of 0.5 mm, a polyimide-based heat A curable adhesive was applied to form an adhesive resin layer having a thickness of 30 μm.
これを基膜として使用したこと以外は、 実施例 1と同様にして、 多孔質フッ 素樹脂シートの両面に接着性樹脂層が配置された多層シートの厚み方向に全層 を貫通する複数の貫通孔が設けられ、 該貫通孔の内壁全面に導電性金属の付着 による筒状電極が形成された構造の接着層を有する多孔質フッ素樹脂基材を作 製した。  Except that this was used as a base film, a plurality of penetrations penetrating all layers in the thickness direction of the multilayer sheet in which the adhesive resin layers were arranged on both sides of the porous fluororesin sheet in the same manner as in Example 1. A porous fluororesin substrate having an adhesive layer having a structure in which a hole was provided and a cylindrical electrode formed by adhesion of a conductive metal was formed on the entire inner wall of the through hole was produced.
この多孔質フッ素樹脂基材と回路基板とを、 該多孔質フッ素樹脂基材の筒状 電極と該回路基板の電極とが電気的に接続された状態で接着して多層基板を作 製した。 この多層基板の多孔質フッ素樹脂基材上から軽く圧縮力を加えたとこ ろ、 両電極間の導通を確認することができた。 産業上の利用可能性  The porous fluororesin base material and the circuit board were bonded together in a state where the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board were electrically connected to produce a multilayer substrate. When a compressive force was applied lightly from the porous fluororesin substrate of this multilayer substrate, conduction between both electrodes could be confirmed. Industrial applicability
本発明の多層基板は、 電極ピッチが狭い回路基板の導通検査または該回路基 板を有する半導体パッケージの組み立てに用いることができる。  The multilayer substrate of the present invention can be used for continuity inspection of a circuit board having a narrow electrode pitch or assembly of a semiconductor package having the circuit board.
本発明の接着剤層または粘着剤層と筒状電極とを有する多孔質フッ素樹脂基 材は、 応力緩和機能と導通機能とを兼ね備えた接着シートもしくは粘着シート として、 電子材料の技術分野で使用することができる。  The porous fluororesin substrate having the adhesive layer or pressure-sensitive adhesive layer and the cylindrical electrode of the present invention is used in the technical field of electronic materials as an adhesive sheet or pressure-sensitive adhesive sheet having both a stress relaxation function and a conduction function. be able to.
本発明の半導体パッケージは、 各種実装基板に搭載して使用することができ る。  The semiconductor package of the present invention can be used by being mounted on various mounting boards.

Claims

請求の範囲 The scope of the claims
1 . 多孔質フッ素樹脂シートの厚み方向に複数の貫通孔が設けられ、 該貫 通孔の内壁面には導電性金属の付着による筒状電極が形成された多孔質フッ素 樹脂基材と回路基板とが、 該多孔質フッ素樹脂基材の筒状電極と該回路基板の 電極とが電気的に接続された状態で一体化された構造を有する多層基板。 1. Porous fluororesin base material and circuit board in which a plurality of through holes are provided in the thickness direction of the porous fluororesin sheet, and a cylindrical electrode is formed on the inner wall surface of the through holes by adhesion of conductive metal A multilayer substrate having a structure in which the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board are integrated in an electrically connected state.
2 . 該多孔質フッ素樹脂基材と該回路基板とが、 接着剤による接着、 粘着 剤による粘着、 抵抗溶接または機械的結合により一体化された構造を有する請 求項 1記載の多層基板。 2. The multilayer substrate according to claim 1, wherein the porous fluororesin base material and the circuit board have a structure integrated by adhesion with an adhesive, adhesion with an adhesive, resistance welding, or mechanical bonding.
3 . 該多孔質フッ素樹脂基材と該回路基板とが、 該回路基板の電極上に設 けた導電性接着剤または該回路基板の電極以外の部分に設けた絶縁性接着剤も しくはこれら両方による接着により一体化された構造を有する請求項 2記載の 多層基板。 3. The porous fluororesin base material and the circuit board are either a conductive adhesive provided on the electrode of the circuit board or an insulating adhesive provided on a portion other than the electrode of the circuit board, or both of them. 3. The multilayer substrate according to claim 2, wherein the multilayer substrate has a structure integrated by bonding with.
4 . 該多孔質フッ素樹脂基材と該回路基板とが、 該回路基板の電極上に設 けた導電性粘着剤または該回路基板の電極以外の部分に設けた絶縁性粘着剤も しくはこれら両方による粘着により一体化された構造を有する請求項 2記載の 多層基板。 4. The porous fluororesin base material and the circuit board are electrically conductive adhesive provided on the electrode of the circuit board or an insulating adhesive provided on a portion other than the electrode of the circuit board, or both of them. 3. The multilayer substrate according to claim 2, wherein the multilayer substrate has a structure integrated by adhesion by.
5 . 該多孔質フッ素樹脂基材と該回路基板とが、 該多孔質フッ素樹脂基材 の筒状電極と該回路基板の電極との抵抗溶接により一体化された構造を有する 請求項 2記載の多層基板。 5. The porous fluororesin base material and the circuit board have a structure in which the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board are integrated by resistance welding. Multilayer board.
6 . 該多孔質フッ素樹脂基材と該回路基板とが、 ピン留めによる機械的結 合により一体化された構造を有する請求項 2記載の多層基板。 6. The multilayer substrate according to claim 2, wherein the porous fluororesin base material and the circuit board have a structure integrated by mechanical bonding by pinning.
7 . 該多孔質フッ素樹脂基材の片面で、 該多孔質フッ素樹脂基材と第一の 回路基板とが、 該多孔質フッ素榭脂基材の筒状電極と該第一の回路基板の電極 とが電気的に接続された状態で一体化され、 さらに、 該多孔質フッ素樹脂基材 の他面で、 該多孔質フッ素樹脂基材と第二の回路基板とが、 該多孔質フッ素樹 脂基材の筒状電極と該第二の回路基板の電極とが電気的に接続された状態で一 体化され、 それによつて、 該多孔質フッ素樹脂基材が 2つの回路基板の間に挟 み込まれて一体化された構造を有する請求項 1記載の多層基板。 7. On one side of the porous fluororesin substrate, the porous fluororesin substrate and the first A circuit board is integrated in a state where the cylindrical electrode of the porous fluororesin base material and the electrode of the first circuit board are electrically connected, and further, In another aspect, the porous fluororesin base material and the second circuit board are electrically connected to the cylindrical electrode of the porous fluororesin base material and the electrode of the second circuit board. The multilayer substrate according to claim 1, having a structure in which the porous fluororesin base material is integrated by being sandwiched between two circuit boards.
8 . 該多孔質フッ素樹脂基材が、 多孔質フッ素樹脂シートの片面または両 面に接着性樹脂層もしくは粘着剤層が配置された多層シートの厚み方向に全層 を貫通する複数の貫通孔が設けられ、 該貫通孔の内壁全面に導電性金属の付着 による筒状電極が形成された構造を有する多孔質フッ素樹脂基材であり、 か つ、 該多孔質フッ素樹脂基材と該回路基板とが、 該多孔質フッ素樹脂基材の接 着性樹脂層もしくは粘着剤層による接着もしくは粘着により一体化された構造 を有する請求項 1記載の多層基板。 8. The porous fluororesin substrate has a plurality of through-holes penetrating all layers in the thickness direction of the multilayer sheet in which the adhesive resin layer or the pressure-sensitive adhesive layer is disposed on one side or both sides of the porous fluororesin sheet. A porous fluororesin base material having a structure in which a cylindrical electrode is formed on the entire inner wall of the through-hole by adhesion of conductive metal, and the porous fluororesin base material and the circuit board 2. The multilayer substrate according to claim 1, which has a structure in which the porous fluororesin base material is integrated by adhesion or adhesion with an adhesive resin layer or an adhesive layer.
9 . 該多孔質フッ素樹脂基材が、 多孔質フッ素樹脂シートの片面に接着性 樹脂層もしくは粘着剤層が配置された多層シートの厚み方向に全層を貫通する 複数の貫通孔が設けられ、 該貫通孔の内壁全面に導電性金属の付着による筒状 電極が形成された構造を有する多孔質フッ素樹脂基材であり、 かつ、 該多孔質 フッ素樹脂基材と該回路基板とが、 該多孔質フッ素樹脂基材の接着性樹脂層も しくは粘着剤層が形成されていない面で、 接着剤による接着、 粘着剤による粘 着、 抵抗溶接または機械的結合により一体化された構造を有する請求項 1記載 の多層基板。 9. The porous fluororesin substrate is provided with a plurality of through-holes penetrating all layers in the thickness direction of the multilayer sheet in which an adhesive resin layer or an adhesive layer is disposed on one side of the porous fluororesin sheet, A porous fluororesin base material having a structure in which a cylindrical electrode is formed on the entire inner wall of the through hole by adhesion of a conductive metal, and the porous fluororesin base material and the circuit board include the porous The surface of the fluororesin base material that does not have an adhesive resin layer or adhesive layer, and has an integrated structure by adhesive bonding, adhesive bonding, resistance welding, or mechanical bonding Item 1. The multilayer substrate according to item 1.
1 0 . 該貫通孔が、 回路基板の電極の分布に合わせて、 所定のパターン状 に複数個形成されている請求項 1記載の多層基板。 10. The multilayer substrate according to claim 1, wherein a plurality of the through holes are formed in a predetermined pattern according to the distribution of the electrodes of the circuit substrate.
1 1 . 該導電性金属が、 銅、 ニッケル、 銀、 金またはニッケル合金である 請求項 1記載の多層基板。 1. The multilayer substrate according to claim 1, wherein the conductive metal is copper, nickel, silver, gold, or a nickel alloy.
1 2. 該導電性金属の付着量が、 0. 01~4. 0 g/m 1の範囲内であ る請求項 1記載の多層基板。 1. The multilayer substrate according to claim 1, wherein the amount of the conductive metal deposited is in the range of 0.01 to 4.0 g / m 1.
1 3. 該多孔質フッ素樹脂基材が、 多孔質フッ素樹脂シートの厚み方向に 複数の貫通孔が設けられ、 該貫通孔の内壁面には、 めっき粒子からなる導電性 粒子の付着により筒状電極が形成されたものである請求項 1記載の多層基板。 1 3. The porous fluororesin base material is provided with a plurality of through holes in the thickness direction of the porous fluororesin sheet, and the inner wall surface of the through holes has a cylindrical shape due to the adhesion of conductive particles made of plating particles. 2. The multilayer substrate according to claim 1, wherein an electrode is formed.
14. 該貫通孔の内壁面に対するめっき粒子の付着が、 無電解めつきまた は無電解めつきと電気めつきとの組み合わせによるものである請求項 13記載 の多層基板。 14. The multilayer substrate according to claim 13, wherein the adhesion of the plating particles to the inner wall surface of the through hole is due to electroless plating or a combination of electroless plating and electric plating.
1 5. 該多孔質フッ素樹脂シートが、 多数のフィブリルと該フイブリルに よって互いに連結された多数のノードとからなる多孔質構造を有する延伸多孔 質ポリテトラフルォロエチレンシートである請求項 1記載の多層基板。 1. The porous fluororesin sheet is an expanded porous polytetrafluoroethylene sheet having a porous structure composed of a large number of fibrils and a large number of nodes connected to each other by the fibrils. Multilayer board.
1 6. 該延伸多孔質ポリテトラフルォロエチレンシートが、 気孔率が 20 〜80%で、 平均孔径が 1 0 μπι以下のものである請求項 1 5記載の多層基 板。 · 16. The multilayer substrate according to claim 15, wherein the stretched porous polytetrafluoroethylene sheet has a porosity of 20 to 80% and an average pore diameter of 10 μπι or less. ·
1 7. 該多孔質フッ素樹脂基材が、 該延伸多孔質ポリテトラフルォロェチ レンシートの厚み方向に複数の貫通孔が設けられ、 該貫通孔の内壁面に露出し た樹脂部に、 無電解めつきによる銅めつき粒子が付着した構造の筒状電極が形 成されたものである請求項 1 5記載の多層基板。 1 7. The porous fluororesin substrate is provided with a plurality of through holes in the thickness direction of the stretched porous polytetrafluoroethylene sheet, and the resin portion exposed on the inner wall surface of the through holes 16. The multilayer substrate according to claim 15, wherein a cylindrical electrode having a structure in which copper plating particles are attached by electrolytic plating is formed.
18. 該銅めっき粒子が、 貴金属または貴金属の合金で被覆されたもので ある請求項 1 7記載の多層基板。 18. The multilayer substrate according to claim 17, wherein the copper plating particles are coated with a noble metal or a noble metal alloy.
1 9. 該筒状電極の 2つの開口端部の一方または両方が、 導電性材料によ り閉塞されている請求項 1記載の多層基板。 1 9. One or both of the two open ends of the cylindrical electrode are made of a conductive material. 2. The multilayer substrate according to claim 1, wherein the multilayer substrate is closed.
2 0 . 多孔質フッ素樹脂シートの厚み方向に複数の貫通孔が設けられ、 該 貫通孔の内壁面には導電性金属の付着による筒状電極が形成された多孔質フッ 素樹脂基材と回路基板とが、 該多孔質フッ素樹脂基材の筒状電極と該回路基板 の電極とが電気的に接続された状態で一体化され、 さらに、 該多孔質フッ素樹 脂基材の該回路基板側とは反対側の面で、 該多孔質フッ素樹脂基材と半導体チ ップとが、 該多孔質フッ素樹脂基材の筒状電極と該半導体チップの電極とが電 気的に接続された状態で一体化された構造を有する半導体パッケージ。 A porous fluororesin substrate and a circuit in which a plurality of through-holes are provided in the thickness direction of the porous fluororesin sheet, and a cylindrical electrode is formed on the inner wall surface of the through-hole by adhesion of a conductive metal. And the substrate is integrated with the cylindrical electrode of the porous fluororesin base material and the electrode of the circuit board being electrically connected, and further, the circuit board side of the porous fluororesin base material. On the opposite side of the surface, the porous fluororesin base material and the semiconductor chip are electrically connected to the cylindrical electrode of the porous fluororesin base material and the electrode of the semiconductor chip. A semiconductor package having an integrated structure.
PCT/JP2006/309888 2005-06-07 2006-05-11 Multilayer substrate and semiconductor package WO2006132063A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2005-166808 2005-06-07
JP2005166808A JP2006344646A (en) 2005-06-07 2005-06-07 Multilayer substrate and semiconductor package

Publications (1)

Publication Number Publication Date
WO2006132063A1 true WO2006132063A1 (en) 2006-12-14

Family

ID=37498268

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2006/309888 WO2006132063A1 (en) 2005-06-07 2006-05-11 Multilayer substrate and semiconductor package

Country Status (3)

Country Link
JP (1) JP2006344646A (en)
TW (1) TW200644193A (en)
WO (1) WO2006132063A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20210104854A1 (en) * 2017-05-18 2021-04-08 Shin-Etsu Polymer Co., Ltd. Electrical connector and method for producing same

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8035218B2 (en) * 2009-11-03 2011-10-11 Intel Corporation Microelectronic package and method of manufacturing same
CN104885578B (en) 2013-02-26 2018-05-04 大自达电线股份有限公司 Flexible printed circuit board reinforcement part, flexible printed circuit board and shielding printed wiring board

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05175650A (en) * 1991-12-25 1993-07-13 Tokuyama Soda Co Ltd Manufacture of circuit board
JP2000082553A (en) * 1998-09-08 2000-03-21 Tokyo Cosmos Electric Co Ltd Ic socket
JP2005039241A (en) * 2003-06-24 2005-02-10 Ngk Spark Plug Co Ltd Intermediate substrate with semiconductor element, substrate with intermediate substrate, and structure composed of semiconductor element, intermediate substrate, and substrate
JP2005046993A (en) * 2003-06-06 2005-02-24 Sumitomo Electric Ind Ltd Manufacturing method for bored porous resin base material and porous resin base material having conductive bored inner wall surface

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05175650A (en) * 1991-12-25 1993-07-13 Tokuyama Soda Co Ltd Manufacture of circuit board
JP2000082553A (en) * 1998-09-08 2000-03-21 Tokyo Cosmos Electric Co Ltd Ic socket
JP2005046993A (en) * 2003-06-06 2005-02-24 Sumitomo Electric Ind Ltd Manufacturing method for bored porous resin base material and porous resin base material having conductive bored inner wall surface
JP2005039241A (en) * 2003-06-24 2005-02-10 Ngk Spark Plug Co Ltd Intermediate substrate with semiconductor element, substrate with intermediate substrate, and structure composed of semiconductor element, intermediate substrate, and substrate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20210104854A1 (en) * 2017-05-18 2021-04-08 Shin-Etsu Polymer Co., Ltd. Electrical connector and method for producing same
US11637406B2 (en) * 2017-05-18 2023-04-25 Shin-Etsu Polymer Co., Ltd. Electrical connector and method for producing same

Also Published As

Publication number Publication date
TW200644193A (en) 2006-12-16
JP2006344646A (en) 2006-12-21

Similar Documents

Publication Publication Date Title
JP4689375B2 (en) Laminated substrate and electronic device having the laminated substrate
US8146243B2 (en) Method of manufacturing a device incorporated substrate and method of manufacturing a printed circuit board
JP4389788B2 (en) Sheet material and wiring board
JP2587596B2 (en) Circuit board connecting material and method for manufacturing multilayer circuit board using the same
WO2004103039A1 (en) Double-sided wiring board, double-sided wiring board manufacturing method, and multilayer wiring board
JP2006278774A (en) Double-sided wiring board, method for manufacturing the same and base substrate thereof
WO2007023596A1 (en) Anisotropic conductive sheet, production method thereof, connection method and inspection method
US20040045738A1 (en) Audio coding and decoding
JP2006310627A (en) Wiring board and its manufacturing method
JPWO2003056889A1 (en) Connection board, multilayer wiring board using the connection board, substrate for semiconductor package, semiconductor package, and manufacturing method thereof
KR20080027234A (en) Porous resin substrate, method for manufacturing same, and multilayer substrate
JP2004152904A (en) Electrolytic copper foil, film and multilayer wiring substrate therewith, and method of manufacturing the same
WO2006132063A1 (en) Multilayer substrate and semiconductor package
JP4715601B2 (en) Electrical connection parts
JP4715464B2 (en) Anisotropic conductive sheet, manufacturing method thereof, connection method and inspection method
JPH10303561A (en) Multi-layer wiring board and its manufacture
KR100758188B1 (en) Layered board and manufacturing method of the same, electronic apparatus having the layered board
JP2006269400A (en) Anisotropic conductive sheet, its manufacturing method, connection method, and inspection method
KR100722604B1 (en) Manufacturing method of printed circuit board
JPH09101326A (en) Probe structure
JP5935186B2 (en) Wiring board
JP4715600B2 (en) Sheet connector and manufacturing method thereof
JP2004327744A (en) Multilayer wiring board and manufacturing method therefor
JP2006179833A (en) Wiring board and its manufacture
JP2004072125A (en) Manufacturing method of printed wiring board, and printed wiring board

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application
NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 06732637

Country of ref document: EP

Kind code of ref document: A1