WO2006088180A1 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
WO2006088180A1
WO2006088180A1 PCT/JP2006/302948 JP2006302948W WO2006088180A1 WO 2006088180 A1 WO2006088180 A1 WO 2006088180A1 JP 2006302948 W JP2006302948 W JP 2006302948W WO 2006088180 A1 WO2006088180 A1 WO 2006088180A1
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WIPO (PCT)
Prior art keywords
adhesive sheet
semiconductor device
manufacturing
resin
semiconductor element
Prior art date
Application number
PCT/JP2006/302948
Other languages
English (en)
French (fr)
Inventor
Sadahito Misumi
Takeshi Matsumura
Original Assignee
Nitto Denko Corporation
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Filing date
Publication date
Application filed by Nitto Denko Corporation filed Critical Nitto Denko Corporation
Priority to US11/816,696 priority Critical patent/US8236614B2/en
Priority to EP06714089A priority patent/EP1858069A1/en
Publication of WO2006088180A1 publication Critical patent/WO2006088180A1/ja
Priority to US13/437,814 priority patent/US20120189845A1/en

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    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
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    • C09J161/00—Adhesives based on condensation polymers of aldehydes or ketones; Adhesives based on derivatives of such polymers
    • C09J161/04—Condensation polymers of aldehydes or ketones with phenols only
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    • Y10T428/14—Layer or component removable to expose adhesive
    • Y10T428/1462—Polymer derived from material having at least one acrylic or alkacrylic group or the nitrile or amide derivative thereof [e.g., acrylamide, acrylate ester, etc.]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/28—Web or sheet containing structurally defined element or component and having an adhesive outermost layer
    • Y10T428/2852—Adhesive compositions
    • Y10T428/2878—Adhesive compositions including addition polymer from unsaturated monomer
    • Y10T428/2887—Adhesive compositions including addition polymer from unsaturated monomer including nitrogen containing polymer [e.g., polyacrylonitrile, polymethacrylonitrile, etc.]

Definitions

  • the present invention relates to a method for manufacturing a semiconductor device, an adhesive sheet used for the method, and a semiconductor device obtained by the method.
  • thermosetting best resin see, for example, Patent Document 3 below
  • thermoplastic resin examples of what is used when fixing a semiconductor element to a substrate or the like
  • thermosetting resin examples of what is used when fixing a semiconductor element to a substrate or the like
  • thermosetting resin examples of what is used when fixing a semiconductor element to a substrate or the like
  • thermosetting resin examples of what is used when fixing a semiconductor element to a substrate or the like
  • thermosetting resin examples of what is used when fixing a semiconductor element to a substrate or the like
  • thermosetting resin examples of what is used when fixing a semiconductor element to a substrate or the like
  • thermosetting resin examples of what is used when fixing a semiconductor element to a substrate or the like
  • thermosetting resin examples of what is used when fixing a semiconductor element to a substrate or the like
  • thermosetting resin examples of what is used when fixing a semiconductor element to a substrate or the like
  • thermosetting resin examples of what is used when fixing a semiconductor element to a substrate or the like
  • thermosetting resin examples of what is used when
  • an adhesive sheet or an adhesive is used for bonding a semiconductor element and a substrate, a lead frame or a semiconductor element. Adhesion is performed after the semiconductor element and the substrate are bonded (die attach), and then the adhesive sheet is cured by a heating process. Further, in the manufacturing method, wire bonding for electrically connecting the semiconductor element and the substrate is performed, then molded with a sealing resin, post-cured, and sealed with the sealing resin. It is also done.
  • an adhesive sheet made of thermoplastic resin, or a combination of thermosetting resin and thermoplastic resin
  • a heating process is required for the purpose of securing the adhesive force with the object to be bonded and improving the wettability.
  • Patent Document 1 Japanese Patent Laid-Open No. 55-111151
  • Patent Document 2 JP 2002-261233 A
  • Patent Document 3 Japanese Patent Laid-Open No. 2002-179769
  • Patent Document 4 Japanese Unexamined Patent Publication No. 2000-104040
  • the present invention has been made in consideration of the above-mentioned problems, and prevents wire bonding from becoming impossible due to contamination of the bonding pad, and can be used for a substrate, a lead frame, a semiconductor element, or the like.
  • the inventors of the present application have intensively studied a manufacturing method of a semiconductor device that can solve the conventional problems, an adhesive sheet used in the method, and a semiconductor device obtained by the method. As a result, it can be seen that the above object can be achieved by adopting the following configuration.
  • the present invention has been completed.
  • a method for manufacturing a semiconductor device includes a temporary fixing step of temporarily fixing a semiconductor element on an adherend via an adhesive sheet, and a heating step.
  • Wire bonding process in which wire bonding is performed at a bonding temperature of 80 to 250 ° C, and the adhesive sheet has a storage elastic modulus before curing in the temperature range of 80 to 250 ° C. Above or at any temperature within the temperature range, the one using IMPa or more is used.
  • the storage elastic modulus before curing is IMPa or more in a temperature range of 80 to 250 ° C, or an adhesive sheet of IMPa or more is used at any temperature within the temperature range, Even if the heating process of the adhesive sheet is omitted and the semiconductor element is temporarily fixed on the adherend and the process proceeds to the wire bonding process, the ultrasonic wave and heating in the process cause the adhesive sheet and Shear deformation does not occur on the adhesion surface with the adherend. When performing the wire bonding process, the success rate of wire bonding can be improved.
  • the adhesive sheet is heated before the wire bonding step, and this heating may generate volatile gas from the adhesive sheet and contaminate the bonding knot. It was. However, since the present invention does not require such heating, it is possible to prevent the bonding pad from being contaminated by the generation of volatile gas from the adhesive sheet. Furthermore, by omitting the step of heating the adhesive sheet, the substrate or the like is not warped and the semiconductor element is not cracked. As a result, the semiconductor element can be further reduced in thickness.
  • the adherend is preferably a substrate, a lead frame, or a semiconductor element.
  • a sealing step of sealing the semiconductor element with a sealing resin and a post-curing step of post-curing the sealing resin It is preferable that the sealing resin is cured by heating, and the semiconductor element and the adherend are fixed through the adhesive sheet. As a result, the semiconductor element and the adherend can be fixed to each other through the adhesive sheet simultaneously with the curing of the sealing resin, and the manufacturing process can be simplified.
  • the adhesive sheet containing a thermoplastic resin it is preferable to use the adhesive sheet containing both a thermosetting resin and a thermoplastic resin.
  • thermoplastic resin it is preferable to use acrylic resin as the thermoplastic resin.
  • epoxy resin and Z or phenol resin it is preferable to use epoxy resin and Z or phenol resin as the thermosetting resin. Since these resins have few ionic impurities and high heat resistance, the reliability of semiconductor elements can be ensured.
  • an adhesive sheet according to the present invention is an adhesive sheet used for manufacturing a semiconductor device in order to solve the above-described problems, and has a storage elastic modulus before curing of 80 to 250 ° C. It is more than IMPa within the range, or more than IMPa at any temperature within that temperature range.
  • the adhesive sheet preferably contains a thermoplastic resin.
  • the adhesive sheet preferably contains both a thermosetting resin and a thermoplastic resin.
  • thermoplastic resin is preferably an acrylic resin.
  • thermosetting resin is preferably epoxy resin and Z or phenol resin.
  • a cross-linking agent is added to the adhesive sheet.
  • a semiconductor device according to the present invention is obtained by the method for manufacturing a semiconductor device described above in order to solve the above problems.
  • the present invention has the following effects by the means described above.
  • an adhesive sheet having a storage elastic modulus before curing of IMPa or higher is used in a temperature range of 80 to 250 ° C. or at any temperature within the temperature range. Even if the heating process is omitted and the process proceeds to the wire bonding process, shear deformation can be prevented from occurring on the bonding surface between the adhesive sheet and the adherend, and the wire bonding process can be performed satisfactorily. Moreover, since the heating step can be omitted, no volatile gas is generated from the adhesive sheet. For this reason, it is possible to prevent the bonding pad from being contaminated. Therefore, the present invention can improve the productivity of semiconductor devices and improve the yield.
  • one or more semiconductor elements are laminated on the semiconductor element via the adhesive sheet, or if necessary, the adhesive sheet between the semiconductor element and the semiconductor element.
  • the same effect can be obtained when the spacers are stacked via the spacers.
  • the simplification of the manufacturing process can further improve the manufacturing efficiency in the three-dimensional mounting of a plurality of semiconductor elements.
  • FIG. 1 is a process diagram for explaining a method for manufacturing a semiconductor device according to a first embodiment of the present invention.
  • FIG. 2 is a process diagram for explaining the manufacturing method of the semiconductor device according to the second embodiment of the present invention.
  • FIG. 3 is a process diagram for describing the manufacturing method of the semiconductor device according to the third embodiment of the present invention.
  • FIG. 4 is a process diagram for explaining the manufacturing method of the semiconductor device according to the fourth embodiment of the present invention.
  • FIG. 5 is a process diagram for describing a method for manufacturing a semiconductor device according to a fifth embodiment of the present invention.
  • FIG. 6 is a process diagram for describing a method for manufacturing a semiconductor device according to a sixth embodiment of the present invention.
  • FIG. 7 is a cross sectional view schematically showing a semiconductor device obtained by the method for manufacturing a semiconductor device according to the sixth embodiment.
  • FIG. 8 is a process diagram for describing a method for manufacturing a semiconductor device according to a seventh embodiment of the present invention.
  • FIG. 1 is a process diagram for explaining a method of manufacturing a semiconductor device according to the present embodiment.
  • parts that are not necessary for the description are omitted, and some parts shown in the figure are enlarged or reduced for easy explanation.
  • the method for manufacturing a semiconductor device includes a temporary fixing step of temporarily fixing a semiconductor element 13 on a substrate or a lead frame (an adherend, hereinafter simply referred to as a substrate) 11 with an adhesive sheet 12. And a wire bonding step for wire bonding without going through a heating step. Furthermore, it has the sealing process which seals the semiconductor element 13 with the sealing resin 15, and the post-curing process after-curing the sealing resin 15.
  • the temporary fixing step is a step of temporarily fixing the semiconductor element 13 to the substrate 11 or the like via the adhesive sheet 12 as shown in FIG. 1 (a).
  • a method for temporarily fixing the semiconductor element 13 on the substrate 11 etc. for example, after laminating the adhesive sheet 12 on the substrate 11 etc., the semiconductor element 13 is placed on the adhesive sheet 12 so that the wire bond surface is on the upper side.
  • One example is a method of sequentially laminating and temporarily fixing.
  • the semiconductor element 13 having the adhesive sheet 12 temporarily fixed thereto may be temporarily fixed to the substrate 11 or the like and laminated.
  • the substrate a conventionally known substrate can be used.
  • the lead frame a metal lead frame such as a CU lead frame, a 42 Alloy lead frame or the like, an organic substrate made of glass epoxy, BT (bismaleimide-triazine), polyimide, or the like can be used.
  • the present invention is not limited to this, and includes a circuit board that can be used by mounting a semiconductor element and electrically connecting the semiconductor element.
  • the adhesive sheet 12 use is made of a material having a storage elastic modulus before curing of IMPa or more in a temperature range of 80 to 250 ° C, or IMPa or more at an arbitrary temperature within the temperature range. Preferably, one in the range of 1 to: LOOMPa is used.
  • SIMPa of the adhesive sheet 12 is equal to or higher than SIMPA
  • the adhesive sheet 12 and the semiconductor element 13 or the substrate are formed by ultrasonic vibration or heating in the process even if the wire bonding process is performed without passing through the heating process. No shear deformation occurs on the adhesive surface with 11. That is, since the semiconductor element does not move due to ultrasonic vibration during wire bonding, the success rate of wire bonding can be prevented from decreasing, and the yield can be improved.
  • the adhesive sheet 12 will be described in detail later.
  • the tip of the terminal portion (inner lead) of the substrate 11 or the like and the electrode pad (not shown) on the semiconductor element 13 are electrically connected by the bonding wire 14.
  • This step is performed without fixing with the adhesive sheet 12. Further, the semiconductor element 13 and the substrate 11 are not fixed by the adhesive sheet 12 in the process of this step.
  • the bonding wire 14 for example, a gold wire, an aluminum wire, a copper wire or the like is used.
  • the bonding temperature needs to be 80 to 250 ° C, and more preferably in the range of 80 to 220 ° C. If it is less than 80 ° C, the strength of the bonded wire becomes weak. On the other hand, when the temperature exceeds 250 ° C., the substrate warps, and there is a disadvantage that stable wire bonding cannot be performed.
  • the heating time is several seconds to several minutes.
  • connection is performed by using a combination of vibration energy by ultrasonic waves and pressure energy by applying pressure in a state where the wires are heated to be within the above temperature range.
  • Examples of such a method include an ultrasonic method and an ultrasonic thermocompression bonding method.
  • the thermocompression bonding method is generally performed at a joining temperature of 300 to 350 ° C., which is preferable in the present invention! /.
  • the sealing step is a step of sealing the semiconductor element 13 with a sealing resin 15 (see FIG. 1 (c)). This step is performed to protect the semiconductor element 13 and the bonding wire 14 mounted on the substrate 11 or the like. This step is performed by molding a sealing resin with a mold.
  • the sealing resin 15 for example, an epoxy-based resin is used.
  • the heating temperature at the time of sealing with a resin is a force usually performed at 175 ° C. for 60 to 90 seconds.
  • the present invention is not limited to this, and for example, it can be cured at 165 to 185 ° C. for several minutes. As a result, the sealing resin is cured and the semiconductor element 13 and the substrate 11 are fixed to each other through the adhesive sheet 12. In other words, in the present invention, even when the post-curing process described later is not performed, the bonding with the adhesive sheet 12 is possible in this process, and the number of manufacturing processes and the manufacturing period of the semiconductor device are shortened. Can contribute.
  • the sealing resin 15 that is insufficiently cured in the sealing step is completely cured. Even if the adhesive sheet 12 is not fixed in the sealing process, the adhesive sheet 12 can be fixed together with the curing of the sealing resin 15 in this process.
  • the heating temperature in this step is a force that varies depending on the type of sealing resin, for example, in the range of 165 to 185 ° C, and the heating time is about 0.5 to 8 hours.
  • Adhesive sheet 12 has a temperature of 80 ⁇ 250 ° C
  • the structure is not particularly limited as long as it is IMPa or more in the range or IMPa or more at an arbitrary temperature within the temperature range.
  • the material group force described later can be selected as appropriate, and the adhesive sheet 12 can be produced under predetermined conditions. Good.
  • the storage elastic modulus of the adhesive sheet 12 can be lowered, for example, by increasing the amount of thermoplastic resin, while it can be increased by increasing the amount of thermosetting resin.
  • Examples include an adhesive sheet composed of only a single adhesive layer, and a multilayered adhesive sheet in which an adhesive layer is formed on one or both sides of a core material.
  • the core material include films (for example, polyimide films, polyester films, polyethylene terephthalate films, polyethylene naphthalate films, polycarbonate films), resin substrates reinforced with glass fibers and plastic non-woven fibers, silicon substrates, or glass.
  • films for example, polyimide films, polyester films, polyethylene terephthalate films, polyethylene naphthalate films, polycarbonate films
  • resin substrates reinforced with glass fibers and plastic non-woven fibers silicon substrates, or glass.
  • silicon substrates or glass.
  • a substrate for example, a substrate.
  • an integrated type of an adhesive sheet and a dicing sheet can be used.
  • the adhesive layer is a layer having an adhesive function, and examples of the constituent material thereof include a combination of a thermoplastic resin and a thermosetting resin. Also, a thermoplastic resin alone can be used.
  • thermoplastic resin examples include natural rubber, butyl rubber, isoprene rubber, chloroprene rubber, ethylene acetate butyl copolymer, ethylene acrylic acid copolymer, ethylene acrylate ester copolymer, polybutadiene resin, polycarbonate.
  • Resin thermoplastic polyimide resin, polyamide resin such as 6-nylon and 6, 6 nylon, phenoxy resin, talyl resin, saturated polyester resin such as PET and PBT, polyamideimide resin, or fluorine resin Examples include fats. These thermoplastic rosins can be used alone or in combination of two or more. Of these thermoplastic resins, acrylic resins are particularly preferred because they have low ionic impurities, high heat resistance, and reliability of semiconductor elements.
  • the acrylic resin is not particularly limited, and is one or more esters of acrylic acid or methacrylic acid having a linear or branched alkyl group having 30 or less carbon atoms, particularly 4 to 18 carbon atoms. Examples thereof include polymers having two or more components as components.
  • alkyl group examples include a methyl group, an ethyl group, a propyl group, an isopropyl group, an n-butyl group, t Butyl, isobutyl, amyl, isoamyl, hexyl, heptyl, cyclohexyl, 2-ethylhexyl, octyl, isooctyl, nonyl, isononyl, decyl, isodecyl Group, undecyl group, lauryl group, tridecyl group, tetradecyl group, stearyl group, octadecyl group or dodecyl group.
  • the other monomer forming the polymer is not particularly limited.
  • acrylic acid methacrylic acid, carboxyethyl acrylate, carboxypentyl acrylate, itaconic acid, maleic acid, fumaric acid.
  • a carboxyl group-containing monomer such as crotonic acid, an acid anhydride monomer such as maleic anhydride or itaconic anhydride, 2-hydroxyethyl (meth) acrylate, 2-hydroxypropyl (meth) acrylate , (Meth) acrylic acid 4-hydroxybutyl, (meth) acrylic acid 6-hydroxyhexyl, (meth) acrylic acid 8 hydroxyoctyl, (meth) acrylic acid 10 hydroxydecyl, (meth) acrylic acid 12 hydroxy Lauryl or (4-Hydroxymethylcyclohexyl) methyl attareir Hydroxyl group-containing monomers such as styrene sulfonic acid, aryl sulfonic acid, 2- (meth) acrylamide-2-methylpropane sulfonic acid, (meth) acrylamide propane sulfonic acid, sulfopropyl (meth) acrylate or ( Examples thereof include sulfonic acid
  • thermosetting resin examples include phenol resin, amino resin, unsaturated polyester resin, epoxy resin, polyurethane resin, silicone resin, and thermosetting polyimide resin. These rosins can be used alone or in combination of two or more. Of these thermoplastic resins, epoxy resins containing a small amount of ionic impurities that corrode semiconductor elements are particularly preferable. As a curing agent for epoxy resin, phenol resin is preferable.
  • the epoxy resin is not particularly limited as long as it is generally used as an adhesive composition, for example, bisphenol A type, bisphenol F type, bisphenol S type, brominated bisphenol A type, Bifunctional epoxy such as hydrogenated bisphenol A type, bisphenol AF type, biphenyl type, naphthalene type, fluorene type, phenol novolac type, orthocresol novolak type, trishydroxyphenol methane type, tetraphenol ethane type Polyfunctional epoxy resin or hydantoin type, trisglycidyl isocyanurate type or glycidylamine type epoxy resin is used. These can be used alone or in combination of two or more.
  • novolak type epoxy resins novolak type epoxy resins, biphenyl type epoxy resins, trishydroxyphenylmethane type resins and tetrahethane-ethane type epoxy resins are particularly preferred. This is because these epoxy resins are rich in reactivity with phenol resin as a hardener and are excellent in heat resistance and the like.
  • the phenol resin acts as a curing agent for the epoxy resin, such as phenol novolac resin, phenol aralkyl resin, cresol novolac resin, tert-butyl phenol novolak.
  • the epoxy resin such as phenol novolac resin, phenol aralkyl resin, cresol novolac resin, tert-butyl phenol novolak.
  • nopolac-type phenolic resins such as rosin and nourphenol novolac resins, resol-type phenolic resins, and polyoxystyrenes such as polyparaxstyrene. These can be used alone or in combination of two or more.
  • phenol novolac resins and phenol alkyl resins are particularly preferred. This is because the connection reliability of the semiconductor device can be improved.
  • the mixing ratio of the epoxy resin and the phenol resin is such that, for example, the hydroxyl group in the phenol resin is 0.5 to 2 equivalents per equivalent of the epoxy group in the epoxy resin component. Is preferred. More preferred is 0.8 to 1.2 equivalents. This is because if the blending ratio of both is out of the above range, sufficient curing reaction does not proceed and the properties of the cured epoxy resin are likely to deteriorate.
  • an adhesive sheet containing epoxy resin, phenol resin and acrylic resin is particularly preferable. Since these resins have few ionic impurities and high heat resistance, the reliability of semiconductor elements can be ensured.
  • the mixing ratio of the epoxy resin and the phenol resin is 10 to 200 parts by weight with respect to 100 parts by weight of the acrylic resin component.
  • the adhesive sheet 12 of the present invention is crosslinked to some extent in advance, a polyfunctional compound that reacts with a functional group at the end of the molecular chain of the polymer is used as a crosslinking agent in the production. It is good to add it. This improves adhesive properties at high temperatures and improves heat resistance.
  • a crosslinking agent conventionally known crosslinking agents can be employed.
  • polyisocyanate compounds such as tolylene diisocyanate, diphenylenemethane diisocyanate, p-phenylene diisocyanate, 1,5 naphthalene diisocyanate, and adjuncts of polyhydric alcohol and diisocyanate are more suitable. preferable.
  • the addition amount of the crosslinking agent is usually preferably 0.05 to 7 parts by weight with respect to 100 parts by weight of the organic resin component. If the amount of the cross-linking agent exceeds 7 parts by weight, the adhesive strength is lowered, which is not preferable. On the other hand, if it is less than 0.05 parts by weight, the cohesive force is insufficient, which is not preferable.
  • other polyfunctional compounds such as epoxy resins may be included together if necessary.
  • an inorganic filler can be appropriately blended in the adhesive sheet 12 of the present invention according to the application.
  • the blending of the inorganic filler makes it possible to impart conductivity, improve thermal conductivity, and adjust the elastic modulus.
  • the inorganic filler include ceramics such as silica, clay, gypsum, calcium carbonate, barium sulfate, acid-alumina, acid-beryllium, silicon carbide, silicon nitride, aluminum, copper, silver, gold Examples thereof include metals such as nickel, chromium, lead, tin, zinc, palladium, and solder, various alloys, and other various inorganic powders such as carbon. These can be used alone or in combination of two or more. Among these, silica, particularly fused silica is preferably used.
  • the average particle size of the inorganic filler is preferably in the range of 0.1 to 80 m! /.
  • the blending amount of the inorganic filler is preferably set to 0 to 80 parts by weight, more preferably 0 to 70 parts by weight with respect to 100 parts by weight of the organic resin component.
  • the adhesive sheet 12 of the present invention may contain other additive calcining agent as needed in addition to the inorganic filler.
  • other additives include flame retardants, silane coupling agents, and ion trapping agents.
  • Examples of the flame retardant include antimony triacid, antimony pentaacid, antimony bromide, and epoxy bromide. These can be used alone or in combination of two or more.
  • silane coupling agent examples include ⁇ (3,4 epoxy cyclohexylene) ethyltrimethoxysilane, ⁇ -glycidoxypropyltrimethoxysilane, and ⁇ -glycidoxy. Cypropylmethyljetoxysilane and the like can be mentioned. These compounds can be used alone or
  • Two or more types can be used in combination.
  • Examples of the ion trapping agent include nodular talcite, bismuth hydroxide, and the like. These can be used alone or in combination of two or more.
  • FIG. 2 is a process diagram for explaining the semiconductor device manufacturing method according to the present embodiment.
  • the semiconductor device according to the present embodiment is different from the semiconductor device according to the first embodiment in that a plurality of semiconductor elements are stacked and three-dimensionally mounted. More specifically, it differs in that it includes a step of laminating another semiconductor element on the semiconductor element via the adhesive sheet.
  • FIG. 2 (a) at least one or more adhesive sheets 12 cut out to a predetermined size are temporarily fixed to a substrate 11 or the like which is an adherend.
  • the semiconductor element 13 is temporarily fixed on the adhesive sheet 12 so that the wire bond surface is on the upper side (see FIG. 2B).
  • the adhesive sheet 14 is temporarily fixed on the semiconductor element 13 while avoiding the electrode pad portion (see FIG. 2 (c)).
  • the semiconductor element 13 is formed on the adhesive sheet 14 such that the wire pond surface is on the upper side (see FIG. 2D).
  • a wire bonding step is performed as shown in FIG. 2 (e) without performing a heating step.
  • the electrode pad and the substrate 11 in the semiconductor element 13 are electrically connected by the bonding wire 16.
  • a sealing step of sealing the semiconductor element 13 with a sealing resin is performed to magnetize the sealing resin, and between the substrate 11 and the semiconductor element 13 with the adhesive sheets 12 and 14 And between the semiconductor elements 13 are fixed. Further, after the sealing step, a post-curing step may be performed.
  • the heat treatment by heating the adhesive sheets 1 2 and 14 is not performed, so that the manufacturing process is simplified and the yield is improved. Can be planned. Also, the substrate 11 was warped or the semiconductor element 13 was cracked. Therefore, the semiconductor element can be further reduced in thickness.
  • FIG. 3 is a process diagram for explaining the manufacturing method of the semiconductor device according to the present embodiment.
  • the semiconductor device according to the present embodiment is different from the semiconductor device according to the second embodiment in that a spacer is interposed between stacked semiconductor elements. More specifically, it differs in that it includes a step of laminating a spacer via an adhesive sheet between the semiconductor element and the semiconductor element.
  • the adhesive sheet 12, the semiconductor element 13 and the adhesive sheet 14 are sequentially laminated on the substrate 11 or the like in the same manner as in the second embodiment. And temporarily fix. Further, the spacer 21, the adhesive sheet 14, and the semiconductor element 13 are sequentially laminated and temporarily fixed on the adhesive sheet 14 (see FIGS. 3 (d) to 3 (f)).
  • a wire bonding step is performed as shown in FIG. 3 (g) without performing a heating step.
  • the electrode pad and the substrate 11 in the semiconductor element 13 are electrically connected by the bonding wire 16.
  • a sealing step of sealing the semiconductor element 13 with a sealing resin is performed, and the sealing resin is hardened. And between the semiconductor element 13 and the spacer 21 are fixed. Further, a post-curing step may be performed after the sealing step.
  • the spacer is not particularly limited.
  • a conventionally known silicon chip, polyimide film, or the like can be used.
  • FIG. 4 is a process diagram for explaining the method of manufacturing a semiconductor device according to the present embodiment.
  • the adhesive sheet 12 ′ is attached to the back surface of the semiconductor wafer 13 ′.
  • a semiconductor wafer with an adhesive sheet is produced.
  • the semiconductor wafer 13 ′ is temporarily fixed to the dicing tape 33 (see FIG. 4B).
  • the semiconductor wafer with the adhesive sheet is diced to a predetermined size to form a chip (see FIG. 4 (c)), and an adhesive is applied from the dicing tape 33, and the chip is peeled off.
  • the semiconductor element 13 with the adhesive sheet 12 is temporarily fixed on the substrate 11 such that the wire bond surface is on the upper side. Further, the semiconductor elements 32 having different sizes with the adhesive sheet 31 are temporarily fixed on the semiconductor element 13 so that the wire bond surface is on the upper side.
  • a wire bonding step is performed as shown in FIG. 4 (e) without performing a heating step.
  • the electrode pads in the semiconductor elements 13 and 32 and the substrate 11 are electrically connected by the bonding wires 16.
  • a sealing step of sealing the semiconductor element with a sealing resin is performed to cure the sealing resin, and between the substrate 11 and the semiconductor element 13 with the adhesive sheets 12 and 31, The semiconductor element 13 and the semiconductor element 32 are fixed.
  • a post-curing process may be performed after the sealing process.
  • FIG. 5 is a process diagram for explaining the manufacturing method of the semiconductor device according to the present embodiment.
  • the adhesive sheet 12 ' is laminated on the dicing tape 33, and then the adhesive sheet is further compared with the method for manufacturing the semiconductor device according to the fourth embodiment. The difference is that a semiconductor wafer 13 'is laminated on 12'.
  • the adhesive sheet 12 ′ is laminated on the dicing tape 33.
  • a semiconductor wafer 13 ′ is laminated on the adhesive sheet 12 ′ (see FIG. 5B). Further, the semiconductor wafer with the adhesive sheet is diced to a predetermined size to form a chip (see FIG. 5 (c)), the adhesive is applied from the dicing tape 33, and the chip is peeled off.
  • the semiconductor element 13 with the adhesive sheet 12 is attached to the wire board. Temporarily adhere to the substrate 11 so that the end face is on the upper side. Further, the semiconductor elements 32 having different sizes with the adhesive sheet 31 are temporarily fixed on the semiconductor element 13 so that the wire bond surface is on the upper side. At this time, the semiconductor element 32 is fixed while avoiding the electrode pad portion of the lower semiconductor element 13.
  • a wire bonding step is performed as shown in FIG. 5 (e) without performing a heating step.
  • the electrode pads in the semiconductor elements 13 and 32 and the internal connection lands in the substrate 11 are electrically connected by the bonding wires 16.
  • a sealing step of sealing the semiconductor elements 13 and 32 with a sealing resin is performed to cure the sealing resin, and between the substrate 11 and the semiconductor element 13 with the adhesive sheets 12 and 31. And between the semiconductor element 13 and the semiconductor element 32 are fixed. Further, after the sealing step, a post-curing step may be performed. By performing the above manufacturing process, the semiconductor device according to the present embodiment can be obtained.
  • FIG. 6 is a process diagram for explaining the manufacturing method of the semiconductor device according to the present embodiment.
  • FIG. 7 is a cross-sectional view schematically showing a semiconductor device obtained by the method for manufacturing a semiconductor device according to the present embodiment.
  • the semiconductor device according to the present embodiment is different from the semiconductor device according to the third embodiment in that a core material is employed as a spacer.
  • an adhesive sheet 12 ′ is laminated on the dicing tape 33 in the same manner as in the fifth embodiment. Further, the semiconductor wafer 13 ′ is laminated on the adhesive sheet 12 ′. Further, the semiconductor wafer with the adhesive sheet is diced to a predetermined size to form a chip, and the chip with the adhesive is peeled from the dicing tape 33. Thereby, the semiconductor element 13 provided with the adhesive sheet 12 is obtained.
  • an adhesive sheet 41 is formed on the dicing tape 33 (see FIG. 6 (a)), and a core material 42 is pasted on the adhesive sheet 41 (see FIG. 6 (b)). Further, the chip is diced to a predetermined size (see FIG. 6 (c)), and the chip with adhesive is peeled from the dicing tape 33. As a result, the chip-like core material 42 'with the adhesive sheet 41' obtain.
  • the semiconductor element 13 is temporarily fixed on the substrate 11 or the like 11 via the adhesive sheet 12 so that the wire bond surface is on the upper side.
  • the core material 42 ′ is temporarily fixed on the semiconductor element 13 via the adhesive sheet 41 ′.
  • the semiconductor element 13 is temporarily fixed on the core material 42 ′ via the adhesive sheet 12 so that the wire bond surface is on the upper side.
  • a sealing step of sealing the semiconductor element with a sealing resin is performed to cure the sealing resin, and between the substrate 11 and the semiconductor element 13 with an adhesive sheet 12.41 '. And between the semiconductor element 13 and the core material 42 '.
  • a post-curing process may be performed after the sealing process.
  • the core material is not particularly limited, and conventionally known materials can be used. Specifically, films (for example, polyimide films, polyester films, polyethylene terephthalate films, polyethylene naphthalate films, polycarbonate films, etc.), resin substrates reinforced with glass fibers or plastic non-woven fibers, mirror silicon wafers, silicon A substrate or a glass substrate can be used.
  • films for example, polyimide films, polyester films, polyethylene terephthalate films, polyethylene naphthalate films, polycarbonate films, etc.
  • resin substrates reinforced with glass fibers or plastic non-woven fibers, mirror silicon wafers, silicon A substrate or a glass substrate can be used.
  • FIG. 8 is a process diagram for explaining the method of manufacturing a semiconductor device according to the present embodiment.
  • the method of manufacturing a semiconductor device according to the present embodiment is characterized in that it is chipped by punching or the like instead of dicing the core material, as compared with the method of manufacturing a semiconductor device according to the sixth embodiment. Different.
  • the semiconductor element 13 provided with the adhesive sheet 12 is obtained.
  • the core material 42 is pasted on the adhesive sheet 41.
  • a chip-shaped core material 42 'having an adhesive sheet 41' is formed by punching or the like so as to obtain a predetermined size. obtain.
  • the core material 42 ′ and the semiconductor element 13 are sequentially stacked and temporarily fixed via the adhesive sheets 12.41 ′.
  • a wire bonding step, a sealing step, and a post-curing step as necessary can be performed to obtain the semiconductor device according to the present embodiment.
  • a nota coat film may be formed on the surface side where the circuit of the semiconductor element is formed.
  • the buffer coat film include those made of a heat-resistant resin such as a silicon nitride film or polyimide resin.
  • the adhesive sheet used in each stage is not limited to one having the same compositional strength, but can be appropriately changed according to manufacturing conditions, applications, and the like.
  • the lamination method described in the above embodiment is described as an example, and can be appropriately changed as necessary.
  • the method of manufacturing a semiconductor device according to the second embodiment it is possible to stack the second and subsequent semiconductor elements by the stacking method described in the third embodiment.
  • the force described about the aspect in which the wire bonding step is collectively performed after laminating a plurality of semiconductor elements on the substrate or the like is not limited to this. Absent. For example, it is possible to perform a wire bonding process every time a semiconductor element is stacked on a substrate or the like.
  • Acrylic ester polymer based on ethyl methyl methacrylate (Negami Kogyo Co., Ltd., Nolon W—197CM), 100 parts polyfunctional isocyanate cross-linking agent, epoxy An adhesive composition with a concentration of 20% rosin (Japan Epoxy Resin Co., Ltd., Epicoat 1004) 23 parts and phenolic terephthalate (Mitsui Chemicals Co., Ltd., Millex X LC-LL) 6 parts dissolved in methyl ethyl ketone. A product solution was prepared.
  • a solution of this adhesive composition was applied as a release liner on a release-treated film that had a silicone release-treated polyethylene terephthalate film (thickness 50 ⁇ m) force. Further, the adhesive sheet according to Example 1 having a thickness of 25 m was produced by drying at 120 ° C. for 3 minutes.
  • Example 2 instead of the acrylic ester polymer used in Example 1, a polymer containing butyl acrylate as a main component (Negami Kogyo Co., Ltd., Paraclone SN-710) was used. Except for this, an adhesive sheet (thickness: 25 m) according to Example 2 was produced in the same manner as in Example 1.
  • Epoxy resin Japan Epoxy Resin Co., Ltd.
  • acrylate polymer based on ethyl acrylate methyl methacrylate (Negami Kogyo Co., Ltd., Norraclon W—197CM) Epicoat 1004)
  • This adhesive composition solution was applied as a release liner on a release film treated with a polyethylene terephthalate film (thickness 50 ⁇ m) subjected to silicone release treatment. Further, an adhesive sheet (thickness 25 / zm) according to Comparative Example 1 was produced by drying at 120 ° C. for 3 minutes.
  • Comparative Example 2 the acrylic ester polymer used in Comparative Example 1 was used. Instead, a polymer based on butyl acrylate (Negami Kogyo Co., Ltd., Paracron SN).
  • the storage elasticity before curing was measured as follows.
  • the measuring device is measured using a dynamic viscoelasticity measuring device (RSAn, manufactured by Reometric Scientific).
  • the measurement conditions were that the sheet was cut into 10mm length x 5mm width and in tensile mode.
  • the temperature was raised at a constant frequency (10 Hz) in 10 ° CZ minutes, measurements were taken at 30 to 280 ° C, and the storage elastic modulus at 80 to 250 ° C was determined.
  • the adhesive sheets according to Examples 1 and 2 exhibited a storage elastic modulus of 1. OMPa or higher at any hot plate temperature.
  • the shear adhesive strength of the adhesive sheets according to Comparative Examples 1 and 2 was 0.2 MPa or less.
  • the storage elastic modulus at 100 to 250 ° C. in Comparative Examples 1 and 2 was smaller than the measurement limit (0. IMPa).
  • the substrate made by UniMicron Technology Corporation, product surface: FTBGA16 In the case of X16 (2216-001A01)
  • the obtained adhesive sheet was peeled from the separator and then cut into a 6 mm opening.
  • aluminum vapor deposited wafers were diced to produce chips of 6mm length x 6mm width x 100 / zm thickness. This chip was die-attached to a substrate to produce a test piece. Die attachment was performed using a die bonder (SPA-3300 manufactured by Shinkawa Co., Ltd.) under the condition of applying a load (0.25 MPa) at a temperature of 120 ° C. and heating for 1 second.
  • SPA-3300 manufactured by Shinkawa Co., Ltd.
  • the obtained adhesive sheet was cut into a 6 mm opening after the separator force was peeled off.
  • Evaluation element (Phoenix 'Semiconductor I Co., Ltd.') Model number: NT- 103 Passivation layer with a model pattern for evaluation formed on the die pad of the lead frame (manufactured by Shinko Electric Co., Ltd., product name CA—F313 (MF202)) Si N Z5000 A thickness) is diced to 6mm x 6mm x 100 / zm
  • This evaluation element is defined as a first semiconductor element.
  • a die diced from an aluminum vapor-deposited wafer to a length of 5 mm x width 5 mm x thickness 100 ⁇ m was die-attached onto the evaluation element and tested. A piece was made.
  • This chip is a second semiconductor element. In addition, 20 samples were prepared for each sample.
  • a gold wire for wire bonding (diameter 25 m) was bonded to each sample by ultrasonic thermocompression bonding.
  • the number of wire bonds per sample was 80 points.
  • the wire bonding conditions were an ultrasonic output time of 10 ms, an ultrasonic output of 120, a bond load of 980 mN, and stage temperatures of 80 ° C, 175 ° C, and 250 ° C.
  • UTC-300 (made by Shinkawa Co., Ltd.) was used as the wire bonding apparatus.
  • the wire pound success rate was evaluated as a success when the pull strength evaluation with a tension gauge was 5 g or more. It should be noted that the sample heating process is not performed after the die touch. In the case of semiconductor elements, the second Wire bonding was performed between the semiconductor element and the lead frame.
  • the adhesive sheets according to Examples 1 and 2 had a success rate of 100% at any hot plate temperature.
  • the adhesive sheets according to Comparative Examples 1 and 2 were 0%.
  • the reason why the success rate for the adhesive sheets according to Examples 1 and 2 is 100% is that each has a sufficient storage elastic modulus, and thus has a force that does not cause chip displacement.

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Abstract

　ボンディングパットの汚染に起因してワイヤーボンディングができなくなるのを防止し、かつ、基板、リードフレーム又は半導体素子等の被着体に反りが発生するのを防止して、歩留まりを向上させつつ製造工程を簡略化した半導体装置の製造方法、当該方法に使用する接着シート及び当該方法により得られる半導体装置を提供する。本発明は、半導体素子１３を被着体１１上に接着シート１２を介して仮固着する仮固着工程と、加熱工程を経ることなく、接合温度８０～２５０°Cの範囲でワイヤーボンディングをするワイヤーボンディング工程とを有し、前記接着シート１２として、硬化前の貯蔵弾性率が８０～２５０°Cの温度範囲で１ＭＰａ以上、又はその温度範囲内の任意の温度に於いて１ＭＰａ以上のものを使用することを特徴とする。

Description

明 細 書
半導体装置の製造方法
技術分野
[0001] 本発明は、半導体装置の製造方法、当該方法に使用する接着シート及び当該方 法により得られる半導体装置に関する。
背景技術
[0002] 半導体装置の微細化、高機能化の要求に対応すベぐ半導体チップ (半導体素子 )主面の全域に配置された電源ラインの配線幅や信号ライン間の間隔が狭くなつてき ている。この為、インピーダンスの増加や、異種ノードの信号ライン間での信号の干 渉が生じ、半導体チップの動作速度、動作電圧余裕度、耐静電破壊強度等に於い て、十分な性能の発揮を阻害する要因となっている。これらの問題を解決する為、例 えば、下記特許文献 1及び 2では、半導体素子を積層したパッケージ構造が開示さ れている。
[0003] 一方、半導体素子を基板等に固着する際に使用されるものとしては、熱硬化性べ 一スト榭脂 (例えば、下記特許文献 3参照)や、熱可塑性榭脂及び熱硬化性榭脂を 併用した接着シート (例えば、下記特許文献 4参照)等が挙げられる。
[0004] 従来の半導体装置の製造方法に於!、ては、半導体素子と、基板、リードフレーム又 は半導体素子との接着に際し、接着シート又は接着剤を使用する。接着は、半導体 素子と基板等との圧着の後 (ダイアタッチ）、接着シート等を加熱工程により硬化させ て行う。また、当該製造方法に於いては、半導体素子と基板とを電気的に接続する 為のワイヤーボンディングを行い、その後に封止榭脂でモールドし、後硬化して当該 封止榭脂により封止することも行われる。
[0005] し力しながら、ワイヤーボンディングを行う際、超音波振動や加熱により、基板等上 の半導体素子が動く。この為、従来は、ワイヤーボンディングの前に加熱工程を行つ て熱硬化性ペースト榭脂ゃ熱硬化性接着シートを加熱硬化し、半導体素子が動かな い様に固着する必要があった。
[0006] 更に、熱可塑性榭脂からなる接着シートや、熱硬化性榭脂と熱可塑性榭脂を併用 した接着シートに於いては、ダイアタッチ後、ワイヤーボンディング前に接着対象物と の接着力確保や濡れ性向上の目的で、加熱工程を必要としていた。
[0007] し力しながら、ワイヤーボンディングの前に接着シート等の加熱を行うと、接着シート 等から揮発ガスが発生する。この揮発ガスがボンディングパットを汚染し、多くの場合 、ワイヤーボンディングを行うことができなくなるという問題がある。
[0008] また、接着シート等を加熱硬化することにより当該接着シート等の硬化収縮等が生 じる。これに伴い、接着シートに応力が発生し、リードフレーム又は基板に（同時に、 半導体素子にも）反りが発生するという問題がある。力 []えて、ワイヤーボンディングェ 程に於 、ては、応力に起因して半導体素子にクラックが発生すると 、う問題もある。 近年、半導体素子の薄型化 '小型化に伴い、半導体素子の厚さが従来の 200 m からそれ以下へ、更には 100 m以下にまで薄層化している現状を勘案すると、基 板等の反りや半導体素子のクラックの問題は一層深刻なものであり、その問題解決 は益々重要である。
[0009] 特許文献 1：特開昭 55— 111151号公報
特許文献 2：特開 2002— 261233号公報
特許文献 3 :特開 2002— 179769号公報
特許文献 4:特開 2000— 104040号公報
発明の開示
発明が解決しょうとする課題
[0010] 本願発明は、前記の問題を考慮してなされたものであり、ボンディングパットの汚染 に起因してワイヤーボンディングができなくなるのを防止し、かつ、基板、リードフレー ム又は半導体素子等の被着体に反りが発生するのを防止して、歩留まりを向上させ つつ製造工程を簡略化した半導体装置の製造方法、当該方法に使用する接着シー ト及び当該方法により得られる半導体装置を提供することにある。
課題を解決するための手段
[0011] 本願発明者等は、前記従来の問題点を解決すベぐ半導体装置の製造方法、当 該方法に使用する接着シート及び当該方法により得られる半導体装置について鋭意 検討した。その結果、下記構成を採用することにより前記目的を達成できることを見 出して、本発明を完成させるに至った。
[0012] 即ち、本発明に係る半導体装置の製造方法は、前記の課題を解決する為に、半導 体素子を被着体上に接着シートを介して仮固着する仮固着工程と、加熱工程を経る ことなぐ接合温度 80〜250°Cの範囲でワイヤーボンディングをするワイヤーボンデ イング工程とを有し、前記接着シートとして、硬化前の貯蔵弾性率が 80〜250°Cの温 度範囲で IMPa以上、又はその温度範囲内の任意の温度に於いて IMPa以上のも のを使用することを特徴とする。
[0013] 前記方法であると、硬化前の貯蔵弾性率が 80〜250°Cの温度範囲で IMPa以上 、又はその温度範囲内の任意の温度に於いて IMPa以上の接着シートを使用する ので、接着シートの加熱工程を省略して、半導体素子が被着体上に仮固着した状態 のままでワイヤーボンディング工程に移行しても、当該工程に於ける超音波振動や加 熱により、接着シートと被着体との接着面でずり変形を生じることがない。ワイヤーボ ンデイング工程を行う際に、ワイヤーボンドの成功率を向上させることができる。
[0014] また、従来の製造方法に於いては、ワイヤーボンディング工程の前に接着シートの 加熱を行っており、当該加熱により接着シートから揮発ガスが発生してボンディング ノットが汚染されることがあった。しかし本発明は、その様な加熱を不要とするので、 接着シートから揮発ガスが発生してボンディングパットが汚染されるのを防止すること ができる。更に、接着シートを加熱する工程の省略により、基板等に反りが生じたり、 半導体素子にクラックが発生したりすることもない。この結果、半導体素子の一層の 薄型化も可能となる。
[0015] 前記被着体は、基板、リードフレーム又は半導体素子であることが好ましい。
[0016] 前記半導体素子を封止榭脂により封止する封止工程と、前記封止榭脂の後硬化を 行う後硬化工程とを含み、前記封止工程及び Z又は後硬化工程に於いて、加熱に より封止榭脂を硬化させると共に、前記接着シートを介して半導体素子と被着体とを 固着させることが好ましい。これにより、接着シートを介した半導体素子と被着体との 固着を、封止榭脂の硬化と同時に行うことが可能になり、製造工程の簡素化が図れ る。
[0017] また、前記接着シートとして、熱可塑性榭脂を含むものを使用することが好ましい。 [0018] また、前記接着シートとして、熱硬化性榭脂と熱可塑性榭脂の双方を含むものを使 用することが好ましい。
[0019] また、前記熱可塑性榭脂として、アクリル榭脂を使用することが好ま 、。また、前 記熱硬化性榭脂として、エポキシ榭脂及び Z又はフエノール榭脂を使用することが 好ましい。これらの榭脂はイオン性不純物が少なく耐熱性が高いので、半導体素子 の信頼性を確保できる。
[0020] また、本発明に係る接着シートは、前記の課題を解決する為に、半導体装置の製 造に用いられる接着シートであって、硬化前の貯蔵弾性率が 80〜250°Cの温度範 囲で IMPa以上、又はその温度範囲内の任意の温度に於いて IMPa以上であること を特徴とする。
[0021] 前記接着シートは熱可塑性榭脂を含むことが好ま 、。
[0022] また、前記接着シートは熱硬化性榭脂と熱可塑性榭脂の双方を含むことが好まし い。
[0023] 更に、前記熱可塑性榭脂はアクリル榭脂であることが好ましい。
[0024] また、前記熱硬化性榭脂はエポキシ榭脂及び Z又はフエノール榭脂であることが 好ましい。
[0025] 前記接着シートには架橋剤が添加されていることが好ましい。
[0026] 本発明に係る半導体装置は、前記の課題を解決する為に、前記に記載の半導体 装置の製造方法により得られたものであることを特徴とする。
発明の効果
[0027] 本発明は、前記に説明した手段により、以下に述べるような効果を奏する。
即ち、本発明によれば、 80〜250°Cの温度範囲で、又はその温度範囲内の任意 の温度で硬化前の貯蔵弾性率が IMPa以上の接着シートを使用するので、接着シ ートの加熱工程を省略してワイヤーボンディング工程に移行しても、接着シートと被 着体との接着面でずり変形が生じるのを防止し、該ワイヤーボンディング工程を良好 に行える。また、加熱工程を省略できるので、接着シートから揮発ガスが発生すること もない。この為、ボンディングパットが汚染されるのを防止することができる。よって本 発明は、半導体装置の生産性を向上させると共に、歩留まりの向上を図ることができ る。
[0028] 尚、前記半導体素子の上に 1又は 2以上の半導体素子を、前記接着シートを介して 積層する場合や、必要に応じて、前記半導体素子と半導体素子との間に前記接着シ ートを介してスぺーサを積層する場合にも同様の作用効果を奏する。また、前記の製 造工程の簡略化は、複数の半導体素子等の 3次元実装に於いて、製造効率の一層 の向上を図ることができる。
図面の簡単な説明
[0029] [図 1]本発明の実施の形態 1に係る半導体装置の製造方法を説明する為の工程図で ある。
[図 2]本発明の実施の形態 2に係る半導体装置の製造方法を説明する為の工程図で ある。
[図 3]本発明の実施の形態 3に係る半導体装置の製造方法を説明する為の工程図で ある。
[図 4]本発明の実施の形態 4に係る半導体装置の製造方法を説明する為の工程図で ある。
[図 5]本発明の実施の形態 5に係る半導体装置の製造方法を説明する為の工程図で ある。
[図 6]本発明の実施の形態 6に係る半導体装置の製造方法を説明する為の工程図で ある。
[図 7]前記実施の形態 6に係る半導体装置の製造方法により得られた半導体装置の 概略を示す断面図である。
[図 8]本発明の実施の形態 7に係る半導体装置の製造方法を説明する為の工程図で ある。
発明を実施するための最良の形態
[0030] (実施の形態 1)
本発明の実施の形態について、図 1を参照しながら説明する。図 1は、本実施の形 態に係る半導体装置の製造方法を説明する為の工程図である。但し、説明に不要な 部分は省略し、また、説明を容易にする為に拡大又は縮小等して図示した部分があ る。以上のことは、以下の図面に対しても同様である。
[0031] 本実施の形態に係る半導体装置の製造方法は、半導体素子 13を基板又はリード フレーム (被着体、以下単に基板等と称する） 11上に接着シート 12で仮固着する仮 固着工程と、加熱工程を経ることなぐワイヤーボンディングをするワイヤーボンディン グ工程とを有する。更に、半導体素子 13を封止榭脂 15で封止する封止工程と、当該 封止榭脂 15をアフターキュアする後硬化工程とを有する。
[0032] 前記仮固着工程は、図 1 (a)に示すように、半導体素子 13を、接着シート 12を介し て基板等 11に仮固着する工程である。半導体素子 13を基板等 11上に仮固着する 方法としては、例えば基板等 11上に接着シート 12を積層した後、接着シート 12上に 、ワイヤーボンド面が上側となる様にして半導体素子 13を順次積層して仮固着する 方法が挙げられる。また、予め接着シート 12が仮固着された半導体素子 13を基板等 11に仮固着して積層してもょ 、。
[0033] 前記基板としては、従来公知のものを使用することができる。また、前記リードフレー ムとしては、 CUリードフレーム、 42Alloyリードフレーム等の金属リードフレームゃガ ラスエポキシ、 BT (ビスマレイミドートリァジン）、ポリイミド等カもなる有機基板を使用 することができる。しかし、本発明はこれに限定されるものではなぐ半導体素子をマ ゥントし、半導体素子と電気的に接続して使用可能な回路基板も含まれる。
[0034] 前記接着シート 12としては、その硬化前の貯蔵弾性率が 80〜250°Cの温度範囲 で IMPa以上、又はその温度範囲内の任意の温度で IMPa以上のものを使用し、よ り好ましくは 1〜： LOOMPaの範囲内のものを使用する。接着シート 12の貯蔵弾性率 力 S IMPa以上であると、加熱工程を経ることなくワイヤーボンディング工程を行っても 、当該工程に於ける超音波振動や加熱により、接着シート 12と半導体素子 13又は 基板等 11との接着面でずり変形を生じることがない。即ち、ワイヤーボンディングの 際の超音波振動により半導体素子が動くことがなぐこれにより、ワイヤーボンディン グの成功率が低下するのを防止し、歩留まりの向上が図れる。尚、接着シート 12に ついては、後段に於いて更に詳述する。
[0035] 前記ワイヤーボンディング工程は、基板等 11の端子部 (インナーリード)の先端と半 導体素子 13上の電極パッド（図示しない）とをボンディングワイヤー 14で電気的に接 続する工程である（図 1 (b)参照)。本工程は、接着シート 12による固着を行うことなく 実行される。また、本工程の過程で接着シート 12により半導体素子 13と基板等 11と が固着することはない。前記ボンディングワイヤー 14としては、例えば金線、アルミ- ゥム線又は銅線等が用いられる。ワイヤーボンディングを行う際、その接合温度は、 8 0〜250°Cであることが必要であり、より好ましくは 80〜220°Cの範囲内である。 80°C 未満であると、接合したワイヤーの強度が弱くなるという不都合がある。その一方、 25 0°Cを超えると、基板に反りが生じ、安定してワイヤーボンディングを行うことができな いという不都合がある。また、その加熱時間は数秒〜数分間行われる。
[0036] 結線は、前記温度範囲内となる様に加熱された状態で、超音波による振動エネル ギ一と印加加圧による圧着エネルギーの併用により行われる。この様な方法としては 、例えば超音波方式や超音波熱圧着方式が挙げられる。尚、熱圧着方式等は、一 般に接合温度が 300〜350°Cで行われるので、本発明に於 、ては好ましくな!/、。
[0037] 前記封止工程は、封止榭脂 15により半導体素子 13を封止する工程である（図 1 (c )参照)。本工程は、基板等 11に搭載された半導体素子 13やボンディングワイヤー 1 4を保護する為に行われる。本工程は、封止用の榭脂を金型で成型することにより行 う。封止榭脂 15としては、例えばエポキシ系の榭脂を使用する。榭脂封止の際の加 熱温度は、通常 175°Cで 60〜90秒間行われる力 本発明はこれに限定されず、例 えば 165〜185°Cで数分間キュアすることができる。これにより、封止榭脂を硬化させ ると共に、接着シート 12を介して半導体素子 13と基板等 11とを固着させる。即ち、本 発明に於いては、後述する後硬化工程が行われない場合に於いても、本工程では 接着シート 12による固着が可能であり、製造工程数の減少及び半導体装置の製造 期間の短縮に寄与することができる。
[0038] 前記後硬化工程に於いては、前記封止工程で硬化不足の封止榭脂 15を完全に 硬化させる。封止工程に於いて接着シート 12により固着がされない場合でも、本ェ 程に於いて封止榭脂 15の硬化と共に接着シート 12による固着が可能となる。本工程 に於ける加熱温度は、封止榭脂の種類により異なる力 例えば 165〜185°Cの範囲 内であり、加熱時間は 0. 5〜8時間程度である。
[0039] 次に、前記接着シート 12について詳述する。接着シート 12は、 80〜250°Cの温度 範囲で IMPa以上、又はその温度範囲内の任意の温度に於いて IMPa以上であれ ば、その構成は特に限定されない。本実施の形態に於いては、貯蔵弾性率を前記数 値範囲内とする為、例えば後述の材料群力 適宜必要な材料を選択して、所定の条 件下で接着シート 12を作製すればよい。また、接着シート 12の貯蔵弾性率は、例え ば熱可塑性榭脂量を増やすことにより低下させることができ、その一方熱硬化性榭脂 量を増やすこと〖こより増大させることもできる。
[0040] 例えば、接着剤層の単層のみからなる接着シートや、コア材料の片面又は両面に 接着剤層を形成した多層構造の接着シート等が挙げられる。前記コア材料としては、 フィルム（例えばポリイミドフィルム、ポリエステルフィルム、ポリエチレンテレフタレート フィルム、ポリエチレンナフタレートフィルム、ポリカーボネートフィルム等）、ガラス繊 維やプラスチック製不織繊維で強化された榭脂基板、シリコン基板又はガラス基板等 が挙げられる。また、接着シートとダイシングシートとの一体型のものも使用することが できる。
[0041] 前記接着剤層は接着機能を有する層であり、その構成材料としては、熱可塑性榭 脂と熱硬化性榭脂とを併用したものが挙げられる。又、熱可塑性榭脂単独でも使用 可能である。
[0042] 前記熱可塑性榭脂としては、天然ゴム、ブチルゴム、イソプレンゴム、クロロプレンゴ ム、エチレン 酢酸ビュル共重合体、エチレン アクリル酸共重合体、エチレンーァ クリル酸エステル共重合体、ポリブタジエン榭脂、ポリカーボネート榭脂、熱可塑性ポ リイミド榭脂、 6—ナイロンや 6, 6ナイロン等のポリアミド榭脂、フエノキシ榭脂、アタリ ル榭脂、 PETや PBT等の飽和ポリエステル榭脂、ポリアミドイミド榭脂又はフッ素榭 脂等が挙げられる。これらの熱可塑性榭脂は単独で、又は 2種以上を併用して用い ることができる。これらの熱可塑性榭脂のうち、イオン性不純物が少なぐ耐熱性が高 く、半導体素子の信頼性を確保できるアクリル榭脂が特に好まし 、。
[0043] 前記アクリル系榭脂としては、特に限定されるものではなぐ炭素数 30以下、特に 炭素数 4〜 18の直鎖若しくは分岐のアルキル基を有するアクリル酸又はメタクリル酸 のエステルの 1種又は 2種以上を成分とする重合体等が挙げられる。前記アルキル 基としては、例えばメチル基、ェチル基、プロピル基、イソプロピル基、 n ブチル基、 t ブチル基、イソブチル基、アミル基、イソアミル基、へキシル基、ヘプチル基、シク 口へキシル基、 2—ェチルへキシル基、ォクチル基、イソォクチル基、ノニル基、イソノ ニル基、デシル基、イソデシル基、ゥンデシル基、ラウリル基、トリデシル基、テトラデ シル基、ステアリル基、ォクタデシル基、又はドデシル基等が挙げられる。
[0044] また、前記重合体を形成する他のモノマーとしては、特に限定されるものではなぐ 例えばアクリル酸、メタクリル酸、カルボキシェチルアタリレート、カルボキシペンチル アタリレート、ィタコン酸、マレイン酸、フマール酸若しくはクロトン酸等の様なカルボキ シル基含有モノマー、無水マレイン酸若しくは無水ィタコン酸等の様な酸無水物モノ マー、（メタ）アクリル酸 2—ヒドロキシェチル、（メタ）アクリル酸 2—ヒドロキシプロピル、 (メタ）アクリル酸 4 -ヒドロキシブチル、（メタ）アクリル酸 6 -ヒドロキシへキシル、（メタ） アクリル酸 8 ヒドロキシォクチル、（メタ）アクリル酸 10 ヒドロキシデシル、（メタ）ァク リル酸 12 ヒドロキシラウリル若しくは（4ーヒドロキシメチルシクロへキシル） メチル アタリレート等の様なヒドロキシル基含有モノマー、スチレンスルホン酸、ァリルスルホ ン酸、 2— (メタ）アクリルアミド— 2—メチルプロパンスルホン酸、（メタ）アクリルアミドプ 口パンスルホン酸、スルホプロピル (メタ）アタリレート若しくは (メタ）アタリロイルォキシ ナフタレンスルホン酸等の様なスルホン酸基含有モノマー、又は 2—ヒドロキシェチル アタリロイルホスフェート等の様な燐酸基含有モノマーが挙げられる。
[0045] 前記熱硬化性榭脂としては、フエノール榭脂、アミノ榭脂、不飽和ポリエステル榭脂 、エポキシ榭脂、ポリウレタン榭脂、シリコーン榭脂、又は熱硬化性ポリイミド榭脂等が 挙げられる。これらの榭脂は、単独で又は 2種以上を併用して用いることができる。こ れらの熱可塑性榭脂のうち、特に半導体素子を腐食させるイオン性不純物等含有が 少ないエポキシ榭脂が好ましい。また、エポキシ榭脂の硬化剤としてはフエノール榭 脂が好ましい。
[0046] 前記エポキシ榭脂は、接着剤組成物として一般に用いられるものであれば特に限 定は無ぐ例えばビスフエノール A型、ビスフエノール F型、ビスフエノール S型、臭素 化ビスフエノール A型、水添ビスフエノール A型、ビスフエノール AF型、ビフエ-ル型 、ナフタレン型、フルオンレン型、フエノールノボラック型、オルソクレゾールノボラック 型、トリスヒドロキシフエ-ルメタン型、テトラフエ-ロールエタン型等の二官能エポキシ 榭脂ゃ多官能エポキシ榭脂、又はヒダントイン型、トリスグリシジルイソシァヌレート型 若しくはグリシジルァミン型等のエポキシ榭脂が用いられる。これらは単独で、又は 2 種以上を併用して用いることができる。これらのエポキシ榭脂のうちノボラック型ェポ キシ榭脂、ビフエ-ル型エポキシ榭脂、トリスヒドロキシフエニルメタン型榭脂又はテト ラフエ-ロールエタン型エポキシ榭脂が特に好ましい。これらのエポキシ榭脂は、硬 ィ匕剤としてのフエノール榭脂との反応性に富み、耐熱性等に優れるからである。
[0047] 更に前記フ ノール榭脂は、前記エポキシ榭脂の硬化剤として作用するものであり 、例えば、フエノールノボラック榭脂、フエノールァラルキル榭脂、クレゾ一ルノボラック 榭脂、 tert—ブチルフエノールノボラック榭脂、ノユルフェノールノボラック榭脂等のノ ポラック型フエノール榭脂、レゾール型フエノール榭脂、ポリパラォキシスチレン等の ポリオキシスチレン等が挙げられる。これらは単独で、又は 2種以上を併用して用いる ことができる。これらのフエノール榭脂のうちフエノールノボラック榭脂、フエノールァラ ルキル樹脂が特に好ま 、。半導体装置の接続信頼性を向上させることができるから である
[0048] 前記エポキシ榭脂とフエノール榭脂の配合割合は、例えば、前記エポキシ榭脂成 分中のエポキシ基 1当量当たりフエノール榭脂中の水酸基が 0. 5〜2当量になるよう に配合することが好適である。より好適なのは 0. 8〜1. 2当量である。両者の配合割 合が前記範囲を外れると、十分な硬化反応が進まず、エポキシ榭脂硬化物の特性が 劣化し易くなるからである。
[0049] 尚、本発明に於 ヽては、エポキシ榭脂、フエノール榭脂及びアクリル榭脂を含む接 着シートが特に好ましい。これらの榭脂は、イオン性不純物が少なく耐熱性が高いの で、半導体素子の信頼性を確保できる。この場合の配合比は、アクリル榭脂成分 10 0重量部に対して、エポキシ榭脂とフエノール榭脂の混合量が 10〜200重量部であ る。
[0050] 本発明の接着シート 12には、予めある程度架橋をさせておく為、その作製に際し、 重合体の分子鎖末端の宫能基等と反応する多官能性ィ匕合物を架橋剤として添加さ せておくのがよい。これにより、高温下での接着特性を向上させ、耐熱性の改善を図 る。 [0051] 前記架橋剤としては、従来公知のものを採用することができる。特に、トリレンジイソ シァネート、ジフエ二ノレメタンジイソシァネート、 p フエ二レンジイソシァネート、 1, 5 ナフタレンジイソシァネート、多価アルコールとジイソシァネートの付カ卩物等のポリ イソシァネートイ匕合物がより好ましい。架橋剤の添加量としては、有機榭脂成分 100 重量部に対し、通常 0. 05〜7重量部とするのが好ましい。架橋剤の量が 7重量部を 超えると、接着力が低下するので好ましくない。その一方、 0. 05重量部未満であると 、凝集力が不足するので好ましくない。また、この様なポリイソシァネートイ匕合物と共 に、必要に応じて、エポキシ榭脂等の他の多官能性ィ匕合物を一緒に含ませるように してちよい
[0052] また、本発明の接着シート 12には、その用途に応じて無機充填剤を適宜配合する ことができる。無機充填剤の配合は、導電性の付与や熱伝導性の向上、弾性率の調 節等を可能とする。前記無機充填材としては、例えば、シリカ、クレー、石膏、炭酸力 ルシゥム、硫酸バリウム、酸ィ匕アルミナ、酸ィ匕ベリリウム、炭化珪素、窒化珪素等のセ ラミック類、アルミニウム、銅、銀、金、ニッケル、クロム、鉛、錫、亜鉛、パラジウム、半 田などの金属、又は合金類、その他カーボンなど力もなる種々の無機粉末が挙げら れる。これらは単独で又は 2種以上を併用して用いることができる。なかでも、シリカ、 特に溶融シリカが好適に用いられる。また、無機充填剤の平均粒径は 0. 1〜80 mの範囲内であることが好まし!/、。
[0053] 前記無機充填剤の配合量は、有機榭脂成分 100重量部に対し 0〜80重量部に設 定することが好ましぐ 0〜70重量部に設定することがより好ましい。
[0054] 尚、本発明の接着シート 12には、前記無機充填剤以外に、必要に応じて他の添カロ 剤を適宜に配合することができる。他の添加剤としては、例えば難燃剤、シランカップ リング剤又はイオントラップ剤等が挙げられる。
[0055] 前記難燃剤としては、例えば、三酸ィ匕アンチモン、五酸ィ匕アンチモン、臭素化工ポ キシ榭脂等が挙げられる。これらは単独で、又は 2種以上を併用して用いることがで きる。
[0056] 前記シランカップリング剤としては、例えば、 β (3, 4 エポキシシクロへキシノレ） ェチルトリメトキシシラン、 γ—グリシドキシプロピルトリメトキシシラン、 γ—グリシドキ シプロピルメチルジェトキシシラン等が挙げられる。これらの化合物は、単独で、又は
2種以上を併用して用いることができる。
[0057] 前記イオントラップ剤としては、例えばノヽイド口タルサイト類、水酸ィ匕ビスマス等が挙 げられる。これらは単独で、又は 2種以上を併用して用いることができる。
[0058] (実施の形態 2)
本発明に形態 2に係る半導体装置の製造方法について、図 2を参照しながら説明 する。図 2は、本実施の形態に係る半導体装置の製造方法を説明する為の工程図で ある。
[0059] 本実施の形態に係る半導体装置は、前記実施の形態 1に係る半導体装置と比較し て、複数の半導体素子を積層して 3次元実装とした点が異なる。より詳細には、半導 体素子の上に他の半導体素子を、前記接着シートを介して積層する工程を含む点 が異なる。
[0060] 先ず、図 2 (a)に示すように、所定のサイズに切り出した少なくとも 1つ以上の接着シ ート 12を被着体である基板等 11に仮固着する。次に、接着シート 12上に半導体素 子 13を、ワイヤーボンド面が上側となる様にして仮固着する（図 2 (b)参照)。更に、 半導体素子 13上に、その電極パッド部分を避けて接着シート 14を仮固着する（図 2 ( c)参照)。更に、接着シート 14上に、ワイヤーポンド面が上側となる様にして半導体 素子 13を形成する（図 2 (d)参照)。
[0061] 次に、加熱工程を行うことなぐ図 2 (e)に示すように、ワイヤーボンディング工程を 行う。これにより、半導体素子 13に於ける電極パッドと基板等 11とをボンディングワイ ヤー 16で電気的に接続する。
[0062] 続いて、封止榭脂により半導体素子 13を封止する封止工程を行い、封止榭脂を磁 ィ匕させると共に、接着シート 12 · 14により基板等 11と半導体素子 13との間、及び半 導体素子 13同士の間を固着させる。また、封止工程の後、後硬化工程を行ってもよ い。
[0063] 本実施の形態によれば、半導体素子の 3次元実装の場合に於いても、接着シート 1 2 · 14の加熱による加熱処理を行わないので、製造工程の簡素化及び歩留まりの向 上が図れる。また、基板等 11に反りが生じたり、半導体素子 13にクラックが発生した りすることもないので、半導体素子の一層の薄型化が可能となる。
[0064] (実施の形態 3)
本実施の形態の 3に係る半導体装置の製造方法について、図 3を参照しながら説 明する。図 3は、本実施の形態に係る半導体装置の製造方法を説明する為の工程図 である。
[0065] 本実施の形態に係る半導体装置は、前記実施の形態 2に係る半導体装置と比較し て、積層した半導体素子間にスぺーサを介在させた点が異なる。より詳細には、半導 体素子と半導体素子との間に、接着シートを介してスぺーサを積層する工程を含む 点が異なる。
[0066] 先ず、図 3 (a)〜3 (c)に示すように、前記実施の形態 2と同様にして、基板等 11上 に接着シート 12、半導体素子 13及び接着シート 14を順次積層して仮固着する。更 に、接着シート 14上に、スぺーサ 21、接着シート 14及び半導体素子 13を順次積層 して仮固着する（図 3 (d)〜3 (f)参照)。
[0067] 次に、加熱工程を行うことなぐ図 3 (g)に示すように、ワイヤーボンディング工程を 行う。これにより、半導体素子 13に於ける電極パッドと基板等 11とをボンディシグワイ ヤー 16で電気的に接続する。
[0068] 続いて、封止榭脂により半導体素子 13を封止する封止工程を行い、封止榭脂を硬 ィ匕させると共に、接着シート 12 · 14により基板等 11と半導体素子 13との間、及び半 導体素子 13とスぺーサ 21との間を固着させる。また、封止工程の後、後硬化工程を 行ってもよい。以上の製造工程を行うことにより、本実施の形態に係る半導体装置を 得ることができる。
[0069] 尚、前記スぺーサとしては、特に限定されるものではなぐ例えば従来公知のシリコ ンチップ、ポリイミドフィルム等を用いることができる。
[0070] (実施の形態 4)
本実施の形態 4に係る半導体装置の製造方法について、図 4を参照しながら説明 する。図 4は、本実施の形態に係る半導体装置の製造方法を説明する為の工程図で ある。
[0071] 先ず、図 4 (a)に示すように、接着シート 12'を半導体ウェハ 13 'の裏面に貼り付け て接着シート付きの半導体ウェハを作製する。次に、半導体ウェハ 13 'にダイシング テープ 33に仮固着する（図 4 (b)参照)。更に、接着シート付きの半導体ウェハを所 定の大きさとなる様にダイシングしてチップ状にし（図 4 (c)参照）、ダイシングテープ 3 3から接着剤が付 、たチップを剥離する。
[0072] 次に、図 4 (d)に示すように、接着シート 12が付いた半導体素子 13を、ワイヤーボ ンド面が上側となる様にして基板等 11上に仮固着する。更に、接着シート 31が付い た大きさの異なる半導体素子 32を、ワイヤーボンド面が上側となる様にして半導体素 子 13上に仮固着する。
[0073] 次に、加熱工程を行うことなぐ図 4 (e)に示すように、ワイヤーボンディング工程を 行う。これにより、半導体素子 13 · 32に於ける電極パッドと基板等 11とをボンディング ワイヤー 16で電気的に接続する。
[0074] 次に、封止榭脂により半導体素子を封止する封止工程を行い、封止榭脂を硬化さ せると共に、接着シート 12 · 31により基板等 11と半導体素子 13との間、及び半導体 素子 13と半導体素子 32との間を固着させる。また、封止工程の後、後硬化工程を行 つてもよい。以上の製造工程を行うことにより、本実施の形態に係る半導体装置を得 ることがでさる。
[0075] (実施の形態 5)
本実施の形態 5に係る半導体装置の製造方法について、図 5を参照しながら説明 する。図 5は、本実施の形態に係る半導体装置の製造方法を説明する為の工程図で ある。
[0076] 本実施の形態に係る半導体装置の製造方法は、前記実施の形態 4に係る半導体 装置の製造方法と比較して、ダイシングテープ 33上に接着シート 12'を積層した後、 更に接着シート 12'上に半導体ウェハ 13 'を積層した点が異なる。
[0077] 先ず、図 5 (a)に示すように、ダイシングテープ 33上に接着シート 12'を積層する。
更に、接着シート 12'上に半導体ウェハ 13 'を積層する（図 5 (b)参照)。更に、接着 シート付きの半導体ウェハを所定の大きさとなる様にダイシングしてチップ状にし（図 5 (c)参照）、ダイシングテープ 33から接着剤が付 、たチップを剥離する。
[0078] 次に、図 5 (d)に示すように、接着シート 12が付いた半導体素子 13を、ワイヤーボ ンド面が上側となる様にして基板等 11上に仮固着する。更に、接着シート 31が付い た大きさの異なる半導体素子 32を、ワイヤーボンド面が上側となる様にして半導体素 子 13上に仮固着する。この際、半導体素子 32の固着は、下段の半導体素子 13の 電極パッド部分を避けて行われる。
[0079] 次に、加熱工程を行うことなぐ図 5 (e)に示すように、ワイヤーボンディング工程を 行う。これにより、半導体素子 13 · 32に於ける電極パッドと基板等 11に於ける内部接 続用ランドとをボンディングワイヤー 16で電気的に接続する。
[0080] 続いて、封止榭脂により半導体素子 13、 32を封止する封止工程を行い、封止榭脂 を硬化させると共に、接着シート 12 · 31により基板等 11と半導体素子 13との間、及 び半導体素子 13と半導体素子 32との間を固着させる。また、封止工程の後、後硬化 工程を行ってもよい。以上の製造工程を行うことにより、本実施の形態に係る半導体 装置を得ることができる。
[0081] (実施の形態 6)
本実施の形態 6に係る半導体装置の製造方法について、図 6及び図 7を参照しな 力 説明する。図 6は、本実施の形態に係る半導体装置の製造方法を説明する為の 工程図である。図 7は、本実施の形態に係る半導体装置の製造方法により得られた 半導体装置の概略を示す断面図である。
[0082] 本実施の形態に係る半導体装置は、前記実施の形態 3に係る半導体装置と比較し て、スぺーサとしてコア材料を採用した点が異なる。
[0083] 先ず、前記実施の形態 5と同様にして、ダイシングテープ 33上に接着シート 12'を 積層する。更に、接着シート 12'上に半導体ウェハ 13 'を積層する。更に、接着シー ト付きの半導体ウェハを所定の大きさとなる様にダイシングしてチップ状にし、ダイシ ングテープ 33から接着剤が付いたチップを剥離する。これにより、接着シート 12を備 えた半導体素子 13を得る。
[0084] 他方、ダイシングテープ 33の上に接着シート 41を形成し（図 6 (a)参照）、該接着シ ート 41上にコア材料 42を貼り付ける（図 6 (b)参照)。更に、所定のサイズとなる様に ダイシングしてチップ状にし（図 6 (c)参照）、ダイシングテープ 33から接着剤が付 ヽ たチップを剥離する。これにより、接着シート 41 'を備えたチップ状のコア材料 42'を 得る。
[0085] 次に、前記半導体素子 13を、ワイヤーボンド面が上側となる様に、基板等 11上に 接着シート 12を介して仮固着する。更に、半導体素子 13上に接着シート 41 'を介し てコア材料 42'を仮固着する。更に、コア材料 42'上に接着シート 12を介して半導体 素子 13を、ワイヤーボンド面が上側となる様に仮固着する。
[0086] 続いて、加熱工程を行うことなぐワイヤーボンディング工程を行う。これにより、半導 体素子 13に於ける電極パッドと基板等 11に於ける内部接続用ランドとをボンディン グワイヤー 16で電気的に接続する（図 7参照)。
[0087] 次に、封止榭脂により半導体素子を封止する封止工程を行い、封止榭脂を硬化さ せると共に、接着シート 12·41 'により基板等 11と半導体素子 13との間、及び半導体 素子 13とコア材料 42'との間を固着させる。以上の製造工程を行うことにより、本実 施の形態に係る半導体装置を得ることできる。尚、封止工程の後に、後硬化工程を 行ってもよい。
[0088] 前記コア材料としては特に限定されるものではなぐ従来公知のものを用いることが できる。具体的には、フィルム（例えばポリイミドフィルム、ポリエステルフィルム、ポリエ チレンテレフタレートフィルム、ポリエチレンナフタレートフィルム、ポリカーボネートフ イルム等）、ガラス繊維やプラスチック製不織繊維で強化された榭脂基板、ミラーシリ コンウェハ、シリコン基板又はガラス基板等を使用できる。
[0089] (実施の形態 7)
本実施の形態 7に係る半導体装置の製造方法について、図 8を参照しながら説明 する。図 8は、本実施の形態に係る半導体装置の製造方法を説明する為の工程図で ある。
[0090] 本実施の形態に係る半導体装置の製造方法は、前記実施の形態 6に係る半導体 装置の製造方法と比較して、コア材料のダイシングに替えて、打ち抜き等によりチッ プ化した点が異なる。
[0091] 先ず、前記実施の形態 6と同様にして、接着シート 12を備えた半導体素子 13を得 る。他方、接着シート 41上にコア材料 42を貼り付ける。更に、所定のサイズとなる様 に打ち抜き等によりチップ状にし、接着シート 41 'を備えたチップ状のコア材料 42'を 得る。
[0092] 次に、前記実施の形態 6と同様にして、接着シート 12·41 'を介してコア材料 42'及 び半導体素子 13を順次積層して仮固着する。
[0093] 更に、ワイヤーボンディング工程、封止工程、必要に応じて後硬化工程を行い、本 実施の形態に係る半導体装置を得ることができる。
[0094] (その他の事項）
以上の説明に於いては、本発明の最も好適な実施態様について説明した。しかし
、本発明は当該実施態様に限定されるものではなぐ本発明の特許請求の範囲に記 載された技術的思想と実質的に同一の範囲で種々の変更が可能である。
[0095] 即ち、前記基板等上に半導体素子を 3次元実装する場合、半導体素子の回路が 形成される面側には、ノ ッファーコート膜が形成されていてもよい。当該バッファーコ ート膜としては、例えば窒化珪素膜やポリイミド榭脂等の耐熱樹脂からなるものが挙 げられる。
[0096] また、半導体素子の 3次元実装の際に、各段で使用される接着シートは同一組成 力 なるものに限定されるものではなぐ製造条件や用途等に応じて適宜変更可能 である。
[0097] また、前記実施の形態に於いて述べた積層方法は例示的に述べたものであって、 必要に応じて適宜変更が可能である。例えば、前記実施の形態 2に係る半導体装置 の製造方法に於いては、 2段目以降の半導体素子を前記実施の形態 3に於いて述 ベた積層方法で積層することも可能である。
[0098] また、前記実施の形態に於いては、基板等に複数の半導体素子を積層させた後に 、一括してワイヤーボンディング工程を行う態様について述べた力 本発明はこれに 限定されるものではない。例えば、半導体素子を基板等の上に積層する度にワイヤ 一ボンディング工程を行うことも可能である。
実施例
[0099] 以下に、この発明の好適な実施例を例示的に詳しく説明する。但し、この実施例に 記載されている材料や配合量等は、特に限定的な記載がない限りは、この発明の範 囲をそれらのみに限定する趣旨のものではなぐ単なる説明例に過ぎない。また各例 中、部及び％は特記がない限りいずれも重量基準である。
[0100] (実施例 1)
アクリル酸ェチルーメチルメタタリレートを主成分とするアクリル酸エステル系ポリマ 一 (根上工業 (株)製、ノ クロン W— 197CM) 100部に対して、多官能イソシァネー ト系架橋剤 3部、エポキシ榭脂（ジャパンエポキシレジン (株)製、ェピコート 1004) 23 部、フエノール榭脂（三井化学 (株)製、ミレックス X LC-LL) 6部をメチルェチルケ トンに溶解させ、濃度 20%の接着剤組成物の溶液を調製した。
[0101] この接着剤組成物の溶液を、剥離ライナーとしてシリコーン離型処理したポリエチレ ンテレフタレートフィルム（厚さ 50 μ m)力もなる離型処理フィルム上に塗布した。更に 、 120°Cで 3分間乾燥させたことにより、厚さ 25 mの本実施例 1に係る接着シートを 作製した。
[0102] (実施例 2)
本実施例 2に於いては、実施例 1で使用したアクリル酸エステル系ポリマーに替え て、ブチルアタリレートを主成分としたポリマー (根上工業 (株)製、パラクロン SN— 71 0)を用いた以外は、前記実施例 1と同様にして、本実施例 2に係る接着シート (厚さ 2 5 m)を作製した。
[0103] (比較例 1)
アクリル酸ェチルーメチルメタタリレートを主成分とするアクリル酸エステル系ポリマ 一 (根上工業 (株)製、ノ ラクロン W— 197CM) 100部に対して、エポキシ榭脂（ジャ パンエポキシレジン (株)製、ェピコート 1004) 23部、フエノール榭脂（三井ィ匕学 (株） 製、ミレックス XLC— LL) 6部をメチルェチルケトンに溶解させ、濃度 20%の接着剤 組成物の溶液を調整した。
[0104] この接着剤組成物の溶液を、剥離ライナーとしてシリコーン離型処理したポリエチレ ンテレフタレートフィルム（厚さ 50 μ m)力もなる離型処理フィルム上に塗布した。更に 、 120°Cで 3分間乾燥させたことにより、比較例 1に係る接着シート (厚さ 25 /z m)を作 製した。
[0105] (比較例 2)
比較例 2に於いては、前記比較例 1にて使用したアクリル酸エステル系ポリマーに 替えて、ブチルアタリレートを主成分としたポリマー (根上工業 (株)製、パラクロン SN
— 710)を用いた以外は、比較例 1と同様にして、比較例 2に係る接着シート (厚さ 25 m)を作製した。
[0106] 〔貯蔵弾性率測定〕
前記実施例及び比較例に於いて作製した接着シートについて、硬化前の貯蔵弾 性率を以下の通り測定した。
[0107] 測定装置は、動的粘弾性測定装置 (RSAn、Reometric Scientific 社製）を用 いて測定される。測定条件は、シートを縦 10mm X横 5mmに切断し、引張モードで
、一定の周波数（10Hz)で、温度を 10°CZ分で昇温させ、 30〜280°Cでの測定を 行 、、その 80〜250°Cでの貯蔵弾性率を決定した。
[0108] それらの結果を下記表 1に示す。
[0109] [表 1]
Figure imgf000021_0001
[0110] 表 1に示す様に、実施例 1及び 2に係る接着シートは、何れの熱板温度に於いても 、 1. OMPa以上の貯蔵弾性率を示した。その一方、比較例 1及び 2に係る接着シート の剪断接着力は、 0. 2MPa以下であった。尚、比較例 1及び 2に於ける 100〜250 °Cでの貯蔵弾性率は、測定限界 (0. IMPa)より小さかった。
[0111] 〔ワイヤーボンディング性〕
実施例及び比較例の接着シートを用い、半導体素子とリードフレーム、基板、半導 体素子を用いた場合のワイヤーボンディング性を評価した。
[0112] 先ず、基板、リードフレーム及び半導体素子について各種試料を作製した。
[0113] 即ち、基板（UniMicron Technology Corporation 製、商品面： FTBGA16 X16 (2216— 001A01) )の場合に於いては、得られた接着シートをセパレーターか ら剥離した後、 6mm口に切断したものを用いた。一方、アルミ蒸着ウェハをダイシン グして、縦 6mm X横 6mm X厚さ 100 /z mのチップを作製した。このチップを、基板 にダイアタッチして試験片を作製した。ダイアタッチは、 120°Cの温度下で荷重 (0. 2 5MPa)をかけ、 1秒間加熱するという条件下で、ダイボンダ一（(株)新川製 SPA— 3 00)を用いて行った。
[0114] また、リードフレーム (新光電気株式会社製、品名 CA— F313 (MF202) )の場合 に於いては、接着シートをセパレーター力 剥離した後、 7. 5mm口に切断したもの を用いた。一方、アルミ蒸着ウェハをダイシングして、縦 7. 5mm X横 7. 5mm X厚さ 100 /z mのチップを作製した。このチップを、基板にダイアタッチして試験片を作製し た。ダイアタッチは、基板の場合と同様の条件で行った。
[0115] また、半導体素子の場合に於いては、得られた接着シートをセパレーター力も剥離 した後、 6mm口に切断したものを用いた。リードフレーム (新光電気株式会社製、品 名 CA—F313 (MF202) )のダイパッドに、評価用モデルパターンが形成された評 価用素子（フェニックス 'セミコンダクタ一（株）製 型番： NT— 103 パシベーシヨン 層 Si N Z5000 A厚み）を縦 6mm X横 6mm X厚さ 100 /z mにダイシングしたもの
3 4
をダイアタッチした。この評価用素子を第 1の半導体素子とする。次に、前記接着シ ートを 5mm口に切断したものを用い、アルミ蒸着ウェハから縦 5mm X横 5mm X厚さ 100 μ mにダイシングしたチップを前記評価用素子の上にダイアタッチして試験片を 作製した。このチップを第 2の半導体素子とする。尚、各試料はそれぞれ 20個ずつ 作製した。
[0116] 次に、各種試料について、超音波熱圧着法によりワイヤーボンド用金線 (直径 25 m)をボンディングした。試料 1個当たりのワイヤーボンド数は 80点とした。ワイヤーボ ンデイング条件は、超音波出力時間 10ms、超音波出力 120、ボンド荷重 980mN、 ステージ温度は 80°C、 175°C、 250°Cとした。また、ワイヤーボンディング装置として は、 UTC— 300 ( (株)新川製)を使用した。また、ワイヤーポンド成功率の評価は、テ ンシヨンゲージによるプル強度評価で 5g以上とした場合を成功とした。尚、ダイァタツ チ後に試料の加熱工程は行っていない。また、半導体素子の場合に於いては、第 2 の半導体素子とリードフレームとの間でワイヤーボンドを施した。
[0117] それらの結果を下記表 2に示す。
[0118] [表 2]
Figure imgf000023_0001
[0119] 表 2に示す様に、実施例 1及び 2に係る接着シートについては、何れの熱板温度に 於いても成功率 100%であった。その一方、比較例 1及び 2に係る接着シートについ ては、 0%であった。実施例 1及び 2に係る接着シートについての成功率が 100%だ つたのは、各々十分な貯蔵弾性率を有して 、たことによりチップずれが生じな力つた 為である。

Claims

請求の範囲
[1] 半導体素子を被着体上に接着シートを介して仮固着する仮固着工程と、
加熱工程を経ることなぐ接合温度 80〜250°Cの範囲でワイヤーボンディングをす るワイヤーボンディング工程とを有し、
前記接着シートとして、硬化前の貯蔵弾性率が 80〜250°Cの温度範囲で IMPa以 上、又はその温度範囲内の任意の温度に於いて IMPa以上のものを使用することを 特徴とする半導体装置の製造方法。
[2] 前記請求項 1に記載の半導体装置の製造方法であって、
前記被着体は、基板、リードフレーム又は半導体素子であることを特徴とする半導 体装置の製造方法。
[3] 前記請求項 1又は 2に記載の半導体装置の製造方法であって、
前記半導体素子を封止榭脂により封止する封止工程と、
前記封止榭脂の後硬化を行う後硬化工程とを含み、
前記封止工程及び Z又は後硬化工程に於いて、加熱により封止榭脂を硬化させる と共に、前記接着シートを介して半導体素子と被着体とを固着させることを特徴とする 半導体装置の製造方法。
[4] 前記請求項 1〜3の何れか 1項に記載の半導体装置の製造方法であって、
前記接着シートとして、熱可塑性榭脂を含むものを使用することを特徴とする半導 体装置の製造方法。
[5] 前記請求項 1〜3の何れか 1項に記載の半導体装置の製造方法であって、
前記接着シートとして、熱硬化性榭脂と熱可塑性榭脂の双方を含むものを使用す ることを特徴とする半導体装置の製造方法。
[6] 前記請求項 4又は 5に記載の半導体装置の製造方法であって、
前記熱可塑性榭脂として、アクリル榭脂を使用することを特徴とする半導体装置の 製造方法。
[7] 前記請求項 5に記載の半導体装置の製造方法であって、
前記熱硬化性榭脂として、エポキシ榭脂及び Z又はフ ノール榭脂を使用すること を特徴とする半導体装置の製造方法。
[8] 前記請求項 4〜7の何れか 1項に記載の半導体装置の製造方法であって、 前記接着シートとして、架橋剤が添加されているものを使用することを特徴とする半 導体装置の製造方法。
[9] 半導体装置の製造に用いられる接着シートであって、硬化前の貯蔵弾性率が 80〜 250°Cの温度範囲で IMPa以上、又はその温度範囲内の任意の温度に於いて 1M Pa以上であることを特徴とする接着シート。
[10] 前記請求項 9に記載の接着シートであって、
前記接着シートは熱可塑性榭脂を含むことを特徴とする接着シート。
[11] 前記請求項 9に記載の接着シートであって、
前記接着シートは熱硬化性榭脂と熱可塑性榭脂の双方を含むことを特徴とする接 着シート。
[12] 前記請求項 10又は 11に記載の接着シートであって、
前記熱可塑性榭脂はアクリル榭脂であることを特徴とする接着シート。
[13] 前記請求項 11に記載の接着シートであって、
前記熱硬化性榭脂はエポキシ榭脂及び Z又はフエノール榭脂であることを特徴と する接着シート。
[14] 前記請求項 9〜13の何れか 1項に記載の接着シートであって、
前記接着シートには架橋剤が添加されていることを特徴とする接着シート。
[15] 前記請求項 1〜8の何れか 1項に記載の半導体装置の製造方法により得られたも のであることを特徴とする半導体装置。
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