WO2004097948A1 - Dispositif luminescent et procede de fabrication associe - Google Patents

Dispositif luminescent et procede de fabrication associe Download PDF

Info

Publication number
WO2004097948A1
WO2004097948A1 PCT/JP2004/004420 JP2004004420W WO2004097948A1 WO 2004097948 A1 WO2004097948 A1 WO 2004097948A1 JP 2004004420 W JP2004004420 W JP 2004004420W WO 2004097948 A1 WO2004097948 A1 WO 2004097948A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
light
light emitting
metal layer
semiconductor layer
Prior art date
Application number
PCT/JP2004/004420
Other languages
English (en)
Japanese (ja)
Inventor
Kazunori Hagimoto
Jyun Ikeda
Masanobu Takahashi
Masato Yamada
Original Assignee
Shin-Etsu Handotai Co. Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin-Etsu Handotai Co. Ltd. filed Critical Shin-Etsu Handotai Co. Ltd.
Publication of WO2004097948A1 publication Critical patent/WO2004097948A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0093—Wafer bonding; Removal of the growth substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/387—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer

Definitions

  • Light emitting device and method for manufacturing light emitting device are Light emitting device and method for manufacturing light emitting device
  • the present invention relates to a light emitting device and a method for manufacturing the same.
  • a light-emitting device in which the light-emitting layer is formed of AlGaInP mixed crystal has a thin AlGaInP (or GaInP) active layer and an n-type with a larger band gap.
  • Such an A1GaInP double heterostructure is formed on the GaAs single crystal substrate by utilizing the fact that the A1GaInP mixed crystal lattice-matches with GaAs.
  • Each layer composed of nP mixed crystals can be formed by epitaxial growth.
  • a GaAs single crystal substrate is often used as it is as an element substrate.
  • the Al Ga InP mixed crystal that constitutes the light emitting layer has a larger band gap than GaAs, so that the emitted light is absorbed by the GaAs substrate, making it difficult to obtain sufficient light extraction efficiency. There is.
  • the contact metal layer in order to join the reflective Au layer to the light emitting layer while ensuring conduction, the contact metal layer must be interposed between the Au layer and the light emitting layer to ensure ohmic contact. Need to be inserted. Specifically, after a contact metal layer is formed on the light emitting layer by vapor deposition or the like, an alloying heat treatment is performed to reduce the contact resistance. For example, when the light extraction surface of the light emitting element is on the P-type layer side of the light-emitting layer portion, the Au layer is connected to the n-type layer side of the light-emitting layer portion.
  • the light-emitting layer is made of a III-V compound semiconductor such as A 1 G a In P
  • a Ge germanium
  • the contact metal layer is usually used as the contact metal layer to make ohmic contact with the n-type layer. ) Is compounded.
  • JP-A-7-66455 or JP-A-2001-339100 when Ge is blended in the contact metal layer, the Ge from the contact metal layer is formed when the alloying heat treatment is performed. Is directly diffused into the cladding layer forming the light emitting layer. Since this cladding layer is usually thin, the effect of Ge diffusion tends to extend to the non-doped active layer beyond the cladding layer, and there is a problem that the light emission intensity is greatly reduced.
  • An object of the present invention is to provide a light-emitting element in which an element substrate is bonded to a light-emitting layer portion via a contact metal layer and a reflective metal layer, even if a heat treatment for alloying the contact metal layer is performed.
  • a light-emitting element in which the influence of diffusion is less likely to reach the light-emitting layer portion, and by extension, the light-emitting capability of the light-emitting layer portion can be sufficiently obtained, and a method of manufacturing the same. Is to do. Disclosure of the invention
  • the light emitting device of the present invention is:
  • the first main surface of the compound semiconductor layer having the light emitting layer portion is a light extraction surface, and the compound semiconductor layer has a reflection surface on the second main surface side for reflecting light from the light emitting layer portion to the light extraction surface side.
  • a contact metal layer is disposed between the compound semiconductor layer and the main metal layer in order to reduce contact resistance between the main metal layer and the compound semiconductor layer.
  • the portion located between the light emitting layer and the light emitting layer has the property of transmitting light emitted from the light emitting layer, and suppresses the diffusion of components from the contact metal layer to the light emitting layer from the contact metal layer.
  • a diffusion block semiconductor layer According to the light emitting device of the present invention, the portion of the compound semiconductor layer located between the contact metal layer and the light emitting layer suppresses component diffusion from the contact metal layer to the light emitting layer from the contact metal layer. This is a diffusion block semiconductor layer.
  • the diffusion blocking semiconductor layer has a light-transmitting property with respect to the luminous flux emitted from the light emitting layer portion, there is no fear that the luminous flux involved in reflection is attenuated by absorption in the diffusion blocking semiconductor layer. Therefore, the light emitting ability of the light emitting layer portion can be sufficiently brought out, the light extraction efficiency by the reflection effect of the main metal layer can be improved, and a light emitting element with significantly improved light emission intensity can be realized.
  • the first main surface of the compound semiconductor layer having the light emitting layer portion is defined as a light extraction surface, and light from the light emitting layer portion is formed on the second main surface side of the compound semiconductor layer via the contact metal layer.
  • a main metal layer with a reflective surface that reflects light is arranged, and the element substrate is connected via the main metal layer.
  • a compound semiconductor layer comprising: a light emitting layer portion; and a diffusion block semiconductor layer that is disposed on the second main surface side of the light emitting layer portion and that suppresses component diffusion from the contact metal layer to the light emitting layer portion.
  • Forming a main metal layer on at least one of the main surface of the diffusion block semiconductor layer on which the contact metal layer is formed and the main surface of the element substrate, and bonding the element substrate and the compound semiconductor layer via the main metal layer It is characterized by the following.
  • a diffusion block semiconductor layer is formed on the second main surface side of the compound semiconductor layer having the light emitting layer portion, and the second main surface of the diffusion block semiconductor layer is further formed.
  • a contact metal layer is formed on the side, and alloying heat treatment for alloying the contact metal layer and the diffusion block semiconductor layer is performed. Accordingly, the diffusion of the component from the contact metal layer to the light emitting layer due to the alloying heat treatment is prevented by the diffusion blocking semiconductor layer, and the influence of the diffusion hardly reaches the light emitting layer.
  • the semiconductor layer for the diffusion block has a light-transmitting property with respect to the luminous flux from the light-emitting layer portion, there is no fear that the luminous flux involved in the reflection is attenuated by absorption in the semiconductor layer for the diffusion block. . Therefore, the light emitting ability of the light emitting layer portion can be sufficiently brought out, the light extraction efficiency by the reflection effect of the main metal layer is improved, and a light emitting element with significantly improved light emission intensity can be manufactured. it can.
  • the light emitting layer portion can be configured as having a double hetero structure in which an active layer is sandwiched between two cladding layers having different conductivity types, and a diffusion block semiconductor layer is disposed in contact with the other cladding layer.
  • the active layer having a double hetero structure is usually non-doped in order to improve the probability of radiative recombination.
  • the luminous efficiency is particularly likely to decrease due to the diffusion of these components (particularly, dopant components for forming ohmic contacts). Therefore, it is one of the structures particularly effective to provide a diffusion blocking semiconductor layer to suppress diffusion to the light emitting layer portion.
  • the doping concentration of the cladding layer is set to be relatively low so that the dopant diffusion into the active layer does not excessively proceed.
  • the thickness of the cladding layer is desirably set to be as small as possible to reduce the increase in series resistance.However, the component diffusion distance from the contact layer to the light-emitting layer through the cladding layer is shortened. More susceptible to component diffusion. Therefore, the provision of the diffusion block semiconductor layer as in the present invention has a more remarkable effect when the thickness of the cladding layer is small (for example, 0.3111 or more and less than 2111).
  • the thickness of the diffusion block semiconductor layer is desirably 1 / zm or more and 5 im or less. If the thickness of the diffusion block semiconductor layer is less than 1 ⁇ , the effect of hindering component diffusion from the contact layer to the light emitting layer portion becomes insufficient. On the other hand, when the thickness of the semiconductor layer for the diffusion block exceeds 5 ⁇ m, the effect is saturated, and the unnecessary growth of the unnecessarily thick diffusion block semiconductor layer by epitaxy increases.
  • the light-emitting layer is made of a group III-V compound semiconductor such as A1GaInP, Ge, Au, Ni, Zn, and Be contained in the contact metal layer are particularly light-emitting layer parts. Therefore, it is preferable that the diffusion block semiconductor layer is configured to suppress at least any one of these diffusions.
  • the light emitting device of the present invention can be configured as follows. That is, the diffusion block semiconductor layer is composed of an n-type III-V compound semiconductor, the light-emitting layer is composed of a III-V compound semiconductor lattice-matched with the diffusion block semiconductor layer, and The n-type layer side is disposed so as to be located on the diffusion block semiconductor layer side.
  • the contact metal layer may be composed of an alloy containing Ge. This is advantageous in forming good ohmic contact with the n-type III-V compound semiconductor.
  • the diffusion-blocking semiconductor layer suppresses Ge diffusion from the contact metal layer to the light-emitting layer, Ge diffusion to the light-emitting layer can be prevented. A decrease in luminous efficiency of the layer portion can be effectively suppressed.
  • the light emitting device of the present invention can be configured as follows. . That is, the diffusion block semiconductor layer is composed of a p-type III-V compound semiconductor, the light emitting layer is composed of a III-V compound semiconductor lattice-matched to the diffusion block semiconductor layer, and It is arranged so that the p-type layer side is located on the diffusion block semiconductor layer side.
  • the contact metal layer should be formed of an alloy containing Be, which is advantageous for forming a good ohmic contact with a P- type III_v compound semiconductor.
  • the semiconductor layer for the diffusion block is provided between the contact metal layer and the light emitting layer.
  • the light-emitting layer portion is configured to have a double heterostructure composed of A 1 GaInP, and one of the (n-type or!)-Type cladding layers has a semiconductor for a diffusion block.
  • the effect is particularly remarkable when the layers are arranged adjacent to each other.
  • the light-emitting layer portion composed of AlGaInP is generally grown by MOVPE (Metal-Organic Vapor Phase Epitaxy), but has few crystal defects.
  • the cladding layer is usually formed in a considerably thin film of not less than 0.3 ⁇ and not more than 2 ⁇ .
  • the diffusion rate of the Al Ga I 11? 0 6 ( n -type contact) there have medium is B e (for p-type contact), in the 660 ° C below the temperature range 350 ° C or higher to carry out the alloying heat treatment Relatively large. Therefore, a contact metal layer containing Ge or Be is directly formed on the n-type cladding layer made of A 1 Ga InP as described above.
  • the diffusion of Ge or Be into the A 1 G a InP active layer is particularly easy to occur, and the emission intensity is easily lowered.
  • a diffusion block semiconductor layer between the mold cladding layer and the mold cladding layer, such a problem can be effectively prevented or suppressed.
  • the semiconductor layer for the diffusion block is composed of 1 && 3 or 1 InP
  • the diffusion speed of Ge or Be is lower than A1GaInP, and the A1GaInP light emitting layer. Since the band gap is wider than that of the part, the transmissivity to the emitted light beam is good, and it can be suitably used in the present invention.
  • the contact metal layer for the n-type III-V group f semiconductor compound layer it is easy to achieve both the ease of alloying and the effect of reducing the contact resistance.
  • An AuGeNi alloy containing Ni and Ni, or an AgGeNi alloy containing Ag and Ge and Ni as main components can be effectively employed in the present invention.
  • the specific composition of the Au Ge Ni alloy or the Ag Ge Ni alloy is, for example, Ge: 0.1% by mass to 25% by mass, Ni: 0.1% by mass to 20% by mass, The composition of the remaining Au or Ag can be exemplified. If the composition is out of this range, the effect of reducing the contact resistance may not be sufficiently obtained.
  • Ni and Au (only in the case of AuGeNi alloy) easily diffuse into the light emitting layer, and the diffusion blocking semiconductor layer is assumed to block the diffusion of Ni or Au together with Ge. It is desirable to configure.
  • the aforementioned semiconductor layer for a diffusion block composed of A 1 Ga As or A 1 In P is excellent in the effect of blocking the diffusion of Au and Ni together with Ge, and can be suitably employed in the present invention. .
  • an AuBe alloy containing Au as a main component and containing Be as the contact metal layer for the p-type III-V compound semiconductor layer is used. It can be effectively adopted in the present invention.
  • the specific composition of the p-type III-V compound semiconductor layer alloy is, for example, Be: 0.1% by mass or more 25 A composition in which the content is Au or Ag and the balance is Au or Ag can be exemplified. If the composition is out of this range, the effect of reducing the contact resistance may not be sufficiently obtained.
  • the diffusion blocking semiconductor layer be configured to block the diffusion of Au together with Be.
  • the diffusion block semiconductor layer made of A1GaAs or A1InP described above has an excellent effect of blocking Au diffusion together with Be, and can be suitably employed in the present invention.
  • the part of the main metal layer forming the reflection surface can be an Au-based reflection layer containing Au as a main component.
  • the Au-based reflective layer has the advantages of high reflectivity and low dependence of the reflectivity on the incident angle.
  • the light emitting layer preferably emits visible light having a peak wavelength of 550 nm or more.
  • Figure 6 shows the wavelength dependence of the reflectivity of the Au layer (plot point “ ⁇ ”). It can be seen that there is strong absorption in the visible light region on the shorter wavelength side than the wavelength of 550 nm. Therefore, by setting the peak wavelength of the light emitting layer to 550 nm or more, it is possible to effectively suppress a decrease in reflectance and improve the light emission intensity. In addition, there is no problem in that the extracted light spectrum becomes different from the original light emission spectrum due to absorption or the light emission color tone changes. From this viewpoint, desirable color tone and peak wavelength range of light emission of the light emitting layer are as follows.
  • the reflectance is further improved and the light emission intensity can be increased.
  • the light-emitting layer is of yellow, amber, orange or red
  • the reflectance of the Au-based layer is particularly increased. And the effect of improving the light emission intensity becomes remarkable.
  • a light beam having such a color tone can be easily realized by adjusting the mixed crystal ratio of A 1 Ga InP described above.
  • the contact metal layer be made of, for example, an AuGeNi alloy in order to enhance the adhesion between the Au-based reflective layer and the contact metal layer.
  • the portion of the main metal layer that forms the reflection surface can be an A1-based reflection layer containing A1 as a main component.
  • Figure 6 also shows the wavelength dependence of the reflectance of the A1 layer (plot point “ ⁇ ”), but in the case of A1, even in the visible light range below 550 nm, strong absorption like Au is observed. However, it is much cheaper than Au, and can be suitably used in the present invention as a general-purpose reflective layer. In particular, in the emission wavelength range from blue to green with a wavelength of 400 nm or more and 550 nm or less, the reflectance is better than that of Au, which also contributes to the improvement of light extraction efficiency.
  • the contact metal layer for example, either an AuGeNi alloy or an AgGeNi alloy can be adopted, and there is no significant difference in adhesion between the contact metal layer and the A1-based reflective layer.
  • the peak wavelength of the light emitting layer is 400 nm or more and 550 nm or less, it is more advantageous to use an AgGeNi alloy with low absorption.
  • the portion of the main metal layer forming the reflection surface may be an Ag-based reflection layer containing Ag as a main component.
  • Ag-based reflective layers are less expensive than Au-based reflective layers, and exhibit better reflectivity than Au-based metals over almost the entire visible wavelength range (350 nm to 700 nm).
  • the wavelength dependence of the reflectance is small.
  • high light extraction efficiency can be realized regardless of the emission wavelength of the element.
  • a decrease in the reflectance due to the formation of an oxide film and the like is less likely to occur.
  • the plot point “garden” in FIG. 6 shows the wavelength dependence of the reflectance of Ag.
  • the plot point “X” is the Ag PdCu alloy.
  • the reflectivity of visible light is particularly good when the reflectivity of Ag is 350 nm or more and 700 nm or less (and in the infrared region on the longer wavelength side), particularly, 380 nm or more and 700 nm or less. Naturally, blue with a peak wavelength of 400 nm or more and 550 nm or less Good reflectance can be obtained even in a color to green emission wavelength range.
  • the reflectance in the visible light range is slightly lower (for example, 8 5 to 92%).
  • the Ag-based reflective film is less likely to form an oxide film than the A1-based reflective layer, a higher reflectance in the visible light region than A1 can be secured.
  • the light emitting layer having a blue-based peak wavelength may be, for example, an InGaA1N light-emitting layer.
  • an Ag-based reflective layer it is preferable to use an AgGeNi alloy for the contact metal layer because the adhesion to the Ag-based reflective layer is good and the present invention is suitable.
  • the contact metal layer disposed between the main metal layer and the semiconductor layer for the diffusion block be disposed in a dispersed manner on the main surface of the main metal layer.
  • the contact metal layer needs to be blended with a relatively large amount of an alloy component necessary for securing the ohmic junction, and has a slightly lower reflectivity because it involves alloying with the diffusion blocking semiconductor layer. Therefore, if the contact metal layer is dispersedly formed on the main surface of the main metal layer, a high reflectance can be secured in the non-formed region of the contact metal layer.
  • the formation area ratio of the contact metal layer to the main metal layer is 1%.
  • the content be at least 25%.
  • Contact metal layer formation area ratio is 1. /. If it is less than 25%, the effect of reducing the contact resistance will not be sufficient, and if it exceeds 25%, the reflection intensity will decrease.
  • FIG. 1 is a schematic diagram showing a light emitting device according to an embodiment of the present invention in a laminated structure.
  • FIG. 2 is an explanatory view showing an example of the manufacturing process of the light emitting device according to the present invention.
  • FIG. 3 is a schematic diagram showing a first modification of the light emitting device of the present invention in a laminated structure.
  • FIG. 4 is a schematic diagram showing a second modification of the light emitting device of the present invention in a laminated structure.
  • FIG. 5 is a schematic diagram showing a third modification of the light emitting device of the present invention in a laminated structure.
  • FIG. 6 is a diagram showing reflection spectra of various metals.
  • FIG. 7 is a schematic diagram showing a fourth modification of the light emitting device of the present invention in a laminated structure.
  • FIG. 8 is a view showing diffusion profiles of Ge, Au, and Ni into an A 1 GaAs substrate.
  • FIG. 1 is a conceptual diagram showing a light emitting device 100 according to one embodiment of the present invention.
  • the light-emitting element 100 is formed on the one main surface of an Si substrate 7 made of n-type Si (silicon) single crystal, which is a conductive substrate serving as an element substrate, via a main metal layer 10 via a light-emitting layer. It has a structure in which the compound semiconductor layer 60 including the portion 24 is bonded.
  • the main metal layer 10 is configured as an Au-based layer in which the entire reflecting surface 10 R is mainly composed of Au (a component having the highest mass content), and is formed on the light emitting layer portion 24 (compound semiconductor layer).
  • the first Au-based layer 10a and the second Au-based layer 10b formed on the Si substrate 7 are bonded by a bonding heat treatment.
  • the first Au-based layer 10a and the second Au-based layer 10b are made of pure Au or 11 alloy having an Au content of 95% by mass or more.
  • Emitting layer portion 24 A 1 G a I n P specifically, undoped (A 1 X G a x) y I ni - y P ( However, 0 ⁇ x ⁇ 0. 5 5, 0. 4 5 ⁇ an active layer 5 consisting of y ⁇ 0. .5 5) mixed crystal, the first-conductivity-type cladding layer, p-type in this embodiment (a l z G ai - z ) y I ⁇ ⁇ _ y P ( where x ⁇ z ⁇ l), a p-type cladding layer 6, and a second conductivity type cladding layer different from the first conductivity type cladding layer.
  • the emission wavelength is changed from green to red region (emission wavelength (peak (Emission wavelength) from 550 nm to 670 nm).
  • All of the A 1 Gain Ps constituting the light emitting layer portion 24 are lattice-matched with Ga As (with a difference in lattice constant of 1% or less).
  • the p-type A 1 G a I An nP cladding layer 6 is arranged, and an n-type A 1 G aI nP cladding layer 4 is arranged on the metal layer 10 side. Therefore, the current-carrying polarity is positive on the metal electrode 9 side.
  • “non-doped” means “does not actively add dopant”, and contains a dopant component that is unavoidably mixed in a normal production process (for example, 10 13 to 10 3 ). 10 16 / cni 3 is the upper limit).
  • a current diffusion layer 20 made of AlGaAs is formed on the main surface of the light-emitting layer portion 24 opposite to the surface facing the substrate 7, and the light-emitting layer portion is formed substantially at the center of the main surface.
  • a metal electrode (for example, an Au electrode) 9 for applying a light emission drive voltage to 24 is formed so as to cover a part of the main surface.
  • the area around the metal electrode 9 on the main surface of the current diffusion layer 20 forms a light extraction area from the light emitting layer section 24.
  • a metal electrode (back electrode: for example, an Au electrode) 15 is formed so as to cover the entire surface.
  • an Au Sb bonding layer 16 is interposed between the metal electrode 15 and the Si single crystal substrate 7 as a substrate-side bonding layer.
  • an Au Sn bonding layer may be used as the substrate-side bonding layer.
  • a contact metal layer 32 is disposed between the compound semiconductor layer 60 and the main metal layer 10 in order to reduce the contact resistance between the main metal layer 10 and the compound semiconductor layer 60.
  • a portion of the compound semiconductor layer 60 located between the contact metal layer 32 and the light emitting layer portion 24 has a property of transmitting light emitted from the light emitting layer portion 24 and has a contact metal property.
  • the diffusion blocking semiconductor layer 25 suppresses component diffusion from the layer 32 to the light emitting layer portion 24.
  • the contact metal layer 32 is an AuGeN i layer 32 (for example, Ge: 15% by mass, Ni: 10% by mass), It is dispersed and formed, and its formation area ratio is 1% or more and 25% or less.
  • the diffusion blocking semiconductor layer 25 is lattice-matched to Al GaAs, specifically, the n-type cladding layer 4 (within 1% difference in lattice constant), and has a wider band gap than the active layer 5. So that the Al As mixed crystal ratio a of Al a G ai — a As is 0.4 It consists of A 1 G a As adjusted to 1 or more.
  • the thickness t of the diffusion block semiconductor layer 25 is 1 or more and 5 ⁇ or less.
  • the light from the light emitting layer portion 24 is extracted in such a manner that the light reflected directly by the main metal layer 10 is superimposed on the light directly emitted to the light extraction surface side.
  • the thickness of the main metal layer 10 is desirably 80 nm or more in order to ensure a sufficient reflection effect. There is no particular upper limit on the thickness, but the reflection effect is saturated, so the thickness is appropriately determined in consideration of cost (for example, 1 ⁇ or less).
  • a p-type GaAs buffer layer 2 is formed on a main surface of a GaAs single crystal substrate 1 which is a semiconductor single crystal substrate forming a substrate for emitting a light emitting layer.
  • the release layer 3 made of 5A1As is grown to 0.5 m, for example, and the current spreading layer 20 made of p-type AlGaAs is grown to 5 m, for example, in this order.
  • a 1 ⁇ p-type A 1 G a In P clad layer 6 an 0.6 ⁇ m / z A 1 G a In P active layer (non-doped) 5, and 1 ⁇ m
  • the n-type A1GaInP clad layer 4 of m and the diffusion block semiconductor layer 25 of 5 ⁇ of A1GaAs are epitaxially grown in this order. Epitaxial growth of each of these layers can be performed by a known MOVPE method.
  • the following material gases can be used as the source gas for the components of Al, Ga, In, P and As.
  • A1 source gas Trimethyl aluminum (TMA 1), triethyl aluminum (TEA 1), etc.
  • Ga source gas Trimethylgallium (TMGa), triethylgallium (TEGa), etc.
  • In source gas Trimethinoleindium (TM In), Trietinoleindium (TE In), etc.
  • ⁇ P source gas tert-heptyl phosphine (TB P), phosphine (PH 3), etc.. •
  • a s source gas tertiary butyl arsine (TBA), such as arsine (A s H 3). The following can be used as the dopant gas.
  • Mg source bis cyclopentadienyl oxygenate - such as Le magnesium (C p 2 Mg).
  • Zn source dimethyl zinc (DMZn), getyl zinc (DEZn), etc.
  • Si i-hara Silicon hydride such as monosilane. .
  • an AuGeNi layer 32 is dispersedly formed on the main surface of the diffusion block semiconductor layer 25.
  • an alloying heat treatment is performed at a temperature in the range of 350 ° C to 500 ° C, and then the first Au-based layer 1 is formed so as to cover the AuGe Ni layer 32.
  • Form 0a An alloying layer is formed between the diffusion block semiconductor layer 25 and the AuGeNi layer 32 by the alloying heat treatment, and the series resistance is significantly reduced.
  • the diffusion block semiconductor layer 25 has a light-transmitting property with respect to the emitted light beam from the active layer 5, there is a concern that the light beam involved in reflection is attenuated by absorption in the diffusion block semiconductor layer 25. Absent. Therefore, the light emitting ability of the light emitting layer portion 24 can be sufficiently obtained, and the light extraction efficiency by the reflection effect of the main metal layer 10 can be improved.
  • Fig. 8 shows the diffusion of Au, Ge, and Ni in the depth direction when the A1GaAs substrate coated with the AuGeNi layer was heat-treated at 450 ° C for 10 minutes.
  • the profile shows the result of measurement by Secondary Ion Mass Spectrometry (SIMS).
  • SIMS Secondary Ion Mass Spectrometry
  • Au Sb bonding layers 31 and 16 serving as substrate-side bonding layers are provided on both main surfaces of the separately prepared Si single crystal substrate 7 (n-type).
  • An alloying heat treatment is performed in a temperature range of 250 ° C or more and 359 ° C or less.
  • a second Au-based layer 10 b is formed on the Au Sb bonding layer 31, and a back electrode layer 15 (for example, made of Au-based metal) is formed on the Au Sb bonding layer 16.
  • each metal layer can be formed by using sputtering or vacuum evaporation.
  • Step 4 the second Au-based layer 10b on the side of the Si single crystal substrate 7 is overlaid and pressed on the first Au-based layer 10a formed on the light emitting layer portion 24. Then, the bonded substrate is subjected to a bonding heat treatment at a temperature higher than 180 ° C. and 360 ° C. or less, for example, 250 ° C., to produce a bonded substrate 50.
  • the Si single crystal substrate 7 is bonded to the light emitting layer section 24 via the first Au-based layer 10a and the second Au-based layer 10b.
  • the first Au-based layer 10a and the second Au-based layer 10b are bonded with sufficient strength by employing the above-mentioned bonding heat treatment, and the Au Sb bonding layer 31 and the AuGeN-i layer are bonded. Together with 32, it becomes a metal layer 10 (FIG. 1). Since both the first Au-based layer 10a and the second Au-based layer 10b are mainly composed of Au which is hardly oxidized, the above-mentioned bonding heat treatment can be performed without any problem, for example, even in the air. Naturally, even during this bonding heat treatment, the power diffusion block semiconductor layer 25 is provided, which has a possibility that Ge, Au and Ni may diffuse from the contact metal layer 32 toward the light emitting layer portion 24. Is less likely to affect the light emitting layer 24.
  • the substrate bonded body 50 is immersed in an etching solution composed of, for example, a 10% hydrofluoric acid aqueous solution, and the A 1 As release layer 3 formed between the buffer layer 2 and the light emitting layer portion 24 is formed.
  • GaAs single crystal substrate 1 emission layer (Which is opaque to light from the part 24) is removed from the laminate 50a of the light emitting layer part 24 and the Si single crystal substrate 7 bonded thereto.
  • an etch stop layer made of A1InP is formed in place of the A1As release layer 3, and a first etchant (for example, ammonia Z).
  • a first etchant for example, ammonia Z
  • the GaAs single crystal substrate 1 is removed by etching together with the GaAs buffer layer 2 using a hydrogen oxide mixed solution, and then a second etching solution (for example, hydrochloric acid) having a selective etching property to AlInP. (Hydrofluoric acid may be added to remove the A1 oxide layer) to remove the etch stop layer.
  • Step 6 the wire bonding electrode 9 (bonding pad: FIG. 1) is placed so as to cover a part of the main surface of the current diffusion layer 20 exposed by removing the Ga As single crystal substrate 1. Form. Thereafter, a semiconductor chip is diced by a usual method, fixed to a support, wire-bonded to a lead wire and the like, and then sealed with a resin to obtain a final light emitting element.
  • the semiconductor layer 25 for the diffusion block is configured by n-type A 1 InP instead of n-type A 1 G a As. You can do it.
  • a 1 bI r is set so that lattice matching is performed with the n-type cladding layer 4 made of AlGaI nP (within a lattice constant difference of 1% or less) and the band gap is wider than the active layer 5.
  • ⁇ - the a 1 P mixed crystal ratio b of b P it is preferable to adjust the 0.5 or more and 1 or less.
  • the manufacturing method is substantially the same as the process of FIG. 2, except that the first Ag-based layer 10a and the second Au-based layer 10b are replaced with a second Ag-based layer 110a and a second Ag-based layer in step 2.
  • layer 110b Fig. 4
  • AuGeN i layer 3 instead of 2
  • an AgGeNi layer 13 2 (FIG. 4) is formed.
  • the alloying heat treatment temperature is, for example, 350 ° C. or more and 500 ° C. or less. Further, the heat treatment temperature for bonding the first Ag-based layer 110a and the second Ag-based layer 110b can be substantially the same as that of the Au-based metal layer.
  • the main metal layer 10 is formed such that a portion forming the reflection surface is formed of the Ag-based layer 30 (for example, a material containing 95% by mass or more of Ag: this embodiment). In this example, it is formed as pure Ag), and the remaining part is configured as an Au-based layer (10a, 1Ob).
  • the contact metal layer is composed of an AgGeNi layer 1332.
  • the manufacturing process is as follows.In FIG. 2, an AgGeNi layer 1332 (FIG. 4) is formed instead of the AuGeNi layer 32, and the Ag-based layer is first covered so as to cover this. After forming 30, a first Au-based layer 10 a is formed.
  • the layer forming the reflection surface is an A1-based layer containing A1 as a main component (for example, containing 95% or more of A1 by mass). Thing: In the present embodiment, pure A 1) may be formed.
  • a layer 225 is a p-type AIGaAs layer, and an AuBe layer 232 is formed as a contact metal layer.
  • the diffusion blocking semiconductor layer 225 functions to suppress Au or Be from the 86 layer 232 from diffusing to the p-type cladding layer 6 side. The same effect can be obtained when an AuZn layer is used instead of the AuBe layer 232.
  • any of the embodiments other than using the Si substrate as the element substrate, it is also possible to use another conductive substrate, for example, a metal substrate such as A 1 (including an alloy).

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

L'invention concerne un dispositif (100) luminescent, dans lequel une couche (32) métallique de contact est disposée entre une couche (60) à semi-conducteurs et une couche (10) métallique principale, de façon à réduire la résistance au contact entre la couche métallique (10) principale et la couche (60) à semi-conducteurs. Dans la couche (60) à semi-conducteurs, la région entre la couche (32) métallique de contact et la partie (24) de couche luminescente est transparente à la lumière émise par la partie (24) de la couche luminescente et cette région est utilisée en tant que couche (25) à semi-conducteurs de blocage de diffusion, de manière à supprimer la diffusion des composants de la couche (32) métallique de contact vers la partie (24) de couche luminescente. Si la couche (25) à semi-conducteurs de blocage de la diffusion est composée de AlGaAs, elle produit un effet de suppression de la diffusion de Ge, Ni et Au de la couche (32) métallique de contact sur la partie (24) de la couche luminescente. Ainsi, même si la couche de contact du dispositif luminescent, dans lequel le substrat d'un dispositif est ajouté à une partie de couche luminescente, par l'intermédiaire d'une couche métallique de contact et d'une couche métallique de réflexion, est soumise à un traitement thermique d'alliage, la diffusion des composants de la couche métallique de contact influencent la partie de la couche luminescente.
PCT/JP2004/004420 2003-04-28 2004-03-29 Dispositif luminescent et procede de fabrication associe WO2004097948A1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2003123379 2003-04-28
JP2003-123379 2003-04-28
JP2003155921A JP4140007B2 (ja) 2003-04-28 2003-05-30 発光素子及び発光素子の製造方法
JP2003-155921 2003-05-30

Publications (1)

Publication Number Publication Date
WO2004097948A1 true WO2004097948A1 (fr) 2004-11-11

Family

ID=33422061

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2004/004420 WO2004097948A1 (fr) 2003-04-28 2004-03-29 Dispositif luminescent et procede de fabrication associe

Country Status (3)

Country Link
JP (1) JP4140007B2 (fr)
TW (1) TW200505051A (fr)
WO (1) WO2004097948A1 (fr)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4731180B2 (ja) * 2005-02-21 2011-07-20 三洋電機株式会社 窒化物系半導体素子の製造方法
DE102005020908A1 (de) 2005-02-28 2006-08-31 Osram Opto Semiconductors Gmbh Beleuchtungsvorrichtung
US7244630B2 (en) * 2005-04-05 2007-07-17 Philips Lumileds Lighting Company, Llc A1InGaP LED having reduced temperature dependence
JP4935136B2 (ja) * 2006-03-22 2012-05-23 パナソニック株式会社 発光素子
JP2008288248A (ja) * 2007-05-15 2008-11-27 Hitachi Cable Ltd 半導体発光素子
JP5228595B2 (ja) * 2008-04-21 2013-07-03 ソニー株式会社 半導体発光素子及びその製造方法、並びに、積層構造体及びその形成方法
KR101543328B1 (ko) 2008-11-18 2015-08-11 삼성전자주식회사 발광 소자 및 발광 소자의 제조 방법
JP2010186829A (ja) * 2009-02-10 2010-08-26 Toshiba Corp 発光素子の製造方法
JP2011129724A (ja) * 2009-12-18 2011-06-30 Dowa Electronics Materials Co Ltd 半導体発光素子およびその製造方法
KR102075132B1 (ko) * 2013-06-03 2020-02-10 엘지이노텍 주식회사 발광소자
JP2014204095A (ja) * 2013-04-10 2014-10-27 信越半導体株式会社 半導体発光素子及びその製造方法
KR102045989B1 (ko) 2018-03-14 2019-11-18 한국과학기술연구원 상호 확산을 사용한 반도체 소자 및 이를 제조하는 방법

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06296040A (ja) * 1993-02-10 1994-10-21 Sharp Corp 発光ダイオードの製造方法
JPH06302857A (ja) * 1993-03-19 1994-10-28 Hewlett Packard Co <Hp> 発光ダイオードの製造方法
JPH0766455A (ja) * 1993-08-24 1995-03-10 Shin Etsu Handotai Co Ltd 半導体発光装置
JP2001339100A (ja) * 2000-05-30 2001-12-07 Shin Etsu Handotai Co Ltd 発光素子及びその製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06296040A (ja) * 1993-02-10 1994-10-21 Sharp Corp 発光ダイオードの製造方法
JPH06302857A (ja) * 1993-03-19 1994-10-28 Hewlett Packard Co <Hp> 発光ダイオードの製造方法
JPH0766455A (ja) * 1993-08-24 1995-03-10 Shin Etsu Handotai Co Ltd 半導体発光装置
JP2001339100A (ja) * 2000-05-30 2001-12-07 Shin Etsu Handotai Co Ltd 発光素子及びその製造方法

Also Published As

Publication number Publication date
JP4140007B2 (ja) 2008-08-27
JP2005019424A (ja) 2005-01-20
TWI318462B (fr) 2009-12-11
TW200505051A (en) 2005-02-01

Similar Documents

Publication Publication Date Title
RU2491683C2 (ru) Контакт для полупроводникового светоизлучающего устройства
JP2008288248A (ja) 半導体発光素子
JP5169012B2 (ja) 半導体発光素子
US8729598B2 (en) Light-emitting diode, method for manufacturing the same, and light-emitting diode lamp
JP5961358B2 (ja) 発光ダイオード及びその製造方法
US8643023B2 (en) Light emitting diode, light emitting diode lamp, and lighting apparatus
US20100258826A1 (en) Light emitting diode and method for manufacturing the same
US20050035355A1 (en) Semiconductor light emitting diode and semiconductor light emitting device
WO2007086366A1 (fr) Élément émetteur de lumière semi-conducteur au nitrure
JPH05251739A (ja) 半導体発光デバイス
JP2010098068A (ja) 発光ダイオード及びその製造方法、並びにランプ
JP5961359B2 (ja) 発光ダイオード及びその製造方法
JP4140007B2 (ja) 発光素子及び発光素子の製造方法
JP2004207508A (ja) 発光素子及びその製造方法
WO2011090112A1 (fr) Diode électroluminescente, lampe à diode électroluminescente et dispositif d&#39;éclairage
JP4121551B2 (ja) 発光素子の製造方法及び発光素子
JP2011142231A (ja) 半導体発光素子及びｌｅｄランプ、並びに半導体発光素子の製造方法
WO2013084867A1 (fr) Diode luminescente, et procédé de fabrication de celle-ci
JP4062111B2 (ja) 発光素子の製造方法
JP2005277218A (ja) 発光素子及びその製造方法
JP2005259912A (ja) 発光素子の製造方法
JP4918245B2 (ja) 発光ダイオード及びその製造方法
JP2004235505A (ja) 発光素子及び半導体素子用オーミック電極構造
WO2005038936A1 (fr) Dispositif emetteur de lumiere et son procede de fabrication
JP2005347714A (ja) 発光素子及びその製造方法

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): BW GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
122 Ep: pct application non-entry in european phase