WO2004079803A1 - 窒化物系半導体装置およびその製造方法 - Google Patents
窒化物系半導体装置およびその製造方法 Download PDFInfo
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- WO2004079803A1 WO2004079803A1 PCT/JP2004/001944 JP2004001944W WO2004079803A1 WO 2004079803 A1 WO2004079803 A1 WO 2004079803A1 JP 2004001944 W JP2004001944 W JP 2004001944W WO 2004079803 A1 WO2004079803 A1 WO 2004079803A1
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- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
- C30B29/403—AIII-nitrides
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
- C30B29/403—AIII-nitrides
- C30B29/406—Gallium nitride
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- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
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- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02395—Arsenides
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- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
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- H01L21/0242—Crystalline insulating materials
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02428—Structure
- H01L21/0243—Surface structure
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
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- H—ELECTRICITY
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02658—Pretreatments
- H01L21/02661—In-situ cleaning
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/906—Cleaning of wafer as interim step
Definitions
- the present invention relates to a nitride semiconductor device and a method of manufacturing the same.
- the present invention relates to a nitride-based semiconductor device such as a light-emitting device and a method for manufacturing the same, and more specifically to a high-quality nitride-based semiconductor device having excellent flatness and capable of being manufactured at a high yield, and a method for manufacturing the same.
- the heating temperature of the substrate has been set to be equal to or higher than the heating temperature of the substrate in a film forming process for subsequently growing an epitaxial film on the substrate ( Patent Documents JP-A-2000-174341, JP-A-2000-323752, etc.).
- Patent Documents JP-A-2000-174341, JP-A-2000-323752, etc. This is because the higher the heating temperature of the substrate in the pretreatment, the more the cleaning progresses. This is because the method was inherited.
- the substrate surface is cleaned by setting the heating temperature of the substrate in the pretreatment process to be equal to or higher than the heating temperature of the substrate in the film formation process. Can be.
- the nitride semiconductor has a high vapor pressure of nitrogen
- nitrogen or an atmosphere containing the same group 5B atom as nitrogen is used.
- an atmosphere it is general to use an atmosphere excluding a source gas containing a Group 3B element from atmospheric gases that enter into the film forming process. This is because nitrogen is desorbed or rinsed, so that the Group 3B element becomes excessive at the substrate surface, and the surface of the nitride-based semiconductor substrate tends to be uneven. That is, the atmosphere should not contain the above 3B element.
- nitrogen is prevented from being released from the substrate, so that irregularities due to the excessive deposition of the group 3B element are hardly generated on the substrate surface.
- the substrate is heated to a temperature higher than the heating temperature at the time of film formation in order to enhance the cleaning effect.
- the nitride-based semiconductor substrate is heated to a temperature higher than the heating temperature at the time of film formation, desorption of nitrogen from the substrate surface or decomposition of ammonia (NH 3 ) occurs violently.
- Optimizing gas supply conditions with vast options requires a great deal of effort.
- An object of the present invention is to provide a nitride-based semiconductor device capable of forming an epitaxial film having excellent flatness and crystallinity on a nitride-based semiconductor substrate, and a method for manufacturing the same.
- the method for manufacturing a nitride-based semiconductor device of the present invention is a method for manufacturing a nitride-based semiconductor device formed on a semi-substrate substrate of a compound containing a Group 3B element and nitrogen that forms a compound with nitrogen. is there.
- a semiconductor substrate is heated to a film forming temperature, a film forming gas containing both a source gas of a group 3B element and a source gas of nitrogen is supplied, and a group 3B element and a nitrogen gas are supplied onto the semiconductor substrate.
- the substrate is heated to a temperature lower than the substrate heating temperature in the film forming process to clean the substrate surface. Since the substrate heating temperature is relatively high in the process of growing an epitaxial film of a nitride-based semiconductor, it is possible to set a temperature at which a sufficient cleaning action can be ensured in the above-mentioned cleaning step. Therefore, good flatness can be secured on the substrate surface. As a result, The flatness of the epitaxial film formed on the plate surface also becomes excellent.
- the substrate heating temperature differs depending on the position of the temperature sensor and the thermometer provided in the thin film forming apparatus and the state of their attachment. It is sufficient that the heating temperature for cleaning is lower than the substrate heating temperature, and the absolute value of the temperature does not matter.
- a pretreatment gas in which the proportion of the source gas of the group 3B element is smaller than that of the deposition gas in the epitaxial growth step can be supplied.
- the lowering of the substrate temperature during the above-mentioned cleaning step makes it difficult for preferential desorption of nitrogen or excessive deposition of group 3B elements due to the high vapor pressure of nitrogen. Deterioration of flatness can be avoided.
- the pretreatment gas may not include a source gas of a 3B element.
- a gas obtained by removing a source gas containing a Group 3B element from an atmospheric gas introduced in a film formation step can be used.
- Group 3B elements include A 1 (aluminum), G a (gallium), and In (indium). Semiconductor devices based on these nitride semiconductors have better flatness than before. It is possible to manufacture a semiconductor device having a laminated structure at a high yield.
- the nitride-based semiconductor device of the present invention includes a quasi-substrate substrate formed from a compound containing nitrogen and a group 3B element that forms a compound with nitrogen, and a group 3B element formed on the semiconductor substrate. And an epitaxial semiconductor film containing nitrogen.
- the surface roughness of the semiconductor substrate is less than 15 nm in root mean square (HMS).
- the flatness of the epitaxial film formed on the surface of the nitride-based semiconductor substrate can be improved. If the above roughness is more than 15 nm, a hexagonal hillock is formed when the epitaxy film is formed to a thickness of about 2 m, and only the epitaxy film is used. Instead, the epitaxial film formed thereon also becomes a film with poor crystallinity, resulting in poor quality.
- the roughness of the substrate surface exceeds 15 nm, when the epitaxial film is formed to a thickness of about 0.5, it does not become a continuous film due to the unevenness of the substrate surface.
- the above roughness was measured by atomic force microscopy (AFM) without pre-treatment of a nitride substrate and without forming an epitaxy film on it. Based on
- the root mean square roughness of the semiconductor substrate may be 5 nm or less.
- the ten-point average roughness (R z) of the above epitaxial film may be set to 15 nm or less.
- the roughness is set based on the roughness of the epitaxial film when no thin film is further laminated on the epitaxial film.
- any method can be used to detect the roughness of the above-mentioned epitaxy film, and any method can be used to measure the roughness of the above-mentioned epitaxy film. May be.
- the ten-point average roughness (R z) was measured in the direction of the vertical magnification from the average line of the sampled portion, and the highest to fifth peaks, and The average of the absolute values of the elevations (distance from the average line) of the bottom valleys from the lowest valley to the fifth valley is calculated and this value is expressed as / im.
- the average of the absolute values is expressed in nm.
- Kiyoshi Onishi Handbook of Mechanical Design and Drafting Based on JIS (10th Edition) (Science & Engineering Co., Ltd.) 17:57 can be cited as the above references.
- the point average roughness (R z) may be set to 7.5 nm or less, and as a result, high quality semiconductors can be obtained while further improving flatness and crystallinity.
- the device can be manufactured in yield.
- the surface of the above-mentioned epitaxy film is 100 mm! Irregularities with a height of 50 nm to 150 nm generated at a pitch of 1150 m may not be provided.
- the hexagonal hillock When a hexagonal hillock of an epitaxy film is formed due to poor flatness of the semiconductor substrate, the hexagonal hillock has a height of 100 / m to 50 m pitch and a height of 50 m. ⁇ ! Observed as ⁇ 150 nm irregularities.
- the RMS of the quasi-half body By setting the RMS of the quasi-half body to 15 nm or less as described above, it is possible to prevent the generation of the hexagonal hillocks. Therefore, the flatness is excellent, and the crystallinity of the laminated film formed thereon can be improved.
- FIG. 1 is a cross-sectional view showing a blue LED that is a nitride semiconductor device according to an embodiment of the present invention.
- FIG. 2 is a diagram illustrating a method for manufacturing a nitride semiconductor device according to an embodiment of the present invention.
- FIG. 3 is a diagram showing the surface shape of the GaN substrate at 10 mx 10 ⁇ , where ⁇ is the unsubstrate without pretreatment, and B is the GaN pretreated at 1025 ° C.
- FIG. 4C is a diagram showing the surface shape of a GaN substrate, which has been pretreated at 1150 ° C.
- FIG. 4 is a diagram showing observation of the surface of the semiconductor device of the present invention example at each manufacturing stage by a differential interference microscope, wherein A is pre-treated at 125 ° C., and B is above A C is a photograph when a GaN film was formed to a thickness of 0.5 / xm on A, and C is a photograph when a GaN film was formed on A to a thickness of 2 m.
- FIG. 5 is a diagram showing the observation of the surface of the semi-finished device of the comparative example at each stage of production by a differential interference microscope.
- C is a photograph when a GaN film was formed to a thickness of 2 / xm on A when a GaN film was formed to a thickness of 0.5 m on A.
- FIG. 6 is a diagram showing the results of measuring the unevenness of the surface of the GaN film formed at a thickness of 2 m corresponding to FIG. 4C using a stylus type surface profiler.
- Fig. 7 shows the results of etching the ruggedness of the surface of the GaN film with a thickness of 2 m corresponding to Fig. 5C. It is a figure showing the result of having measured using a needle type surface shape measuring instrument.
- FIG. 1 is a diagram showing a light emitting device which is a semiconductor device according to an embodiment of the present invention.
- a Ti / A1 layer 9 for forming an n-type electrode is provided on the back surface of the GaN substrate 1.
- an n-type buffer layer 2 composed of a GaN film containing a dopant Si is formed epitaxially.
- 07 G a N n-type cladding layer 3 made of film is formed.
- An active layer 4 which is a light emitting portion is disposed between the n-type cladding layer 3 and the p-type cladding layer 5.
- Active layer 4, In. . 2 G a N / G a N are formed as a Multi-Quantum Well structure.
- p-type cladding layer 5 on the active layer 4 is formed as A 1 007 G a N film containing M g as de one pan Bok. These are all formed as epitaxy films to ensure good crystallinity.
- a p-type contact layer 6 made of a GaN film containing Mg is further provided, on which a p-type electrode 7 made of a Ni / Au metal film is provided. .
- a pad electrode 8 is formed thereon.
- a potential is applied between the P-type electrode and the n-type electrode, a current is injected into the active layer, and recombination of electrons and holes occurs between the conduction band and the valence band, thereby emitting light.
- the cleaning process is performed by heating the front surface of the 0 & substrate 1 to a substrate temperature lower than the substrate temperature in the film forming process in the cleaning process. . For this reason, the unevenness of the surface of the GaN substrate 1 is suppressed, and the root mean square roughness (RMS) is 15 nm or less. In addition, it can be as small as 5 nm or less.
- the crystallinity of the epitaxial film can be improved.
- the luminous efficiency can be improved, and the quality of luminous characteristics can be improved, for example, the width of emitted light can be reduced.
- the flatness of the n-type buffer layer 2 on the GaN substrate is improved to allow the manufacture of light emitting devices.
- the yield can be improved by facilitating the production.
- the surface of the n-type buffer layer does not have irregularities with a pitch of 100 m to 150 m, that is, it is preferable that hexagonal hillocks are not generated. This can be achieved by setting the RMS of the semiconductor substrate to 15 nm or less as described above.
- the ten-point average roughness Rz of the surface of the epitaxial film can be set to 15 nm or less. Further, the above Rz can be set to 7.5 nm or less. It goes without saying that the suppression of these roughnesses contributes to the improvement of the quality of the quasi-semiconductor device and the production yield through the improvement of the crystallinity and the flatness.
- FIG. 2 is a diagram illustrating a method of manufacturing the above-described semiconductor device.
- the substrate heating temperature T1 is set, and the temperature T1 is lower than the substrate heating temperature T2 in the next film forming step.
- the flow rate of the nitrogen source gas be N1
- the flow rate of the Ga source gas eg, TMG
- G1 may be zero.
- hydrogen gas and other source gases may be included.
- the substrate heating temperature T2, the flow rate N2 of the nitrogen source gas, and the flow rate G2 of the Ga source gas are set.
- the condition that the substrate heating temperature T2> T1 and the flow rate of the Ga source gas G2> G1 ⁇ 0 is imposed.
- the source gas (atmosphere) the flow rate of the Ga source gas in the cleaning process is merely made smaller than that in the film forming process, and no other source gas is added or reduced.
- a gas is supplied to form an atmosphere, which is referred to as a pretreatment gas supply condition.
- the pretreatment gas supply conditions are generally the same as the above-mentioned film formation source gas supply conditions except for the Ga source gas (Group III source gas). If the temperature of the G a N substrate is the same as or higher than the substrate temperature during film formation under the pretreatment gas supply conditions, no G a was supplied, so the desorption of N occurred. NH 3 of N source gas will be present in excess with respect to Ga atoms or Ga droplets. Therefore, a new G a N is formed before G a moves to the step or the scratch portion. As a result, fine irregularities are generated on the GaN substrate surface after the pretreatment. When an epitaxial film is formed on a GaN substrate having such irregularities, it grows three-dimensionally. For example, a continuous film is not formed at the stage of forming the GaN film having a thickness of about 0.5 m. .
- GaN substrates are often manufactured using ELO (Epitaxial Lateral Growth) technology on heterogeneous substrates, portions with slightly different crystal orientations are combined.
- ELO Epiaxial Lateral Growth
- an epitaxy film is three-dimensionally grown on such a GaN substrate, hexagonal hillocks are likely to be generated because the epitaxy film, which inherits the crystal orientation of the base, is combined at a certain stage. Therefore, the crystallinity of each epitaxial film in the completed semiconductor device is deteriorated, and not only the quality is reduced, but also the production yield is reduced.
- the pretreatment temperature lower than the film formation temperature
- deposition and desorption of the constituent atoms of the epitaxial film on the GaN substrate surface can be performed even when a pretreatment gas in which the G a source gas is removed from the deposition source gas is used.
- the imbalance of separation is eliminated.
- a flat, highly crystalline substrate surface suitable for epitaxial film growth can be obtained.
- Optimizing the substrate temperature is easier than optimizing the pretreatment gas supply conditions because it has one parameter. Further, since the film forming temperature of the nitride-based semiconductor is originally high, the cleaning effect is not impaired even if the pretreatment temperature is lower than the film forming temperature.
- the flow rate of the other source gas should be the same as the gas flow rate during film formation. Is lower than the film formation temperature, so that the above imbalance does not occur. Therefore, as described above, it is not necessary to optimize the pretreatment gas supply conditions by shaking a large number of conditions only by removing the Ga source gas from the film formation gas supply conditions.
- the GaN substrate was subjected to a cleaning treatment (pretreatment), and then a homoepitaxial film was formed.
- pretreatment a cleaning treatment
- film forming conditions are as follows.
- a substrate produced by growing a thick film on a GaAs substrate using SiO 2 as a mask and then removing the GaAs substrate was used (International Publication No. WO 99/23693). No.).
- the Ga source gas TMG except for the Ga source gas TMG, only the nitrogen source gas, ammonia, and the carrier gas, nitrogen and hydrogen, were flowed under the same film formation conditions as above.
- the root mean square roughness (RMS) after pretreatment was evaluated using an atomic force microscope (AFM).
- FIG. 3 is a diagram showing a root-mean-square roughness of 10 mxl 0 m on the surface of the GaN substrate using an atomic force microscope (AFM: Atomic Force Microscopy).
- FIG. 3A shows a GaN substrate without pre-treatment (substrate: Comparative Example)
- FIG. 3B shows a GaN substrate pre-treated at a substrate temperature of 1025 ° C. (Example of the present invention)
- FIG. 10 is a diagram showing the results of a GaN substrate (comparative example) pretreated at the same substrate temperature as the film formation temperature.
- Table 1 shows the RMS for the above samples in the range of 2 x mx 2 m and 10 mx 10.
- the sample pretreated at the same substrate temperature as the film formation temperature of 1150 ° C has an RMS of 20 nm or more, and the surface is significantly higher than that of the untreated substrate.
- the roughness increases and deteriorates.
- the size of one scale on the z-axis in Fig. 3C is 10 times larger than that in Figs. 3A and 3B, so the above-mentioned large difference is somewhat difficult to understand, but the difference is obvious.
- the sample pretreated at a substrate temperature lower than the film formation temperature has an RMS of 2 amx2 / im of 0.6 nm, which is much better than the 1.3 nm of the substrate. .
- the RMS of 10 mx10, "m is 1.5 nm, which is superior to 2.
- the deposition temperature is 1 150.
- cleaning is performed without impairing the flatness of the GaN substrate.
- FIG. 4 is a diagram showing the results of stepwise observation of the sample surface of the present invention example using a differential interference microscope.
- FIG.4A is a photograph obtained by observing the pre-processed GaN substrate corresponding to FIG.3B with a differential interference microscope
- FIG.4B shows a GaN film having a thickness of 0.5 m on the GaN film under the above-mentioned film forming conditions. It is a photograph at the time of the epitaxial growth
- FIG. 4C is a photograph after the GaN film is grown by the thickness of 2 im epitaxial growth.
- Fig. 5 also shows the sample surface of the comparative example corresponding to Fig. 3C by using a differential interference microscope. It is a figure showing the result of having followed the floor.
- FIG. 5A is a photograph obtained by observing the GaN substrate after pre-treatment corresponding to FIG.
- FIG. 5B shows a GaN film formed thereon under the above film forming conditions. This is a photograph at the time of 0.5 / m epitaxial growth, and FIG. 5C is a photograph after the GaN film has been grown at a thickness of 2 / m epitaxial.
- the difference in the roughness of the GaN substrate surface after the pretreatment was clearly recognized by the differential interference microscope, as shown in FIG. 4A of the present invention.
- the surface has less roughness than the surface shown in FIG. 5A of the comparative example.
- FIG. 5B a continuous GaN film was formed in FIG.
- FIG. 4C a flat GaN film was formed in FIG. 4C of the present invention example.
- Fig. 5C in the example it can be seen that hexagonal hillocks formed by the coalescence of the three-dimensionally grown discontinuous films are generated. That is, in the comparative example, a GaN film having poor flatness and poor crystallinity is formed.
- Figs. 6 and 7 show the results of measuring the surface irregularities of the GaN film formed with a thickness of 2 m corresponding to Figs. 4C and 5C using a stylus-type surface profilometer. It is.
- unevenness profile of FIG. 7 of the comparative example unevenness having a pitch of 100 / m to 150 m and a height of 50 nm to 150 nm is recognized. This corresponds to the irregularities of the hexagonal hillock observed in Fig. 5C of the differential interference microscope.
- FIG. 6 of the example of the present invention since the film forming process was performed after the pretreatment was performed at 125 ° C., no large unevenness was observed. (Supplementary notes on embodiments and examples of the invention)
- the range of unevenness of the semiconductor substrate and the like in the semiconductor device of the present invention is determined in the embodiment. Based on the premise that even when another thin film is formed thereon, the unevenness does not undergo a large change, it is based on the unevenness before the thin film is formed thereon.
- the actual range of the irregularities on the surface after being manufactured in the semiconductor device greatly depends on the measuring method, particularly when the irregularities on the surface are exposed by etching. It also depends on the accuracy of the unevenness measuring device. In determining the range of the unevenness on the surface of each part in the semiconductor device of the present invention, it should be specified by the best measuring method and the best measuring device.
- nitride-based semiconductor device By using the nitride-based semiconductor device and the method for manufacturing the same according to the present invention, a nitride-based semiconductor device including an epitaxy film having excellent flatness and crystallinity can be obtained.
Abstract
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Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP04712740A EP1601009A4 (en) | 2003-03-05 | 2004-02-19 | NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME |
CA002495908A CA2495908A1 (en) | 2003-03-05 | 2004-02-19 | Nitride semiconductor device and method for manufacturing same |
US10/514,261 US20050173715A1 (en) | 2003-03-05 | 2004-02-19 | Nitride semiconductor devices and method of their manufacture |
US11/958,315 US7781314B2 (en) | 2003-03-05 | 2007-12-17 | Nitride semiconductor device manufacturing method |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP2003-057983 | 2003-03-05 | ||
JP2003057983A JP4052150B2 (ja) | 2003-03-05 | 2003-03-05 | 窒化物系半導体装置の製造方法 |
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PCT/JP2004/001944 WO2004079803A1 (ja) | 2003-03-05 | 2004-02-19 | 窒化物系半導体装置およびその製造方法 |
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US (2) | US20050173715A1 (ja) |
EP (1) | EP1601009A4 (ja) |
JP (1) | JP4052150B2 (ja) |
KR (1) | KR101036223B1 (ja) |
CN (1) | CN100580881C (ja) |
CA (1) | CA2495908A1 (ja) |
TW (1) | TW200423509A (ja) |
WO (1) | WO2004079803A1 (ja) |
Cited By (1)
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KR101182581B1 (ko) * | 2005-09-21 | 2012-11-27 | 삼성코닝정밀소재 주식회사 | 질화갈륨계 반도체 기판 및 이의 제조방법 |
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US7846757B2 (en) * | 2005-06-01 | 2010-12-07 | The Regents Of The University Of California | Technique for the growth and fabrication of semipolar (Ga,A1,In,B)N thin films, heterostructures, and devices |
KR100739150B1 (ko) * | 2005-12-24 | 2007-07-13 | 엘지전자 주식회사 | 질화물 반도체 소자 제조 방법 |
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US7824929B2 (en) | 2007-10-22 | 2010-11-02 | Toyoda Gosei Co., Ltd. | Method for producing group III nitride-based compound semiconductor |
TWI431669B (zh) * | 2007-11-21 | 2014-03-21 | Mitsubishi Chem Corp | Crystallization Growth of Nitride Semiconductor and Nitride Semiconductor |
US7482674B1 (en) * | 2007-12-17 | 2009-01-27 | The United States Of America As Represented By The Secretary Of The Navy | Crystalline III-V nitride films on refractory metal substrates |
US7781780B2 (en) * | 2008-03-31 | 2010-08-24 | Bridgelux, Inc. | Light emitting diodes with smooth surface for reflective electrode |
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JP6298057B2 (ja) * | 2013-07-26 | 2018-03-20 | スタンレー電気株式会社 | ベース基板の前処理方法、および該前処理を行ったベース基板を用いた積層体の製造方法 |
KR101653184B1 (ko) * | 2014-11-07 | 2016-09-02 | 재단법인대구경북과학기술원 | 태양전지 광흡수층 제조방법 및 이에 따라 제조되는 태양전지 광흡수층 |
CN111164242B (zh) * | 2017-09-22 | 2022-06-24 | 株式会社德山 | Iii族氮化物单晶基板 |
KR102397497B1 (ko) * | 2021-03-28 | 2022-05-12 | 이종득 | 기능성분을 함유하여 미세먼지 흡착, 항균, 탈취기능을 갖도록 제공되는 안면보호용 마스크 |
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2003
- 2003-03-05 JP JP2003057983A patent/JP4052150B2/ja not_active Expired - Fee Related
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2004
- 2004-02-19 CA CA002495908A patent/CA2495908A1/en not_active Abandoned
- 2004-02-19 KR KR1020057016241A patent/KR101036223B1/ko not_active IP Right Cessation
- 2004-02-19 EP EP04712740A patent/EP1601009A4/en not_active Withdrawn
- 2004-02-19 CN CN200480000273.0A patent/CN100580881C/zh not_active Expired - Fee Related
- 2004-02-19 WO PCT/JP2004/001944 patent/WO2004079803A1/ja active Application Filing
- 2004-02-19 US US10/514,261 patent/US20050173715A1/en not_active Abandoned
- 2004-02-27 TW TW093105163A patent/TW200423509A/zh not_active IP Right Cessation
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2007
- 2007-12-17 US US11/958,315 patent/US7781314B2/en not_active Expired - Fee Related
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Also Published As
Publication number | Publication date |
---|---|
CN100580881C (zh) | 2010-01-13 |
EP1601009A8 (en) | 2006-02-01 |
KR20050108372A (ko) | 2005-11-16 |
JP2004273484A (ja) | 2004-09-30 |
US20080132044A1 (en) | 2008-06-05 |
EP1601009A1 (en) | 2005-11-30 |
US20050173715A1 (en) | 2005-08-11 |
TW200423509A (en) | 2004-11-01 |
CA2495908A1 (en) | 2004-09-16 |
JP4052150B2 (ja) | 2008-02-27 |
CN1698184A (zh) | 2005-11-16 |
KR101036223B1 (ko) | 2011-05-20 |
TWI324424B (ja) | 2010-05-01 |
EP1601009A4 (en) | 2010-07-14 |
US7781314B2 (en) | 2010-08-24 |
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