WO2004054336A1 - プリント配線基板の製造方法 - Google Patents
プリント配線基板の製造方法 Download PDFInfo
- Publication number
- WO2004054336A1 WO2004054336A1 PCT/JP2002/012842 JP0212842W WO2004054336A1 WO 2004054336 A1 WO2004054336 A1 WO 2004054336A1 JP 0212842 W JP0212842 W JP 0212842W WO 2004054336 A1 WO2004054336 A1 WO 2004054336A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- resin layer
- resin
- wiring board
- printed wiring
- cured
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09881—Coating only between conductors, i.e. flush with the conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/025—Abrading, e.g. grinding or sand blasting
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0278—Flat pressure, e.g. for connecting terminals with anisotropic conductive adhesive
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/08—Treatments involving gases
- H05K2203/085—Using vacuum or low pressure
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1152—Replicating the surface structure of a sacrificial layer, e.g. for roughening
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths
Definitions
- the present invention relates to a method for manufacturing a printed wiring board.
- a circuit pattern on a printed circuit board is generally manufactured by a subtraction method in which an unnecessary portion of a copper foil is removed by etching, so that the circuit pattern portion is formed in a concavo-convex shape rising from the substrate surface.
- thermosetting resin is embedded between circuit patterns and heat-cured, and then the resin surface is polished flat.
- the present invention has been made in view of the above circumstances, and provides a method of manufacturing a printed wiring board that can sufficiently remove bubbles in a resin and obtain a good cured state of the resin as a whole.
- the purpose is to do. Disclosure of the invention
- thermosetting resin layer is formed on a printed wiring board on which a circuit pattern is formed so as to fill a space between the patterns, and the pressure of the resin layer is reduced.
- a method for manufacturing a printed wiring board comprising: heating and curing while pressing a smooth plate in a room; and polishing the cured resin layer by covering the circuit pattern to expose the circuit pattern. Heating and curing in the decompression chamber, a step of maintaining the resin layer at a non-curing temperature at which the resin layer is not cured in a state where the resin layer is pressurized through the smoothing plate in the decompression chamber (step 1).
- step 2 Heating the resin layer to a curing temperature at which the resin layer cures in the pressurized state (step 2); and exposing outside air to the decompression chamber while maintaining the pressurized state and the curing temperature.
- step 3 The step of flowing (step 3), the step of reducing the pressure applied to the flat plate while maintaining the curing temperature (step 4), and the step of cooling the resin layer (step 5) are sequentially performed. It is characterized by
- the pressure may be increased stepwise.
- the resin layer is applied to a printed wiring board by filling a liquid resin between the patterns, or a semi-cured resin sheet is overlapped on the printed wiring board, and a surface facing the resin layer is formed thereon.
- Roughened metal foils may be stacked. In this case, the metal foil can be formed of a metal different from the circuit pattern.
- the resin layer is formed through the smooth plate in the decompression chamber. Is held at a non-curing temperature at which the resin layer does not cure (step 1).
- the non-curing temperature in this case is preferably a temperature at which the viscosity of the resin is too low so that the resin does not flow out between circuit patterns.For example, about 100 to 140 ° C. for an epoxy resin. preferable.
- the time for holding the resin at the non-curing temperature is preferably such that the temperature of the resin layer does not substantially cause a temperature difference between the temperature near the surface and the internal temperature.
- thermosetting resin layer When a thermosetting resin layer is formed on the wiring board so as to fill in the space between the patterns, even if the resin layer rises at the circuit pattern forming part, the resin layer becomes soft and smooth in step 1 The resin layer is crushed by being pressed through the plate, and the entire resin layer spreads thinly in the gap between the smooth plate and the substrate. Further, even if bubbles are contained in the resin layer, the bubbles in the resin are removed because the pressure applied to the resin layer is performed in the reduced pressure chamber. At this time, since the resin is appropriately softened, air bubbles can easily move through the resin.
- the resin layer is heated to a curing temperature at which the resin layer is cured while maintaining the pressurized state (step 2).
- the resin layer is hardened without bubbles.
- the surface of the resin layer can be kept flat because the resin layer is pressed by the smooth plate.
- step 3 outside air flows into the decompression chamber while maintaining the pressurized state and the curing temperature (step 3). Then, since the surface of the resin layer is cooled by the inflowing outside air, the hardness of the resin layer surface is increased, so that excessive outflow of the resin can be suppressed.
- Step 4 the pressure applied to the flat plate is reduced while maintaining the curing temperature of the resin. This can further prevent the resin from flowing out excessively.
- the metal foil interposed between the smoothing plate and the resin layer is formed of a metal different from the circuit pattern, only the metal foil is melted and the metal of the circuit pattern is not affected! / The metal foil can be removed by selective etching.
- FIG. 1 is a sectional view of a copper-clad laminate.
- FIG. 2 is a cross-sectional view of the wiring board in which a through hole is formed.
- FIG. 3 is a sectional view of a wiring board on which a plating layer is similarly formed.
- FIG. 4 is a cross-sectional view of a wiring board on which a circuit pattern is similarly formed.
- FIG. 5 is a sectional view of a wiring board on which a resin layer according to the first embodiment of the present invention is formed.
- FIG. 6 is a cross-sectional view of the wiring board showing a layout at the time of pressure reduction press.
- FIG. 7 is a graph showing the relationship between temperature, pressure, and vacuum when curing the resin.
- FIG. 8 is a cross-sectional view of the distribution spring substrate after curing of the resin.
- FIG. 9 is a sectional view of the wiring board after removing the metal foil.
- FIG. 10 is a cross-sectional view of the wiring board after the polishing. BEST MODE FOR CARRYING OUT THE INVENTION
- a base material for example, a copper-clad laminate obtained by attaching copper foils 12 to both sides of a glass epoxy substrate 11 having a thickness of 100 to 300 m. Board 10 is used.
- a through hole 13 is drilled in a required portion of the copper-clad laminate 10 using a well-known drill or the like (see Fig. 2), and a chemical plating is carried out.
- a copper plating layer 14 is formed over the entire area including the inner peripheral surface of the substrate, and the thickness of the conductor layer on the substrate surface is reduced to about 20 m (see FIG. 3).
- through holes Fill resin into 13 and harden it, and polish the resin that has overflowed the substrate surface to make it flat. Thereafter, a circuit pattern 15 is formed on the smooth substrate by a well-known photo-etching method (see FIG. 4).
- a liquid thermosetting epoxy resin is applied to the wiring board by screen printing or the like so as to have a thickness of about 30 to 80 m, and the circuit pattern 15 is made of resin. Full embedding by layer 16 Then, the resin layer 16 is heated at 140 ° C. to be in a semi-cured state. At this time, minute air bubbles may be contained in the resin layer 16. The surface of the resin layer 16 is in a gently undulating state in which the circuit pattern 15 is raised.
- FIG. 6 is a schematic diagram in which a set of laminated bodies is sandwiched between stainless steel plates 19. The following steps are sequentially performed on this laminate (see FIG. 7).
- Step 1 the pressure applied to the stainless steel plate 19 was increased stepwise. A pressure of 30 Kg / cm 2 is used (Step 1). Then, the surface of the resin layer 16 in the gently undulating state is flattened by being crushed by the smooth stainless steel plate 19, and the entire resin layer 16 spreads thinly on the substrate. In addition, air bubbles in the resin layer 16 float near the surface of the resin layer 16 and are removed from inside the resin.
- the resin layer 16 is heated at 180 ° C. while the pressure applied to the stainless steel plate 19 is maintained, so that the resin layer 16 is fully cured (step 2). As a result, the resin layer 16 is cured without containing any bubbles.
- outside air is allowed to flow into the decompression chamber while maintaining the above-mentioned pressurized state and temperature (step 3). Due to this inflow of outside air, the resin layer 16 was exposed. Since the surface temperature decreases and the hardness increases, excessive flow of resin from the circuit pattern is suppressed.
- step 4 the pressure applied to the stainless steel plate 19 is reduced (step 4). This prevents the resin layer from being excessively crushed, and further prevents the resin from flowing out. Then, after the resin layer 16 is sufficiently hardened, the entire laminate 16 is cooled (step 5).
- the nickel foil 17 adhering to the surface of the resin layer 16 is removed with an etching solution dedicated to nickel (see FIGS. 8 and 9). Then, the residual resin layer on the copper circuit pattern 15 is 5 m or less, and the surface is in a roughened state. Therefore, finally, the substrate is subjected to primary smooth surface polishing, which removes the resin layer 16 on the circuit pattern 15 using a ceramic buff, and secondary finish polishing, which uses a surface grinder to make the average in-plane roughness accuracy 3 um or less. Flatten (see Fig. 10). At the time of this surface polishing, the resin layer 16 remaining on the circuit pattern 15 is extremely thin as 5 and its surface is roughened, so that the polishing is easily performed.
- the resin layer is formed by depositing a liquid resin on the substrate by screen printing.
- the present invention is not limited to this, and a coating or curtain coating method may be used.
- a configuration may be employed in which resin sheets in a semi-cured state are laminated.
- Steps 1 to 5 in order in the same manner as in the above-described embodiment, it is possible to obtain a good resin without bubbles in the resin as a whole. A cured state can be obtained.
- the circuit pattern is formed by the subtractive method.
- it may be configured to be formed by an additive method.
- thermosetting epoxy resin was used as the material of the resin layer.
- thermosetting resins such as urea resin, melamine resin, phenol resin, acrylic resin, and unsaturated polyester resin are used. You can use.
- nickel was used as the metal foil material.
- the present invention is not limited to this, and other metals such as copper may be used. Industrial applicability
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/538,505 US7716825B2 (en) | 2002-12-09 | 2002-12-09 | Method for manufacturing printed wiring board |
KR1020057010376A KR100908286B1 (ko) | 2002-12-09 | 2002-12-09 | 프린트 배선기판의 제조 방법 |
CNB028300114A CN100444704C (zh) | 2002-12-09 | 2002-12-09 | 印刷电路板的制造方法 |
PCT/JP2002/012842 WO2004054336A1 (ja) | 2002-12-09 | 2002-12-09 | プリント配線基板の製造方法 |
JP2004558362A JPWO2004054336A1 (ja) | 2002-12-09 | 2002-12-09 | プリント配線基板の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2002/012842 WO2004054336A1 (ja) | 2002-12-09 | 2002-12-09 | プリント配線基板の製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2004054336A1 true WO2004054336A1 (ja) | 2004-06-24 |
Family
ID=32500599
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2002/012842 WO2004054336A1 (ja) | 2002-12-09 | 2002-12-09 | プリント配線基板の製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7716825B2 (ja) |
JP (1) | JPWO2004054336A1 (ja) |
KR (1) | KR100908286B1 (ja) |
CN (1) | CN100444704C (ja) |
WO (1) | WO2004054336A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20110023297A1 (en) * | 2005-12-30 | 2011-02-03 | Industrial Technology Research Institute and Unimicron Technology Corp. | Multi-layered printed circuit board and method for fabricating the same |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004054337A1 (ja) * | 2002-12-09 | 2004-06-24 | Noda Screen Co., Ltd. | プリント配線基板の製造方法 |
TWI336502B (en) * | 2006-09-27 | 2011-01-21 | Advanced Semiconductor Eng | Semiconductor package and semiconductor device and the method of making the same |
KR101077239B1 (ko) * | 2006-12-15 | 2011-10-27 | 니혼 하츠쵸 가부시키가이샤 | 도전성 접촉자 홀더 및 도전성 접촉자 유닛 |
JP5743038B2 (ja) * | 2013-01-09 | 2015-07-01 | 株式会社村田製作所 | 樹脂多層基板およびその製造方法 |
WO2019107289A1 (ja) * | 2017-11-28 | 2019-06-06 | 住友電工プリントサーキット株式会社 | フレキシブルプリント配線板の製造方法及びフレキシブルプリント配線板 |
JP7099373B2 (ja) * | 2019-03-11 | 2022-07-12 | トヨタ自動車株式会社 | 圧粉磁心の製造方法 |
CN112188733A (zh) * | 2019-07-03 | 2021-01-05 | 深圳碳森科技有限公司 | 一种真空塞孔方法 |
CN114885514A (zh) * | 2021-02-05 | 2022-08-09 | 深南电路股份有限公司 | 印制线路板的制作方法及印制线路板 |
US11997799B2 (en) * | 2021-02-05 | 2024-05-28 | Shennan Circuits Co., Ltd. | Method for manufacturing printed circuit board |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0832213A (ja) * | 1994-07-18 | 1996-02-02 | Olympus Optical Co Ltd | カバーレイフィルム接着方法およびフレキシブルプリント基板の製造方法 |
JP2000332387A (ja) * | 1999-05-21 | 2000-11-30 | Noda Screen:Kk | プリント配線基板の製造方法 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0334494A (ja) | 1989-06-30 | 1991-02-14 | Tanaka Kikinzoku Kogyo Kk | 水平プリント回路基板の製造方法 |
US6010768A (en) * | 1995-11-10 | 2000-01-04 | Ibiden Co., Ltd. | Multilayer printed circuit board, method of producing multilayer printed circuit board and resin filler |
TW419797B (en) * | 1997-04-30 | 2001-01-21 | Hitachi Chemical Co Ltd | Substrate used for carrying semiconductor device, the fabrication method and the semiconductor apparatus |
JP2001203453A (ja) | 2000-01-21 | 2001-07-27 | Matsushita Electric Works Ltd | 多層積層板の製造方法 |
-
2002
- 2002-12-09 WO PCT/JP2002/012842 patent/WO2004054336A1/ja active Application Filing
- 2002-12-09 JP JP2004558362A patent/JPWO2004054336A1/ja active Pending
- 2002-12-09 KR KR1020057010376A patent/KR100908286B1/ko active IP Right Grant
- 2002-12-09 US US10/538,505 patent/US7716825B2/en active Active
- 2002-12-09 CN CNB028300114A patent/CN100444704C/zh not_active Expired - Lifetime
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0832213A (ja) * | 1994-07-18 | 1996-02-02 | Olympus Optical Co Ltd | カバーレイフィルム接着方法およびフレキシブルプリント基板の製造方法 |
JP2000332387A (ja) * | 1999-05-21 | 2000-11-30 | Noda Screen:Kk | プリント配線基板の製造方法 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20110023297A1 (en) * | 2005-12-30 | 2011-02-03 | Industrial Technology Research Institute and Unimicron Technology Corp. | Multi-layered printed circuit board and method for fabricating the same |
Also Published As
Publication number | Publication date |
---|---|
CN100444704C (zh) | 2008-12-17 |
JPWO2004054336A1 (ja) | 2006-04-13 |
US7716825B2 (en) | 2010-05-18 |
CN1709015A (zh) | 2005-12-14 |
US20060115582A1 (en) | 2006-06-01 |
KR20050090991A (ko) | 2005-09-14 |
KR100908286B1 (ko) | 2009-07-17 |
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