WO2004021427A1 - Procede de traitement au plasma et dispositif de traitement au plasma - Google Patents

Procede de traitement au plasma et dispositif de traitement au plasma Download PDF

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Publication number
WO2004021427A1
WO2004021427A1 PCT/JP2003/010937 JP0310937W WO2004021427A1 WO 2004021427 A1 WO2004021427 A1 WO 2004021427A1 JP 0310937 W JP0310937 W JP 0310937W WO 2004021427 A1 WO2004021427 A1 WO 2004021427A1
Authority
WO
WIPO (PCT)
Prior art keywords
plasma processing
plasma
electrostatic chuck
processing method
semiconductor wafer
Prior art date
Application number
PCT/JP2003/010937
Other languages
English (en)
Japanese (ja)
Inventor
Toshihiko Shindo
Shin Okamoto
Kimihiro Higuchi
Original Assignee
Tokyo Electron Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Limited filed Critical Tokyo Electron Limited
Priority to AU2003261790A priority Critical patent/AU2003261790A1/en
Publication of WO2004021427A1 publication Critical patent/WO2004021427A1/fr
Priority to US11/066,260 priority patent/US7541283B2/en
Priority to US12/433,112 priority patent/US7799238B2/en
Priority to US12/686,899 priority patent/US8287750B2/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/004—Charge control of objects or beams
    • H01J2237/0041—Neutralising arrangements
    • H01J2237/0044—Neutralising arrangements of objects being observed or treated

Definitions

  • the present invention relates to a plasma processing method and a plasma processing apparatus, and more particularly to a plasma processing method and a plasma processing apparatus for performing a plasma etching process or the like on a substrate to be processed such as a semiconductor wafer or an LCD substrate.
  • a plasma processing method for processing a substrate to be processed such as a semiconductor wafer or an LCD substrate by using plasma has been frequently used.
  • a substrate to be processed such as a semiconductor wafer or an LCD substrate by using plasma
  • plasma plasma etching is often used to remove.
  • etching apparatus for performing such a plasma etching process
  • plasma is generated in a processing chamber (etching chamber) configured so that the inside can be hermetically closed. Then, a semiconductor wafer is placed on a susceptor provided in the etching chamber, and etching is performed.
  • various types of means for generating the plasma are known.
  • a device of the type that supplies high-frequency power to a pair of parallel plate electrodes provided so as to face each other up and down to generate plasma.
  • One of the parallel plate electrodes for example, the lower electrode also serves as a susceptor And a semiconductor wafer is placed on this lower electrode, A plasma is generated by applying a frequency voltage to perform etching.
  • the surface arcing often occurs, for example, when an insulator layer is formed on a conductor layer and the insulator layer is etched.
  • the insulator layer made of a silicon oxide film is etched to form a contact hole that leads to a conductor layer made of a lower metal layer, the silicon oxide film whose thickness has been reduced by etching is destroyed. In many cases, it occurs.
  • an object of the present invention is to provide a plasma processing method and a plasma processing apparatus which can prevent the occurrence of surface arcing on a substrate to be processed and can improve the productivity as compared with the related art. Things.
  • a plasma weaker than plasma used for the plasma processing is applied to the substrate before performing the plasma processing. And the state of electric charge of the substrate to be processed is kept constant, and thereafter, the plasma processing is performed. Further, in the plasma processing method of the present invention, in the plasma processing method, the weak plasma is applied to the substrate to be processed for a predetermined time, and thereafter, a DC voltage is applied to an electrostatic chuck for sucking and holding the substrate to be processed. It is characterized by applying.
  • the plasma processing method of the present invention is characterized in that in the above-described plasma processing method, before applying the weak plasma, application of a DC voltage to the electrostatic chuck is started.
  • the weak plasma is a plasma formed by an Ar gas, or a ⁇ 2 gas, or a CF 4 gas, or an N 2 gas. I do.
  • the plasma processing method of the present invention is characterized in that, in the above-mentioned plasma processing method, the weak plasma is formed by a high frequency power of 0.15 to 1.0 WZ cm 2.
  • the plasma processing method according to the present invention is the plasma processing method described above, wherein the weak plasma is applied to the substrate to be processed for 5 to 20 seconds.
  • the plasma processing method of the present invention in the above-described plasma processing method, at the start of the plasma processing, after the application of high-frequency power for generating plasma is started, the application of a DC voltage to the electrostatic chuck is started. The application of the high-frequency power is stopped after the application of the DC voltage to the electrostatic chuck is stopped at the end of the plasma processing.
  • a DC voltage of the electrostatic chuck is The application is started, and then the substrate is lowered and placed on the electrostatic chuck. It is characterized by doing.
  • the plasma processing method of the present invention is characterized in that in the above-mentioned plasma processing method, the plasma processing is an etching processing, and the weak plasma is applied to the substrate to be processed in a processing chamber for performing the etching processing.
  • the plasma processing apparatus of the present invention is a plasma processing apparatus including a plasma processing mechanism for performing a plasma processing on a substrate to be processed, wherein the control unit controls the plasma processing mechanism and performs the plasma processing method. It is characterized by having. BRIEF DESCRIPTION OF THE FIGURES
  • FIG. 1 is a diagram schematically showing a schematic configuration of an apparatus used in an embodiment of the present invention.
  • FIG. 2 is a view for explaining a plasma processing method according to one embodiment of the present invention.
  • FIG. 3 is a diagram schematically showing a schematic configuration of an apparatus used in another embodiment of the present invention.
  • FIG. 4 is a view for explaining a plasma processing method according to another embodiment of the present invention.
  • FIG. 5 is a view for explaining a plasma processing method according to a modification of the embodiment shown in FIG.
  • FIG. 6 is a diagram for explaining a chucking method using an electrostatic chuck.
  • FIG. 7 is a diagram for explaining a change in potential of each part in the checking method of FIG.
  • FIG. 8 is a diagram for explaining a change in potential of each part in another chucking method.
  • FIG. 9 is a diagram for explaining a comparative example of a chucking method using an electrostatic chuck.
  • FIG. 10 is a diagram for explaining a change in potential of each part in the chucking method of FIG.
  • FIG. 11 is a diagram showing the relationship between the voltage applied to the electrostatic chuck and the number of particles.
  • FIG. 1 schematically shows the overall configuration of a plasma processing apparatus (etching apparatus) used in an embodiment of the present invention.
  • reference numeral 1 denotes a cylindrical vacuum chamber which is made of, for example, aluminum and the like and is configured so as to be able to hermetically close the inside thereof, and which constitutes a processing chamber.
  • the vacuum chamber 11 is connected to a ground potential. Inside the vacuum chamber 1, there is provided a mounting table 2 made of a conductive material, for example, aluminum or the like in a block shape and also serving as a lower electrode.
  • the mounting table 2 is supported in a vacuum chamber 11 via an insulating plate 3 made of ceramic or the like.
  • An electrostatic chuck 4 is provided on the mounting surface of the mounting table 2 on which the semiconductor wafer W is mounted.
  • the electrostatic chuck 4 has a configuration in which an electrode 4 a for an electrostatic chuck is interposed in an insulating film 4 b made of an insulating material, and a DC power supply 5 is connected to the electrode 4 a for the electrostatic chuck. Have been.
  • the electrostatic chuck electrode 4a is made of, for example, copper or the like, and the insulating film 4b is made of polyimide or the like.
  • the inside of the mounting table 2 has insulating properties as a heat medium for temperature control.
  • a heat medium flow path 6 for circulating a fluid and a gas flow path 7 for supplying a temperature control gas such as a helium gas to the back surface of the semiconductor wafer W are provided.
  • the mounting table 2 is controlled to a predetermined temperature by circulating an insulating fluid controlled at a predetermined temperature in the heat medium flow path 6, and the space between the mounting table 2 and the back surface of the semiconductor wafer W is controlled.
  • a gas for temperature control is supplied through the gas flow path 7 to promote heat exchange between them, so that the semiconductor wafer W can be accurately and efficiently controlled to a predetermined temperature. I have.
  • a focus ring 8 made of a conductive material or an insulating material is provided on the outer periphery above the mounting table 2, and a power supply for supplying high-frequency power is provided substantially at the center of the mounting table 2.
  • Wire 9 is connected.
  • a high-frequency power supply (RF power supply) 11 is connected to the power supply line 9 via a matching unit 10 so that a high-frequency power of a predetermined frequency is supplied from the high-frequency power supply 11. .
  • an exhaust ring 12 which is formed in a ring shape and has a large number of exhaust holes, and through this exhaust ring 12, an exhaust port 13 is provided.
  • the processing space in the vacuum chamber 11 is evacuated by a vacuum pump or the like of an exhaust system 14 connected to the vacuum chamber.
  • a shower head 15 is provided on the top wall portion of the vacuum chamber 11 above the mounting table 2 so as to face the mounting table 2 in parallel, and this shower head 15 is grounded. I have. Therefore, the shower head 15 and the mounting table 2 function as a pair of electrodes (an upper electrode and a lower electrode).
  • the shower head 15 is provided with a number of gas discharge holes 16 on the lower surface, and has a gas inlet 17 on the upper part. And A gas diffusion space 18 is formed inside the shower head 15.
  • a gas supply pipe 19 is connected to the gas introduction section 17, and a gas supply system 20 is connected to the other end of the gas supply pipe 19.
  • the gas supply system 20 includes a mass flow controller (MFC) 21 for controlling a gas flow rate, a processing gas supply source 22 for supplying, for example, a processing gas for etching, and an Ar gas. It consists of an Ar gas supply source 23 for supplying water.
  • MFC mass flow controller
  • annular magnetic field forming mechanism (ring magnet) 24 is arranged around the outside of the vacuum chamber 11 concentrically with the vacuum chamber 11, and is located between the mounting table 2 and the shower head 15. A magnetic field is formed in the processing space. The whole of the magnetic field forming mechanism 24 is rotatable around the vacuum chamber 11 at a predetermined rotation speed by a rotating mechanism 25.
  • the plasma processing mechanism such as the DC power supply 5, the high-frequency power supply 11, and the gas supply system 20 for performing the plasma processing on the semiconductor wafer W is configured to be controlled by the control unit 40.
  • a gut valve (not shown) provided in the vacuum chamber 11 is opened, and a semiconductor wafer W is transferred by a transfer mechanism (not shown) through a load lock chamber (not shown) arranged adjacent to the gate valve. Is loaded into the vacuum chamber 1 and is mounted on the mounting table 2. Then, after the transfer mechanism is retracted out of the vacuum chamber 11, the gate valve is closed. At this time, the application of the DC voltage (HV) from the DC power supply 5 to the electrostatic chuck electrode 4a of the electrostatic chuck 4 was not performed.
  • HV DC voltage
  • the reason why the weak plasma is applied to the semiconductor wafer W is as follows.
  • the state of the semiconductor wafer W to be processed is not uniform due to the processing state in a previous step (for example, a film forming step such as CVD).
  • a previous step for example, a film forming step such as CVD.
  • electric charges are accumulated inside the semiconductor wafer w. May be. If strong plasma is applied in the state where the electric charge is accumulated inside the semiconductor wafer W, surface arcing or the like is likely to occur, so that the weak plasma is applied before the strong plasma is applied. The purpose of this is to uniformly adjust (initialize) the state and the like of the electric charge accumulated inside the semiconductor wafer W.
  • the electrode 4 a for the electrostatic chuck of the electrostatic chuck 4 is used to facilitate the movement of the electric charge from the inside of the semiconductor wafer W.
  • the semiconductor wafer is adjusted (initialized) by such weak plasma without applying a DC voltage (HV) to the semiconductor wafer.
  • the high-frequency applied power for generating such a weak plasma is about 0.15 W / cm 2 to about 1.0 WZ cm 2 , for example, about 100 to 500 W. Is applied to the semiconductor wafer W, for example, about 5 to 20 seconds.
  • Ar gas is used and plasma of Ar gas is applied. Case is described, but not gas species limited to this,
  • gas species 0 2 gas, CF 4 gas, a gas such as N 2 gas may be used, however, when the selection of the gas species It is necessary to select a plasma gas to be generated to such an extent that an undesired action such as etching is caused on the semiconductor wafer W and on the inner wall of the vacuum chamber 11 and on the semiconductor wafer W, and It is necessary to select one that easily ignites the plasma.
  • the optimum gas type may change depending on the type of processing performed on the semiconductor wafer W to be processed in the previous process. Is preferred.
  • a DC voltage (HV) from the DC power supply 5 is applied to the electrostatic chuck electrode 4a.
  • a predetermined processing gas (etching gas) is supplied from the processing gas supply source 22 into the vacuum chamber 11, and the high frequency power supply 11 supplies the gas to the mounting table 2 as a lower electrode.
  • high-frequency power frequency: 13.56 MHz
  • high power for normal processing such as 0 W
  • strong plasma is generated and normal plasma processing (etching processing) is performed.
  • the horizontal axis represents time
  • the vertical axis represents the voltage value in the case of the electrostatic chuck HV, and the power value in the case of the RF output.
  • the high frequency is applied to the mounting table 2 as the lower electrode.
  • a high-frequency electric field is formed in the processing space between the upper head 15 as the upper electrode and the mounting table 2 as the lower electrode, and a magnetic field forming mechanism 24 is formed.
  • a magnetic field is formed, and etching by plasma is performed in this state.
  • the etching process is stopped by stopping the supply of the high-frequency power from the high-frequency power supply 11.
  • the semiconductor wafer W is placed in a vacuum chamber in a procedure reverse to the procedure described above. One outside Take it out.
  • a weak plasma is applied to the semiconductor wafer W.- After that, when the semiconductor wafer w is subjected to an etching process, the rate at which surface arcing occurs on the semiconductor wafer W is independent of the lot. , Almost zero (less than 1%). On the other hand, when the process is started without applying the weak plasma as described above, the rate at which surface arcing occurs on the semiconductor wafer W may be about 80% depending on the lot. The reason is that the semiconductor wafer W was charged in a process before etching, and such surface arcing is performed when the so-called Low-K film is formed by CVD in the previous process. a, c thus the probability was high particularly generated, before starting the normal process, by the action of weak plasma to the semiconductor wafer W as described above, greatly reduced the rate at which the surface arcing occurs in the semiconductor wafer W I was able to confirm that I could.
  • FIG. 1 a case where a device having a configuration in which high-frequency power is applied only to the mounting table 2 as the lower electrode is described, for example, as shown in FIG.
  • a so-called upper and lower application type plasma processing apparatus configured to apply high-frequency power from the high-frequency power supply 31 via the matching unit 30 to the first head 15 as the upper electrode as well. Can also be applied.
  • the application of low-frequency high-frequency power to the mounting table 2 as the lower electrode is started, and then the low-frequency power is applied to the upper electrode 15 as the upper electrode.
  • the application of the high-frequency power is started, and the application of the high-frequency power to the mounting table 2 as the lower electrode is temporarily stopped here.
  • the application of the high-frequency power to the shower head 15 as the upper electrode is also stopped, and the plasma is once extinguished.
  • a DC voltage (HV) is applied to the electrostatic chuck electrode 4 a of the electrostatic chuck 4, and a normal high-frequency power (high-power high-frequency power) for processing on the mounting table 2 as the lower electrode is applied.
  • the application of normal high-frequency power for processing (high-frequency high-frequency power) to the shower head 15 as the upper electrode is started in this order, and normal processing of the semiconductor wafer W is started.
  • the present invention can be applied to the upper and lower applied plasma processing apparatus.
  • the ionizer may be installed in the chamber or may be installed in another location outside the chamber.
  • an electrostatic chuck is applied in a state in which a weak high-frequency power is applied to the mounting table 2 serving as the lower electrode and a weak plasma is not applied.
  • the application of DC voltage (HV) to the electrostatic chuck electrode 4a has started.
  • the application of the DC voltage (HV) to the chuck electrode 4a is started in a state where the high-frequency power is not applied after the weak high-frequency power is applied and the weak plasma is formed.
  • the application of DC voltage (HV) is started, a lightning-like discharge may occur, damaging the substrate.
  • FIG. 5 in a state where high-frequency power is applied to the mounting table 2 (a state in which weak plasma is generated), a DC voltage to the electrostatic chuck electrode 4 a ( By starting application of HV), the occurrence of discharge can be suppressed.
  • the method of forming a weak plasma using Ar gas before the plasma processing such as etching, and the electric charge for the electrostatic chuck at that time has been described.
  • the electrostatic chuck 4 includes a bipolar type and a monopolar type, and these types include a Coulomb type and a Johnson-Rahbek type, respectively.
  • a monopolar electrostatic chuck 4 of Coulomb type it is preferable that the semiconductor wafer W is suctioned in the following sequence.
  • Figure 6 shows the sequence.
  • the horizontal axis represents time
  • the vertical axis represents the applied high-frequency power value (W) for the dotted line
  • V DC voltage value
  • the high-frequency power applied to the mounting table 2 when generating plasma for the first time is set to a lower high-frequency power (for example, about 500 W) than when processing is performed. Therefore, it is preferable that the temperature of the semiconductor wafer W does not rise. Also, when the semiconductor wafer W is removed from the electrostatic chuck 4, as shown in the figure, after the plasma processing is completed, first, the applied high-frequency power value is reduced to a power value (0 (Not W). After this, the application of DC voltage (HV) to the electrostatic chuck electrode 4a was stopped.
  • the application of high frequency power is stopped to extinguish the plasma.
  • a voltage for example, about 200 V
  • a voltage is applied to a to remove the charge and facilitate removal of the semiconductor wafer W.
  • the application of such a voltage of the opposite polarity is performed as needed. If the semiconductor wafer W can be easily removed from the controversial check 4 without applying the voltage of the opposite polarity, the application of the opposite polarity is performed. No voltage is applied.
  • Figure 4 shows the sequence of the chucking of the semiconductor wafer W by the electrostatic chuck 4 as described above.
  • the potential of the semiconductor wafer W becomes a potential of about 100 V minus the number of negative electrodes determined by the state of the plasma, as shown by 3 in the figure.
  • the DC voltage (HV) is applied to the surface of the semiconductor wafer W to the electrode 4 a for the electrostatic chuck. Since the accompanying high voltage is not applied, it is possible to prevent undesirable abnormal discharge from occurring on the surface of the semiconductor wafer W.
  • the DC voltage is turned OFF after the OFF
  • a large voltage is applied to the semiconductor wafer W as shown in FIG. 10 when the semiconductor wafer W is attracted or desorbed.
  • the surface of the semiconductor wafer W may be damaged, specifically, a chip having a diameter of about several m may be generated.
  • arcing may occur during etching and a product defect may occur.
  • the chipped particles become particles and may adhere to the surface of the semiconductor wafer W.
  • FIG. 11 shows the result of examining the difference in the number of adhered particles due to the difference in the magnitude of the DC applied voltage of the electrostatic chuck for adsorbing the semiconductor wafer W.
  • a CF-based reactant serving as a source of particles is attached to the processing chamber 1 of the plasma processing apparatus (seasoning), and then the semiconductor wafer W is loaded into the processing chamber and placed on the electrostatic chuck.
  • the semiconductor wafer W is placed on the semiconductor wafer W, and the processing gas is circulated for a certain period of time.After that, the semiconductor wafer W is neutralized and unloaded from the processing chamber.
  • the DC voltage of the electrostatic chuck is 0 V, 1.5 kV, 2.0 kV, and 2.5 kV. In each case, This shows the results of an investigation.
  • the pressure, gas used, wafer backside pressure, and temperature conditions when the semiconductor wafer W is placed on the electrostatic chuck and gas is passed are the same as described above. 60 seconds.
  • the static elimination of the semiconductor wafer W is performed by applying a pressure of 26.6 Pa, an applied voltage of 1.5 kV, a voltage application time of 1 second, and a pressure of 53.2 Pa.
  • N 100 sccm
  • time 15 seconds
  • static elimination of the electrostatic chuck was performed at an applied voltage of —2, OkV, and a voltage applied time of 1 second. It is to be noted that such static elimination is performed because the semiconductor wafer W after the process is conveyed may cause extra particles to adhere again if the semiconductor wafer W jumps when the semiconductor wafer W is transferred. Thereby, such a jump of the semiconductor wafer W does not occur.
  • FIG. 1 after the seasoning process, placing the semiconductor wafer W to the processing chamber in one, generates a large number of particles from the reactant deposited in seasoning step performed 0 2 Doraiku cleaning in this state
  • the number of particles adhering to the semiconductor wafer W is calculated in the order of RFON ⁇ HVON at the start of processing, HVOFF ⁇ RFOFF at the end of processing, and HVON ⁇ RFON at the start of processing and RFOFF ⁇ HVOFF at the end of processing. This shows the results of measurements for the case of the sequence described above.
  • the number of attached particles can be significantly reduced.
  • HV is applied (2), and thereafter, the semiconductor wafer W is placed on the mounting table 2 by lowering the wafer supporting pins (3, 4), and the semiconductor wafer w is also attracted.
  • the surface of the semiconductor wafer w does not reach the potential of the applied DC voltage (HV).
  • abnormal discharge that occurs when the electrostatic chuck is attracted by the above-described electrostatic chuck can be prevented by using a bipolar electrostatic chuck even with the same Coulomb-type electrostatic chuck.
  • the present invention is not limited to such an embodiment, and it is needless to say that the present invention can be used for any plasma processing. It is. Further, in the above embodiment, the case where the weak plasma is applied in the vacuum chamber of the etching apparatus for performing the etching process has been described.
  • the body wafer w can be initialized.
  • the plasma processing method and the plasma processing apparatus according to the present invention can be used in a semiconductor manufacturing industry or the like that manufactures semiconductor devices.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Analytical Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Drying Of Semiconductors (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

Dans la présente invention, du gaz argon est envoyé dans une chambre à vide (1). Dans ces conditions, une puissance haute fréquence relativement faible, de 300W par exemple, est envoyée à une plate-forme (2) (électrode inférieure) par une alimentation en puissance haute fréquence (11) afin de produire un plasma faible qui s'applique sur une tranche semi-conductrice (W) pour ajuster l'état d'une accumulation de charge dans cette dernière (W). Pendant cet ajustement, aucune tension CC (HT) n'est appliquée sur un mandrin électrostatique (4) pour faciliter le mouvement de la charge. On commence ensuite à appliquer une tension de courant continu sur le mandrin électrostatique (4) puis on envoie une puissance haute fréquence forte de 2000W par exemple pour effectuer un traitement normal, afin de produire un plasma fort permettant d'effectuer un traitement normal. On évite ainsi la cambrure de la surface qui peut se produire au niveau du substrat, ce qui améliore la productivité comparativement aux procédés classiques.
PCT/JP2003/010937 2002-08-30 2003-08-28 Procede de traitement au plasma et dispositif de traitement au plasma WO2004021427A1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
AU2003261790A AU2003261790A1 (en) 2002-08-30 2003-08-28 Plasma processing method and plasma processing device
US11/066,260 US7541283B2 (en) 2002-08-30 2005-02-28 Plasma processing method and plasma processing apparatus
US12/433,112 US7799238B2 (en) 2002-08-30 2009-04-30 Plasma processing method and plasma processing apparatus
US12/686,899 US8287750B2 (en) 2002-08-30 2010-01-13 Plasma processing method and plasma processing apparatus

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2002256096A JP4322484B2 (ja) 2002-08-30 2002-08-30 プラズマ処理方法及びプラズマ処理装置
JP2002/256096 2002-08-30

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KR (1) KR100782621B1 (fr)
CN (1) CN100414672C (fr)
AU (1) AU2003261790A1 (fr)
TW (1) TW200410332A (fr)
WO (1) WO2004021427A1 (fr)

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TWI324361B (fr) 2010-05-01
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