WO2003088341A1 - Method for forming underlying insulation film - Google Patents

Method for forming underlying insulation film Download PDF

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Publication number
WO2003088341A1
WO2003088341A1 PCT/JP2003/004125 JP0304125W WO03088341A1 WO 2003088341 A1 WO2003088341 A1 WO 2003088341A1 JP 0304125 W JP0304125 W JP 0304125W WO 03088341 A1 WO03088341 A1 WO 03088341A1
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Prior art keywords
film
plasma
insulating film
gas
base
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PCT/JP2003/004125
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English (en)
French (fr)
Japanese (ja)
Inventor
Takuya Sugawara
Yoshihide Tada
Genji Nakamura
Shigenori Ozaki
Toshio Nakanishi
Masaru Sasaki
Seiji Matsuyama
Kazuhide Hasebe
Shigeru Nakajima
Tomonori Fujiwara
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to US10/509,371 priority Critical patent/US7622402B2/en
Priority to JP2003585168A priority patent/JP4162601B2/ja
Priority to KR1020047011711A priority patent/KR100744590B1/ko
Priority to AU2003221055A priority patent/AU2003221055A1/en
Priority to EP03715674A priority patent/EP1492161A4/en
Publication of WO2003088341A1 publication Critical patent/WO2003088341A1/ja
Anticipated expiration legal-status Critical
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    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6529Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour
    • H10P14/6532Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour by exposure to a plasma
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    • H10D64/013Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332Making the insulator
    • H10D64/01336Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/0134Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid with a treatment, e.g. annealing, after the formation of the insulator and before the formation of the conductor
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    • H10D64/01302Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332Making the insulator
    • H10D64/01336Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/01344Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid in a nitrogen-containing ambient, e.g. N2O oxidation
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    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6548Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by forming intermediate materials, e.g. capping layers or diffusion barriers
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    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00Resistors, capacitors or inductors
    • H10D1/60Capacitors
    • H10D1/68Capacitors having no potential barriers
    • H10D1/682Capacitors having no potential barriers having dielectrics comprising perovskite structures
    • H10D1/684Capacitors having no potential barriers having dielectrics comprising perovskite structures the dielectrics comprising multiple layers, e.g. comprising buffer layers, seed layers or gradient layers
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    • H10D64/01302Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332Making the insulator
    • H10D64/01336Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/01342Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid by deposition, e.g. evaporation, ALD or laser deposition
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    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
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    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/693Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
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    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302Non-deposition formation processes
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    • H10P14/6328Deposition from the gas or vapour phase
    • H10P14/6334Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
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    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6328Deposition from the gas or vapour phase
    • H10P14/6334Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6339Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD
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    • H10P14/668Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
    • H10P14/6681Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
    • H10P14/6682Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
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    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/692Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
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    • H10P14/69Inorganic materials
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    • H10P14/6928Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • H10P14/693Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing hafnium, e.g. HfSiOx or HfSiON
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    • H10P14/6939Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal
    • H10P14/69391Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal the material containing aluminium, e.g. Al2O3
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    • H10P14/69Inorganic materials
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Definitions

  • the present invention relates to a method for forming an insulating film having good interface characteristics. More specifically, the present invention relates to a method of irradiating a plasma based on a processing gas containing at least an oxygen atom-containing gas to an insulating film to improve an interface property between the insulating film and the base material.
  • One influential method for solving such a problem is to form an extremely thin (for example, 10 A or less) base film on a base material and then form an insulating film on the base film.
  • an extremely thin (for example, 10 A or less) base film on a base material and then form an insulating film on the base film.
  • using a conventional thermal oxidation technique or plasma oxidation technique thin film thickness control using these techniques is difficult, such a thin underlayer is formed directly on the substrate for electronic devices. It was extremely difficult to form while controlling the speed and in-plane uniformity. Disclosure of the invention
  • An object of the present invention is to provide a method for forming a base film which has solved the above-mentioned disadvantages of the prior art.
  • Another object of the present invention is to provide a method for providing a high-quality base film for improving the characteristics of a transistor on an interface between an insulating film and a substrate for an electronic device.
  • an insulating film for example, a high-k material film
  • a base film is formed on a substrate for an electronic device as in the prior art.
  • a plasma based on a processing gas containing at least an oxygen atom-containing gas is transmitted through the insulating film, and the insulating film-substrate interface is formed. It has been found that the formation of a base film is extremely effective for achieving the above object.
  • the method for forming a base film according to the present invention is based on the above findings. More specifically, the method for forming a base film on a surface of an insulating film disposed on a substrate for an electronic device includes a process gas containing at least an oxygen atom-containing gas. A base film is formed on the interface between the insulating film and the substrate for an electronic device by irradiating the base film with plasma based on the base film.
  • an electronic device material including at least an electronic device substrate, an underlayer disposed on the substrate, and an insulating film disposed on the underlayer.
  • plasma active species for example, oxygen reactive species
  • a base film is formed near the interface.
  • a base film is formed directly on a substrate for electronic deposition. It is easier to control the film formation rate (that is, control the film formation time) than in the case of forming a film.
  • FIG. 1 is a schematic vertical sectional view showing an example of a semiconductor device that can be manufactured by the method for forming a base insulating film of the present invention.
  • FIG. 2 is a schematic plan view showing an example of a semiconductor manufacturing apparatus for performing the method for forming a base insulating film of the present invention.
  • FIG. 3 is a schematic diagram showing an example of a planar antenna (RLSA; sometimes called a Slope Plane Antenna or SPA) plasma processing unit that can be used in the method for forming a base insulating film of the present invention.
  • RLSA planar antenna
  • SPA Slope Plane Antenna
  • FIG. 4 is a schematic plan view showing an example of RLSA which can be used in the apparatus for forming a base insulating film of the present invention.
  • FIG. 5 is a schematic vertical sectional view showing an example of a heating reaction furnace unit that can be used in the method for forming a base insulating film of the present invention.
  • FIG. 6 is a schematic cross-sectional view showing an example of the surface of a silicon substrate on which a gate oxide film and a good insulating film are formed.
  • FIG. 7 is a schematic cross-sectional view showing an example of the plasma processing on the substrate surface.
  • FIG. 8 is a schematic cross-sectional view showing an example of film formation of the High-k material.
  • FIG. 9 is a schematic cross-sectional view showing an example of plasma processing on the surface of the High-k material.
  • Figure 10 shows an example of the formation of a gate electrode on a high-k material film.
  • FIG. 11 is a schematic cross-sectional view showing an example of the formation of a MOS capacitor.
  • FIG. 12 is a schematic cross-sectional view showing an example of source and drain formation by ion implantation (imbra).
  • FIG. 13 is a schematic cross-sectional view showing one example of an MS transistor structure obtained by the present invention.
  • Fig. 14 is a graph showing the change in electrical film thickness (T eq) with the oxidation time when oxidizing plasma treatment is performed on the oxide film formed by the RLSA oxidation process and the HfSiO film. It is.
  • Fig. 15 shows the electrical film thickness (T eq) and the uniformity of the electrical film thickness when the oxidized plasma treatment is performed on the oxide film formed by the RLSA oxidation process and the H f S i ⁇ film. This is a graph showing the change due to the oxidation time.
  • the surface of the insulating film disposed on the substrate for electron deposition is irradiated with plasma based on a processing gas containing at least an oxygen atom-containing gas, and the insulating film and the substrate for electronic devices are irradiated with plasma.
  • An underlayer is formed at the interface of the substrate.
  • the material constituting the insulating film that can be used in the present invention is not particularly limited, but from the viewpoint of a practical MOS transistor, a low dielectric constant Si 0 2 , S ON, S i N having a relatively high dielectric constant, or one or more selected from the group consisting of substances having a high dielectric constant called High _k material described below can be suitably used. It is.
  • the high-k material that can be used in the present invention is not particularly limited. However, from the viewpoint of the trend of a practical level MOS transistor, the value of k (relative dielectric constant) is 8 or more, and more preferably 10 or more. Are preferred.
  • H igh- k material A 1 2 0 3, Z r O 2, H f O 2, T a 2 O 5, and Z r S i O, H f S i O , etc.
  • One or two or more selected from the group consisting of aluminates such as ZrA1 ⁇ can be suitably used.
  • the above-mentioned substrate for electronic depice that can be used in the present invention, and it is possible to appropriately select and use one or a combination of two or more types of known substrates for electronic depice.
  • Examples of such an electronic device substrate include a semiconductor material, a liquid crystal device material, and the like.
  • Examples of the semiconductor material include, for example, a material containing single crystal silicon as a main component, higPaformmanceCMOS, and the like.
  • compositions, thickness, lamination mode, and the like of the base film there are no particular restrictions on the composition, thickness, lamination mode, and the like of the base film as long as the above-described interface characteristics of the insulating film can be improved. From the viewpoint of transistor characteristics, a base oxide film can be suitably used as the base film.
  • Such a base film preferably has a thickness of about 6 to 12 A, and more preferably has a thickness of about 6 to 8 A.
  • Treatment gas conditions In the preparation of the base film of the present invention, the following conditions can be suitably used from the viewpoint of the characteristics of the base film to be formed.
  • Noble gas e.g., Kr, Ar, He or Xe: 300-200 sccm, more preferably 100000-200 sccm,
  • O 2 l to 500 sccm, more preferably 10 to 300 sccm,
  • Temperature room temperature (25 ° C) to 500 ° C, more preferably 250 to 50 ° C
  • the insulating film may be annealed as needed.
  • the annealing conditions are not particularly limited, but a processing gas containing O 2 gas and / or N 2 gas can be suitably used from the viewpoint of transistor characteristics. Examples of conditions that can be suitably used in the present invention are shown below.
  • Noble gases e.g., Kr, Ar, He or Xe: 0 to 500 sccm, more preferably 0 to 100 scem,
  • O 2 10 to: L 00 sccm, more preferably 10 to 100 sccm,
  • N 2 100 to 500 sccm, more preferably 100 to 300 sccm,
  • Temperature room temperature (25 ° C) to 150 ° C, more preferably 600 ° to 150 ° C,
  • Pressure 100 to 101 kPa, more preferably lk to: LO lk P a,
  • the plasma that can be used in the present invention is not particularly limited, but it is preferable to use plasma having a relatively low electron temperature and high density in terms of easily obtaining a uniform thin film.
  • the characteristics of the plasma that can be suitably used in the present invention are as follows.
  • Plasma density uniformity ⁇ 10%
  • a plasma having a low electron temperature and high density is formed by irradiating a microwave through a planar antenna member having a plurality of slots.
  • the base film is formed using plasma having such excellent characteristics, a process with low plasma damage and high reactivity at low temperature can be performed.
  • the present invention by irradiating microwaves through a planar antenna member (compared to the case where a conventional plasma is used), there is an advantage that a high-quality base film can be easily formed. can get.
  • a good-quality base film can be formed. Therefore, by forming another layer (for example, an electrode layer) on the base film, it is easy to form a structure of a semiconductor device having excellent characteristics.
  • another layer for example, an electrode layer
  • a base film having suitable characteristics as described below can be easily formed. (Suitable characteristics of semiconductor structure)
  • the range to which the method of the present invention should be applied is not particularly limited, but a high-quality base film that can be formed by the present invention can be particularly suitably used as a gate insulating film having a MOS structure.
  • An extremely thin and high-quality base film that can be formed according to the present invention can be particularly suitably used as an insulating film of a semiconductor device (particularly, a gate insulating film of a MOS semiconductor structure).
  • the present invention it is possible to easily manufacture a MOS semiconductor structure having suitable characteristics as described below.
  • a standard such as that described in the literature (Physical Masatake Kishino, Mitsumasa Koyanagi, Maruzen P62 to 633 of VLSI devices) is used.
  • the characteristics of the underlayer can be evaluated. This is because, in such a standard MOS structure, the characteristics of the underlying film constituting the structure have a strong influence on the MOS characteristics.
  • FIG. 1 for a semiconductor device having a MOS structure having a gate insulating film as an insulating film.
  • reference numeral 1 denotes a silicon substrate
  • 11 denotes a field oxide film
  • 2 denotes a gate insulating film
  • 13 denotes a gate electrode.
  • the gate insulating film 2 comprises a base oxide film 21 and a high-k material 22 and a force.
  • an extremely thin and high quality base oxide film 21 can be formed.
  • the underlying oxide film 2 1 high this quality after forming the H igh- k Substance, in the presence of a process gas containing a ⁇ 2 and a rare gas, to be treated mainly containing S i Plasma is formed by irradiating the base material with a microphone mouth wave through a planar antenna member having a plurality of slots, and the plasma is used to generate an interface between the high-k material and the substrate.
  • a silicon oxide film hereinafter, referred to as “SiO 2 film”
  • SiO 2 film silicon oxide film
  • FIG. 2 is a schematic view (schematic plan view) showing an example of the entire configuration of a semiconductor manufacturing apparatus 30 for implementing the method for manufacturing an electronic deposition material of the present invention.
  • a transfer chamber 31 for transferring the wafer W (FIG. 2) is provided almost at the center of the semiconductor manufacturing apparatus 30, and the transfer chamber 31 is provided in the transfer chamber 31.
  • a heating unit 36 for performing various heating operations and a heating reactor 47 for performing various heating processes on the wafer are provided.
  • the heating reactor 47 may be provided separately and independently from the semiconductor manufacturing apparatus 30.
  • pre-cooling units 45 and cooling units 46 for performing various pre-cooling and cooling operations. are arranged respectively.
  • Transfer arms 37 and 38 are arranged inside the transfer chamber 31, and can transfer the wafer W (FIG. 3) to and from each of the units 32 to 36.
  • the loader arms 41 and 42 are arranged in front of the load units 34 and 35 in the figure. These loader arms 4 1 and 4 2 move wafers W in and out of the 4 cassettes 4 4 set on the cassette stage 4 3 arranged further in front of them. Can be.
  • both the plasma processing units 32 and 33 can be exchanged for a single-champ type CVD processing unit, and one or two plasma processing units 32 and 33 are provided at the positions of the plasma processing units 32 and 33. It is also possible to set a single single-champ type CVD processing unit.
  • a method of performing an oxidation treatment in the treatment unit 32 and then performing a nitridation treatment in the treatment unit 33 may be performed.
  • the treatment units 32 and 33 may be used.
  • the oxidation treatment and the nitridation treatment may be performed in parallel.
  • FIG. 3 is a schematic cross-sectional view in the vertical direction of a plasma processing unit 32 (33) that can be used for forming the gated green film 2.
  • reference numeral 50 denotes a vacuum vessel formed of, for example, aluminum.
  • An opening 51 larger than the substrate (for example, wafer W) is formed on the upper surface of the vacuum vessel 50, and a dielectric such as quartz-aluminum nitride is used so as to close the opening 51.
  • the configured flat cylindrical top plate 54 is provided on the side wall on the upper side of the vacuum vessel 50, which is the lower surface of the top plate 54.
  • gas supply pipes 72 are provided at, for example, 16 positions evenly arranged along the circumferential direction.
  • a processing gas containing at least one selected from O 2 , a rare gas, N 2, H 2, and the like is uniformly and uniformly supplied from the gas supply pipe 72 to the vicinity of the plasma region P of the vacuum vessel 50. It has become.
  • a high-frequency power supply unit is formed via a planar antenna member having a plurality of slots, for example, a planar antenna (RLSA) 60 formed of a copper plate.
  • RLSA planar antenna
  • a waveguide 63 connected to a microwave power supply unit 61 that generates a 5 GHz microwave is provided.
  • the waveguide 63 includes a flat circular waveguide 63 A having a lower edge connected to the RLSA 60, and a cylindrical waveguide having one end connected to the upper surface of the circular waveguide 63 A.
  • a coaxial waveguide converter 63 C connected to the upper surface of the cylindrical waveguide 63 B, and one end connected at right angles to the side surface of the coaxial waveguide converter 63. It is configured by combining a rectangular waveguide 63 D connected to the microphone mouth power supply 61 at the end.
  • one end of a shaft portion 62 made of a conductive material is connected to substantially the center of the upper surface of the RLSA 60, and the other end is a cylindrical waveguide 63B.
  • the waveguide 63B is configured as a coaxial waveguide so as to be connected to the upper surface of the waveguide.
  • a mounting table 52 for the wafer W is provided in the vacuum vessel 50 so as to face the top plate 54.
  • the mounting table 52 has a built-in temperature control unit (not shown), so that the mounting table 52 functions as a hot plate.
  • one end of an exhaust pipe 53 is connected to the bottom of the vacuum vessel 50, and the other end of the exhaust pipe 53 is connected to a vacuum pump 55. ' (One embodiment of RLSA)
  • FIG. 4 is a schematic plan view showing an example of RLSA60 that can be used in the electronic device material manufacturing apparatus of the present invention.
  • each slot 60a is a substantially rectangular through-groove, and adjacent slots are arranged so as to be orthogonal to each other and to form a letter "T" in an almost alphabetic shape. .
  • the length and arrangement interval of the slots 60a are determined according to the wavelength of the microphone mouth wave generated by the microwave power supply unit 61.
  • FIG. 5 is a schematic cross-sectional view in the vertical direction showing an example of a heating reaction furnace 47 that can be used in the apparatus for manufacturing an electronic deposition material of the present invention.
  • the processing chamber 82 of the heating reactor 47 is formed in an airtight structure by using, for example, an aluminum.
  • a heating mechanism and a cooling mechanism are provided in the processing chamber 82.
  • a gas introducing pipe 83 for introducing gas is connected to the center of the upper part of the processing chamber 82, and the inside of the processing chamber 82 and the inside of the gas introducing pipe 83 are communicated.
  • the gas introduction pipe 83 is connected to a gas supply source 84. Then, gas is supplied from the gas supply source 84 to the gas introduction pipe 83, and the gas is introduced into the processing chamber 82 via the gas introduction pipe 83.
  • various gases such as HTB-silane, which are raw materials for forming a high-k insulating film, can be used. If necessary, an inert gas can be used as a carrier gas. Can also.
  • a gas exhaust pipe 85 for exhausting the gas in the processing chamber 82 is connected to a lower portion of the processing chamber 82, and the gas exhaust pipe 85 is an exhaust device such as a vacuum pump. Connected to a step (not shown). By this exhaust means, gas in the processing chamber 82 is exhausted from the gas exhaust pipe 85, and the inside of the processing chamber 82 is set to a desired pressure.
  • a mounting table 87 for mounting the wafer W is disposed below the processing chamber 82.
  • the wafer W is mounted on the mounting table 87 by an electrostatic chuck (not shown) having substantially the same diameter as the wafer W.
  • the mounting table 87 has a heat source means (not shown) provided therein, and is formed in a structure capable of adjusting the processing surface of the wafer W mounted on the mounting table 87 to a desired temperature.
  • the mounting table 87 has a mechanism that can rotate the mounted wafer W as necessary.
  • an opening 82 a for taking in and out of the wafer W is provided on the wall of the processing chamber 82 on the right side of the mounting table 87, and the opening and closing of the opening 82 a is performed by the gate pulp 98. Is performed by moving the vertical direction in the figure.
  • a transfer arm (not shown) for transferring the wafer W is provided next to the right side of the gate valve 98, and the transfer arm enters and exits the processing chamber 82 through the opening 82a. Then, the wafer W is placed on the mounting table 87, and the processed wafer W is carried out of the processing chamber 82.
  • a shower head 88 as a shower member is provided above the mounting table 87.
  • the shower head 88 is formed so as to partition a space between the mounting table 87 and the gas introduction pipe 83, and is formed of, for example, aluminum or the like.
  • the shower head 88 is formed so that the gas outlet 83 a of the gas inlet pipe 83 is located at the center of the upper part, and the gas supply hole 89 provided at the lower part of the shower head 88 is formed. Gas is introduced into the processing chamber 82 I have.
  • 6 to 13 are schematic diagrams showing an example of each step in the method of the present invention.
  • a field oxide film, a channel impeller, and a sacrificial oxide film for element isolation are formed on the surface of the wafer W in a previous step. Thereafter, the sacrificial oxide film is removed.
  • gate pulp (not shown) provided on the side wall of the vacuum vessel 50 in the plasma processing unit 32 (FIG. 3) is opened, and the sacrificial oxidation shown in FIG.
  • the wafer W from which the film has been removed is placed on the mounting table 52 (FIG. 3).
  • the internal atmosphere is evacuated by the vacuum pump 55 through the exhaust pipe 53 to evacuate to a predetermined degree of vacuum and maintain the predetermined pressure.
  • a microwave of, for example, 2 cm 2 is generated from the microphone mouth-wave power supply unit 61, and the microwave is guided by a waveguide into the vacuum container 50 via the RLSA 60 and the top plate 54. Then, high-frequency plasma is generated in the upper plasma region P in the vacuum vessel 50.
  • the microwave is transmitted in a rectangular mode in a rectangular waveguide 63D, converted from a rectangular mode to a circular mode by a coaxial waveguide converter 63C, and is converted to a cylindrical coaxial waveguide in a circular mode.
  • the RLSA is transmitted through 63 B, and further transmitted in a state of being expanded by the circular waveguide 63 A, radiated from the slot 60 a of the RLSA 60, and transmitted through the top plate 54. It is introduced into the vacuum vessel 50. At this time, high density plasma is generated due to the use of microwaves.
  • the plasma since microwaves are radiated from a large number of slots 60a of the RLSA 60, the plasma has a high density.
  • krypton which is a processing gas for forming an oxide film
  • gas supply pipe 72 Prior to the introduction of the microphone mouth wave, krypton, which is a processing gas for forming an oxide film, is supplied from the gas supply pipe 72 while adjusting the temperature of the mounting table 52 to heat the wafer W to, for example, 400 ° C.
  • a rare gas such as argon or argon and a N 2 gas are introduced at a flow rate of, for example, 100 sccm and 40 sccm, respectively, and the process shown in FIG. 7 (nitriding process before high-k film formation) is performed. I do. By performing this process, it becomes possible to suppress the formation of a silicon oxide film at the interface between the high-k material and the silicon substrate during high-k film formation.
  • the wafer W is set in the heat treatment unit 47.
  • a high-k material is formed on the wafer W.
  • Tasharie butoxy hafnium (HT B: H f (OC 2 H 5) 4) and silane gas (S i H 4 ) are introduced at 1 sccm and 400 sccm, respectively, and the pressure is maintained at 5 OPa.
  • the flow rate of HTB is the flow rate of the liquid mass flow controller
  • the flow rate of the silane gas is the flow rate of the gas mass flow controller.
  • the above-mentioned silicon substrate is heated at 350 ° C. in that atmosphere, and Hf, Si and O reacting species are reacted on the substrate to form an HfSiO film.
  • Hf, Si and O reacting species are reacted on the substrate to form an HfSiO film.
  • a 4 nm HfSiO film is formed (Fig. 8).
  • the gate valve (not shown) is opened, and the transfer arms 37 and 38 (FIG. 2) enter the vacuum vessel 47 to receive the wafer W.
  • the transfer arms 37 and 38 take out the wafer W from the heat treatment unit 47 and then set it on a mounting table in the plasma processing unit 33.
  • the base oxide film for example, in a vacuum vessel 50, at a wafer temperature of, for example, 400 ° C. and a process pressure of, for example, 133 Pa (1 T 0 rr). and Ri by the gas introduction pipe argon gas into the container 5 in the 0, 0 2 and a gas, for example, be introduced at flow rates of 2 0 0 0 sccm, 2 0 0 sccm.
  • a microphone mouth wave of, for example, 2 W / cm 2 is generated from the microphone mouth wave power supply section 61, and this microwave is guided by a waveguide to cause the RLSA 60 b and the top plate 54 to pass through.
  • the high-frequency plasma is generated in the plasma region P on the upper side in the vacuum vessel 50.
  • the introduced gas is turned into plasma and oxygen radicals are formed. These oxygen radicals permeate the high-k material and react on the silicon substrate to form a SiO 2 film at the interface between the high-k material and the silicon substrate. In this way, as shown in FIG. 1 (b), a base oxide film 21 is formed at the interface between the high-k substance 22 on the wafer W and the silicon substrate 1.
  • a gate electrode 13 (FIG. 1 (a)) is formed on the wafer W on which the high-k material and the base oxide film are formed (FIG. 10).
  • the gate electrode is formed by the same heat treatment unit as shown in FIG. This heat treatment unit may be installed integrally with the semiconductor manufacturing apparatus 30 shown in FIG. 2, or may be processed by another apparatus.
  • processing conditions are selected according to the type of the gate electrode 13 to be formed. You can choose.
  • the gate electrode 1 3 of poly silicon for example as the process gas (Rokyoku forming gas)
  • the process gas Rokyoku forming gas
  • the S i H 4 1 0 ⁇ 5 0 0 pressure P a, 5 8 treating at a temperature of 0 ⁇ 6 8 0 ° C in the case of forming the gate electrode 1 3 consisting Amorufasushiri co down, for example as a process gas (electrode-forming gas), S i H 4
  • the treatment is carried out under a pressure of 100 to 500 Pa and a temperature of 500 to 580 ° C.
  • a planar antenna having a plurality of slots on a wafer W containing Si as a main component in the presence of a processing gas.
  • a plasma containing oxygen (o 2 ) and a rare gas is formed by irradiating a microwave through a member (RLSA), and an oxide film is formed on the surface of the substrate to be processed using the plasma. Since it is formed, the quality is high and the film quality can be controlled successfully.
  • MOS capacitor MOS capacitor
  • ion implantation implantation
  • source and a drain MOS capacitor
  • dopants channels, sources, drain-hemplined phosphorus (P), arsenic (A s), boron (B), etc.
  • a MOS transistor according to this embodiment is obtained through a wiring process that combines the subsequent processes of interlayer insulating film deposition, patterning, selective etching, and metal deposition (Fig. 13).
  • wiring processes are applied to the upper part of the transistor in various patterns, and a circuit is created to complete the logic device.
  • Hf silicate HfSIO film
  • an insulating film having another composition can be formed.
  • the conventionally used low dielectric constant SiO 2 and SiO 2 , and the high dielectric constant called Si N or high-K material with relatively high dielectric constant from a 1 2 0 3, Z r 0 2, H f 0 2, T a 205, and Z r S i O, H f S i O like Siri locate Ya Z r a l group consisting Arumine Doo O, etc.
  • the conventionally used low dielectric constant SiO 2 and SiO 2 and the high dielectric constant called
  • the method for forming a High-K material is arbitrary.
  • a film is formed by a plasma CVD method or a PVD method. It is also possible to do it.
  • the present embodiment focuses only on the effect of the plasma oxidation treatment, it can be applied to a plasma nitridation treatment instead of the plasma oxidation treatment, or a treatment combining the plasma oxidation treatment and the nitridation treatment. You.
  • Figures 14 and 15 show the uniformity of the electrical film thickness (T eq) and the electrical film thickness when the oxidized plasma treatment is performed on the oxide film and the HfSiO film formed by the RLSA oxidation process.
  • the change in the oxidation property (Range: the difference between the maximum and minimum values of T eq in the plane) with the oxidation time is shown.
  • the horizontal axis is the oxidation treatment time, and the vertical axis is Teq and Range.
  • the samples in Figs. 14 and 15 were prepared by the following method.
  • APM (a mixture of ammonia, hydrogen peroxide, and pure water) combined with HPM (a mixture of hydrochloric acid, hydrogen peroxide, and pure water) and DHF (a mixture of hydrofluoric acid and pure water) RCA cleaning removed sacrificial oxide and contaminants (metals, organics, particles).
  • the H PM concentration ratio of HC 1: H 2 0 2: H 2 O 1: 1: 5 at a temperature of 6 0 ° C
  • DHF concentration ratio of HF: H 2 O 1: 9 9 with temperature Is 23 ° C.
  • Processing is APM 10 minutes ⁇ pure water rinse 5 minutes ⁇ DHF 23 minutes ⁇ pure water rinse 5 minutes — HPMO ⁇ pure water rinse 5 minutes ⁇ final pure water rinse 10 minutes
  • IPA isopropyl alcohol, 220 ° C.
  • the substrate was kept at 700 ° C. and kept under an atmosphere (atmospheric pressure) of 200 sccm of NH 3 for 1 minute to form a thin nitride layer (SiN layer) on the substrate surface. Formed.
  • SiN layer thin nitride layer
  • a film of hafdium silicate (HfSio) was formed on the silicon substrate of the above item 2.
  • Tertiary ethoxy hafnium (HT B: H f ( ⁇ C 2 H 5) 4) and silane gas (S i H 4) was introduced by 1 sccm, 4 0 0 sccm, respectively, to maintain the pressure to 5 0 P a.
  • the flow rate of HTB is the flow rate of the liquid mass flow controller
  • the flow rate of the silane gas is the flow rate of the gas mass flow controller.
  • the silicon substrate described in 2 above was heated at 350 ° C, and the reactive species of Hf, Si, and O were removed on the substrate.
  • the H f SiO film was formed by the reaction. By controlling the process conditions including the processing time, a 4 nm HfSiO film was formed.
  • the RLSA plasma oxidation treatment was performed on the silicon substrate that had been subjected to the treatment 3 above.
  • a rare gas and oxygen were flowed at 200 sccm and 20 sccm, respectively, on the silicon substrate heated to 400 C, and the pressure was maintained at 67 Pa (500 mT 0 rr).
  • Via a plane antenna member (RLSA) having a plurality of slots in its atmosphere 2.
  • the plasma oxidation treatment was performed on the above-mentioned substrate 3 using this plasma.
  • An oxide film formed on the HfSIO film formed in the above (3) to (4), and an oxide film obtained by omitting the HfSIO film formation of 3 as a reference and performing only the oxidation treatment of 4 Titanium nitride (TiN) was formed as a gate electrode by CVD.
  • 3 a silicon substrate subjected to treatment 4 were heated at 5 5 0 ° C, 2 0 0 P T on the substrate under a pressure of a i C 1 4 gas 3 0 sccm, NH 3 gas 1 0
  • a 800 N thick TiN for an electrode was formed on the HfSiO film.
  • CV and characteristics of the 1000 ⁇ m 2 capacitor were evaluated.
  • CV characteristics were determined by sweeping the gate voltage from IV to about 12 V at a frequency of 1 MHz and evaluating the capacitance at each voltage.
  • the electrical film thickness was calculated from the CV characteristics.
  • FIG. 14 shows the electrical film thickness (Teq) when the oxidized plasma treatment is performed on the oxide film formed by the RLSA oxidation process and the HfSIO film.
  • the horizontal axis is the oxidation time, and the vertical axis is the electrical film thickness (Teq).
  • the reference oxide film has a thickness of 25 A or more when the oxidation time is 20 seconds or more.
  • the initial film thickness (approximately 16 A) is treated for a long time of 35 seconds or more.
  • the increase in electrical film thickness is suppressed to about 10 A. Since only rare gas and oxygen gas are used in the oxidation process, it is considered that this film increase is caused by oxygen. It is conceivable to increase the thickness of the film from the interface or the film itself (balta). At present, as a problem in the high-K material including the HfSIO film, there is crystallization by high-temperature annealing. This is believed to be due to the small absolute amount of Si atoms in the film. For this reason, it is unlikely that the increase in film due to the incorporation of oxygen into the film is due to the incorporation of ⁇ into the Si—Si bond. It is also generally known that the Hf—O bond is abundant.
  • the portion to be formed is a film increase from the substrate, that is, the formation of an oxide film at the interface. Therefore, it is considered that an extremely thin oxide film can be formed at the interface according to the present invention.
  • Figure 15 shows the uniformity of the electrical film thickness when the oxidized plasma treatment is performed on the oxide film formed by the RLSA oxidation process and the HfSio film (Range: the maximum Teq in the plane). (The difference between the value and the minimum value) depending on the oxidation time.
  • the horizontal axis is the oxidation treatment time, and the vertical axis is Range.
  • the RLSA oxide film of the reference does not change the value of Range much with respect to the processing time.
  • the processing time becomes longer. It was observed that the Range became smaller with an increase in, that is, the uniformity was improved.
  • this mechanism is as follows.
  • the main cause of the film increase is attributed to the increase of the oxide film at the interface, a strong film increase effect occurs in the thin film portion and a weak film increase effect occurs in the thick film portion. . Therefore, it can be considered that the non-uniformity of the film thickness was improved by performing RLSA oxidation, and the electrical film thickness became uniform. Therefore, the results in FIG. 15 can be said to support the above-described film-thickening mechanism in FIG.
  • the present invention it is possible to provide a method of providing a high-quality base film for improving the characteristics of an insulating film at an interface between the insulating film and a substrate for an electronic device.

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Chemical Vapour Deposition (AREA)
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EP1742273A4 (en) * 2004-04-09 2008-07-09 Tokyo Electron Ltd METHOD FOR FORMING A GATE INSOLATION FILM, STORAGE MEDIUM AND COMPUTER PROGRAM
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JP4850871B2 (ja) 2012-01-11
US20050255711A1 (en) 2005-11-17
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CN1967787A (zh) 2007-05-23
KR100744590B1 (ko) 2007-08-01
EP1492161A1 (en) 2004-12-29
CN100390945C (zh) 2008-05-28
JPWO2003088341A1 (ja) 2005-08-25
KR20040086317A (ko) 2004-10-08
AU2003221055A1 (en) 2003-10-27
JP2008277844A (ja) 2008-11-13
US7622402B2 (en) 2009-11-24
EP1492161A4 (en) 2006-05-24
CN1620720A (zh) 2005-05-25
TWI300249B (https=) 2008-08-21
CN100561684C (zh) 2009-11-18

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