TW399324B - The semiconductor device and its manufacturing method - Google Patents
The semiconductor device and its manufacturing method Download PDFInfo
- Publication number
- TW399324B TW399324B TW086119909A TW86119909A TW399324B TW 399324 B TW399324 B TW 399324B TW 086119909 A TW086119909 A TW 086119909A TW 86119909 A TW86119909 A TW 86119909A TW 399324 B TW399324 B TW 399324B
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- Prior art keywords
- nitride
- cylindrical
- oxide
- lower electrode
- semiconductor device
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
- H01L28/84—Electrodes with an enlarged surface, e.g. formed by texturisation being a rough surface, e.g. using hemispherical grains
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
- H01L28/90—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
Abstract
Description
第86119909號專利申請案 中文說明書修正頁(88午7月） A7 B7 修正 一 五、發明説明（9 圖示本發明之實施例4的丰導础世苗、，、 〃亍泽體裝置心上部電極 侧的介面之氮化纽層的製造方法； '· ·. ; 圖9 發明之實施例5的半導體裝置之斷面圖； 經濟部中央標準局員工消費合作社印製 例。 [圖示 101 中之參照數號] 矽基板； 102 元件分離區域； 103 字元線 ' 104 絕緣膜； 105 矽插塞 ， 106 位元線； 107 、絕緣膜 ， 108 矽插塞； 109 下部電極； 110 上部電極； 111 絕緣膜 > 112 鈦； 113 矽化鈦 114 氮化鈥； 115 鎢； 116 偵測放大器用MOS電 201 絕緣膜 202 矽插塞； 203 多晶珍 204 氧化赵；. 205 氮化鈦 301 絕緣膜； 302 碎插塞 303 氮化叙； 304 氧化is 305 氮化敲； 401 矽氧化膜； 402 矽插塞； 403 氮化鈕 404 氧化叙； 405 氮化鈦 406 絕緣膜； 501 絕緣膜 502 矽插塞； 503 絕緣膜 504 氧化叙； 505 埋藏材淨 + ； 506 氮化麵； 507 氧化赵 508 氮化鈦； 601 氮化鈦 602 氧化钽； 之 (請先閲讀背面之注意事項再填寫本頁} 訂 12- 本紙張尺度適用中國困家標準（ CNS > 八4胁（210X297公釐） 經濟部中央標準局員工消費合作社印製 A7 B7 五、發明説明（1 ) [發明説明] 本發明係關於記憶數位資訊的半導體裝置及其製造方 法。尤有關於適用於256百萬位元（MB)DRAM等大容量記憶 装置的半導體裝置及其製造方法。 [發明背景] 由一個切換電晶體與一個電容器組合在一起構成一個記 憶元件之DRAM的容量快速的變大。 而爲了實現此記憶體容量的變大，必須確保在較小的面 積上仍能保持電容器具有相同的電容器量。 習知技術中，在4撾&或16MB等DRAM中，係使用多氧化 發/氮化矽之二層膜作爲介電層材料。 進—步增大記憶體容量的情況下’採用上述介電層材料 以確保電容器量會產生困難，此時可使用介電常數較大的 氧化纽來取代氮化矽作爲介電層材料。 圖2表示習知的半導體裝置中電容器的斷面圖。該圖2 中：201爲絕緣膜、202爲矽插塞、203爲多晶矽、204爲氧 化挺、205爲氮化鈦。 一 如圖2所示，習知的半導體裝置之電容器包含：絕緣膜 201矽插塞202、多晶矽2〇3、氧化銓204及氮化鈦205。 在前f習知的半導體裝置之電容器部，多晶矽203形成爲 島狀作爲f部電極之用，此多晶硬2〇3連接於絕緣膜2 〇 1所 包圍的矽插塞202(實際上連接於其他導體）。 此外，前述習知的半導體裝置中’氮化矽以外亦可採用 ;1電㊉數較大的氧化钽，形成覆蓋下部電極之氧化妲⑽以 (請先閱讀背面之注意事t再填寫本頁)Revised page of Chinese Specification for Patent Application No. 86119909 (88 noon-July) A7 B7 Amended 5. Description of the invention (9 shows the upper part of the princely seedlings of Example 4 of the present invention Method of manufacturing a nitrided button layer on the electrode-side interface; Figure 9 is a cross-sectional view of a semiconductor device according to a fifth embodiment of the invention; an example printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs. Reference number] silicon substrate; 102 element separation area; 103 word line '104 insulating film; 105 silicon plug, 106 bit line; 107, insulating film, 108 silicon plug; 109 lower electrode; 110 upper electrode; 111 Insulation film> 112 Titanium; 113 Titanium silicide; 114 Nitridation; 115 Tungsten; 116 MOS for detection amplifier 201 Insulation film 202 Silicon plug; 203 Polycrystalline 204 Oxide; 205 Titanium nitride 301 Insulation film 302 broken plug 303 nitride nitride; 304 oxide is 305 nitride nitride; 401 silicon oxide film; 402 silicon plug; 403 nitride button 404 oxide oxide; 405 titanium nitride 406 insulating film; 501 insulating film 502 silicon plug Stopper 503 insulation film 504 oxidation; 505 buried material net +; 506 nitride surface; 507 oxide Zhao 508 titanium nitride; 601 titanium nitride 602 tantalum oxide; of (Please read the precautions on the back before filling in this page} Order 12 -This paper size applies to Chinese standards for households (CNS > Ya 4 threats (210X297 mm) Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (1) [Invention description] This invention is about the memory digital Information semiconductor device and its manufacturing method. Particularly, it relates to a semiconductor device suitable for large-capacity memory devices such as 256 million bit (MB) DRAM and its manufacturing method. [Background of the Invention] A switching transistor is combined with a capacitor in The capacity of the DRAM that constitutes a memory element quickly increases. In order to increase the capacity of the memory, it must be ensured that the capacitors can still maintain the same amount of capacitors in a small area. In the conventional technology, at 4 In DRAMs such as Laos & or 16MB, a poly-oxide / silicon nitride two-layer film is used as the dielectric layer material. Further increase the memory capacity. The above-mentioned dielectric layer material may cause difficulty in ensuring the amount of capacitor, and at this time, an oxide button having a large dielectric constant may be used instead of silicon nitride as the dielectric layer material. FIG. 2 shows a cross-sectional view of a capacitor in a conventional semiconductor device. In this figure: 201 is an insulating film, 202 is a silicon plug, 203 is polycrystalline silicon, 204 is an oxide tap, and 205 is titanium nitride. As shown in FIG. 2, a capacitor of a conventional semiconductor device includes an insulating film 201, a silicon plug 202, polycrystalline silicon 203, hafnium oxide 204, and titanium nitride 205. In the capacitor portion of the conventional semiconductor device, polycrystalline silicon 203 is formed into an island shape for the f-part electrode. This polycrystalline silicon is connected to the silicon plug 202 surrounded by the insulating film 201 (actually connected). On other conductors). In addition, the conventional semiconductor devices described above can also be used in addition to silicon nitride; 1 tantalum oxide with a large electric field to form a hafnium oxide covering the lower electrode (please read the precautions on the back before filling this page )
第86119909號專利申請案 中文說明書修正頁(88年7月） A7 B7Patent Application No. 86119909 Amendment of Chinese Manual (July 88) A7 B7
五、發明説明（1〇 ) 603 氮化钽； 604 氧化钽； 605 氛化叙； 606 絕緣膜； 607 矽插塞； 701 絕緣膜； 702 矽插塞； 703 多晶碎； 704 氮化鋰； 705 氧化鈕； 706 氮化鈦； 801 氮化鈕； 802 氧化钽； 803 氮化妲； 804 氮化鈦； 805 絕緣膜； 806 矽插塞； 901 多晶秒； 902 粗糙矽； 903 氮化鈕； 904 氧化矽； 905 氮化钽； 906 上部電極； 907 絕緣膜； ----1---1---ί 裝-- (請先閲讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 908 矽插塞。 [較佳實施例之詳細說明] (實施例1) 以下說明根據本發明之實施例1的半導體裝置及其製造方 法。此半導體裝置具有一圓柱形、立體化的電容器構造為 其構成元件，該電容器構造包含：一圓柱形下部電極，由 氮化组構成；一介電層，由形成於該圓柱形下部電極之上 的多晶氧化叙構成；及一上部電極，由形成於該介電層之 上的氮化鈥所構成。 圖1表示本實施例的半導體裝置之斷面圖。在圖1中， 101為矽基板、102為元件分離區域、103為字元線、104為 絕緣膜、105為矽插塞、106為位元線、107為絕緣膜、108 為矽插塞、109為下部電極、110為上部電極、111為絕緣 膜、112為鈦、113為矽化鈦、114為氮化鈦、115為鎢、116 為偵測放大器用MOS電晶體。 13- 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -s A7 B7 經濟部中央標準局貝工消費合作社印聚 五、發明説明（2 :爲介電層’然後復蓋於其上並設有氮化飲205作爲上部電 極，構成電容器。 “類似例者有揭示於曰本發明公開公報·特開平⑷449之 ‘半導體裝£的製造方法” ’其提供-種對於256 Μ位元以 上（含）的DRAM中所使用的半導體裝置之電容器元件部而 S ’使其更進-步地薄膜化，而形成較少漏電電流特性之 方法。 則U方要包含以下步驟：除去作爲電容器心件之下 邵電極的多，碎電極表面的自然氧化膜；形成作爲電容器 絕緣膜之有不純物的氧化㈣；形成由氮錢構成的 上部電極聲i [本發明欲赛決之問題] 上述習知技術有以下問題。 第一個問題：形成氧化钽後施與熱處理的話，氧化鈕會 與下部電極的梦起反應而生成氧化#，&於此生成之氧二 矽的介電常數很低，因此會造成電容値的降低。 f 了避免這個問題，有人提扣將矽表面加以氮化以提高 耐乳化性’防止氧切產生的方法。此種方法實際上很難 完全防止氧化矽的產生，因此很難完全防止電容値的 低。 第二個問題：形成島狀的下部電極。 眾所周知者，電容器的電容値係正比於電極面積的大 小，故爲了確保較大的電容値需要使下部電極爲圓柱形。 習知的方法中，有採用多晶矽以得到圓柱形下部電極的 (请先聞讀背面之注意事項存填寫本f ) • m -HI I -I · -5- B7 五、發明説明（3 ) 方法’但是在避免氧化碎產生之目的下，作爲多晶砂以外 的材料者’採用例如半導體製造技術上廣泛使用的轉_兼 成圓柱形下:淘疫電極有其困難。 ；' Ή Μ 換言之，：g用一般的漱艘法所形成的嫣由於缺乏#巍覆 蓋性，故階底部之薄膜厚度變薄，在形成圓柱形0|:遍程 會有破壞埃的影響。 第三個問題：非晶系（amorph〇us)之氧化姮缺乏耐熱性。 在DRAM用半導體製造過程中，形成電容器之後需要進 行内連線以相互連接複數個元件，構成電路，此時係對於 已形成的電容器施予400。0450。(：的熱處理。 藉由上述熱處理，通過氧化麵本身而流過的漏電電流明 顯地增大，因此難以保證預定的特性。 第四個問題：爲了避免第三個問題，進行高溫氧化熱處 理以使氧化la結晶時，下部電極之鎢會顯著地被氧化，結 果氧化4a會剥離，電容器之構.成變得困難。 本發明之目的係提供一種在氧化鈕與下部電極的介面的 膜構造及方法，該膜構造及方祛用以使得氧化矽不會產 生。 。 本發明之其他目的在於提供一種能夠實現不產生上逑氧 化妙的膜構造，及圓柱形的電容器構造之方法。 本發明之其他目的在於提供一種改善氧化妲之耐瓿性的 方法。 … j 本發明之其他目的在於提供一種非常良好的電容器構 & ’其在以氧化短作爲介電材料的電容器中，能確保較大 經濟部中央標準局員工消費合作社印裝 A7 ^^--—_____B7 五、發明説明（4 ) · 的電容量，且具有卓越的耐熱性。 本發明之上述及其他目的與新穎特徵在經本案説明金之 揭示内容及所附圖式之說明下將更明瞭。 [發明概述] 本發明之代表例的概要如下所述： (1) 一種具備圓柱形、立體化之電容器構造的半導體裝 置其特徵在於該電容器構造包含：圓柱形下部電極，由 氮化钽構成；介電層，由形成於前述圓柱形下部電極之上 的多晶氧化鈕構成；及上部電極，由形成於前述介電層之 上的氮化鈥構成。 前述半導體裝置中，圓柱形下部電極係使用氮化钽，因 此形成一種與多晶氧化钽構成的介電層相接的面處不會產 生氧化矽的構造。 (2) —種具備圓柱形、立體化之電容器構造的半導體裝 置，其特徵在於該電容器構造包含：圓柱形下部電極，由 氮化钽構成；介電層，由形成於前述圓柱形下部電極之上 的多晶氧化妲構成；氮化鈿層…形成於前述介電層的表 面；及上部電極，由形成於前述氮化钽層之上的氮化鈦或 是多晶秒構成。 前述半導體裝置中，圓柱形下部電極除了使用氮化钽之 外，且在介電層與氮化鈦或多晶矽構成的上部電極之間有 氮化钽層，因此形成一種與多晶氧化钽構成的介電層相接 的面處不會產生氧化矽的構造。 (3) —種具備圓柱形、立體化之電容器構造的半導體裝 本紙張尺度適用中國國家標準（CNS ) Λ4規格（210X 297公着） {請先閲讀背面之注意事項再填寫本頁j -訂 A7 B7 五、發明説明（5 ) ' 置’其特徵在於該電容器構造包含：圓柱形下部電極，由 表面以氮化輕覆蓋的氮化鈦或多晶矽構成；介電層，由形 成於前述圓柱形下部電極之上的多晶氧化鈕構成；及上部 電極’由形成於前述介電層之上的氮化鈦構成。 前述半導體裝置中，由氮化鈦或多晶矽所構成的圓柱形 下部電極以氮化鈕加以覆蓋，因此形成一種與多晶氧化鈕 構成的介電層相接的面處不會產生氧化矽的構造。 (4) 一種具備圓柱形、立體化之電容器構造的半導體裝 置，其特徵在於該電容器構造包含：圓柱形下部電極，由 表面以IL化麵覆蓋的氮化鈇或多晶碎構成；介電層，由形 成於前述圓柱形下部電極之上的多晶氧化钽構成；氮化鈕 層’形成於前述介電層之表面；及上部電極，由形成於前 述氮化妲層之上的氮化鈦或多晶矽構成。 前述半導體裝置中，由氮化鈦或多晶矽所構成的圓柱形 下部電極以氮化钽加以覆蓋，且在介電層與氮化鈦或多晶 沙構成的上部電極之間有氮化輕層，因此形成一種與多晶 氧化钽構成的介電層相接的面處邛會產生氧化矽的構造。 (5) —種具備圓柱形、立體化之電容器構造的半導體裝置 之製造方法，該方法至少包含以下步驟：使用藉由化學氣 相成長法生成的氧化妞形成圓柱形構造：施與熱氮化處 理，使該氧化钽轉變成氮化钽以形成下部電極，然後利用 化學氣相成長法沉積作爲介電層的氧化钽，施與氧化處 理，接著藉由使用無機原料的化學氣相成長法，沉積作爲 上部電極的氮化鈦。 -8- 尽紙侏尺度通用肀國國家標準（CNS ) A4規格（2丨0X297公釐） ^ :----- (請先閱讀背面之注意事項再填寫本頁) *1Τ 經濟部中央標準局員工消費合作社印製 A7 A7 B7 、發明説明（6 述半導體裝置的製造方法中，使用藉由化學氣相成長 理==氧化妲以形成圓柱形構造，然後施與熱氮化處 Μ 化⑯轉換成氮化纽’而形成由氮化1^構成的圓 枉开;ί下部電極。 其、士 Μ用化學氣相成長法沉積作爲介電層的氧化鈕， :與氧化處理，接著藉由使用無機原料的化學氣相成長 …沉積作爲上部電極的氮化鈦，形成圓柱形、立體化的 電容器構造。 、t種具備圓柱形、立體化之電容器構造的半導體裝置 〈裟造万法’該方法至少包含以下步驟：使用藉由化學氣 相成長法生成的氧化㈣成圓柱形構造；施與散氣 理，，該氧化运轉變成氮化艇以形成下部電極；然後利用 化學氣相成長法沉積作爲介電層的氧化钽，施與氧化處 理;，接著藉由熱氮化處理’使經氧化處理的氧化妲表面變 換成氮化钽；再藉由使用無機原料的化學氣相‘成長法，沉 積作爲上部電極的多晶矽或氮化鈦。 前述半$體裝置的製造方法&用藉&化學氣相成長 法而生成的氧化钽以形成圓柱形構造；然後施與熱氮化處 理以使該氧化妲轉換成氮化鈀，而形成由氮化鈕構成的圓 柱形下部電極。 其次，利用化學氣相成長法沉積作爲介電層的氧化妲， 施與氧化處理；接著藉由熱氮化處理，使經氧化處理的氧 化4s表面變換成氮化艇。 如前所述，氧化钽表面變換成氮化妲後，藉由使用無機 9- 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） (請先閱讀背面之注意事硕再填寫本頁} 、^ 經濟部中央標準局負工消費合作社印$ 产，\m - - L- - . . i _ __Γ J— n I— n n n n n _ If In A7 B7 五、發明説明（: 原料的化學氣相成長法，沉積作爲上部電極的多晶矽或氮 化欽’形成圓柱形、立體化的電容器構造。 請 先 閱 it 背 ιέ 之- 意 事. 項 再 填 寫 本 頁 (7)—種具備圓柱形、立體化之電容器構造的半導體裝置 <製造方法，該方法至少包含以下步驟：使用藉由化學氣 相成長法生成的多晶矽或氮化鈦形成圓柱形構造；然後在 ，多晶矽或氮化鈦表面僅選擇性地形成氧化钽；再施與熱 氮化處理，使該氧化钽轉變成氮化钽以形成下部電極；然 後利用化學氣相成長法沉積作爲介電層的氧化鈕，施與氧 化處理；接著藉由熱氮化處理，使經氧化處理的氧化鈕表 面變換成氮化钽；再藉由使用無機原料的化學氣相成長 法’沉積作爲上部電極的多晶矽或氮化鈦。 訂 前述半導體裝置的製造方法中，使用藉由化學氣相成長 法而生成的多晶矽或氮化鈦以形成圓柱形構造；然後在該 多晶矽或氮化鈦表面僅選擇性地形成氧化銓；接著施與熱 氮化處理以使該氧化妲轉換成氮化钽，而形成下部電極。 其次，利用化學氣相成長法沉積作爲介電層的氧化銓， 施與氧化處理；接著藉由熱氮仳處理，使經氧化處理的氧 化妞表面變換成氮化鈕。 經濟部中央標準局負工消费合作社印家 如前所述，氧化钽表面變換成氮化钽後，藉由使用無機 原料的化學氣相成長法，沉積作爲上部電極的多晶梦或氮 化鈥’形成圓柱形 '立體化的電容器構造。 综合上述，根據本發明的半導體裝置，由於與氧化钽相 接的面處設有氤化备，故成爲—種在氧化Μ下部電板的 介面處不會生成氧化矽的構造。 -10 本紙張尺度適用中國國家標準（CNS ) A4規格（2l〇x 297公楚：） 五、發明説明（8 A7 B7 再者’根據本發明的半導體裝置之製造方法’藉由利用 化學氣相成長法生成的氧化㈣成陳㈣M Γ:::實Tr絕緣體的氧化㈣變成導體的氮化 造。實現不度生氧化梦的膜構造及圓柱形的電容器構 知此外’根據本發明的半導體裝s及其製造方法，藉由在氮化钽上設£氧化钽，使得氧化熱處理成爲可能，因β此能 夠得到具有良好熱安定性的多晶氧化鈕，而改善氧化鈕之 耐熱性。 [圖示之簡單説明] 藉由下文的描述以及附圖，當能對前述本發明的目的、 優點、以及特徵更加明瞭，其中： 圖1爲本發明之實施例i的半導體裝置之斷面圖； 圖2爲習知的半導體裝置之電容器的斷面圖； 圖3爲本發明之實施例i的半導體裝置之電容器構造的斷 面圖； 圖4爲習知的半導體裝置之氧仡矽所生成的電容器構造的 斷面圖_ 圖 ½ ^ 請 先 閱 讀 背 面 之· 注 意 ί- 再 填 本 頁 1Τ 經濟部中央標準局員工消費合作社印顰 法； 圖 法 示本發明之實施例1的半導體裝置之製造方 表示本發明之實施例2的半導體裝置之製造方 圖7示意表示本發明之實施例3的半導體裝置之製造方 法； -11 本紙張尺度適用中國國家標隼（CNS ) Α4現格（210X 297公釐） 第86119909號專利申請案 中文說明書修正頁(88午7月） A7 B7 修正 一 五、發明説明（9 圖示本發明之實施例4的丰導础世苗、，、 〃亍泽體裝置心上部電極 侧的介面之氮化纽層的製造方法； '· ·. ; 圖9 發明之實施例5的半導體裝置之斷面圖； 經濟部中央標準局員工消費合作社印製 例。 [圖示 101 中之參照數號] 矽基板； 102 元件分離區域； 103 字元線 ' 104 絕緣膜； 105 矽插塞 ， 106 位元線； 107 、絕緣膜 ， 108 矽插塞； 109 下部電極； 110 上部電極； 111 絕緣膜 > 112 鈦； 113 矽化鈦 114 氮化鈥； 115 鎢； 116 偵測放大器用MOS電 201 絕緣膜 202 矽插塞； 203 多晶珍 204 氧化赵；. 205 氮化鈦 301 絕緣膜； 302 碎插塞 303 氮化叙； 304 氧化is 305 氮化敲； 401 矽氧化膜； 402 矽插塞； 403 氮化鈕 404 氧化叙； 405 氮化鈦 406 絕緣膜； 501 絕緣膜 502 矽插塞； 503 絕緣膜 504 氧化叙； 505 埋藏材淨 + ； 506 氮化麵； 507 氧化赵 508 氮化鈦； 601 氮化鈦 602 氧化钽； 之 (請先閲讀背面之注意事項再填寫本頁} 訂 12- 本紙張尺度適用中國困家標準（ CNS > 八4胁（210X297公釐） 第86119909號專利申請案 中文說明書修正頁(88年7月） A7 B7V. Description of the invention (10) 603 tantalum nitride; 604 tantalum oxide; 605 atmosphere; 606 insulating film; 607 silicon plug; 701 insulating film; 702 silicon plug; 703 polycrystalline; 704 lithium nitride; 705 oxide button; 706 titanium nitride; 801 nitride button; 802 tantalum oxide; 803 hafnium nitride; 804 titanium nitride; 805 insulating film; 806 silicon plug; 901 polycrystalline seconds; 902 rough silicon; 903 nitride button 904 silicon oxide; 905 tantalum nitride; 906 upper electrode; 907 insulating film; ---- 1 --- 1 --- ί installation-(Please read the precautions on the back before filling this page) Central of the Ministry of Economic Affairs Standard Bureau employee consumer cooperative prints 908 silicon plugs. [Detailed description of preferred embodiment] (Embodiment 1) A semiconductor device and a manufacturing method thereof according to Embodiment 1 of the present invention will be described below. The semiconductor device has a cylindrical, three-dimensional capacitor structure as a constituent element. The capacitor structure includes: a cylindrical lower electrode composed of a nitride group; and a dielectric layer formed on the cylindrical lower electrode. A polycrystalline oxide structure; and an upper electrode, which is composed of nitride formed on the dielectric layer. FIG. 1 shows a cross-sectional view of the semiconductor device of this embodiment. In FIG. 1, 101 is a silicon substrate, 102 is an element separation area, 103 is a word line, 104 is an insulating film, 105 is a silicon plug, 106 is a bit line, 107 is an insulating film, 108 is a silicon plug, 109 is a lower electrode, 110 is an upper electrode, 111 is an insulating film, 112 is titanium, 113 is titanium silicide, 114 is titanium nitride, 115 is tungsten, and 116 is a MOS transistor for a detection amplifier. 13- This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) -s A7 B7 Printed by the Bayer Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs. 5. Description of the invention (2: for the dielectric layer) and then covered in A nitrided beverage 205 is provided thereon as an upper electrode to constitute a capacitor. "Similar examples are disclosed in the" Manufacturing Method of a Semiconductor Device "disclosed in Japanese Laid-Open Patent Publication No. Hei 449." The capacitor element portion of a semiconductor device used in a DRAM that is more than one yuan (inclusive) is a method for further thinning the film and forming less leakage current characteristics. The U-side must include the following steps: There are many Shao electrodes under the core of the capacitor, and the natural oxide film on the surface of the broken electrode is formed; the plutonium oxide with impurities as the insulating film of the capacitor is formed; the upper electrode sound consisting of nitrogen is formed [the problem to be solved by the present invention] The conventional technique has the following problems. The first problem: if tantalum oxide is formed and heat treatment is applied, the oxidation button will react with the dream of the lower electrode to generate oxide #, and the oxygen generated here The dielectric constant of the two silicon is very low, so it will cause a decrease in capacitance. F To avoid this problem, some people have mentioned the method of nitriding the surface of the silicon to improve the emulsification resistance and prevent the oxygen cutting. This method is actually It is difficult to completely prevent the generation of silicon oxide, so it is difficult to completely prevent the capacitance from being low. The second problem is to form an island-like lower electrode. As everyone knows, the capacitance of a capacitor is proportional to the size of the electrode. For large capacitors, it is necessary to make the lower electrode cylindrical. Among the known methods, polycrystalline silicon is used to obtain the cylindrical lower electrode (please read the precautions on the back and fill in this f) • m -HI I -I · -5- B7 V. Description of the invention (3) Method 'But for the purpose of avoiding the generation of oxidized debris, as a material other than polycrystalline sand', adopt, for example, a semiconductor widely used in semiconductor manufacturing technology. The epidemic electrode has its difficulties. Ή Ή Μ In other words, because of the lack of # 巍 covering properties, the thin film formed by the general method of boat washing becomes thinner, and the cylindrical bottom is formed. : The process will have the effect of damaging the Angstrom. The third problem: the lack of heat resistance of the amorphous oxide (amorphoos). In the semiconductor manufacturing process for DRAM, after the capacitor is formed, internal wiring is required to connect plural numbers to each other. Each element constitutes a circuit. At this time, the formed capacitor is subjected to 400. 0450. (: heat treatment. With the above heat treatment, the leakage current flowing through the oxide surface itself is significantly increased, so it is difficult to ensure a predetermined Characteristics. Fourth problem: In order to avoid the third problem, when the high temperature oxidation heat treatment is performed to crystallize the oxidation la, the tungsten of the lower electrode will be significantly oxidized, and as a result, the oxidation 4a will be peeled off, and the capacitor construction becomes difficult. An object of the present invention is to provide a film structure and method at an interface between an oxidation button and a lower electrode, and the film structure and method are used to prevent silicon oxide from being generated. . Another object of the present invention is to provide a method capable of realizing a film structure that does not generate a oxidative oxidation and a cylindrical capacitor structure. Another object of the present invention is to provide a method for improving the ampoule resistance of thorium oxide. … J Another object of the present invention is to provide a very good capacitor structure & 'It can ensure that the capacitors with short oxidation as the dielectric material can ensure the printing of A7 by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs ^^- —_____ B7 V. Description of the invention (4) · The electric capacity and excellent heat resistance. The above and other objects and novel features of the present invention will be made clearer by the disclosure of the specification and the attached drawings. [Summary of the Invention] The outline of a representative example of the present invention is as follows: (1) A semiconductor device having a cylindrical, three-dimensional capacitor structure characterized in that the capacitor structure includes a cylindrical lower electrode composed of tantalum nitride; The dielectric layer is composed of a polycrystalline oxide button formed on the aforementioned cylindrical lower electrode; and the upper electrode is composed of nitride formed on the aforementioned dielectric layer. In the aforementioned semiconductor device, tantalum nitride is used for the cylindrical lower electrode, so that a structure in which silicon oxide is not formed at a surface in contact with a dielectric layer made of polycrystalline tantalum oxide is formed. (2) A semiconductor device having a cylindrical, three-dimensional capacitor structure, characterized in that the capacitor structure includes: a cylindrical lower electrode composed of tantalum nitride; and a dielectric layer formed of the cylindrical lower electrode. The polycrystalline hafnium oxide is formed on the surface; the hafnium nitride layer is formed on the surface of the foregoing dielectric layer; and the upper electrode is formed of titanium nitride or polycrystalline silicon formed on the tantalum nitride layer. In the foregoing semiconductor device, in addition to tantalum nitride, the cylindrical lower electrode has a tantalum nitride layer between the dielectric layer and the upper electrode made of titanium nitride or polycrystalline silicon, so a polycrystalline tantalum oxide is formed. No structure of silicon oxide is generated at the surfaces where the dielectric layers meet. (3) —Semiconductor mounting paper with cylindrical and three-dimensional capacitor structure Applicable to Chinese National Standard (CNS) Λ4 specification (210X 297) {Please read the precautions on the back before filling in this page A7 B7 5. Description of the invention (5) The feature of the capacitor is that the capacitor structure includes: a cylindrical lower electrode composed of titanium nitride or polycrystalline silicon whose surface is lightly nitrided; a dielectric layer formed of the aforementioned cylindrical shape The polycrystalline oxide button is formed on the lower electrode; and the upper electrode is formed of titanium nitride formed on the dielectric layer. In the foregoing semiconductor device, a cylindrical lower electrode composed of titanium nitride or polycrystalline silicon is covered with a nitride button, so a structure is formed in which silicon oxide is not generated at a surface contacting a dielectric layer composed of a polycrystalline oxide button. . (4) A semiconductor device having a cylindrical, three-dimensional capacitor structure, characterized in that the capacitor structure includes: a cylindrical lower electrode composed of hafnium nitride or polycrystalline debris whose surface is covered with an IL surface; a dielectric layer Is composed of polycrystalline tantalum oxide formed on the cylindrical lower electrode; a nitride button layer is formed on the surface of the dielectric layer; and an upper electrode is formed of titanium nitride formed on the hafnium nitride layer. Or polycrystalline silicon. In the aforementioned semiconductor device, a cylindrical lower electrode composed of titanium nitride or polycrystalline silicon is covered with tantalum nitride, and a light nitride layer is provided between the dielectric layer and the upper electrode composed of titanium nitride or polycrystalline sand. Therefore, a structure in which silicon oxide is generated at a surface in contact with a dielectric layer made of polycrystalline tantalum oxide is formed. (5) A method for manufacturing a semiconductor device having a cylindrical, three-dimensional capacitor structure. The method includes at least the following steps: forming a cylindrical structure using an oxide layer generated by a chemical vapor growth method: applying thermal nitridation Treatment to transform the tantalum oxide into tantalum nitride to form a lower electrode, and then use chemical vapor growth to deposit tantalum oxide as a dielectric layer, apply an oxidation treatment, and then use chemical vapor growth using an inorganic raw material, Titanium nitride is deposited as the upper electrode. -8- General paper national standard (CNS) A4 specification (2 丨 0X297 mm) ^: ----- (Please read the precautions on the back before filling this page) * 1Τ Central Standard of the Ministry of Economic Affairs A7, A7, B7 printed by the Bureau ’s Consumer Cooperative, and the description of the invention (6) In the manufacturing method of the semiconductor device described above, the chemical vapor phase growth principle is used to form a cylindrical structure, and then a thermal nitriding treatment is performed. It is converted into a nitride button to form a round electrode made of nitride 1; a lower electrode. The oxide button is deposited as a dielectric layer by a chemical vapor deposition method, and then treated by oxidation, and then by Chemical vapor phase growth using inorganic raw materials ... Deposit titanium nitride as the upper electrode to form a cylindrical, three-dimensional capacitor structure. T semiconductor devices with cylindrical, three-dimensional capacitor structures The method includes at least the following steps: using a hafnium oxide generated by a chemical vapor growth method to form a cylindrical structure; applying a diffuser, the oxidation operation turns into a nitriding boat to form a lower electrode; and then using a chemical vapor growth method sink As the dielectric layer, tantalum oxide is subjected to an oxidation treatment; then, the surface of the oxidized hafnium oxide is transformed into tantalum nitride by a thermal nitridation treatment; and by a chemical vapor phase growth method using an inorganic raw material, Polycrystalline silicon or titanium nitride is deposited as an upper electrode. The aforementioned method for manufacturing a semi-solid device & uses tantalum oxide generated by & chemical vapor growth to form a cylindrical structure; and then applies a thermal nitriding treatment to make The hafnium oxide is converted into palladium nitride to form a cylindrical lower electrode composed of a nitride button. Next, hafnium oxide is deposited as a dielectric layer by a chemical vapor growth method, and an oxidation treatment is performed; Treatment to convert the oxidized 4s surface into a nitriding boat. As mentioned above, after the tantalum oxide surface is converted into hafnium nitride, by using inorganic 9- This paper size applies the Chinese National Standard (CNS) A4 specification ( 210X 297 mm) (Please read the notes on the back before filling in this page}, ^ Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs, \ m--L--.. I _ __Γ J— n I — Nnnnn _ If In A7 B7 V. Description of the invention (: Chemical vapor growth of raw materials, depositing polycrystalline silicon or nitride as the upper electrode to form a cylindrical, three-dimensional capacitor structure. Please read it first-meaning. This page (7) —A semiconductor device with a cylindrical, three-dimensional capacitor structure < manufacturing method, which includes at least the following steps: forming a cylindrical structure using polycrystalline silicon or titanium nitride generated by chemical vapor growth method ; Then, only tantalum oxide is selectively formed on the surface of the polycrystalline silicon or titanium nitride; and then a thermal nitriding treatment is applied to transform the tantalum oxide into tantalum nitride to form a lower electrode; and then chemical vapor deposition is used as a medium The oxidation button of the electrical layer is subjected to an oxidation treatment; then the surface of the oxidized oxidation button is transformed into tantalum nitride by a thermal nitridation treatment; and then deposited as a top electrode by a chemical vapor growth method using an inorganic raw material Polycrystalline silicon or titanium nitride. In the aforementioned method for manufacturing a semiconductor device, a polycrystalline silicon or titanium nitride produced by a chemical vapor growth method is used to form a cylindrical structure; and then only a hafnium oxide is selectively formed on the surface of the polycrystalline silicon or titanium nitride; And thermal nitridation to convert the hafnium oxide to tantalum nitride to form a lower electrode. Secondly, hafnium oxide is deposited as a dielectric layer by a chemical vapor growth method, and an oxidation treatment is applied; then, the surface of the oxidized oxidation girl is transformed into a nitrided button by a hot nitrogen hafnium treatment. As mentioned above, the Inner Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs, as described above, after the surface of tantalum oxide is converted to tantalum nitride, a polycrystalline dream or nitride is used as the upper electrode by chemical vapor growth using inorganic raw materials. 'Cylindrical' three-dimensional capacitor structure. To sum up, according to the semiconductor device of the present invention, since the surface is in contact with tantalum oxide, a structure is provided, so that it has a structure in which silicon oxide is not generated at the interface of the lower electrical plate of the M oxide. -10 This paper size is in accordance with Chinese National Standard (CNS) A4 specification (21x 297 Gongchu :) 5. Description of the invention (8 A7 B7 Furthermore, the method of manufacturing a semiconductor device according to the present invention, by using a chemical vapor phase The growth of oxides generated by the growth method is Chen M. M Γ ::: Nitride oxides of solid Tr insulators are nitrided by conductors. The film structure and cylindrical capacitor structure that realize the dream of poor oxidation are also known. In addition, the semiconductor device according to the present invention S and its manufacturing method, by providing tantalum oxide on tantalum nitride, oxidizing heat treatment becomes possible, so β can obtain a polycrystalline oxide button with good thermal stability, and improve the heat resistance of the oxide button. Brief description] Through the following description and accompanying drawings, the foregoing objects, advantages, and features of the present invention can be more clearly understood, in which: FIG. 1 is a cross-sectional view of a semiconductor device according to an embodiment i of the present invention; 2 is a sectional view of a capacitor of a conventional semiconductor device; FIG. 3 is a sectional view of a capacitor structure of a semiconductor device according to Embodiment i of the present invention; Sectional view of the capacitor structure _ Figure ½ ^ Please read the back of the note. Note-Refill this page. 1T The method of printing by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs; the diagram shows the manufacture of the semiconductor device according to the first embodiment of the present invention FIG. 7 shows the manufacturing method of the semiconductor device according to the second embodiment of the present invention. FIG. 7 schematically shows the manufacturing method of the semiconductor device according to the third embodiment of the present invention. -11 This paper size is applicable to China National Standard (CNS) A4 (210X 297) (Mm) No. 86119909 Patent Application Chinese Specification Revision Page (88 noon July) A7 B7 Amendment V. Description of the Invention (9 Illustrates the abundance of the seedlings in the fourth embodiment of the present invention. Manufacturing method of the nitrided button layer on the interface on the upper electrode side of the device core; '· ·.; Figure 9 is a cross-sectional view of a semiconductor device according to a fifth embodiment of the invention; Reference number in 101] Silicon substrate; 102 element separation area; 103 word line '104 insulation film; 105 silicon plug, 106 bit line; 107, insulation film, 108 silicon plug; 109 External electrode; 110 upper electrode; 111 insulating film > 112 titanium; 113 titanium silicide 114 nitride; 115 tungsten; 116 MOS for detection amplifier 201 insulating film 202 silicon plug; 203 polycrystalline Zhen 204 oxide; 205 titanium nitride 301 insulating film; 302 broken plug 303 nitride; 304 oxide is 305 nitride; 401 silicon oxide film; 402 silicon plug; 403 nitride button 404 oxide film; 405 titanium nitride 406 insulating film 501 insulating film 502 silicon plug; 503 insulating film 504 oxidation; 505 buried material net +; 506 nitride surface; 507 oxidation Zhao 508 titanium nitride; 601 titanium nitride 602 tantalum oxide; Note: Please fill in this page again} Order 12- This paper size is applicable to the standards of Chinese families (CNS > Ya 4 Waki (210X297 mm) No. 86119909 Patent Application Chinese Manual Correction Page (July 88) A7 B7
五、發明説明（1〇 ) 603 氮化钽； 604 氧化钽； 605 氛化叙； 606 絕緣膜； 607 矽插塞； 701 絕緣膜； 702 矽插塞； 703 多晶碎； 704 氮化鋰； 705 氧化鈕； 706 氮化鈦； 801 氮化鈕； 802 氧化钽； 803 氮化妲； 804 氮化鈦； 805 絕緣膜； 806 矽插塞； 901 多晶秒； 902 粗糙矽； 903 氮化鈕； 904 氧化矽； 905 氮化钽； 906 上部電極； 907 絕緣膜； ----1---1---ί 裝-- (請先閲讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 908 矽插塞。 [較佳實施例之詳細說明] (實施例1) 以下說明根據本發明之實施例1的半導體裝置及其製造方 法。此半導體裝置具有一圓柱形、立體化的電容器構造為 其構成元件，該電容器構造包含：一圓柱形下部電極，由 氮化组構成；一介電層，由形成於該圓柱形下部電極之上 的多晶氧化叙構成；及一上部電極，由形成於該介電層之 上的氮化鈥所構成。 圖1表示本實施例的半導體裝置之斷面圖。在圖1中， 101為矽基板、102為元件分離區域、103為字元線、104為 絕緣膜、105為矽插塞、106為位元線、107為絕緣膜、108 為矽插塞、109為下部電極、110為上部電極、111為絕緣 膜、112為鈦、113為矽化鈦、114為氮化鈦、115為鎢、116 為偵測放大器用MOS電晶體。 13- 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -s 經濟部中央標车扃貝工消費合作社印笨 A7 _B7 五、發明説明（11 ) ’ 如圖1所示’本實施例的半導體裝置包含：碎基板丨〇 1 : 元件分離區域102 ;字元線103 ;絕緣膜1〇4 ;矽插塞1〇 5 ; 位元線106 ;絕緣膜107 ;矽插塞1〇8 ;下部電極1〇9 ;上部 電極110 ;絕緣膜111 ，鈦112 ;矽化鈦113 ;氮化鈦114 ;鎢 115 ;偵測放大器用MOS電晶體116。 再者，如圖1所示，本實施例的半導體裝置中，在碎基板 101的表面形成元件分離區域102，並形成作爲切換電晶體 之閘電極的字元線103。 根據本實施例之半導體裝置，在形成絕緣膜1〇4後，透過 矽插塞105形成位元線106，利用絕緣膜1〇7覆蓋位元線後， 再透過矽插塞108使下部電極109成爲圓柱形。 其次，形成氧化钽（圖中未顯示）之後，接著形成上部電 極110而構成電容器，再以絕緣膜覆蓋電容器，然後在 沒有電容器群的周邊電路區域形成接觸窗，用以確保配線 與基板之間的連接。 形成鈥112之後，接著施與熱處理而形成碎化鈥I〗〕，再 形成氮化鈦114與鎢115作爲配線，。 實際上爲了堆積更多的配線層，有必要形成用以使相互 之間隔離的層間絕緣膜。 根據本實施例的半導體裝置，電容器係在較位元線爲上 方、較配線爲下方之區域。這種情況下，作爲开彡成電容專 之後的熱處理者有·梦化欽113之形成（6〇〇°C〜700°C)、配線 之層間絕緣膜的形成等（〜4〇〇。〇。 本實施例之半導體裝置及其製造方法的要點在於：即使 -14 - 本紙張尺度適用中國國家標準（CNS ) Α4规格（2丨Οχ 297公趁） (請先閱讀背面之注意事項再填寫本頁)V. Description of the invention (10) 603 tantalum nitride; 604 tantalum oxide; 605 atmosphere; 606 insulating film; 607 silicon plug; 701 insulating film; 702 silicon plug; 703 polycrystalline; 704 lithium nitride; 705 oxide button; 706 titanium nitride; 801 nitride button; 802 tantalum oxide; 803 hafnium nitride; 804 titanium nitride; 805 insulating film; 806 silicon plug; 901 polycrystalline seconds; 902 rough silicon; 903 nitride button 904 silicon oxide; 905 tantalum nitride; 906 upper electrode; 907 insulating film; ---- 1 --- 1 --- ί installation-(Please read the precautions on the back before filling this page) Central of the Ministry of Economic Affairs Standard Bureau employee consumer cooperative prints 908 silicon plugs. [Detailed description of preferred embodiment] (Embodiment 1) A semiconductor device and a manufacturing method thereof according to Embodiment 1 of the present invention will be described below. The semiconductor device has a cylindrical, three-dimensional capacitor structure as a constituent element. The capacitor structure includes: a cylindrical lower electrode composed of a nitride group; and a dielectric layer formed on the cylindrical lower electrode. A polycrystalline oxide structure; and an upper electrode, which is composed of nitride formed on the dielectric layer. FIG. 1 shows a cross-sectional view of the semiconductor device of this embodiment. In FIG. 1, 101 is a silicon substrate, 102 is an element separation area, 103 is a word line, 104 is an insulating film, 105 is a silicon plug, 106 is a bit line, 107 is an insulating film, 108 is a silicon plug, 109 is a lower electrode, 110 is an upper electrode, 111 is an insulating film, 112 is titanium, 113 is titanium silicide, 114 is titanium nitride, 115 is tungsten, and 116 is a MOS transistor for a detection amplifier. 13- This paper size applies Chinese National Standard (CNS) A4 specification (210X297mm) -s Central Standard Car of the Ministry of Economic Affairs, Coopers and Consumers Cooperative, India Ben A7 _B7 V. Description of the invention (11) 'As shown in Figure 1' The semiconductor device of the embodiment includes: a broken substrate. 〇1: an element separation region 102; a word line 103; an insulating film 104; a silicon plug 105; a bit line 106; an insulating film 107; a silicon plug 10. 8; lower electrode 10; upper electrode 110; insulating film 111, titanium 112; titanium silicide 113; titanium nitride 114; tungsten 115; MOS transistor 116 for the detection amplifier. Furthermore, as shown in FIG. 1, in the semiconductor device of this embodiment, an element isolation region 102 is formed on the surface of the broken substrate 101, and a word line 103 is formed as a gate electrode of a switching transistor. According to the semiconductor device of this embodiment, after forming the insulating film 104, a bit line 106 is formed through the silicon plug 105, the bit line is covered with the insulating film 107, and then the lower electrode 109 is passed through the silicon plug 108 Become cylindrical. Next, after forming tantalum oxide (not shown in the figure), the upper electrode 110 is formed to form a capacitor, and then the capacitor is covered with an insulating film. Then, a contact window is formed in a peripheral circuit area without a capacitor group to ensure the connection between the wiring and the substrate. Connection. After the formation of “112”, a heat treatment is performed to form a chip ”, and then titanium nitride 114 and tungsten 115 are formed as wirings. Actually, in order to deposit more wiring layers, it is necessary to form an interlayer insulating film to isolate each other. According to the semiconductor device of this embodiment, the capacitor is located in an area where the bit line is above and the line is below. In this case, as a heat treater after the capacitor is opened, the formation of Menghuaqin 113 (600 ° C ~ 700 ° C), the formation of an interlayer insulation film of the wiring, etc. (~ 400 °). The main points of the semiconductor device and its manufacturing method of this embodiment are: Even if -14-this paper size is applicable to Chinese National Standard (CNS) A4 specification (2 丨 〇χ 297). (Please read the precautions on the back before filling in this page)
、1T, 1T
發明説明 經濟部中央標準局員工消费合作社印掣 施與上述熱處理亦不會造成性能變差，且防止氧化 成，因而圖求電容器容量之增大。 圖3表示本實施例之半導體裝置的電容器構造之斷 在Μ圖3中，301爲絕緣膜、3〇2爲硬插塞、3〇3爲氮化运、 3〇4爲氧化妲' 305爲氮化鈦。 如圖3所示般，本實施例之半導體裝置的電容器構造包 絕緣膜梦插塞3G2，·氮化幻们；氧化备 氮化鈦305等。 ^外，如圖3所示般，本實施例之半導體裝置的電容器構 造中’設有作爲圓柱形下部電極之氮化㈣3，以連接於絕 緣膜301所包圍的矽插塞3〇2。 接著在由氮化妲303所構成的圓柱形下部電極之上，形 H介電層的氧化运304,然後再形成作爲上部電極的氮 作爲本實施例之圓柱形下部電極的氮化备可藉由將氧 鋰熱氮化而獲得。 習知技術中，氮化钽係藉由瀹渡法而形成。不過，此灌 =法有其缺點：圓柱形的下方部份的膜厚度變得極薄，錄 之機械強度，因此谷易造成圓柱倒塌的問題。 .根據本發明之半導體裝置及其製造方法，無論在複雜榍 造的任一部份均可藉由能以相同膜厚度形成之氧化钽預先 形成圓柱，然後在氨的環境中施與熱處理，藉此將氧化翻 轉換成氮化钽。 上迷轉換反應可在例如—大氣壓之氨環境中55〇(3C以上的 成 化 it \ -- (請先閱讀背面之注意事項再填寫本頁j ----ΐτ—. r---- -15- 本紙張尺度適國家標準（CNS ) A4規格 經濟部中央標準局員工消费合作社印采 A7 ------ B7 五、發明説明（13 ) · ~ 溫度下生成氮化妞，只要因應於被轉換之氧化鈕的膜厚度 而调整溫度與時間即可輕易地進行轉換。 本實施例之半導體裝置及其製造方法的—大優點在於： 相對於氧化钽之絕緣性，氮化妲具有導電性，故可在無損 及階段覆蓋性極佳的氧化鈕之形狀的情況下變換爲電極。 本實施例之半導體裝置的製造方法中，必須使用氨或者 聯胺（hydrazine)等氮氫化合物作爲達成轉換反應之環境。 在不含氫的環境下，例如氮的環境下，若在適當的條件 下亦有可能生成氮化运，不過在矽插塞與氧化妲之介面會 生成氧化砍。 圖4表示習知的半導體裝置中氧化矽所產生的電容器構造 的斷面圖，其中401爲碎氧化膜。 如圖4所示，習知的半導體裝置的電容器構造中，在不含 氫的環境之氮環境中生成氮化妲的情況下，矽插塞與氧化 钽之介面會生成矽氧化膜401。 此矽氧化膜401係以氧化妲中的氧爲氧化劑而產生，因此 在氨系以外的環境’無論怎麼樣的條件下均很難避免其產 生。 一旦氧化矽產生在後續的程序很難將其消除，造成難以 增加電容器之電容量之目的。 此外，在圖4中，406爲絕緣膜、4〇2爲矽插塞、4〇3爲氮 化钽、404爲氧化妲、405爲作爲上部電極的氮化鈦。 圖5表示本實施例之半導體裝置的製造方法。該圖5中， 501爲絕緣膜、502爲矽插塞、503爲絕緣膜、5〇4爲氧化 -16- 本紙張尺度適用中國國家標準（CNS ) A4規格（2l〇x 297公f ) (請先閱讀背面之注意事項再填寫本頁) T -11 經濟部中央標準局員工消費合作社印$» A7 B7五、發明説明（14 ) · 钽、505爲埋藏材料、506爲氮化钽、507爲氧化钽、508爲 氮化鈥。 如圖5(a)所示，根據本實施例之半導體裝置的製造方法， 先利用習知的方法，形成由Si3N4構成之絕緣膜50 i所包圍的 矽插塞502，然後在其上方堆積由厚度500 nm的氧化矽構成 之絕緣膜503。 其次，如圖5(b)所示，利用習知的石版印刷術（lithography) 與乾蝕刻技術，在絕緣膜503形成接觸窗，而使矽插塞之表 面露出。 接著，如圖5(c)所示，藉由化學氣相成長法在上述接觸窗 堆積厚度50 nm之氧化麵504。 上述氧化钽504之堆積過程係使用Ta(OC2H5)5與氧作爲原 料，並在480°C、65Pa之條件下進行，結果可得到階段覆蓋 性非常好的氧化钽504。 其次，如圖5(c)所示般，形成氧化钽504之後，利用習知 的技術以埋藏材料505充填溝部。 接著如圖5(d)所示般，利用習*知的乾蝕刻去除露出於表 面的氧化钽504。 去除絕緣膜503與埋藏材料505之後，接著在密閉式的裝 置設置試料以造成氨的環境，然後使其溫度上昇，再以 750°C作5分鐘的熱處理。 如圖5(e)所示般，藉由上述熱處理，氧化麵504轉變成氮 化钽506，此轉換的結果可藉由歐皆電子分光法（Auger electron spectroscopy)或 X 射線光電子分光法（X-ray -17- (請先閱讀背面之注意事項再填寫本頁 訂 本紙張尺度適用中國國家標準（CNS ) Λ4規格（210X 297公釐） 經濟部中央標隼局員工消费合作社印製 A7 ______ B7 五、發明説明（15 ) · —~'''~~~ photoelectron spectroscopy)等分析技術輕易地獲知。 如圖5(f)所示般，氧化鈕5〇4轉變成氮化鈕5〇6而形成下部 電極之後，再根據前述方法形成厚度15 的氧化妲5〇7。 上述方法所形成的氧化钽507係爲非晶系、含有很多不純 物、且爲缺乏氧的狀態，若不加處理的話漏電電流極大， 不適於作爲半導體裝置所使用的電容器之介電層。 有鑑於此點，可在750。(：的氧環境中作1〇分鐘的熱處理以 去除不純物、並補充氧氣。 關於此熱處理並無特別的限制，基本上只要在氧環境中 進行熱處理即可。不過，本實施例之丰導體裝置的製造方 法中非常重要的一點是：位在氧化妲5〇7之下方的電極必須 具有耐氧化性，而氮化钽506正具備此性質。 藉由前述750。(：的氧環境中作1〇分鐘的熱處理，氧化钽 507會結晶，耐熱性亦變佳。 其次’如圖5(g)所示般’藉由化學氣相成長法以形成作爲 上部電極之厚度100 nm的氮化艇508。 此氮化叙508之形成係以Ti€l4與氨作爲原料，並在 400〜500°C之溫度下進行。 上述方法形成的氮化钽508之特徵在於具有極佳的階段覆 蓋性。 圖5(a)〜圖5(g)中’未附有參照號碼的區域以相同的斜線 標不者表ΤΓ相同的部份。 如以上説明，根據本實施例之半導體裝置及其製造方 法’藉由使用階段覆蓋性極佳的氧化妲及氮化鈦，並使氧 -18- 本紙張尺度適州中國國家標準（CNS > A4規格（210X297公釐） (請先閱讀背面之注意事項再填寫本頁)Description of the invention The Central Government Bureau of the Ministry of Economic Affairs and the Consumer Cooperative Association of the Ministry of Economic Affairs and the above-mentioned heat treatment will not cause performance degradation and prevent oxidation, so the capacitor capacity is sought to increase. FIG. 3 shows the break of the capacitor structure of the semiconductor device of this embodiment. In FIG. 3, 301 is an insulating film, 302 is a hard plug, 303 is nitrided, and 304 is hafnium oxide. 305 is Titanium nitride. As shown in FIG. 3, the capacitor structure package of the semiconductor device of this embodiment is an insulating film dream plug 3G2, a nitride nitride, an oxide prepared titanium nitride 305, and the like. In addition, as shown in FIG. 3, in the capacitor structure of the semiconductor device of this embodiment, a hafnium nitride 3 as a cylindrical lower electrode is provided to be connected to a silicon plug 3202 surrounded by an insulating film 301. Next, on the cylindrical lower electrode composed of hafnium nitride 303, an oxide layer 304 of H-shaped dielectric layer is formed, and then nitrogen as the upper electrode is formed as the nitride of the cylindrical lower electrode of this embodiment. It is obtained by thermally nitriding lithium oxyoxide. In the conventional technology, tantalum nitride is formed by a transition method. However, this method has its disadvantages: the film thickness of the lower part of the cylinder becomes extremely thin, and the mechanical strength is recorded, so Gu easily causes the problem of the collapse of the cylinder. According to the semiconductor device and the manufacturing method thereof of the present invention, in any part of complex fabrication, a cylinder can be formed in advance by tantalum oxide capable of being formed with the same film thickness, and then heat-treated in an ammonia environment. This converts the oxide to tantalum nitride. The conversion reaction of the fans can be, for example, in the ammonia environment at atmospheric pressure 55 ° C or above. (Please read the precautions on the back before filling in this page j ---- ΐτ--. R ---- -15- The size of this paper is suitable for the national standard (CNS) A4 specifications Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs A7 ------ B7 V. Description of the invention (13) The conversion can be easily performed by adjusting the temperature and time according to the film thickness of the converted oxide button. The semiconductor device and the manufacturing method thereof of this embodiment have a large advantage in that: compared with the insulating properties of tantalum oxide, hafnium nitride has conductivity Therefore, it can be converted into an electrode without damaging the shape of the oxidation button with excellent stage coverage. In the manufacturing method of the semiconductor device in this embodiment, nitrogen or hydrogen compounds such as ammonia or hydrazine must be used The environment of the conversion reaction. In an environment containing no hydrogen, such as nitrogen, nitriding may also occur under appropriate conditions, but oxidative cleavage will occur at the interface between the silicon plug and hafnium oxide. Figure 4 Expressive A cross-sectional view of a capacitor structure produced by silicon oxide in a semiconductor device, in which 401 is a broken oxide film. As shown in FIG. 4, in the conventional capacitor structure of a semiconductor device, nitrogen is generated in a nitrogen environment containing no hydrogen. In the case of hafnium, a silicon oxide film 401 is formed at the interface between the silicon plug and tantalum oxide. This silicon oxide film 401 is generated by using oxygen in hafnium oxide as an oxidant, so in an environment other than ammonia, no matter how It is difficult to avoid the occurrence of the conditions. Once the silicon oxide is generated in the subsequent process, it is difficult to eliminate it, which makes it difficult to increase the capacitance of the capacitor. In addition, in Figure 4, 406 is an insulating film and 402 is silicon. The plug, 403 is tantalum nitride, 404 is hafnium oxide, and 405 is titanium nitride as an upper electrode. FIG. 5 shows a method for manufacturing the semiconductor device of this embodiment. In FIG. 5, 501 is an insulating film and 502 For silicon plug, 503 for insulation film, and 504 for oxidation-16-This paper size is applicable to Chinese National Standard (CNS) A4 specification (2l0x 297 male f) (Please read the precautions on the back before filling this page ) T -11 Central Bureau of Standards, Ministry of Economic Affairs Industrial and Consumer Cooperatives Co., Ltd. A7 B7 V. Invention Description (14) · Tantalum, 505 is a buried material, 506 is tantalum nitride, 507 is tantalum oxide, and 508 is nitride. As shown in Figure 5 (a), according to In the manufacturing method of the semiconductor device of this embodiment, a silicon plug 502 surrounded by an insulating film 50 i made of Si3N4 is formed by a conventional method, and then an insulating film made of silicon oxide with a thickness of 500 nm is deposited on top of it. 503. Next, as shown in FIG. 5 (b), a contact window is formed on the insulating film 503 by using a conventional lithography and dry etching technique to expose the surface of the silicon plug. Next, as shown in FIG. 5 (c), an oxide surface 504 having a thickness of 50 nm is deposited on the contact window by a chemical vapor growth method. The deposition process of the tantalum oxide 504 described above was performed using Ta (OC2H5) 5 and oxygen as raw materials, and the conditions were performed at 480 ° C and 65 Pa. As a result, the tantalum oxide 504 having excellent stage coverage was obtained. Next, as shown in FIG. 5 (c), after the tantalum oxide 504 is formed, the trench portion is filled with the buried material 505 by a known technique. Next, as shown in Fig. 5 (d), the tantalum oxide 504 exposed on the surface is removed by conventional dry etching. After removing the insulating film 503 and the buried material 505, a sample was set in a closed device to create an ammonia environment, and then the temperature was increased, followed by heat treatment at 750 ° C for 5 minutes. As shown in FIG. 5 (e), through the above heat treatment, the oxide surface 504 is transformed into tantalum nitride 506, and the result of this conversion can be performed by Auger electron spectroscopy or X-ray photoelectron spectroscopy (X -ray -17- (Please read the notes on the back before filling in this page. The paper size applies to the Chinese National Standard (CNS) Λ4 specification (210X 297 mm). Printed by A7 ______ B7 of the Consumer Cooperatives of the Central Standardization Bureau of the Ministry of Economic Affairs V. Explanation of the invention (15) · — '' '~~~ Analysis techniques such as photoelectron spectroscopy are easily known. As shown in FIG. 5 (f), the oxidation button 504 is transformed into a nitride button 506 and After the lower electrode is formed, a hafnium oxide 507 having a thickness of 15 is formed according to the aforementioned method. The tantalum oxide 507 formed by the above method is amorphous, contains a lot of impurities, and is in a state of deficient oxygen. If it is not treated, it will leak electricity. The current is extremely large, and it is not suitable as a dielectric layer of a capacitor used in a semiconductor device. In view of this, a heat treatment can be performed for 10 minutes in an oxygen environment of 750 to remove impurities and supplement oxygen. About this heat treatment There is no particular limitation, and basically it is only necessary to perform heat treatment in an oxygen environment. However, a very important point in the manufacturing method of the abundant conductor device of this embodiment is that the electrode located below the hafnium oxide 507 must have Oxidation resistance, and tantalum nitride 506 has this property. With the aforementioned 750. (: 10 minutes of heat treatment in an oxygen environment, tantalum oxide 507 will crystallize, and heat resistance is also improved. Secondly, as shown in Figure 5 ( g) As shown in the figure, a chemical vapor growth method is used to form a nitriding boat 508 with a thickness of 100 nm as the upper electrode. The formation of this nitriding process 508 is based on Ti 4 and ammonia as raw materials, and the temperature ranges from 400 to 500. ° C. The tantalum nitride 508 formed by the above method is characterized by excellent stage coverage. The areas where the reference number is not attached in FIG. 5 (a) to 5 (g) have the same diagonal line The bidders indicate the same parts as TΓ. As explained above, the semiconductor device and the manufacturing method thereof according to this embodiment are made of rhenium oxide and titanium nitride with excellent coverage at the use stage, and the oxygen-18- Standard Shizhou Chinese National Standard (CNS > A4 Specification 210X297 mm) (Please read the back of the precautions to fill out this page)
,1T 化鈕轉換成氮化鈕，結果可利用介電層上不包含氧化矽的 膜構造，實現具有較大面積的圓柱形電容器構造。 此外，由於採用具有極佳的耐氧化性之氮化包作爲下呷 電極，因此可進行能使氧化鈕結晶的氧化熱處理，故能獲 得具有極佳之熱安定性的電容器構造。 (實施例2) 以下説明根據本發明之實施例2的半導體裝置及其製造方 法，該半導體裝置具有一圓柱形、立體化的電容器構造爲 其構成元件，該電容器構造包含：一圓柱形下部電極，由 表面以氮化钽覆蓋的氮化鈦構成；介電層，由形成於該圓 柱形下》卩電極之上的多晶氧化包構成；及上部電極，由形 成於該介電層之上的氮化鈦構成。 圖6表示本實施例之半導體裝置的製造方法。該圖6中， 601爲氮化鈦、602爲氧化钽、603爲氮化鈕、6〇4爲氧化 钽、605爲氮化鈦、606爲絕緣.膜、607爲矽插塞。此外，圖 6(a)〜圖6(e)中，未附有參照號碼的區域以相同的斜線標示 者表不相同的部份。 a 經濟部中央標準局員工消費合作社印聚 如圖6(a)所示’根據本實施例之半導體裝置的製造方法， 首先同於實施例1之方法，使用氮化鈦6〇丨以形成圓柱形下 部電極。 其次，如圖6(b)所示，僅在氮化鈦6〇1之表面選擇性地形 成氧化钽602。 此選擇性地形成可在化學氣相成長的過程中，在氧化钽 602作爲膜開始成長的時間之前，利用因底層材料所產生的 _____-19- 本紙張尺度適用中國國家標準（CNS ) ^4規格（210X 297公着） 五 、發明説明（17 ) A7 B7 差來進行。 換言之，利用相較於在氧化矽或氮化矽之上氧化妲開始 成長所需的時間，在氮化鈥或多晶石夕之上氧化每開 : 所需的時間較短的事實。 根據本實施例之半導體裝置的製造方法，舉例而言，可 成長5 nm的氧化叙602。 如圖6(c)所示，圖於實施例i者，在氨環境中進行 理，使氧化钽602轉變成氮化鈕603。 ，、 此時由於氧化叙602的膜厚度很薄，故需要進行熱處理， 在700°c F進行3分鐘的熱處理即足夠。 = 6(d)所* ’其後同於實施⑴者，形成厚度15峋的 乳化钽604作爲介電層，施與氧化熱處理使其結晶。 Λ 如圖6(e)所不’形成厚度100 nm的氮化鈦605， 爲上部電極。综合以上説明’根據本實施例的半導體裝置及其製造方 ^ ’由於氧化ίΕ不接觸碎插塞，故可完全抑制氧化碎之生 成，因而可得到更大電容量的電<容器。 此外，由於氧化备與下部電極的氮化鈇之間有氮㈣ ，故使氧化鈕結晶之際氮化鈦會被氧化，故可避免氧 妲剝離而無法構成電容器的問題。 (實施例3 )、下説月根據本發0月《實施例3的半導體裝置及其製造乃 ί-孩半導體裝2具有一圓柱形、立體化的電容器構造爲 其構成疋件’該電容器構造包含：一圓柱形下部電極 作 存 化 方 由 (請先閱讀背面之注意事項再填寫本頁> 訂 20- 本紙張尺1謝哪縣（ V-—----------- I-- 五 、發明説明（18 A7 B7 ------- 經濟部中央標车局員工消费合作社印聚 表面以氮化鉉覆蓋的多晶矽構成；介電層’由形成於該圓 柱形下部電極之上的多晶氧化钽構成；及上部電極，由形 成於該介電層之上的氮化鈦構成。 圖7表示本實施例之半導體裝置的斷面圖。該圖7中， 7〇1爲絕緣膜、702爲矽插塞、7〇3爲多晶矽、704爲氮化 备、705爲氧化钽、706爲氮化鈦α 如圖7所示’本實施例之半導體裝置包含：絕緣膜7(Η、 發插塞702、多晶矽703、氮化钽7〇4、氧化钽7〇5及氮化鈦 706 〇 此外，如圖7所示，本實施例之半導體裝置中，下部電極 係以氮化鉅與多晶矽之層積膜所形成。 根據本實施例之半導體裝置及其製造方法，首先以多晶 妙7〇3形成接觸於由絕緣膜7〇1所包圍的矽插塞7〇2的圓柱。 其次，以多晶矽703形成圓柱之後，使用同於實施例2之 方法形成氮化銓704後，然後形成氧化妲7〇5施與熱處理。 對氧化鈀705施與熱處理使其結晶之後，在其上形成氮化 鈇706作爲上部電極。 ( 综上所述，根據本實施例之半導體裝置及其製造方法， 由於在下部電極可採用多晶矽，因此可直接利用習知的製 造過程’而達成降低成本的目的。 (實施例4 ) 以下說明根據本發明之實施例4的半導體裝置及其製造方 去，遂半導體裝置具有一圓柱形、立體化的電容器構造爲 其構成元件，m電容器構造包含：一圓柱形下 極，由 ___ -21- 本紙張尺度朝t關2l〇x 297g7 (锖先閲讀背面之注意事項再填寫本育) ,-·1 τ 五、發明説明（19 氮化叙構成；介電層，由形成於 W田々巩於诼圓柱形下部電極之上的 多晶氧化组構成·，氮化赵層，形成於該介電層之表面及 (請先閱讀背面之注意事項再填寫本頁) t邵電極’由形成於該氮化钽層之上的氮化鈦或多晶碎構 成。 圖8表示本實施例之半導體裝置的上部電極侧之介面的氮 化赵層之製造方法。該圖8中，謝爲氮化麵、8〇2爲氧化 妲、803爲氮化钽、804爲氮化鈦。且圖8(a)〜圖8(勾中未 附有參照號碼的區域以相同的斜線標示者表示相同的部 份0 如圖8(a)所示，根據本實施例之半導體裝置的製造方法， 藉由同於實施例1之方法，使用氮化钽8〇1以形成圓柱形下 部電極。 其次’如圖8(b)所示，形成氧化妲802之後，在6〇〇。(：的氨 環境中施與3分鐘的熱處理以進行氧化熱處理，如圖8(c)所 示般’由氡化組802之表面僅3 nm之厚度轉換成氮化鋰 803 〇 此外’如圖8(c)所示般，藉由前述氧化熱處理，在由氧化 纽802轉換成的氮化鈕8〇3層之上形成氮化鈦804，作爲上部 電極。 經濟部中央標隼局員工消費合作社印裝 综合以上説明，根據本實施例的半導體裝置及其製造方 法，在氧化钽之上直接形成上部電極之氮化鈦的情況，在 後續的熱處理氧化鋰與氮化鈦會起反應，因此可避免由於 氧化妲中氧之缺乏，而造成電容器之特性變差的問題。 此外，本實施例之半導體裝置及其製造方法中，作爲上 22- 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） A7The 1T button is converted into a nitride button. As a result, a cylindrical capacitor structure with a large area can be realized by using a film structure that does not include silicon oxide on the dielectric layer. In addition, since a nitride bag having excellent oxidation resistance is used as the lower electrode, an oxidation heat treatment capable of crystallizing an oxide button can be performed, and a capacitor structure having excellent thermal stability can be obtained. (Embodiment 2) Hereinafter, a semiconductor device according to Embodiment 2 of the present invention and a method for manufacturing the same will be described. The semiconductor device has a cylindrical, three-dimensional capacitor structure as a constituent element, and the capacitor structure includes a cylindrical lower electrode. Is composed of titanium nitride whose surface is covered with tantalum nitride; a dielectric layer is composed of a polycrystalline oxide bag formed on the cylindrical lower 卩 electrode; and an upper electrode is formed on the dielectric layer Made of titanium nitride. FIG. 6 shows a method for manufacturing a semiconductor device according to this embodiment. In this figure, 601 is titanium nitride, 602 is tantalum oxide, 603 is a nitride button, 604 is tantalum oxide, 605 is titanium nitride, 606 is an insulation film, and 607 is a silicon plug. In addition, in FIG. 6 (a) to FIG. 6 (e), the areas without reference numbers are marked with the same oblique line, or different parts are indicated. a As shown in Fig. 6 (a), the method for manufacturing a semiconductor device according to the embodiment of the Central Standards Bureau of the Ministry of Economic Affairs is the same as the method of Embodiment 1, using titanium nitride 60 to form a cylinder. Shaped lower electrode. Next, as shown in Fig. 6 (b), tantalum oxide 602 is selectively formed only on the surface of titanium nitride 601. This selective formation can use the ___- 19 produced by the underlying material before the time when tantalum oxide 602 starts to grow as a film in the process of chemical vapor phase growth. This paper size applies Chinese National Standard (CNS) ^ 4 specifications (210X 297) 5. Invention description (17) A7 B7 difference. In other words, using the fact that the time required to oxidize on top of nitrided or polycrystalline silicon is shorter than the time required for hafnium oxide to start growing on silicon oxide or silicon nitride: the time required is shorter. According to the method for manufacturing a semiconductor device of this embodiment, for example, a 5 nm oxide layer 602 can be grown. As shown in Fig. 6 (c), in the example i, the treatment is performed in an ammonia environment, so that the tantalum oxide 602 is converted into the nitride button 603. At this time, since the film thickness of the oxide film 602 is very thin, heat treatment is required, and heat treatment at 700 ° C. for 3 minutes is sufficient. = 6 (d) * ′ After that, the same as those in the following, the emulsified tantalum 604 with a thickness of 15 峋 is formed as a dielectric layer, and an oxidation heat treatment is applied to crystallize it. As shown in Fig. 6 (e), a titanium nitride 605 having a thickness of 100 nm is formed as an upper electrode. In summary, the above description of the “semiconductor device according to this embodiment and the method for manufacturing the same ^” Since the oxide is not in contact with the broken plug, the generation of the broken oxide can be completely suppressed, and an electric container having a larger capacitance can be obtained. In addition, since there is nitrogen hafnium between the oxidation device and the hafnium nitride of the lower electrode, titanium nitride will be oxidized when the oxide button is crystallized, so that the problem that the hafnium can not be separated and the capacitor cannot be formed can be avoided. (Embodiment 3) Next month, according to this issue, "Semiconductor device of the third embodiment and its manufacture is a semiconductor device 2 having a cylindrical, three-dimensional capacitor structure as its constituent element." The capacitor structure Contains: a cylindrical lower electrode for storage (please read the precautions on the back before filling in this page)> Order 20- This paper rule 1 Xiehe County (V ------------- -I-- V. Description of the invention (18 A7 B7 ------- Polycrystalline silicon covered with hafnium nitride on the printed surface of the Consumer Cooperative of the Central Standard Vehicle Bureau of the Ministry of Economic Affairs; the dielectric layer is formed by the cylindrical shape The upper electrode is made of polycrystalline tantalum oxide; and the upper electrode is made of titanium nitride formed on the dielectric layer. Fig. 7 shows a cross-sectional view of the semiconductor device of this embodiment. In Fig. 7, 7 〇1 is an insulating film, 702 is a silicon plug, 703 is polycrystalline silicon, 704 is nitrided, 705 is tantalum oxide, and 706 is titanium nitride. As shown in FIG. 7 'The semiconductor device of this embodiment includes: insulation Film 7 (7, hair plug 702, polycrystalline silicon 703, tantalum nitride 704, tantalum oxide 705, and titanium nitride 706) In addition, as shown in Figure 7 It is shown that in the semiconductor device of this embodiment, the lower electrode is formed by a multilayer film of nitrided nitride and polycrystalline silicon. According to the semiconductor device of this embodiment and the manufacturing method thereof, a polycrystalline silicon wafer is firstly formed in contact with the substrate. The cylinder of the silicon plug 702 surrounded by the insulating film 701. Next, after forming the cylinder with polycrystalline silicon 703, the hafnium nitride 704 is formed by the same method as in Example 2, and then the hafnium oxide 705 is formed and applied. Heat treatment. After heat treatment is applied to the palladium oxide 705 to crystallize it, hafnium nitride 706 is formed thereon as an upper electrode. (In summary, according to the semiconductor device and the manufacturing method thereof of this embodiment, since the lower electrode can be used Polycrystalline silicon can therefore directly reduce costs by using conventional manufacturing processes. (Embodiment 4) The semiconductor device according to Embodiment 4 of the present invention and its manufacturing method will be described below. The semiconductor device has a cylindrical shape, The three-dimensional capacitor structure is composed of its constituent elements. The m capacitor structure includes: a cylindrical lower pole, which is composed of ___ -21- This paper is oriented towards t 关 2l〇x 297g7 (锖 Read the back first (Notes for filling in this education),-· 1 τ V. Description of the invention (19 Nitrided composition; Dielectric layer, composed of polycrystalline oxide group formed on the field-shaped cylindrical lower electrode of W々々, The nitride layer is formed on the surface of the dielectric layer and (please read the precautions on the back before filling in this page) t Shao electrode 'is composed of titanium nitride or polycrystalline fragments formed on the tantalum nitride layer Fig. 8 shows a method for manufacturing a nitride layer on the interface of the upper electrode side of the semiconductor device of this embodiment. In Fig. 8, Xie is a nitrided surface, 802 is hafnium oxide, 803 is tantalum nitride, and 804 It is titanium nitride. And Fig. 8 (a) ~ Fig. 8 (the area without a reference number in the tick is marked with the same oblique line indicates the same part. 0 As shown in Fig. 8 (a), according to this embodiment, In the method for manufacturing a semiconductor device, tantalum nitride 801 is used to form a cylindrical lower electrode by the same method as in Example 1. Next, as shown in FIG. 8 (b), after the hafnium oxide 802 is formed, it is at 600. The heat treatment is performed in an ammonia environment for 3 minutes to perform an oxidative heat treatment, as shown in FIG. 8 (c). 'The surface of the halogenated group 802 has a thickness of only 3 nm and converted to lithium nitride 803. In addition,' as shown in FIG. As shown in 8 (c), through the aforementioned oxidative heat treatment, titanium nitride 804 is formed on the nitrided button 803 layer converted from the oxide button 802 as the upper electrode. Employees' Cooperatives, Central Bureau of Standards, Ministry of Economic Affairs Based on the above description, according to the semiconductor device and the manufacturing method of this embodiment, in the case where titanium nitride of the upper electrode is directly formed on tantalum oxide, lithium oxide and titanium nitride will react in the subsequent heat treatment, so Avoid the problem that the characteristics of the capacitor are deteriorated due to the lack of oxygen in the hafnium oxide. In addition, in the semiconductor device and its manufacturing method of this embodiment, as the above 22- this paper size applies the Chinese National Standard (CNS) A4 specification ( 210X 297 mm) A7
五、發明説明（2〇 ) 部電極者除了氮化鈦之外，採用多晶矽亦可得到同樣的效 果。 (實施例5 ) 以下説明根據本發明之實施例5的半導體裝置及其製造方 法，其進一步地增加電容量。 圖9表示本實施例之半導體裝置的斷面圖。該圖9中， 9〇1爲多晶碎、902爲粗糙矽、903爲氮化鈕、904爲氧化 矽、905爲氮化钽、906爲上部電極。 如圖9所示，本實施例之半導體裝置包含：多晶矽9(H、 粗輪梦902、氮化鈕9〇3、氧化矽9〇4、氮化钽905及上部電 極 9〇6。 如圖9所示’根據本實施例之半導體裝置，以多晶矽9〇 i 形成圓柱後’在其表面形成粗糙珍902。 粗链碎902之粗糙的表面可藉由數種方法形成，形成粗糙 的表面作爲下部電極後，再藉由同於實施例2之方法，將 乳化组進行熱氮化處理，而形成氮化赵903。 接著在該氮化妲903之上形成氧化矽904以作爲介電層， 再對該氧化矽904之表面進行熱氮化而形成氮化钽9〇5，然 後形成上部電極906。 經濟部中央標準局貝工消費合作社印製 (請先閲讀背面之注意事項再填寫本頁)5. Description of the invention (20) In addition to titanium nitride, the same effect can be obtained by using polycrystalline silicon. (Embodiment 5) A semiconductor device according to a fifth embodiment of the present invention and a method for manufacturing the same will be described below, which further increases the capacitance. FIG. 9 is a cross-sectional view of the semiconductor device of this embodiment. In FIG. 9, 901 is polycrystalline chip, 902 is rough silicon, 903 is nitride button, 904 is silicon oxide, 905 is tantalum nitride, and 906 is upper electrode. As shown in FIG. 9, the semiconductor device of this embodiment includes: polycrystalline silicon 9 (H, rough wheel 902, nitride button 903, silicon oxide 904, tantalum nitride 905, and upper electrode 906. As shown in FIG. As shown in 9 'after the semiconductor device according to this embodiment, after forming a cylinder with polycrystalline silicon 90i', a rough surface 902 is formed on the surface. The rough surface of the rough chain fragment 902 can be formed by several methods to form a rough surface as After the lower electrode, the emulsified group is subjected to thermal nitriding treatment in the same manner as in Example 2 to form nitride 903. Then, silicon oxide 904 is formed on the hafnium nitride 903 as a dielectric layer. The surface of the silicon oxide 904 is then thermally nitrided to form tantalum nitride 905, and then an upper electrode 906 is formed. Printed by the Shellfish Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling this page )
-V 前述上部電極906可採用氮化鈦或多晶矽。 如以上説明’根據本實施例之半導體裝置及其製造方 法，藉由使用：階段覆蓋性極佳的氧化鈕、將該氧化钽熱 氮化而得到的氮化妲 '及階段覆蓋性同樣極佳的氮化鈦或 多晶矽’結果不管下部電極構造如何複雜，均能實現電容 -23- 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） 經濟部中央標準局員工消費合作社印繁 A7 B7 五、發明説明（21 ) ' 器之構造，故對於電容量之增加有效。 圖10表示本實施例之半導體裝置之電氣特性之一例。 該圖10中，橫軸表示加在電容器之上部電極上的電壓大 小；縱軸表示流過氧化钽的電流（漏電電流）大小。爲了便 於觀察，此圖中以IE-8(A/cm2)之電流流過時的電壓値作比 較0 圖10中的A曲線係習知技術之一例，採用鎢作爲下部電 極之情況下的特性，其中氧化鈕之氧化處理係使用380。(：的 氧電漿，上部電極係使用藉由蒸鍍法形成的金。 如圖10中的A曲線所示，根據前述習知的半導體裝置， 當IE-8(A/cm2)之電流流過時的電壓爲1.5V。 圖10中的B曲線係在前述習知的半導體裝置中，當A曲線 之測定結束後，在450°C的氮中加上30分鐘的熱處理，然後 再進行測定的結果。 如圖10中的B曲線所示，根據前述習知的半導體裝置， 當IE-8(A/cm2)之電流流過時的電壓降爲0.6V，這表示藉由 上述熱處理，漏電電流顯著地增士。 圖10中的C曲線係根據本實施例之半導體裝置的製造方 法，其中下部電極採用氮化钽；作爲介電層者係先形成厚 度13 nm的氧化钽，然後在700°C的氧環境中施與10分鐘的 熱處理而得；而上部電極係藉由形成無機原料構成之厚度 50 nm的氮化鈇得到的結果。 如圖10中的C曲線所示，根據本實施例之半導體裝置， 當IE-8(A/cm2)之電流流過時的電壓爲1.25V。 -24- 本紙張尺度適用中國國家標準（CNS ) A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁)-V The aforementioned upper electrode 906 may be made of titanium nitride or polycrystalline silicon. As described above, according to the 'semiconductor device and the manufacturing method thereof according to this embodiment, by using: an oxidation button having excellent stage coverage, hafnium nitride obtained by thermally nitriding the tantalum oxide' and stage coverage are also excellent. No matter how complicated the structure of the lower electrode is, the capacitor can be realized -23- This paper size is applicable to China National Standard (CNS) A4 (210X 297 mm) A7 B7 V. Description of the invention (21) The structure of the device is effective for increasing the capacitance. FIG. 10 shows an example of electrical characteristics of the semiconductor device of this embodiment. In FIG. 10, the horizontal axis indicates the magnitude of the voltage applied to the electrode on the upper part of the capacitor, and the vertical axis indicates the magnitude of the current (leakage current) flowing through tantalum oxide. In order to facilitate the observation, in this figure, the voltage when the current of IE-8 (A / cm2) flows is compared. 0 The curve A in Fig. 10 is an example of the conventional technique. The characteristics in the case of using tungsten as the lower electrode, Among them, the oxidation treatment of oxidation button is 380. (: Oxygen plasma, the upper electrode is made of gold formed by evaporation method. As shown by the A curve in FIG. 10, according to the conventional semiconductor device described above, when the current of IE-8 (A / cm2) flows The obsolete voltage is 1.5 V. The curve B in Figure 10 is in the conventional semiconductor device. After the measurement of curve A is completed, heat treatment is performed at 450 ° C for 30 minutes, and then the measurement is performed. Results. As shown by the B curve in FIG. 10, according to the conventional semiconductor device, the voltage drop when the current of IE-8 (A / cm2) flows is 0.6 V, which means that the leakage current is significant by the above heat treatment. The curve C in FIG. 10 is a method for manufacturing a semiconductor device according to this embodiment, wherein tantalum nitride is used for the lower electrode; as the dielectric layer, tantalum oxide with a thickness of 13 nm is formed first, and then at 700 ° C It is obtained by applying heat treatment for 10 minutes in an oxygen environment; and the upper electrode is a result obtained by forming an arsenic nitride with a thickness of 50 nm made of an inorganic raw material. As shown by the C curve in FIG. For a semiconductor device, the voltage when the current of IE-8 (A / cm2) flows is 1.25V. -24- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling this page)
*tT A7 B7 五、發明説明（22 ) 經濟部中央標準局貝工消費合作社印製 圖10中的D曲線係根據本實施例之半導體裝置，當c曲線 之測定結束後，在450°C的氮中加上30分鐘的熱處理，然後 再進行測定的結果。 如圖10中的D曲線所示’根據本實施例之半導體裝置， 當IE-8(A/cm2)之電流流過時的電壓爲1 ·2ν。換言之，加上 前述30分鐘的熱處理對於電愿値幾乎沒有影響。 以上係就本發明之較佳實施例進行說明，但本發明並非 限於前述較佳實施例之樣態，在不違背本發明的精神及範 圍的情況下作出的變化及修改’並不超出本發明的範脅。 [發明之效果] 综合以上的詳細說明，本發明之代表例所得的效果可 單説明如下。 ⑴提供-種膜構造及方法，其由於在與氧化鈕相接的 處設有氮化鈕，故在氧化钽與下部電極的介面不會產生 化碎。 曰 T提供-種膜構造及方法’其在以藉由化學氣相成長⑦ 成的氧餘而形成㈣形構造後，在氨環境中進行教處 理而使絕緣體的氧化料變成導體之氮驗，故得到:種 =會產生前述氡切之膜構造，且實現圓柱形電容器之構 上半導體裝置及其製造方法，藉由在氮化叙 -置氧化妲，氧化熱處理成爲可 熱钱性的多晶氧化运，因而改善氧化艇之;^、有極 ⑷精由利用—種特殊的氣相成長法而得到氮化欽或 簡 面 氧 法 之 佳 多晶 (請先閲讀背面之注意事項再填寫本頁) 訂 本紙張尺度適财 297公釐） -25 A7 五、發明説明（23 矽，該特殊的氣相成長法使用：氣. 礼相成長法得到的氧化 妲、將涿氧化钽氮化得到的氮化鈕、及 叹典機原料。由於使 用此氣化欽或多晶梦而避免低介雷堂杯、β 丨罨*數〈氧化矽的生成， 因而能擴大電極面積’進而得到較大電容量之電容器。 (5)提供一種電容器，其對於形成電容器後之熱+處理並不 會造成電壓之降低，因此改善半導體裝置的可靠性。 (請先閱讀背面之注意事項再填寫本萸) *1Τ ·" 經濟部中央標準局員工消費合作社印製 26 本紙張尺度適用中國國家標準（CMS ) Α4規格（2Ι0Χ 297公釐）* tT A7 B7 V. Explanation of the invention (22) The D curve printed in Figure 10 by the Central Standards Bureau of the Ministry of Economic Affairs, Shellfish Consumer Cooperative, is a semiconductor device according to this embodiment. When the measurement of the c curve is completed, the temperature is at 450 ° C. As a result of the heat treatment for 30 minutes, nitrogen was added to the measurement. As shown by the D curve in FIG. 10 'According to the semiconductor device of this embodiment, the voltage when the current of IE-8 (A / cm2) flows is 1 · 2ν. In other words, the aforementioned heat treatment for 30 minutes has almost no effect on the electromagnetism. The above is a description of the preferred embodiments of the present invention, but the present invention is not limited to the foregoing preferred embodiments. Changes and modifications made without departing from the spirit and scope of the present invention do not exceed the present invention. Fan Xiu. [Effects of the Invention] In summary of the above detailed description, the effects obtained by the representative examples of the present invention can be described as follows. ⑴Provide-a seed film structure and method. Since the nitride button is provided at the place where it is in contact with the oxide button, the interface between the tantalum oxide and the lower electrode will not be broken. Said T provides-seed film structure and method 'After forming a ㈣-shaped structure with oxygen remnants formed by chemical vapor phase growth, it is taught in an ammonia environment to make the insulator of the insulator into a nitrogen test of the conductor. Therefore, it is obtained that: species = will produce the above-mentioned cut film structure, and realize a semiconductor device on a cylindrical capacitor and a method for manufacturing the same. Oxidation transport, thus improving the oxidation of the boat; ^, there is a very fine essence by using a special vapor phase growth method to get the best polycrystalline nitride or simple surface oxygen method (please read the precautions on the back before filling out this Page) The size of the paper is 297 mm. -25 A7 V. Description of the invention (23 Silicon, this special vapor phase growth method uses: gas. Rhenium oxide obtained by the etiquette phase growth method, and rhenium tantalum oxide obtained by nitriding Nitrogen button and raw material of the machine. Because of using this gasification or polycrystalline dream to avoid low-media Leitang cup, β 丨 罨 * number <the generation of silicon oxide, so the electrode area can be enlarged, and then a larger Capacitor (5) Provide a Capacitors will not reduce the voltage due to the heat + processing after the capacitors are formed, so the reliability of the semiconductor device will be improved. (Please read the precautions on the back before filling in this note) * 1Τ · " Central Bureau of Standards, Ministry of Economic Affairs Printed by Employee Consumer Cooperatives 26 This paper is sized for Chinese National Standard (CMS) Α4 (2Ι0χ 297 mm)
Claims (1)
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| JPH05198743A (en) * | 1992-01-20 | 1993-08-06 | Mitsubishi Electric Corp | Semiconductor device |
| JP3141553B2 (en) * | 1992-08-06 | 2001-03-05 | 日本電気株式会社 | Method for manufacturing semiconductor device |
| JPH07193138A (en) * | 1993-12-27 | 1995-07-28 | Mitsubishi Electric Corp | Semiconductor device |
| JPH08293494A (en) * | 1995-04-24 | 1996-11-05 | Canon Inc | Semiconductor device |
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