WO2003056772A1 - Circuit pour recuperer un signal de synchronisation a partir d'un signal code numeriquement - Google Patents
Circuit pour recuperer un signal de synchronisation a partir d'un signal code numeriquement Download PDFInfo
- Publication number
- WO2003056772A1 WO2003056772A1 PCT/DE2002/004598 DE0204598W WO03056772A1 WO 2003056772 A1 WO2003056772 A1 WO 2003056772A1 DE 0204598 W DE0204598 W DE 0204598W WO 03056772 A1 WO03056772 A1 WO 03056772A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- signal
- input
- output
- coupled
- counter
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
- H04L7/0066—Detection of the synchronisation error by features other than the received signal transition detection of error based on transmission code rule
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4904—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
L'invention concerne un circuit permettant de récupérer un signal de synchronisation (B) à partir d'un signal (A) codé numériquement, dans lequel un compteur (4) délivre une valeur de comptage proportionnelle à une durée de niveau élevée du signal de données (A), ce pour quoi une horloge de référence (C) est utilisée, puis la fréquence d'horloge de l'horloge de référence (C) est divisée par la valeur de comptage. Le signal d'horloge (B) ainsi récupéré est obtenu de manière aisée et peut être synchronisé avec le signal de données (A) dans d'autres développements du principe et s'utiliser pour décoder ledit signal de données. Le circuit s'utilise notamment pour traiter de manière rapide des signaux codés Manchester.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE2001163702 DE10163702A1 (de) | 2001-12-21 | 2001-12-21 | Schaltung zur Rückgewinnung eines Taktsignals aus einem digital codierten Signal |
DE10163702.0 | 2001-12-21 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2003056772A1 true WO2003056772A1 (fr) | 2003-07-10 |
Family
ID=7710684
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2002/004598 WO2003056772A1 (fr) | 2001-12-21 | 2002-12-16 | Circuit pour recuperer un signal de synchronisation a partir d'un signal code numeriquement |
Country Status (2)
Country | Link |
---|---|
DE (1) | DE10163702A1 (fr) |
WO (1) | WO2003056772A1 (fr) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2862820B1 (fr) * | 2003-11-21 | 2006-03-31 | Atmel Nantes Sa | Circuit electronique de decodage d'un signal de donnees asynchrone biphase et procede de decodage correspondant, dispositif de controle d'un equipement |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4513370A (en) * | 1982-07-19 | 1985-04-23 | Amdahl Corporation | Data transfer control system and method for a plurality of linked stations |
EP0266285A1 (fr) * | 1986-10-15 | 1988-05-04 | Hewlett-Packard France | Méthode et appareil de codage et de décodage d'information numérique |
EP0453063A2 (fr) * | 1990-04-19 | 1991-10-23 | British Broadcasting Corporation | Décodage de signaux biphasé en mesurant la longueur des impulsions |
US5801651A (en) * | 1996-06-27 | 1998-09-01 | Allen Bradley Company, Inc. | Manchester decoder with received signal blanking |
US6097322A (en) * | 1997-09-24 | 2000-08-01 | Stmicroelectronics S.A. | Device and method for controlling the sampling of a signal conveying binary information coded according to a two-phase code |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3537477A1 (de) * | 1985-10-22 | 1987-04-23 | Porsche Ag | Anordnung zur individuellen anpassung einer seriellen schnittstelle eines datenverarbeitenden systems an eine datenuebertragungsgeschwindigkeit eines kommunikationspartners |
DE4028744A1 (de) * | 1989-11-10 | 1991-05-23 | Abb Patent Gmbh | Verfahren und anordnung zur abstimmung der frequenz eines empfaengerseitigen taktgenerators auf die frequenz und die phasenlage eines empfangenen taktes |
DE19642017C1 (de) * | 1996-10-11 | 1998-04-02 | Siemens Ag | Datenempfangsvorrichtung, insbesondere für ein Kraftfahrzeug, und Verfahren zum Betreiben der Datenempfangsvorrichtung |
-
2001
- 2001-12-21 DE DE2001163702 patent/DE10163702A1/de not_active Ceased
-
2002
- 2002-12-16 WO PCT/DE2002/004598 patent/WO2003056772A1/fr not_active Application Discontinuation
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4513370A (en) * | 1982-07-19 | 1985-04-23 | Amdahl Corporation | Data transfer control system and method for a plurality of linked stations |
EP0266285A1 (fr) * | 1986-10-15 | 1988-05-04 | Hewlett-Packard France | Méthode et appareil de codage et de décodage d'information numérique |
EP0453063A2 (fr) * | 1990-04-19 | 1991-10-23 | British Broadcasting Corporation | Décodage de signaux biphasé en mesurant la longueur des impulsions |
US5801651A (en) * | 1996-06-27 | 1998-09-01 | Allen Bradley Company, Inc. | Manchester decoder with received signal blanking |
US6097322A (en) * | 1997-09-24 | 2000-08-01 | Stmicroelectronics S.A. | Device and method for controlling the sampling of a signal conveying binary information coded according to a two-phase code |
Also Published As
Publication number | Publication date |
---|---|
DE10163702A1 (de) | 2003-07-10 |
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