WO2003019644A1 - Procede et systeme de formage de film isolant - Google Patents
Procede et systeme de formage de film isolant Download PDFInfo
- Publication number
- WO2003019644A1 WO2003019644A1 PCT/JP2002/008735 JP0208735W WO03019644A1 WO 2003019644 A1 WO2003019644 A1 WO 2003019644A1 JP 0208735 W JP0208735 W JP 0208735W WO 03019644 A1 WO03019644 A1 WO 03019644A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- film
- forming
- insulation film
- forming method
- forming system
- Prior art date
Links
- 238000009413 insulation Methods 0.000 title abstract 2
- 238000000034 method Methods 0.000 title 1
- 229910052581 Si3N4 Inorganic materials 0.000 abstract 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 abstract 2
- 229910052814 silicon oxide Inorganic materials 0.000 abstract 2
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31604—Deposition from a gas or vapour
- H01L21/31608—Deposition of SiO2
- H01L21/31612—Deposition of SiO2 on a silicon body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
- H01L28/56—Capacitors with a dielectric comprising a perovskite structure material the dielectric comprising two or more layers, e.g. comprising buffer layers, seed layers, gradient layers
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/954—Making oxide-nitride-oxide device
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/981—Utilizing varying dielectric thickness
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Crystallography & Structural Chemistry (AREA)
- Ceramic Engineering (AREA)
- Materials Engineering (AREA)
- Plasma & Fusion (AREA)
- Analytical Chemistry (AREA)
- Formation Of Insulating Films (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
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KR1020037007141A KR100631767B1 (ko) | 2001-08-29 | 2002-08-29 | 절연막의 형성 방법 및 형성 시스템 |
EP02772825A EP1422752B1 (en) | 2001-08-29 | 2002-08-29 | Forming method and forming system for insulation film |
US10/487,986 US7166185B2 (en) | 2001-08-29 | 2002-08-29 | Forming system for insulation film |
US11/636,695 US7374635B2 (en) | 2001-08-29 | 2006-12-11 | Forming method and forming system for insulation film |
US11/967,517 US20080214017A1 (en) | 2001-08-29 | 2007-12-31 | Forming Method and Forming System for Insulation Film |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP2001260179A JP3746968B2 (ja) | 2001-08-29 | 2001-08-29 | 絶縁膜の形成方法および形成システム |
JP2001-260179 | 2001-08-29 |
Related Child Applications (2)
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US10487986 A-371-Of-International | 2002-08-29 | ||
US11/636,695 Division US7374635B2 (en) | 2001-08-29 | 2006-12-11 | Forming method and forming system for insulation film |
Publications (1)
Publication Number | Publication Date |
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WO2003019644A1 true WO2003019644A1 (fr) | 2003-03-06 |
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ID=19087419
Family Applications (1)
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PCT/JP2002/008735 WO2003019644A1 (fr) | 2001-08-29 | 2002-08-29 | Procede et systeme de formage de film isolant |
Country Status (7)
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US (3) | US7166185B2 (ja) |
EP (1) | EP1422752B1 (ja) |
JP (1) | JP3746968B2 (ja) |
KR (2) | KR100687598B1 (ja) |
SG (1) | SG160198A1 (ja) |
TW (1) | TW565892B (ja) |
WO (1) | WO2003019644A1 (ja) |
Cited By (1)
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WO2003096403A1 (fr) * | 2002-05-13 | 2003-11-20 | Tokyo Electron Limited | Procede de traitement d'un substrat |
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JP4507232B2 (ja) | 2003-03-24 | 2010-07-21 | ローム株式会社 | 半導体装置の製造方法 |
TW200511430A (en) * | 2003-05-29 | 2005-03-16 | Tokyo Electron Ltd | Plasma processing apparatus and plasma processing method |
JP4351571B2 (ja) * | 2004-03-31 | 2009-10-28 | 財団法人国際科学振興財団 | プラズマ処理方法及び電子装置の製造方法 |
JP2006128547A (ja) | 2004-11-01 | 2006-05-18 | Toshiba Corp | 半導体装置及びその製造方法 |
CN101937844B (zh) * | 2004-11-04 | 2012-06-13 | 东京毅力科创株式会社 | 绝缘膜形成方法 |
JP4863625B2 (ja) * | 2005-02-17 | 2012-01-25 | アイメック | フィルム成長開始の強化法 |
KR100900073B1 (ko) | 2005-03-16 | 2009-05-28 | 가부시키가이샤 히다치 고쿠사이 덴키 | 기판처리방법 및 기판처리장치 |
WO2006106665A1 (ja) * | 2005-03-31 | 2006-10-12 | Tokyo Electron Limited | 基板の窒化処理方法および絶縁膜の形成方法 |
US7888217B2 (en) * | 2005-10-20 | 2011-02-15 | Applied Materials, Inc. | Method for fabricating a gate dielectric of a field effect transistor |
US7727828B2 (en) * | 2005-10-20 | 2010-06-01 | Applied Materials, Inc. | Method for fabricating a gate dielectric of a field effect transistor |
JP5109269B2 (ja) * | 2006-03-09 | 2012-12-26 | 富士通株式会社 | 半導体装置の製造方法 |
JP4931939B2 (ja) * | 2006-03-09 | 2012-05-16 | アプライド マテリアルズ インコーポレイテッド | 半導体デバイスを形成する方法 |
JP5283147B2 (ja) * | 2006-12-08 | 2013-09-04 | 国立大学法人東北大学 | 半導体装置および半導体装置の製造方法 |
JP2008235397A (ja) * | 2007-03-19 | 2008-10-02 | Elpida Memory Inc | 半導体装置の製造方法 |
JP5221121B2 (ja) * | 2007-12-27 | 2013-06-26 | キヤノン株式会社 | 絶縁膜の形成方法 |
JP4972594B2 (ja) * | 2008-03-26 | 2012-07-11 | 東京エレクトロン株式会社 | エッチング方法及び半導体デバイスの製造方法 |
JP5336814B2 (ja) * | 2008-10-27 | 2013-11-06 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
KR101042950B1 (ko) * | 2009-09-25 | 2011-06-20 | 현대로템 주식회사 | 철도차량용 히터장치 |
JP5224012B2 (ja) * | 2010-12-08 | 2013-07-03 | 日新電機株式会社 | シリコン酸窒化膜の形成方法及び半導体デバイス |
JP5663384B2 (ja) * | 2011-04-19 | 2015-02-04 | 三菱電機株式会社 | 絶縁膜の製造方法 |
US8633118B2 (en) * | 2012-02-01 | 2014-01-21 | Tokyo Electron Limited | Method of forming thin metal and semi-metal layers by thermal remote oxygen scavenging |
US8865538B2 (en) | 2012-03-30 | 2014-10-21 | Tokyo Electron Limited | Method of integrating buried threshold voltage adjustment layers for CMOS processing |
US8865581B2 (en) | 2012-10-19 | 2014-10-21 | Tokyo Electron Limited | Hybrid gate last integration scheme for multi-layer high-k gate stacks |
CN104681402B (zh) * | 2015-03-16 | 2018-03-16 | 京东方科技集团股份有限公司 | 基板加热装置和基板加热方法 |
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- 2001-08-29 JP JP2001260179A patent/JP3746968B2/ja not_active Expired - Fee Related
-
2002
- 2002-08-29 TW TW091119748A patent/TW565892B/zh not_active IP Right Cessation
- 2002-08-29 SG SG200607204-5A patent/SG160198A1/en unknown
- 2002-08-29 WO PCT/JP2002/008735 patent/WO2003019644A1/ja not_active Application Discontinuation
- 2002-08-29 US US10/487,986 patent/US7166185B2/en not_active Expired - Fee Related
- 2002-08-29 KR KR1020067004679A patent/KR100687598B1/ko not_active IP Right Cessation
- 2002-08-29 EP EP02772825A patent/EP1422752B1/en not_active Expired - Lifetime
- 2002-08-29 KR KR1020037007141A patent/KR100631767B1/ko not_active IP Right Cessation
-
2006
- 2006-12-11 US US11/636,695 patent/US7374635B2/en not_active Expired - Fee Related
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2007
- 2007-12-31 US US11/967,517 patent/US20080214017A1/en not_active Abandoned
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WO2003096403A1 (fr) * | 2002-05-13 | 2003-11-20 | Tokyo Electron Limited | Procede de traitement d'un substrat |
US7226874B2 (en) | 2002-05-13 | 2007-06-05 | Tokyo Electron Limited | Substrate processing method |
Also Published As
Publication number | Publication date |
---|---|
JP2003068731A (ja) | 2003-03-07 |
US20080214017A1 (en) | 2008-09-04 |
KR20060029294A (ko) | 2006-04-05 |
KR20030051883A (ko) | 2003-06-25 |
US20070085154A1 (en) | 2007-04-19 |
US7374635B2 (en) | 2008-05-20 |
US7166185B2 (en) | 2007-01-23 |
KR100631767B1 (ko) | 2006-10-09 |
TW565892B (en) | 2003-12-11 |
EP1422752A1 (en) | 2004-05-26 |
SG160198A1 (en) | 2010-04-29 |
KR100687598B1 (ko) | 2007-03-02 |
JP3746968B2 (ja) | 2006-02-22 |
US20040245584A1 (en) | 2004-12-09 |
EP1422752B1 (en) | 2012-03-07 |
EP1422752A4 (en) | 2005-11-16 |
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