WO2001065601A3 - Vorrichtung zum verpacken elektronischer bauteile mittels spritzgusstechnik - Google Patents
Vorrichtung zum verpacken elektronischer bauteile mittels spritzgusstechnik Download PDFInfo
- Publication number
- WO2001065601A3 WO2001065601A3 PCT/DE2001/000778 DE0100778W WO0165601A3 WO 2001065601 A3 WO2001065601 A3 WO 2001065601A3 DE 0100778 W DE0100778 W DE 0100778W WO 0165601 A3 WO0165601 A3 WO 0165601A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- electronic components
- injection moulding
- subcarrier
- moulding technology
- packing electronic
- Prior art date
Links
- 238000005516 engineering process Methods 0.000 title abstract 2
- 238000001746 injection moulding Methods 0.000 title abstract 2
- 238000012856 packing Methods 0.000 title abstract 2
- 239000000919 ceramic Substances 0.000 abstract 1
- 239000004020 conductor Substances 0.000 abstract 1
- 239000002184 metal Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/562—Protection against mechanical damage
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
- H01L23/49894—Materials of the insulating layers or coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01012—Magnesium [Mg]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0102—Calcium [Ca]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01032—Germanium [Ge]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01057—Lanthanum [La]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Injection Moulding Of Plastics Or The Like (AREA)
Abstract
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001564393A JP3847166B2 (ja) | 2000-03-03 | 2001-03-02 | 射出成形技術を用いて電子部品をパッケージングするデバイス |
US10/220,752 US7215010B2 (en) | 2000-03-03 | 2001-03-02 | Device for packing electronic components using injection molding technology |
EP01919152A EP1259986A2 (de) | 2000-03-03 | 2001-03-02 | Vorrichtung zum verpacken elektronischer bauteile mittels spritzgusstechnik |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10010461.4 | 2000-03-03 | ||
DE2000110461 DE10010461A1 (de) | 2000-03-03 | 2000-03-03 | Vorrichtung zum Verpacken elektronischer Bauteile mittels Spritzgußtechnik |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2001065601A2 WO2001065601A2 (de) | 2001-09-07 |
WO2001065601A3 true WO2001065601A3 (de) | 2002-06-20 |
Family
ID=7633423
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2001/000778 WO2001065601A2 (de) | 2000-03-03 | 2001-03-02 | Vorrichtung zum verpacken elektronischer bauteile mittels spritzgusstechnik |
Country Status (5)
Country | Link |
---|---|
US (1) | US7215010B2 (de) |
EP (1) | EP1259986A2 (de) |
JP (2) | JP3847166B2 (de) |
DE (1) | DE10010461A1 (de) |
WO (1) | WO2001065601A2 (de) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10317596A1 (de) * | 2003-04-16 | 2004-11-11 | Epcos Ag | Verfahren zur Erzeugung von Lotkugeln auf einem elektrischen Bauelement |
US20060043635A1 (en) * | 2003-10-31 | 2006-03-02 | Groth Lauren A | Singular and co-molded pre-forms |
US7224040B2 (en) * | 2003-11-28 | 2007-05-29 | Gennum Corporation | Multi-level thin film capacitor on a ceramic substrate |
DE102007017855A1 (de) * | 2007-04-16 | 2008-10-23 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung eines optoelektronischen Bauelementes und optoelektronisches Bauelement |
WO2009065105A2 (en) * | 2007-11-16 | 2009-05-22 | Continental Automotive Systems Us, Inc. | Thermal packaging of transmission controller using carbon composite printed circuit board material |
JP5481854B2 (ja) * | 2008-12-16 | 2014-04-23 | Tdk株式会社 | 電子部品 |
JP5514559B2 (ja) * | 2010-01-12 | 2014-06-04 | 新光電気工業株式会社 | 配線基板及びその製造方法並びに半導体パッケージ |
JP5469546B2 (ja) | 2010-06-22 | 2014-04-16 | 株式会社ジェイデバイス | 半導体装置の製造方法 |
JP5606243B2 (ja) | 2010-09-24 | 2014-10-15 | 株式会社ジェイデバイス | 半導体装置の製造方法 |
EP2799964A3 (de) * | 2013-04-29 | 2017-04-26 | Dyna Image Corporation | Bewegungssensor und Verpackungsverfahren dafür |
CN104123179A (zh) | 2013-04-29 | 2014-10-29 | 敦南科技股份有限公司 | 中断控制方法及其电子系统 |
JP6365360B2 (ja) * | 2015-03-12 | 2018-08-01 | 株式会社デンソー | 電子装置及びその製造方法 |
CN108738366B (zh) * | 2017-02-20 | 2022-03-15 | 新电元工业株式会社 | 电子装置 |
DE112019002287T5 (de) | 2018-12-10 | 2021-02-04 | Fuji Electric Co., Ltd. | Halbleitervorrichtung |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5270262A (en) * | 1991-02-28 | 1993-12-14 | National Semiconductor Corporation | O-ring package |
JPH08124955A (ja) * | 1994-10-26 | 1996-05-17 | Toyota Motor Corp | 電子部品の製造方法 |
JPH08236560A (ja) * | 1995-03-01 | 1996-09-13 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JPH09219470A (ja) * | 1996-02-09 | 1997-08-19 | Toshiba Corp | 半導体装置 |
US5798070A (en) * | 1993-02-23 | 1998-08-25 | Mitsubishi Denki Kabushiki Kaisha | Encapsulation method |
JPH11121656A (ja) * | 1997-10-16 | 1999-04-30 | Nec Corp | 樹脂封止型bgaおよびbga用樹脂封止金型 |
EP0971401A2 (de) * | 1998-07-10 | 2000-01-12 | Apic Yamada Corporation | Verfahren zur Herstellung einer Halbleitervorrichtung und Harzformmaschine zu diesem Zweck |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5638830A (en) * | 1979-09-07 | 1981-04-14 | Fujitsu Ltd | Sealing method |
JPS6272576A (ja) * | 1985-09-26 | 1987-04-03 | 株式会社東芝 | セラミツクス−金属接合体 |
US5024883A (en) * | 1986-10-30 | 1991-06-18 | Olin Corporation | Electronic packaging of components incorporating a ceramic-glass-metal composite |
JPH01121656A (ja) | 1987-11-04 | 1989-05-15 | Rinnai Corp | 給湯器の凍結防止用ヒータ取付方法 |
JPH01278755A (ja) * | 1988-05-02 | 1989-11-09 | Matsushita Electron Corp | リードフレームおよびこれを用いた樹脂封止型半導体装置 |
US5071793A (en) * | 1990-08-23 | 1991-12-10 | Aluminum Company Of America | Low dielectric inorganic composition for multilayer ceramic package |
US5753972A (en) * | 1993-10-08 | 1998-05-19 | Stratedge Corporation | Microelectronics package |
KR0143870B1 (ko) * | 1993-12-27 | 1998-07-01 | 사토 후미오 | 고열전도성 질화규소 구조부재 및 반도체 패키지, 히터, 서멀헤드 |
DE19622650A1 (de) * | 1995-06-06 | 1996-12-12 | Circuit Components Inc | Gehäuse für digitalen Hochleistungs-IC, welcher ein BGA(Kugelgitterarray)-Ein/Ausgabe-Format verwendet sowie keramisches Einschicht-Substrat mit Bimetall gefüllter Durchgangstechnologie |
US5918112A (en) * | 1997-07-24 | 1999-06-29 | Motorola, Inc. | Semiconductor component and method of fabrication |
JP3069654B2 (ja) | 1997-11-14 | 2000-07-24 | 工業技術院長 | ポリジフェニルシロキサンの製膜方法 |
JPH11251149A (ja) | 1998-02-27 | 1999-09-17 | Sumida Electric Co Ltd | セラミックチップコイル |
JP3901427B2 (ja) | 1999-05-27 | 2007-04-04 | 松下電器産業株式会社 | 電子装置とその製造方法およびその製造装置 |
-
2000
- 2000-03-03 DE DE2000110461 patent/DE10010461A1/de not_active Withdrawn
-
2001
- 2001-03-02 JP JP2001564393A patent/JP3847166B2/ja not_active Expired - Fee Related
- 2001-03-02 EP EP01919152A patent/EP1259986A2/de not_active Withdrawn
- 2001-03-02 US US10/220,752 patent/US7215010B2/en not_active Expired - Fee Related
- 2001-03-02 WO PCT/DE2001/000778 patent/WO2001065601A2/de active Application Filing
-
2005
- 2005-07-19 JP JP2005209309A patent/JP2005354095A/ja active Pending
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5270262A (en) * | 1991-02-28 | 1993-12-14 | National Semiconductor Corporation | O-ring package |
US5798070A (en) * | 1993-02-23 | 1998-08-25 | Mitsubishi Denki Kabushiki Kaisha | Encapsulation method |
JPH08124955A (ja) * | 1994-10-26 | 1996-05-17 | Toyota Motor Corp | 電子部品の製造方法 |
JPH08236560A (ja) * | 1995-03-01 | 1996-09-13 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JPH09219470A (ja) * | 1996-02-09 | 1997-08-19 | Toshiba Corp | 半導体装置 |
JPH11121656A (ja) * | 1997-10-16 | 1999-04-30 | Nec Corp | 樹脂封止型bgaおよびbga用樹脂封止金型 |
EP0971401A2 (de) * | 1998-07-10 | 2000-01-12 | Apic Yamada Corporation | Verfahren zur Herstellung einer Halbleitervorrichtung und Harzformmaschine zu diesem Zweck |
Non-Patent Citations (4)
Title |
---|
PATENT ABSTRACTS OF JAPAN vol. 1996, no. 09 30 September 1996 (1996-09-30) * |
PATENT ABSTRACTS OF JAPAN vol. 1997, no. 01 31 January 1997 (1997-01-31) * |
PATENT ABSTRACTS OF JAPAN vol. 1997, no. 12 25 December 1997 (1997-12-25) * |
PATENT ABSTRACTS OF JAPAN vol. 1999, no. 09 30 July 1999 (1999-07-30) * |
Also Published As
Publication number | Publication date |
---|---|
DE10010461A1 (de) | 2001-09-13 |
US7215010B2 (en) | 2007-05-08 |
JP3847166B2 (ja) | 2006-11-15 |
US20030178747A1 (en) | 2003-09-25 |
JP2003526208A (ja) | 2003-09-02 |
WO2001065601A2 (de) | 2001-09-07 |
JP2005354095A (ja) | 2005-12-22 |
EP1259986A2 (de) | 2002-11-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2001065601A3 (de) | Vorrichtung zum verpacken elektronischer bauteile mittels spritzgusstechnik | |
WO2002068320A3 (en) | Devices having substrates with openings passing through the substrates and conductors in the openings, and methods of manufacture | |
WO2002017387A3 (en) | Conductive material patterning methods | |
KR20010012977A (ko) | 반도체 장치 및 그 제조방법, 회로기판 및 전자기기 | |
WO2004008832A3 (en) | Attachable modular electronic systems | |
CA2302792A1 (en) | Interposer assembly | |
EP1250033A3 (de) | Leiterplatte und Elektronikkomponente | |
WO2002013258A3 (en) | Backside contact for integrated circuit and method of forming same | |
WO2003019653A3 (de) | Verfahren zum kontaktieren und gehäusen von integrierten schaltungen | |
AU6121598A (en) | Electronic component and semiconductor device, method for manufacturing the same, circuit board have the same mounted thereon, and electronic equipment having the circuit board | |
EP1455392A4 (de) | Halbleiterbauelement und verfahren zu seiner herstellung | |
EP0824301A3 (de) | Gedruckte Schaltungsplatte, Chipkarte, und Verfahren zu deren Herstellung | |
WO2005011343A3 (en) | Circuit board with embedded components and method of manufacture | |
TW340243B (en) | Manufacturing method of semiconductor elements | |
WO2002056652A3 (de) | Verfahren zur herstellung einer elektronischen baugruppe | |
TW373256B (en) | A semiconductor device having discontinuous insulating regions and the manufacturing method thereof | |
WO2001093310A3 (fr) | Dispositif semiconducteur a injection electronique verticale et son procede de fabrication | |
DE60219815D1 (de) | Monolitische elektronische mehrlagenanordnung und deren herstellungsverfahren | |
AU5844698A (en) | Semiconductor substrate having compound semiconductor layer, process for its production, and electronic device fabricated on semiconductor substrate | |
WO2002076164A3 (en) | Electronic module with fluid dissociation electrodes and methods | |
HK1020394A1 (en) | Substrate for semiconductor device, semiconductor device and method for manufacturing the same, circuit board, and electronic equipment | |
WO2003012172A3 (de) | Verfahren und vorrichtung zum erzeugen eines texturierten bandes aus metall | |
EP1168774A3 (de) | Ein Gehäusezusammenbau | |
WO2002054839A3 (en) | Layered circuit boards and methods of production thereof | |
WO2004077547A3 (de) | Verbindungstechnik für leistungshalbleiter mit grossflächigen anschlüssen |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A2 Designated state(s): JP KR US |
|
AL | Designated countries for regional patents |
Kind code of ref document: A2 Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
DFPE | Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101) | ||
AK | Designated states |
Kind code of ref document: A3 Designated state(s): JP KR US |
|
AL | Designated countries for regional patents |
Kind code of ref document: A3 Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2001919152 Country of ref document: EP |
|
ENP | Entry into the national phase |
Ref country code: JP Ref document number: 2001 564393 Kind code of ref document: A Format of ref document f/p: F |
|
WWP | Wipo information: published in national office |
Ref document number: 2001919152 Country of ref document: EP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 10220752 Country of ref document: US |