WO1999042851A1 - Structure d'interface de dispositif de test - Google Patents

Structure d'interface de dispositif de test Download PDF

Info

Publication number
WO1999042851A1
WO1999042851A1 PCT/JP1999/000740 JP9900740W WO9942851A1 WO 1999042851 A1 WO1999042851 A1 WO 1999042851A1 JP 9900740 W JP9900740 W JP 9900740W WO 9942851 A1 WO9942851 A1 WO 9942851A1
Authority
WO
WIPO (PCT)
Prior art keywords
board
test
socket
test fixture
connect
Prior art date
Application number
PCT/JP1999/000740
Other languages
English (en)
Japanese (ja)
Inventor
Susumu Kondo
Takashi Sekizuka
Hiroto Satoh
Original Assignee
Advantest Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corporation filed Critical Advantest Corporation
Publication of WO1999042851A1 publication Critical patent/WO1999042851A1/fr

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/073—Multiple probes
    • G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07364—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch
    • G01R1/07378—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch using an intermediate adapter, e.g. space transformers
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer

Definitions

  • the present invention relates to a performance board that is mounted on a test head of a semiconductor test system and serves as an interface with a device under test on the test system side, and a socket board that is mounted on a test handler and into which a device under test is inserted and removed.
  • the structure of the interface part of the test fixture that transmits signals between and. Background art
  • one example of the semiconductor test system includes a workstation 90, a semiconductor test apparatus main body 70, a test head 71, and a test handler 80.
  • the workstation 90 is an engineering workstation connected to the semiconductor test apparatus main body 70 and serving as an interface with the operator.
  • the semiconductor test equipment main body 70 includes a test processor that controls the entire system including peripheral devices, and various units that generate and measure test signals.
  • the path from the semiconductor test equipment main body 70 to the electronic circuit built in the test head 71 is connected by a cable, and transmission of test signals and the like is performed. You.
  • test signal and the like from an electronic circuit built in the test head 71 are electrically connected to a performance board 62 mounted in the test head 71.
  • the test signal on the performance board 62 is electrically connected to a plurality of IC sockets 11 mounted on the socket board 10 via the test fixture 100 and transmitted.
  • the output signal from the IC socket 11 is transmitted to the semiconductor test equipment main body along the reverse route.
  • the test fixture 100 can be separated and replaced according to the type of the performance board 62 and the socket board 100.
  • the test handler 80 is mounted on the socket board 10. This is an automatic transport device that automatically transports the device under test to multiple IC sockets 11, inserts and tests it, removes it from the IC socket based on the test results, sorts it, and transports it to the storage location.
  • test handler 80 mounts the IC socket 11 side of the socket board 10 in a constant temperature chamber to enable high and low temperature testing of the device under test.
  • test fixture 100 for transmitting signals between the performance board 62 mounted on the test head 71 and the socket board 10 will be described.
  • Signals are mainly transmitted between the performance board 62 and the socket board 10 via the connect board 40.
  • the connection between the performance board 62 and the connect board 40 is generally the same as the connection between the socket board 10 and the connect board 40.
  • a socket board 10 having a contact piece therein is embedded in a socket board 10 and provided.
  • the pin socket 60 since the pin socket 60 is longer than the thickness of the socket board 10, it protrudes by about 1 mm.
  • the reason is that the distance between the test fixture 100 and the IC socket must be kept short in order to improve the high-frequency characteristics during signal transmission, and the thickness of the socket board 10 cannot be increased. .
  • a pin 61 and a pin header 50 molded with resin or the like and supporting the pin 61 are provided at both ends.
  • the pin header 50 is fixed to the pad 44 by soldering the pin 61 to the pad 44 of the connect board 40.
  • the signal pattern 43 serving as a signal path forms a strip line between the signal board 43 and the inner layer GND pattern 45 of the connect board 40 to have a characteristic impedance of, for example, 50 ⁇ .
  • the GND pattern 41 has an inner layer GND due to the through hole 42. Connected to turns 4-5.
  • a pad 44 at one end of the connect board 40 is connected to a pad at the other end of the connect board 40 via a signal pattern 43.
  • pin headers 50 are provided at both ends of the connect board 40, respectively. Although not shown in the figure, the other end of the connect board 40 is similarly electrically connected to the performance board 62 via the pin header 50. Thus, the performance board 62 and the A signal is transmitted to and from the socket board 100 via the test fixture 100.
  • the IC socket 11 mounted on the socket board 10 has the measured Since a socket guide is used as a guide when inserting and removing a fixed device, it is desirable that the socket board 10 has as few projections as possible. However, the distance between the IC socket 11 and the test fixture 100 is increased, which is not preferable for transmitting high-frequency signals, such as an increase in capacity. There are practical problems (A) to (D) described above.
  • the present invention has been made in view of such a problem, and its purpose is to transmit a high-frequency test signal, enable a high-density pin arrangement, and conduct heat from the IC socket 11 side of the socket board through heat conduction.
  • An object of the present invention is to provide a structure of an interface portion of a test fixture, in which the connection is hardly conducted to the connect board side and the IC socket 11 side of the socket board is flat. Disclosure of the invention
  • a first aspect of the present invention to achieve the above object is a performance board mounted on a test head of a semiconductor test system and serving as an interface with a device under test on the test system side, and a performance board mounted on a test handler.
  • a performance board mounted on a test head of a semiconductor test system and serving as an interface with a device under test on the test system side
  • a performance board mounted on a test handler In the structure of the interface board of the test fixture that transmits signals between the socket board from which the measuring device is inserted and the
  • a plurality of surface mount connectors 20 which are surface mounted only on the side opposite to the IC socket mounting side of the socket board 10;
  • the feature of the structure of the test fixture ' are doing.
  • a second aspect of the present invention is a performance board that is mounted on a test head of a semiconductor test system and serves as an interface with a device under test on the test system side, and mounted on a test handler.
  • the interface board of the test fixture that transmits signals between the socket board from which the device under test is
  • a plurality of surface mount connectors 20 mounted on the surface of the performance board 62 only while being surface mounted only on the opposite side of the socket board 10 to the IC socket mounting side;
  • a connect board 40 for transmitting a signal from one end to the other end of the board; and a fit to one end of the connect board 40 and a fit to the other end of the connect board 40 to maintain matching of characteristic impedance.
  • a plurality of connectors 30 respectively mating with the respective surface mount connectors 20 of the socket board 10 or the performance board 62;
  • test fixture's interface part which has: BRIEF DESCRIPTION OF THE FIGURES
  • FIG. 1 is a cross-sectional view of a signal portion on the socket board side of the test fixture of the present invention.
  • FIG. 2 is a cross-sectional view of the GND section on the socket board side of the test fixture of the present invention.
  • FIG. 3 is a partial plan view of the test fixture of the present invention on the socket board side.
  • Figure 4 is a configuration diagram of the semiconductor test system.
  • Fig. 5 is a cross-sectional view of the conventional test fixture on the socket board side.
  • FIG. 6 is a cross-sectional view taken along line AA of FIG. 5 of the conventional test fixture.
  • a surface mount connector 20 is provided on the socket board 10.
  • a connector 30 fitted to the connect board 40 is provided at a fitting portion of the test fixture 100 with the surface mount connector 20.
  • the fitting part of the test fixture 100 with the surface mount connector 20 may be provided with a coaxial cable connected to the connector 30.
  • the configuration of the test fixture 100 on the performance board 62 side is not shown in the figure, similarly, the performance board 62 is provided with the surface mount connector 20 and the connection board 4 is provided. Alternatively, the connector 30 may be provided with a connector 30 fitted to the connector 0.
  • the coaxial cable may be directly attached to the performance board 62 by soldering.
  • the performance board 62 may be electrically connected to the test head 71 via a plurality of layers of boards (for example, a mother board). As described above, the signal is transmitted between the socket board 10 and the performance board 62 via the interface of the test fixture 100.
  • the surface mount connector 20 is a surface mount connector to which the connector 30 is fitted and electrically connected.
  • the signal pin 21 and the GND pin 24 that can be surface mounted on the socket board 10 may be selectively used.
  • signal pin 21 is composed of 36 pins
  • GND pin 24 is composed of 4 pins.
  • the connector 30 is fixed and attached by soldering the signal contact 31 to the signal pattern 43 and the GND contact 32 to the GND pattern 41.
  • the connector 30 has a structure in which the signal contact 31 and the GND contact 32 of the part that is inserted into and mated with the surface mount connector 20 and the force and insulator are sandwiched, that is, a structure similar to a strip line. I have. That is, similar to the characteristic impedance of the signal pattern 43 of the connect board 40, matching can be achieved by setting the characteristic impedance between the signal contact 31 and the GND contact 32 to 50 ⁇ .
  • the signal transmission between the connect board 40 and the socket board 10 and the signal transmission between the connect board 40 and the performance board 62 maintain the characteristic impedance matching, so that high-frequency signals can be transmitted.
  • the surface mount connector 20 is mounted only on the side opposite to the side on which the IC socket 11 is mounted, there is no protrusion on the IC socket 11 side of the socket board 10. Therefore, even if a socket guide is used as a guide for inserting and removing the device under test, since there is no protrusion on the IC socket 11 side of the socket board 10, the device can be used smoothly without any trouble.
  • the pitch between the signal pins 21 of the surface mount connector 20 can be narrowed to about 0.8 mm to 0.5 mm.
  • the transmission path conventionally performed by soldering the 2-pin terminals from the performance board 62 directly to the socket board 10 using the coaxial cable with the 2-pin terminals has been replaced by the test fixture of the present embodiment.
  • the transmission of high-frequency signals through the interface has made it possible to configure the system without using coaxial cables directly.
  • test fixture 100 and the socket board 10 can be easily separated or replaced by removing the mating of the surface mount connector.
  • the present invention is embodied in the form described above, and has the following effects.
  • the present invention has overcome all of the above-mentioned problems (A) to (D) that the conventional technology has.
  • the characteristic impedance is matched between the connect board and the socket board 10 by the surface mount connector, and the connect board and the performance board are matched. Since the characteristic impedance is matched with the board, the high-frequency signal can be transmitted.
  • the socket board Furthermore, there is no protrusion on the IC socket 11 side of the socket board, and the IC board becomes flat, so that even if a socket guide is used as a guide for extracting and removing a device under test, the socket board can be used smoothly without any trouble.
  • the structure of the test fixture interface according to the present invention has a great advantage when a device under test operating with a high frequency signal is tested with high accuracy by combining a semiconductor test system and a test handler. Having.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

On monte un dispositif de test entre une carte (62) à tester et une carte (10) à connecteur femelle de façon à réaliser un transfert haute densité de signaux haute fréquence. Cette structure d'interface de dispositif de test permet de limiter la conduction thermique des connecteurs femelles (11) à circuit intégré vers une carte à connecteur mâle, les connecteurs femelles (11) à circuit intégré étant disposés à plat sur la carte à connecteur femelle. La carte à connecteur femelle du côté gestionnaire de test est pourvue d'un connecteur à montage en surface, et une carte à connecteur mâle destinée à la transmission de signaux d'une extrémité à l'autre de la carte est pourvue d'un connecteur qui fait contact avec le connecteur à montage en surface.
PCT/JP1999/000740 1998-02-20 1999-02-19 Structure d'interface de dispositif de test WO1999042851A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP10038631A JPH11237439A (ja) 1998-02-20 1998-02-20 テストフィクスチャ
JP10/38631 1998-02-20

Publications (1)

Publication Number Publication Date
WO1999042851A1 true WO1999042851A1 (fr) 1999-08-26

Family

ID=12530598

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP1999/000740 WO1999042851A1 (fr) 1998-02-20 1999-02-19 Structure d'interface de dispositif de test

Country Status (4)

Country Link
JP (1) JPH11237439A (fr)
KR (1) KR20010006422A (fr)
TW (1) TW420304U (fr)
WO (1) WO1999042851A1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7218095B2 (en) * 2004-07-30 2007-05-15 Verigy (Singapore) Pte. Ltd. Method and apparatus for electromagnetic interference shielding in an automated test system
WO2006134644A1 (fr) * 2005-06-14 2006-12-21 Advantest Corporation Unité de câble coaxial, appareil d'interface de dispositifs et appareil de contrôle de composants électroniques
KR100881939B1 (ko) * 2006-11-15 2009-02-16 주식회사 아이티엔티 반도체 디바이스 테스트 시스템
KR101193407B1 (ko) 2007-09-11 2012-10-24 가부시키가이샤 어드밴티스트 연결기, 도전 부재, 연결기의 제조 방법, 퍼포먼스 보드 및 시험 장치

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6387790U (fr) * 1986-11-27 1988-06-08
JPH0231081U (fr) * 1988-08-22 1990-02-27
JPH0421881U (fr) * 1990-06-08 1992-02-24
JPH0496081U (fr) * 1991-01-16 1992-08-20
JPH04289467A (ja) * 1991-02-04 1992-10-14 Hitachi Electron Eng Co Ltd Ｉｃデバイスの電気的特性測定装置
JPH04304646A (ja) * 1991-04-02 1992-10-28 Fujitsu Ltd ゴムコンダクター及び半導体デバイスの試験方法
JPH08201476A (ja) * 1995-01-30 1996-08-09 Nec Kyushu Ltd 半導体装置試験用テストボード

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6387790U (fr) * 1986-11-27 1988-06-08
JPH0231081U (fr) * 1988-08-22 1990-02-27
JPH0421881U (fr) * 1990-06-08 1992-02-24
JPH0496081U (fr) * 1991-01-16 1992-08-20
JPH04289467A (ja) * 1991-02-04 1992-10-14 Hitachi Electron Eng Co Ltd Ｉｃデバイスの電気的特性測定装置
JPH04304646A (ja) * 1991-04-02 1992-10-28 Fujitsu Ltd ゴムコンダクター及び半導体デバイスの試験方法
JPH08201476A (ja) * 1995-01-30 1996-08-09 Nec Kyushu Ltd 半導体装置試験用テストボード

Also Published As

Publication number Publication date
TW420304U (en) 2001-01-21
JPH11237439A (ja) 1999-08-31
KR20010006422A (ko) 2001-01-26

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