WO1999038201A1 - Verfahren zur herstellung einer einkristallinen schicht auf einem nicht gitterangepassten substrat, sowie eine oder mehrere solcher schichten enthaltendes bauelement - Google Patents
Verfahren zur herstellung einer einkristallinen schicht auf einem nicht gitterangepassten substrat, sowie eine oder mehrere solcher schichten enthaltendes bauelement Download PDFInfo
- Publication number
- WO1999038201A1 WO1999038201A1 PCT/DE1999/000203 DE9900203W WO9938201A1 WO 1999038201 A1 WO1999038201 A1 WO 1999038201A1 DE 9900203 W DE9900203 W DE 9900203W WO 9938201 A1 WO9938201 A1 WO 9938201A1
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- WIPO (PCT)
- Prior art keywords
- substrate
- layer
- implantation
- defect
- buried
- Prior art date
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 43
- 238000000034 method Methods 0.000 title claims abstract description 32
- 238000004519 manufacturing process Methods 0.000 title abstract description 6
- 238000002513 implantation Methods 0.000 claims abstract description 17
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 8
- 239000001257 hydrogen Substances 0.000 claims abstract description 8
- 239000010410 layer Substances 0.000 claims description 74
- 230000007547 defect Effects 0.000 claims description 23
- 239000013078 crystal Substances 0.000 claims description 13
- 239000002344 surface layer Substances 0.000 claims description 12
- 150000002500 ions Chemical class 0.000 claims description 11
- 230000008021 deposition Effects 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 5
- 238000000137 annealing Methods 0.000 claims description 4
- 229910052732 germanium Inorganic materials 0.000 claims description 3
- 238000005468 ion implantation Methods 0.000 claims description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 2
- 229910052756 noble gas Inorganic materials 0.000 claims description 2
- 229910052594 sapphire Inorganic materials 0.000 claims 2
- 239000010980 sapphire Substances 0.000 claims 2
- 230000005669 field effect Effects 0.000 claims 1
- 210000004072 lung Anatomy 0.000 claims 1
- 229910003465 moissanite Inorganic materials 0.000 claims 1
- 229910010271 silicon carbide Inorganic materials 0.000 claims 1
- 230000002950 deficient Effects 0.000 abstract 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 6
- 229910008310 Si—Ge Inorganic materials 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000000407 epitaxy Methods 0.000 description 4
- 238000000151 deposition Methods 0.000 description 3
- 229910000831 Steel Inorganic materials 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000001534 heteroepitaxy Methods 0.000 description 2
- 238000004377 microelectronic Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000010959 steel Substances 0.000 description 2
- 230000003746 surface roughness Effects 0.000 description 2
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 239000007795 chemical reaction product Substances 0.000 description 1
- 230000036461 convulsion Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000010348 incorporation Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
- C30B23/02—Epitaxial-layer growth
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/52—Alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02658—Pretreatments
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02694—Controlling the interface between substrate and epitaxial layer, e.g. by ion implantation followed by annealing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/2654—Bombardment with radiation with high-energy radiation producing ion implantation in AIIIBV compounds
Definitions
- the invention relates to a method for producing a single-crystalline layer on a non-lattice-matched substrate. Furthermore, the invention relates to a component containing one or more such layers according to the preamble of claim 10.
- dislocations are built in at the interface between the layer formed and the substrate, as a result of this relaxation, - 2 - but also with a disadvantageous number of dislocations, from the interface to the layer surface (so-called threading dislocations). Since most of these dislocations continue through newly grown layers, they significantly degrade the electrical and optical properties of the layer material.
- the object of the invention is to provide a method of the type described at the outset and a component in which the disadvantages specified above are avoided, in particular the formation of thread mg dislocations is avoided.
- the object is achieved by a method according to the entirety of the features according to claim 1.
- the task is further solved by a component according to the entirety of the features according to claim 10. Further expedient or advantageous embodiments or variants can be found on each of these Claims jerk-related subclaims.
- the object is achieved according to claim 1 in that a buried, defect-rich layer is formed in the single-crystal substrate. It was recognized that the layer formed on the substrate surface is then relaxed and the formation of thread mg dislocations is prevented. It was also recognized that in this way the lattice parameter of the layer thus formed comes closer to the own lattice structure than the originally strained layer, in such a way that the quality of the deposited film does not deteriorate according to the invention through the incorporation of crystal defects. In the method according to the invention, it is also advantageously achieved that the surface roughness of the layer formed is significantly lower compared to conventionally produced layers. Finally, the degree of stress relaxation in the layer according to the invention is significantly increased in an advantageous manner. It can be advantageous to form the buried layer as close as possible to this surface without disturbing the surface structure of the substrate.
- defect-rich layer buried beneath the substrate surface can be - 4 - implantation.
- hydrogen can be used as the type of ion.
- the method claimed in claim 4 provides for an advantageous, dislocation-free formation of the layer formed on the substrate surface at an implantation dose in the range from 1 * 10 14 cm “" 2 to 1 * 10 17 cm “2.
- the ion implantation can either be before the deposition of the crystalline film or else after the deposition of the crystalline film to form the layer.
- an ion type for implantation that is matched to the choice of substrate and film material.
- Light ions or noble gas ions can be particularly suitable for this.
- the method according to the invention is designed very advantageously in that the defect structure, for example in depth, can be optimized by further implantations.
- a second implantation by means of a second type of ion favors the increase in the defect density or the increase in the gas bubble density.
- the method according to the invention is very advantageously supplemented by an annealing treatment for the purpose of thermally induced relaxation and defect reduction.
- the method according to the invention is not limited to the use of silicon substrates to form a buried, defect-rich layer. Rather, it may be advantageous to use one of the substrate materials listed in claim 9.
- the component according to the invention as claimed in claim 10, 11 or 12 has the advantage that the microelectronic or optoelectronic properties required by a component can be optimally formed in the layers formed without being adversely affected or disturbed by threading dislocations.
- the layer produced according to the invention can already be the desired end product.
- this layer formed according to the invention forms a suitable base, for example as a buffer layer for the growth of a further layer. In this way, it forms a seed layer for the further growth of a single-crystalline film.
- the method according to the invention for producing a relaxed, single-crystalline layer with a low dislocation density also advantageously includes the production of a buried, defect-rich layer in the substrate by means of hydrogen implantation. This light type of ion allows a precise, defined defect formation within the substrate at the desired depth.
- Fig. 1 Schematic representation of a according to the previous Ver ⁇ drive by heteroepitaxy on non gittertationange- p motherboardtem substrate layer formed with a plurality of through the surface layer extending threading dislocations; - 6 -
- Fig. 2 manufactured by the inventive method
- FIG. 1 shows a layer which was produced by the previous method using heteroepitaxy on a substrate which was not matched to the lattice, with many threading dislocations running through the surface layer.
- FIG. 2 shows a side view of the layer produced by the method according to the invention.
- the threading dislocations shown here, which run into the substrate, do not necessarily have to arise.
- the single-crystalline substrate which has a buried defect-rich layer, is such that the threading dislocations run into the defect-rich layer of the substrate and do not pass through the single-crystalline surface layer (the film).
- An Si wafer was used as the substrate. Hydrogen with a dose of 1 * 10 16 cm “2 and the energy of approx. 1 keV is implanted into this substrate using a commercially available implantation system, so that a buried defect layer is formed close to the surface without defects in the uppermost atomic layers of the Si substrate.
- the defect layer thus produced is stable up to approximately 700 ° C., ie the defects are scarcely healed up to this temperature, which enables the subsequent deposition of silicon (Si) and germanium (Ge) in a ratio of 80:20 by means of molecular steel epitaxy (MBE ) at approximately 500 ° C.
- MBE molecular steel epitaxy
- Si wafer was used as the substrate.
- This commercially available substrate was cleaned - as is usual in Si epitaxy - in order to obtain a perfect and clean surface.
- Si and Ge were then deposited at 500 ° C. in a ratio of 80:20 by means of molecular steel epitaxy (MBE).
- MBE molecular steel epitaxy
- the single-crystalline, only 200 nm thick surface layer thus obtained is under mechanical tension.
- hydrogen is implanted with an implantation device with a dose of 1 • 10 16 cm ⁇ 2 .
- the implantation energy of the H + ions is selected, for example 20 keV H + , so that the buried, defect-rich layer is formed just below the interface between the surface layer and the Si substrate.
- Si-Ge layers thus produced can be either directly ver ⁇ turns or serve as an intermediate layer for further epitaxial growth of heterostructures and superlattices.
- FIG. 3 shows the course of a conventionally produced layer which has surface levels in the range from 1 to 5 nm (nanometer).
- the course of a layer produced according to the invention shown in FIG. 4 shows a significantly smoother surface without significant surface steps.
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- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
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- Materials Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Crystallography & Structural Chemistry (AREA)
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Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP99907288A EP1051740A1 (de) | 1998-01-27 | 1999-01-27 | Verfahren zur herstellung einer einkristallinen schicht auf einem nicht gitterangepasstem substrat, sowie eine oder mehrere solcher schichten enthaltendes bauelement |
US09/600,802 US6464780B1 (en) | 1998-01-27 | 1999-01-27 | Method for the production of a monocrystalline layer on a substrate with a non-adapted lattice and component containing one or several such layers |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19802977.2 | 1998-01-27 | ||
DE19802977A DE19802977A1 (de) | 1998-01-27 | 1998-01-27 | Verfahren zur Herstellung einer einkristallinen Schicht auf einem nicht gitterangepaßten Substrat, sowie eine oder mehrere solcher Schichten enthaltendes Bauelement |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1999038201A1 true WO1999038201A1 (de) | 1999-07-29 |
Family
ID=7855757
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE1999/000203 WO1999038201A1 (de) | 1998-01-27 | 1999-01-27 | Verfahren zur herstellung einer einkristallinen schicht auf einem nicht gitterangepassten substrat, sowie eine oder mehrere solcher schichten enthaltendes bauelement |
Country Status (4)
Country | Link |
---|---|
US (1) | US6464780B1 (de) |
EP (1) | EP1051740A1 (de) |
DE (1) | DE19802977A1 (de) |
WO (1) | WO1999038201A1 (de) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6515335B1 (en) | 2002-01-04 | 2003-02-04 | International Business Machines Corporation | Method for fabrication of relaxed SiGe buffer layers on silicon-on-insulators and structures containing the same |
US6593625B2 (en) | 2001-06-12 | 2003-07-15 | International Business Machines Corporation | Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing |
WO2004095552A2 (de) | 2003-04-22 | 2004-11-04 | Forschungszentrum Jülich GmbH | Verfahren zur herstellung einer verspannten schicht auf einem substrat und schichtstruktur |
WO2004095553A2 (de) | 2003-04-22 | 2004-11-04 | Forschungszentrum Jülich GmbH | Verfahren zur herstellung einer verspannten schicht auf einem substrat und schichtstruktur |
US7179727B2 (en) | 2002-09-03 | 2007-02-20 | Advancesis Limited | Formation of lattice-tuning semiconductor substrates |
JP2008515209A (ja) * | 2004-09-30 | 2008-05-08 | フォルシュングスツェントルム・ユーリッヒ・ゲゼルシャフト・ミット・ベシュレンクテル・ハフツング | 基体の上に歪み層を製造する方法、及び層構造 |
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DE19859429A1 (de) * | 1998-12-22 | 2000-06-29 | Daimler Chrysler Ag | Verfahren zur Herstellung epitaktischer Silizium-Germaniumschichten |
GB2349392B (en) * | 1999-04-20 | 2003-10-22 | Trikon Holdings Ltd | A method of depositing a layer |
US6488767B1 (en) * | 2001-06-08 | 2002-12-03 | Advanced Technology Materials, Inc. | High surface quality GaN wafer and method of fabricating same |
US6855649B2 (en) * | 2001-06-12 | 2005-02-15 | International Business Machines Corporation | Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing |
US6746902B2 (en) * | 2002-01-31 | 2004-06-08 | Sharp Laboratories Of America, Inc. | Method to form relaxed sige layer with high ge content |
US7226504B2 (en) * | 2002-01-31 | 2007-06-05 | Sharp Laboratories Of America, Inc. | Method to form thick relaxed SiGe layer with trench structure |
US6583000B1 (en) | 2002-02-07 | 2003-06-24 | Sharp Laboratories Of America, Inc. | Process integration of Si1-xGex CMOS with Si1-xGex relaxation after STI formation |
US6793731B2 (en) * | 2002-03-13 | 2004-09-21 | Sharp Laboratories Of America, Inc. | Method for recrystallizing an amorphized silicon germanium film overlying silicon |
DE10218381A1 (de) * | 2002-04-24 | 2004-02-26 | Forschungszentrum Jülich GmbH | Verfahren zur Herstellung einer oder mehrerer einkristalliner Schichten mit jeweils unterschiedlicher Gitterstruktur in einer Ebene einer Schichtenfolge |
US6703293B2 (en) | 2002-07-11 | 2004-03-09 | Sharp Laboratories Of America, Inc. | Implantation at elevated temperatures for amorphization re-crystallization of Si1-xGex films on silicon substrates |
US6699764B1 (en) | 2002-09-09 | 2004-03-02 | Sharp Laboratories Of America, Inc. | Method for amorphization re-crystallization of Si1-xGex films on silicon substrates |
US6903384B2 (en) * | 2003-01-15 | 2005-06-07 | Sharp Laboratories Of America, Inc. | System and method for isolating silicon germanium dislocation regions in strained-silicon CMOS applications |
US6825086B2 (en) * | 2003-01-17 | 2004-11-30 | Sharp Laboratories Of America, Inc. | Strained-silicon channel CMOS with sacrificial shallow trench isolation oxide liner |
US8889530B2 (en) * | 2003-06-03 | 2014-11-18 | The Research Foundation Of State University Of New York | Formation of highly dislocation free compound semiconductor on a lattice mismatched substrate |
WO2004109775A2 (en) * | 2003-06-03 | 2004-12-16 | The Research Foundation Of State University Of New York | Formation of highly dislocation free compound semiconductor on a lattice mismatched substrate |
US7282738B2 (en) * | 2003-07-18 | 2007-10-16 | Corning Incorporated | Fabrication of crystalline materials over substrates |
US7071022B2 (en) * | 2003-07-18 | 2006-07-04 | Corning Incorporated | Silicon crystallization using self-assembled monolayers |
EP1647046A2 (de) * | 2003-07-23 | 2006-04-19 | ASM America, Inc. | Ablagerung von sige auf silizium-auf-isolator-strukturen und bulk-substraten |
ATE405947T1 (de) * | 2003-09-26 | 2008-09-15 | Soitec Silicon On Insulator | Verfahren zur herstellung vonn substraten für epitakitisches wachstum |
US7030002B2 (en) * | 2004-02-17 | 2006-04-18 | Sharp Laboratories Of America, Inc. | Low temperature anneal to reduce defects in hydrogen-implanted, relaxed SiGe layer |
EP1571241A1 (de) * | 2004-03-01 | 2005-09-07 | S.O.I.T.E.C. Silicon on Insulator Technologies | Herstellungsverfahren eines Substrates |
JP2008503893A (ja) * | 2004-06-21 | 2008-02-07 | ワヘニンヘン ユニバーシティー | テーラーメイドで官能化されたケイ素及び/又はゲルマニウム表面 |
JP4654710B2 (ja) * | 2005-02-24 | 2011-03-23 | 信越半導体株式会社 | 半導体ウェーハの製造方法 |
US7364989B2 (en) * | 2005-07-01 | 2008-04-29 | Sharp Laboratories Of America, Inc. | Strain control of epitaxial oxide films using virtual substrates |
US7901968B2 (en) * | 2006-03-23 | 2011-03-08 | Asm America, Inc. | Heteroepitaxial deposition over an oxidized surface |
EP2012367B1 (de) * | 2007-07-02 | 2012-02-29 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Mehrfachsolarzelle |
TWI398017B (zh) * | 2007-07-06 | 2013-06-01 | Huga Optotech Inc | 光電元件及其製作方法 |
US9127345B2 (en) | 2012-03-06 | 2015-09-08 | Asm America, Inc. | Methods for depositing an epitaxial silicon germanium layer having a germanium to silicon ratio greater than 1:1 using silylgermane and a diluent |
US9171715B2 (en) | 2012-09-05 | 2015-10-27 | Asm Ip Holding B.V. | Atomic layer deposition of GeO2 |
US9583364B2 (en) | 2012-12-31 | 2017-02-28 | Sunedison Semiconductor Limited (Uen201334164H) | Processes and apparatus for preparing heterostructures with reduced strain by radial compression |
US9218963B2 (en) | 2013-12-19 | 2015-12-22 | Asm Ip Holding B.V. | Cyclical deposition of germanium |
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CN117480615A (zh) | 2021-06-14 | 2024-01-30 | 亚琛工业大学 | 量子比特元件 |
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DE3743734A1 (de) * | 1987-12-23 | 1989-07-13 | Licentia Gmbh | Verfahren zur herstellung von vergrabenen, isolierenden schichten und damit hergestellter halbleiterkoerper |
US5084411A (en) * | 1988-11-29 | 1992-01-28 | Hewlett-Packard Company | Semiconductor processing with silicon cap over Si1-x Gex Film |
EP0475378A1 (de) * | 1990-09-13 | 1992-03-18 | Forschungszentrum Jülich Gmbh | Verfahren zur Herstellung von Substraten für elektronische, elektrooptische und optische Bauelemente |
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- 1999-01-27 EP EP99907288A patent/EP1051740A1/de not_active Withdrawn
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Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6593625B2 (en) | 2001-06-12 | 2003-07-15 | International Business Machines Corporation | Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing |
US6709903B2 (en) | 2001-06-12 | 2004-03-23 | International Business Machines Corporation | Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing |
US6515335B1 (en) | 2002-01-04 | 2003-02-04 | International Business Machines Corporation | Method for fabrication of relaxed SiGe buffer layers on silicon-on-insulators and structures containing the same |
US6833332B2 (en) | 2002-01-04 | 2004-12-21 | International Business Machines Corporation | Method for fabrication of relaxed SiGe buffer layers on silicon-on-insulators and structures containing the same |
US7179727B2 (en) | 2002-09-03 | 2007-02-20 | Advancesis Limited | Formation of lattice-tuning semiconductor substrates |
WO2004095552A2 (de) | 2003-04-22 | 2004-11-04 | Forschungszentrum Jülich GmbH | Verfahren zur herstellung einer verspannten schicht auf einem substrat und schichtstruktur |
WO2004095553A2 (de) | 2003-04-22 | 2004-11-04 | Forschungszentrum Jülich GmbH | Verfahren zur herstellung einer verspannten schicht auf einem substrat und schichtstruktur |
DE10318283A1 (de) * | 2003-04-22 | 2004-11-25 | Forschungszentrum Jülich GmbH | Verfahren zur Herstellung einer verspannten Schicht auf einem Substrat und Schichtstruktur |
DE10318284A1 (de) * | 2003-04-22 | 2004-11-25 | Forschungszentrum Jülich GmbH | Verfahren zur Herstellung einer verspannten Schicht auf einem Substrat und Schichtstruktur |
JP2008515209A (ja) * | 2004-09-30 | 2008-05-08 | フォルシュングスツェントルム・ユーリッヒ・ゲゼルシャフト・ミット・ベシュレンクテル・ハフツング | 基体の上に歪み層を製造する方法、及び層構造 |
Also Published As
Publication number | Publication date |
---|---|
EP1051740A1 (de) | 2000-11-15 |
US6464780B1 (en) | 2002-10-15 |
DE19802977A1 (de) | 1999-07-29 |
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