DE69425787T2 - Verfahren zur Herstellung epitaktischen Halbleitermaterials - Google Patents

Verfahren zur Herstellung epitaktischen Halbleitermaterials

Info

Publication number
DE69425787T2
DE69425787T2 DE69425787T DE69425787T DE69425787T2 DE 69425787 T2 DE69425787 T2 DE 69425787T2 DE 69425787 T DE69425787 T DE 69425787T DE 69425787 T DE69425787 T DE 69425787T DE 69425787 T2 DE69425787 T2 DE 69425787T2
Authority
DE
Germany
Prior art keywords
production
semiconductor material
epitaxial semiconductor
epitaxial
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69425787T
Other languages
English (en)
Other versions
DE69425787D1 (de
Inventor
Joseph Y Chan
Larry Laterza
Dennis Garbis
Willem G Einthoven
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Semiconductor Inc
Original Assignee
General Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Semiconductor Inc filed Critical General Semiconductor Inc
Publication of DE69425787D1 publication Critical patent/DE69425787D1/de
Application granted granted Critical
Publication of DE69425787T2 publication Critical patent/DE69425787T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609—Diodes
    • H01L29/66136—PN junction diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/221—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities of killers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
    • H01L29/161—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System including two or more of the elements provided for in group H01L29/16, e.g. alloys
    • H01L29/165—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System including two or more of the elements provided for in group H01L29/16, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/30—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface
    • H01L29/32—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface the imperfections being within the semiconductor body
DE69425787T 1993-07-01 1994-04-20 Verfahren zur Herstellung epitaktischen Halbleitermaterials Expired - Fee Related DE69425787T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/082,951 US5342805A (en) 1993-07-01 1993-07-01 Method of growing a semiconductor material by epilaxy

Publications (2)

Publication Number Publication Date
DE69425787D1 DE69425787D1 (de) 2000-10-12
DE69425787T2 true DE69425787T2 (de) 2001-01-04

Family

ID=22174496

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69425787T Expired - Fee Related DE69425787T2 (de) 1993-07-01 1994-04-20 Verfahren zur Herstellung epitaktischen Halbleitermaterials

Country Status (8)

Country Link
US (1) US5342805A (de)
EP (1) EP0632486B1 (de)
JP (1) JP2638737B2 (de)
KR (1) KR0166989B1 (de)
DE (1) DE69425787T2 (de)
HK (1) HK1011793A1 (de)
SG (1) SG47620A1 (de)
TW (1) TW228608B (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5640043A (en) 1995-12-20 1997-06-17 General Instrument Corporation Of Delaware High voltage silicon diode with optimum placement of silicon-germanium layers
JP2002504270A (ja) 1998-04-09 2002-02-05 コーニンクレッカ、フィリップス、エレクトロニクス、エヌ、ヴィ 整流接合を有する半導体デバイスおよび該半導体デバイスの製造方法
US6858503B1 (en) * 2003-02-05 2005-02-22 Advanced Micro Devices, Inc. Depletion to avoid cross contamination
JP5067381B2 (ja) * 2009-02-19 2012-11-07 東京エレクトロン株式会社 熱処理装置の運転方法
JP2015149346A (ja) * 2014-02-05 2015-08-20 三菱電機株式会社 半導体装置の製造方法および半導体装置
RU2672776C2 (ru) 2014-02-25 2018-11-19 Конинклейке Филипс Н.В. Светоизлучающие полупроводниковые устройства с геттерным слоем
CN105814694B (zh) 2014-10-03 2019-03-08 富士电机株式会社 半导体装置以及半导体装置的制造方法
JP7313201B2 (ja) * 2019-06-14 2023-07-24 東京エレクトロン株式会社 エッチング方法およびエッチング装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5084411A (en) * 1988-11-29 1992-01-28 Hewlett-Packard Company Semiconductor processing with silicon cap over Si1-x Gex Film
JPH02235327A (ja) * 1989-03-08 1990-09-18 Fujitsu Ltd 半導体成長装置および半導体成長方法
US5102810A (en) * 1990-03-13 1992-04-07 General Instrument Corp. Method for controlling the switching speed of bipolar power devices
US5097308A (en) * 1990-03-13 1992-03-17 General Instrument Corp. Method for controlling the switching speed of bipolar power devices
DE4119531A1 (de) * 1991-06-13 1992-12-17 Wacker Chemitronic Epitaxierte halbleiterscheiben mit sauerstoffarmer zone einstellbarer ausdehnung und verfahren zu ihrer herstellung

Also Published As

Publication number Publication date
KR0166989B1 (ko) 1999-01-15
HK1011793A1 (en) 1999-07-16
US5342805A (en) 1994-08-30
KR950004579A (ko) 1995-02-18
EP0632486B1 (de) 2000-09-06
SG47620A1 (en) 1998-04-17
DE69425787D1 (de) 2000-10-12
EP0632486A2 (de) 1995-01-04
JP2638737B2 (ja) 1997-08-06
TW228608B (en) 1994-08-21
JPH0737815A (ja) 1995-02-07
EP0632486A3 (de) 1995-03-29

Similar Documents

Publication Publication Date Title
DE69434536D1 (de) Verfahren zur Herstellung von halbleitenden Wafern
DE69325325T2 (de) Verfahren zur Herstellung von Halbleiterscheiben
DE69723338D1 (de) Verfahren zur Herstellung von Halbleiterscheiben
DE69233314D1 (de) Verfahren zur Herstellung von Halbleiter-Produkten
DE69431385T2 (de) Verfahren zur Herstellung von Silizium-Halbleiterplättchen
DE69227170T2 (de) Verfahren zur Herstellung von Verbundhalbleitern des P-Typs
DE69500407T2 (de) Verfahren zur Herstellung von Siliciumcarbidmaterial
DE69604452D1 (de) Verfahren zur Herstellung polykristalliner Halbleiter
DE69623585D1 (de) Verfahren zur Herstellung polykristalliner Halbleiter
DE69517629D1 (de) Verfahren zur selektiven Herstellung von Halbleitergebieten
DE69409780T2 (de) Verfahren zur Herstellung opto-elektrischer Halbleiterbauelemente
DE69703600T2 (de) Verfahren zur Herstellung von Halbleiterscheiben
DE69425787D1 (de) Verfahren zur Herstellung epitaktischen Halbleitermaterials
DE59403272D1 (de) Verfahren zur Herstellung Kautschukmischungen
DE69402357D1 (de) Verfahren zur Herstellung von verzweigten Olefinen
DE69217602T2 (de) Verfahren zur Herstellung von Rieselgittermaterial
DE69417805D1 (de) Verfahren zur Herstellung eines Halbleitermaterials
DE69313470D1 (de) Verfahren zur Herstellung von Multifilamenten
DE69321747D1 (de) Verfahren zur Herstellung von synthetischen Diamanten
DE59700009D1 (de) Verfahren zur Herstellung von Halbleiterscheiben
DE69119861D1 (de) Verfahren zur Herstellung von P-Typ-Verbindungshalbleitern
DE69233122D1 (de) Verfahren zur Herstellung von Hybridomen
DE59301225D1 (de) Verfahren zur Herstellung von Formteilen
DE69421007D1 (de) Verfahren zur Herstellung eines Halbleitermaterials
DE69514267T2 (de) Verfahren zur Herstellung von Ferromagnetmaterial

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee