WO1995032520A1 - Electronic device package and its manufacture - Google Patents

Electronic device package and its manufacture Download PDF

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Publication number
WO1995032520A1
WO1995032520A1 PCT/JP1995/000977 JP9500977W WO9532520A1 WO 1995032520 A1 WO1995032520 A1 WO 1995032520A1 JP 9500977 W JP9500977 W JP 9500977W WO 9532520 A1 WO9532520 A1 WO 9532520A1
Authority
WO
WIPO (PCT)
Prior art keywords
electronic element
mold
package
spacer
manufacturing
Prior art date
Application number
PCT/JP1995/000977
Other languages
French (fr)
Japanese (ja)
Inventor
Hideharu Tanaka
Kazuhiro Taguchi
Yoshikazu Maeda
Original Assignee
Toray Industries, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toray Industries, Inc. filed Critical Toray Industries, Inc.
Priority to KR1019950705781A priority Critical patent/KR960703272A/en
Publication of WO1995032520A1 publication Critical patent/WO1995032520A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting

Definitions

  • the present invention relates to an electronic element package in which an electronic element is protected by a protection member, and a method for manufacturing the same.
  • Electronic devices such as ICs
  • ICs are generally sealed with protective members and used as independent electronic device packages, unless they are directly mounted on an electronic circuit board.
  • This electronic element package is used, for example, by soldering the lead wire to an electronic circuit board or inserting it into a socket soldered to the electronic circuit board.
  • TAB Tape Automated Bonding
  • the following steps are performed to manufacture an electronic element package. That is,
  • a conductive pattern with a thickness of 10 zm is formed on a substrate tape made of polyimide or the like to produce a film carrier.
  • a portion corresponding to the electrode of the electronic element and a portion of the substrate tape in the vicinity of the portion and in close contact with the conductive pattern are removed by a method such as etching or the like.
  • the conductive pattern is projected from the outside toward the inside of the device hole, and a lead line (the side of the lead line projecting into the device hole is referred to as an “inner hole”). And the side connected to the external circuit etc. is called the "outer lead").
  • a metal column jig called a bonding tool which presses the tip of the inner lead to the semiconductor electrode via conductive bumps while heating and mechanically and electrically joins them.
  • (7) Encapsulate the package with resin etc. to enclose the electronic element,
  • TAB technology is that since the electrodes of the electronic element and the inner leads can be connected at the same time, productivity can be increased compared to methods such as wire bonding.
  • productivity can be increased compared to methods such as wire bonding.
  • the electronic element has a large number of electrodes. Therefore, the recent trend of increasing the number of electrodes in electronic devices has further emphasized the superiority of TAB technology.
  • TAB technology Another feature of TAB technology is that it is easy to reduce the thickness of electronic device packages. It is said that thinning of portable electronic devices such as calculators cannot be considered without TAB technology.
  • transfer bump TAB technology as an improved technology of the TAB technology.
  • this transfer bump TAB technology instead of forming a conductive bump on the electrode side of the electronic element in the above step (4), a conductive bump separately formed on the inner lead side is bonded first, and then a conductive bump is formed on the inner lead side. The inner lead is joined to the electrode of the electronic element.
  • This transfer bump TAB technology does not require a conductive bump to be formed directly on the electrode of an electronic device, and can be widely used for ordinary electronic devices that do not have a special design or process.
  • TAB technology there are various variations of TAB technology.
  • the lead wire and the electrode of the electronic element are joined by a method such as wire bonding.
  • a method such as wire bonding.
  • an electronic element to which a lead wire such as an inner lead is joined is placed inside a mold formed by combining upper and lower dies. It is widely practiced to inject a molding material such as a resin into the mold to produce a mold package.
  • FIG. 5 is a plan view of a film carrier-bonded electronic device manufactured by the method for manufacturing an electronic device package.
  • the electrodes arranged on the four sides of the electronic element 27 An inner lead 22 formed by etching or the like in close contact with the substrate film 21 of the Lum carrier is joined.
  • the inner lead 22 is connected at the same time by a dam bar 24 integrally formed therewith.
  • FIG. 6 is a cross-sectional view showing a state in which the film carrier-bonded electronic device of FIG. 5 is placed in a mold to form a package.
  • An electronic element 27 in which a film carrier inner lead 22 is joined to an electrode is sandwiched between an upper mold 28 and a lower mold 29, and is placed inside a mold formed therebetween. ing.
  • a mold material 31 is injected from the gate 30 into the mold, and fills the mold so as to include the electronic element 27.
  • the dam bar 24 fills the gap between the upper mold 28 and the lower mold 29 in the outer peripheral portion of the package, so that the molding material 31 does not leak from this gap.
  • the electronic element 27 is supported by the inner lead 22 and held in a state of being floated on the mold die 2 so as not to come into contact with the mold.
  • the upper mold 28 and the lower mold 29 are removed, and the part extending from the inner lead 22 (or outer lead 23) package is shaped to form an electronic element package. It is said that.
  • the present inventors have found that in such a conventional method of manufacturing an electronic element package, the yield when manufacturing a thin electronic element package may be reduced, or the reliability of the manufactured electronic element package may be reduced. I found that. That is, if the electronic element 27 held in the mold by the inner lead 22 happens to be slightly inclined or the flow of the molding material 31 is uneven, the flow of the molding material 31 In some cases, the lead wire / electronic element 27 was exposed to the outside of the package due to the force of, or was greatly inclined inside the package. If a part of the lead wire / electronic element 27 is exposed to the outside of the package, the reliability of the electronic element 27 is greatly impaired. If the inclination of the electronic element 27 exceeds a certain range, defects such as contact between the inner leads 22 or disconnection of the inner leads 22 occur. This tendency is stronger as the package is thinner, so the yield decreases as the package becomes thinner.
  • the reliability of the electronic element package in which the electronic element is greatly inclined inside the package, was low because undue stress was applied to the lead wires and the like, and the bondability with the electrodes was deteriorated.
  • the electronic element package according to the present invention includes: an electronic element; a protection member including the electronic element; a lead wire joined to the electronic element and exposed to the outside of the protection member; and the electronic element surface of the protection member. And a spacer provided between the lead wires.
  • an electronic element formed by joining one end of a lead wire is placed in a mold, a molding material is injected into the mold, and the mold is removed.
  • the spacer is provided with a covering member made of the same material as the protective member on an outer edge surface side of the protective member.
  • the lead wire is bonded to an electrode of the electronic element via a conductive bump.
  • another aspect of the electronic element package of the present invention is an electronic element, an inner lead having one end joined to an electrode of the electronic element and a part of a substrate film of a film carrier adhered to the electronic element, A protective member encapsulated therein and molded so as to expose the other end of the inner lead to the outside, and an outer edge surface of the substrate film which is parallel to the electronic element surface of the protective member. And a plurality of said inner leads are in close contact with each other.
  • an electronic element having one end of a lead wire is placed in a mold, a molding material is injected into the mold, and then the mold is removed.
  • a spacer is provided between a surface of the mold that is parallel to the electronic device surface and the lead wire, and the mold material is injected into the mold. It is characterized by doing.
  • the lead wire is bonded to an electrode of the electronic element via a conductive bump.
  • the mold is molded into the mold while urging the spacer toward a surface parallel to the electronic element surface of the mold. It is characterized by injecting a material.
  • the mold material is injected in a direction in which the spacer is urged against a surface of the mold die parallel to the electronic element. It is characterized by.
  • the spacer is urged against a surface parallel to the electronic element surface of the mold by the elastic force of the lead wire. It is characterized in that a mold material is injected into the mold while the mold material is being injected.
  • the spacer used is one closely attached to a plurality of lead wires.
  • an electronic element is bonded to an inner lead of a film carrier, the electronic element is placed in a mold, and a molding material is injected into the mold. Thereafter, when manufacturing the electronic element package by removing the mold, a part of the inner lead placed in the mold is in close contact with a part of the substrate film of the film carrier. It is characterized by the use of such a device.
  • a contact portion of the substrate film with the inner lead is formed such that a side of the mold is coated with a material of the same type as the molding material. It is characterized by.
  • the inclination of the electronic element inside the package can be reduced.
  • undue stress is not applied to the lead wire even in a thin package, and the reliability of the package is high.
  • the inclination of the electronic element does not extremely increase in the mold, and the electronic element is mounted outside the package. Yields can be improved because defects such as exposure, lead wires contacting each other at the time of packaging, and breakage of the lead wires do not easily occur.
  • an electronic element package of the present invention since the position of the electronic element in the mold is stable and a defect is unlikely to occur, an electronic element package can be manufactured with good yield. it can.
  • FIG. 1 is a plan view showing one embodiment of a film carrier bonded electronic element used in the method of manufacturing an electronic element package of the present invention.
  • FIG. 2 is a view showing one step of an embodiment of a method for manufacturing an electronic element package according to the present invention.
  • FIG. 3 is a view showing a step of another embodiment of the method of manufacturing an electronic element package according to the present invention.
  • FIG. 4 is a view showing one embodiment of the electronic element package of the present invention.
  • FIG. 5 is a plan view showing an example of a film carrier bonded electronic element used in a conventional method for manufacturing an electronic element package.
  • FIG. 6 is a diagram illustrating an example of a conventional electronic element package.
  • FIG. 7 is a plan view showing another embodiment of the film carrier-bonded electronic device used in the method for manufacturing an electronic device package of the present invention.
  • FIG. 8 is a plan view showing another embodiment of the film carrier-bonded electronic element used in the method of manufacturing an electronic element package according to the present invention.
  • 1 2 Covering member, 1 3: Electronic element package, 2 1: Film carrier, 2 2: Inner lead, 2 3: Outer lead, 2 4: Dam bar,
  • the electronic element various semiconductor ICs and LSIs, dielectric optical circuit elements, and the like are preferably used.
  • the protective member is defined as a member to which moisture, harmful rays or heat reaches the electronic element. It is a member that protects the electronic element by encapsulating it (wrapping it so that the electronic element is not exposed to the outside) so that it does not occur.
  • a paste-like inorganic or organic material that has been solidified by physical stimulus such as heating or irradiation or by the passage of time is preferably used.
  • a mixture of various thermosetting resins, such as epoxy, and a filler, such as a hardening agent and silica is injected into a mold in which electronic elements are placed, and heated.
  • the powder of the above mixture is formed into a tablet in advance, and is supplied to the entrance (gate) of the mold, and is heated and pressurized to be melted and pasted into the mold.
  • the supply method transfer-mold method
  • the supply method is also preferably performed.
  • the lead wire may be any member that is joined to the electronic element and exposed to the outside of the package.
  • conductive foil called inner lead terlead of TAB technology, bond wire of wire-to-bond technology, or conductive lead wire bonded to this.
  • Film carrier inner leads and outer leads in TAB technology are preferred because they have adequate rigidity.
  • the lead wire may or may not have conductivity.
  • the lead wire may transmit a signal or power to an electronic element, but need not necessarily have such a function. It only needs to be exposed outside the package and does not need to be extended.
  • “parallel to” a certain surface means extending one-dimensionally or two-dimensionally in a direction substantially parallel to the surface.
  • the outer edge surface parallel to the electronic element surface of the protective member (the surface having the largest area or the surface facing the electronic device) is the outer surface of the protective member, Refers to a surface that is roughly parallel to the electronic element surface.
  • the surface parallel to the mold-type electronic element surface refers to a mold-type inner surface that is oriented substantially parallel to the electronic element surface.
  • the spacer keeps the lead wire constant from the outer edge of the protective member so that the lead wire does not touch (or is exposed to the outside) the outer edge of the protective member when packaging the electronic element. Used to separate by the above distance. For example, when an electronic device with a lead wire is placed in a mold and the molding material is injected into the mold, the spacer is located between the mold and the lead wire. It has the effect of keeping the distance between the molds greater than the thickness of the spacer. Since the lead wire is bonded to the electronic element, the distance between the electronic element and the mold is constant. Thus, the electronic element can be prevented from being exposed to the outside of the package or greatly tilted inside the package.
  • the spacer By placing the spacer between the lead wire bonded to two or more sides of the electronic element and the mold, the inclination of the electronic element inside the package can be effectively suppressed. . As a result, unreasonable stress or the like is not applied to the lead wire, and disconnection of the lead wire can be prevented.
  • the spacer When placing a spacer between a lead wire joined to electrodes along a plurality of sides and a mold, the spacer should be provided on all sides where the lead wire is provided. In order to secure the strength of the spacer, it is preferable that adjacent spacers are connected as shown in FIG. 1, for example. In FIG. 1, all spacers along the four sides are connected, and are substantially integrated.
  • the spacer is limited to one that is continuously provided as a piece corresponding to the side between the lead wire bonded to a plurality of electrodes provided on one side and the mold. Not done. That is, as shown in FIG. 8, the spacers arranged on one side may be composed of a plurality of pieces instead of a continuous piece.
  • the spacer itself may or may not be exposed outside the package. However, depending on the combination of the material of the spacer and the material of the protective material of the package, there is a gap between the spacer and the package due to the aging of the package, and moisture enters the package through the gap. There may be a risk. In such a case, it is preferable to cover the surface of the spouter with a material having a good affinity for the protective member.
  • the degree of freedom in setting the position where the molding material is injected into the mold can be increased. This is because the flow force of the molding material is applied to the direction in which the electronic element and the lead wire are urged toward the side where the spacer is located, and the electronic element is not exposed to the outside of the package. It is. Rather, it is preferable to apply such a force to stabilize the position of the electronic element in the mold.
  • the spacer is in close contact with the lead wire because the spacer does not move when the molding material is poured into the mold. It is also preferable that the spacer be in close contact with a plurality of lead wires and connect the lead wires. This makes it possible to supplement the rigidity of the lead wires and reduce the possibility that the lead wires come into contact with each other when the molding material is injected into the mold.
  • a spacer is provided in the direction along only the two opposing sides of the electronic element as shown in FIG. 7 or arranged on one side as shown in FIG. In a continuous piece of sousa Instead, it can be preferably used because it can be filled into the mold while maintaining good flow of the mold material by using a plurality of pieces.
  • the spacer may be on the side of the electronic element with respect to the lead wire or on the opposite side.
  • the spacer may be provided on both the electronic element side of the lead wire and the opposite side. In this case, it is preferable that the electronic element does not tilt or is exposed to the outside of the package regardless of the direction in which the force of the flow of the molding material is applied.
  • the force of the flow of the molding material is applied to the side where the electronic element or lead wire has no spacer, for example, the elasticity of the lead wire
  • the molding material is preferable to inject the molding material into the mold while applying a force to the surface of the mold that is parallel to the electronic element surface by force or the like.
  • the elastic force of the lead wire it is preferable to use the elastic force of the lead wire to apply the bias.
  • the protective member is provided with a covering member, the covering member is that having a material of the molding material and the same type (molding material chemically affinity It is preferable to consist of This makes it difficult for the spacer to be exposed to the outer edge of the package and hardly generates a gap between the spacer and the molding material, thereby reducing the possibility of water being transmitted to the lead wire.
  • the thickness of the covering member is preferably about 20 to 200 ⁇ m.
  • a part of the substrate film of the film carrier can be left on the inner lead and used as a spacer.
  • the substrate film of the film carrier 1 may be etched so that the spacer 5 remains in the inner lead 2 of the film carrier 1.
  • the conductive pattern such as the inner lead 2 is formed by, for example, electrolytic plating, the adhesion between the inner lead 2 and the spacer 5 is generally improved. It is easy to raise it. Further, it is easy to form a spacer in close contact with a plurality of inner leads. Due to such characteristics, an electronic element package manufactured by TAB technology is preferable as an application target of the present invention.
  • an upper mold and a lower mold as shown in FIG. 3 are combined, and a mold having a package shape in the gap is preferably used.
  • metal or ceramic is used as the material of the mold.
  • the position where the mold material is injected is such that the force of the flow of the mold material is applied to the side where there is no spacer in the electronic element or lead wire. It is preferable to decide not to apply strong bias. For example, when the spacer 5 is provided between the upper die 8 and the electronic element 7 as shown in FIG. 3, the injection position (gate 10) of the molding material is set to the lower die 9 side as shown in FIG. It is preferable to provide it.
  • the injection position of the molding material may be provided on both the upper die 8 side and the lower die 9 side, and the injection amount of the lower die 9 may be larger than the injection amount of the upper die 8.
  • the force of the flow of the molding material is not applied in the direction in which the electronic element 7 or the like is urged to the side where the spacer is not provided, and sufficient molding material is applied to the upper die 8 side of the electronic element 7. Can be supplied, so it is preferable.
  • the molding when the spacer is urged toward the mold by the force of the flow of the molding material, the molding can be performed in a state where the spacer is almost in close contact with the mold.
  • the outer edge surface of the electronic element package is substantially parallel to the electronic element surface, and the inclination of the electronic element in the package can be minimized.
  • the thickness of the spacer is about half of the thickness of the electronic element package minus the thickness of the lead wire, the electronic element is securely placed almost in the center of the package. Can be preferred.
  • the electronic device package of the present invention was manufactured through the steps shown in FIGS.
  • Film Carrier 1 (1) Conductive patterns such as inner leads 2 water leads 3 and dam bars 4 are formed on the polyimide substrate film by electrolytic plating.
  • the substrate film is etched to form a device hole 6 while leaving the spacer 5;
  • the inner lead 2 of the film carrier 1 was joined to the electrodes arranged on the four sides of the electronic element 7 by an inner bonder commonly used in TAB technology.
  • the electronic element 7 having the film carrier bonded thereto is placed inside a mold formed between the upper mold 8 and the lower mold 9 and the molding material 11 is moved to the lower mold. It was injected from the gate 10 provided in 9 and heated. At this time, the distance between the surface of the inner lead 2 and the surface parallel to the surface of the electronic element 7 of the upper mold 8 was made shorter than the thickness of the spacer 5. Thus, the spacer 5 was urged against the surface parallel to the surface by the elastic force of the inner lead 2. Further, a gate 10 is provided on the side of the lower mold 9 so that the force of the flow of the molding material 11 is slightly applied to the spacer 5 side with respect to the electronic element 7 binary lead 2.
  • the molding material was a mixture of epoxy resin and filler and hardener.
  • the thickness of the electronic element package 13 was very thin, 0.5 mm, there were almost no defects such as the electronic element being exposed to the outside of the package and being greatly inclined inside the package. Did not.
  • FIG. 4 is a cross-sectional view showing a step corresponding to FIG.
  • a covering member 12 was provided on the surface of the spacer 5 with the same material as the molding material 11.
  • the thickness of the covering member 12 was 40 m.
  • the coating member 12 was formed by applying a drawing-type resin coating device only to a portion of the film carrier 1 that was in close contact with the spacer 5 before being bonded to the electronic element 7.
  • the spacer was not exposed to the outside of the package, and there was almost no possibility of moisture entering between the protective member and the spacer.
  • Example 3 An electronic element package similar to that of Example 1 was manufactured except that only a spacer extending in a direction along two opposing sides of the electronic element was provided, and a resin having a high degree of sharpness was used as the resin.
  • FIG. 7 is a plan view showing a step corresponding to FIG. The spacer 5 was provided in such a manner as to be parallel to the resin flow direction during resin injection. As a result, even when a resin having a high viscosity was used, the resin could be filled into the mold while maintaining good flow, and an electronic element package could be manufactured.
  • FIG. 8 is a plan view showing a process corresponding to FIG.
  • the spacers 5 were provided as a plurality of independent pieces as shown in FIG.
  • the degree of freedom of the resin flow on the upper surface of the electronic element was increased, and the resin could be filled into the mold while maintaining a good flow even when a high-viscosity resin was used, thereby producing an electronic element package.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

A highly reliable thin electronic device package such that the electronic device encapsulated in the package does not tilt nor be exposed from the package. In the electronic device package manufacturing method, spacers are placed between the inner surface of the mold and lead wires connected to the electronic device, and a material is injected into a mold. Therefore, a highly reliable electronic device package is manufactured with a high yield.

Description

明細書  Specification
電子素子パッケージおよびその製造方法  Electronic element package and method of manufacturing the same
技術分野  Technical field
本発明は、 保護部材により電子素子を保護した電子素子パッケージおよびその 製造方法に関するものである。  The present invention relates to an electronic element package in which an electronic element is protected by a protection member, and a method for manufacturing the same.
^  ^
I Cなどの電子素子は、 電子回路基板に直接実装される場合を除き、 一般に保 護部材により封止されて独立した電子素子パッケージとして使用される場合が多 い。 この電子素子パッケージは、 たとえば、 そのリー ド線を電子回路基板にはん だ付けしたり電子回路基板にはんだ付けされたソケッ 卜に差し込んで用いる。 こ のような電子素子パッケージを製造する技術の一つとして T A B (Tape Automated Bonding) 技 がある 0 Electronic devices, such as ICs, are generally sealed with protective members and used as independent electronic device packages, unless they are directly mounted on an electronic circuit board. This electronic element package is used, for example, by soldering the lead wire to an electronic circuit board or inserting it into a socket soldered to the electronic circuit board. One technique for manufacturing an electronic device package, such as this is TAB (Tape Automated Bonding) technique 0
T A B技術では、 たとえば以下に掲げるような各工程を実施して電子素子パッ ケージを製造する。 すなわち、  In the TAB technology, for example, the following steps are performed to manufacture an electronic element package. That is,
( 1 ) 電子素子の外縁部に設けられた電極に対応する位置から接続したい外部回 路の接続部位 （前記電子素子を接続する電気回路基板等のパターンまたはソケッ ト） に対応する位置に達する厚さ数 1 0 z mの導電パターンを、 ポリイ ミ ドなど を素材とする基板テープ上に形成し、 フィルムキヤリアを作製する、  (1) A thickness that reaches a position corresponding to a connection portion (a pattern or socket of an electric circuit board or the like connecting the electronic element) of an external circuit to be connected from a position corresponding to an electrode provided on an outer edge of the electronic element A conductive pattern with a thickness of 10 zm is formed on a substrate tape made of polyimide or the like to produce a film carrier.
( 2 ) 前記フィルムキヤリァのうち前記電子素子の電極に対応する部位とその近 傍および前記導電パターンに密着していた部分の基板テープの一部をエッチング 等の方法によって除去して （このようにして形成された孔は 「デバイスホール」 と呼ばれる） 、 前記導電パターンが外側からデバイスホール内側方向に突出する ようにし、 リー ド線 （このリー ド線のデバイスホールに突出する側は 「インナー リ一ド」 、 外部回路等と接続される側は 「アウターリ一ド」 と呼ばれる） を形成 する、  (2) In the film carrier, a portion corresponding to the electrode of the electronic element and a portion of the substrate tape in the vicinity of the portion and in close contact with the conductive pattern are removed by a method such as etching or the like. The conductive pattern is projected from the outside toward the inside of the device hole, and a lead line (the side of the lead line projecting into the device hole is referred to as an “inner hole”). And the side connected to the external circuit etc. is called the "outer lead").
( 3 ) インナーリー ドに金や錫等のめっきを施す、  (3) plating the inner lead with gold, tin, etc.
( 4 ) 電子素子の電極に金などを材料とする導電バンプを設ける、  (4) Providing conductive bumps made of gold or the like on the electrodes of the electronic element,
( 5 ) ィンナーリー ドの先端に対応する電極が位置するように電子素子を位置決 めする、  (5) Position the electronic element so that the electrode corresponding to the tip of the inner lead is located,
( 6 ) ボンディ ングツールと呼ばれる金属製の柱状治具で、 導電バンプを介して インナーリー ドの先端を半導体の電極に加熱しながら圧接し、 これらを機械的お よび電気的に接合する、 ( 7 ) 電子素子などを包むように樹脂などで封止してパッケージ化する、 (6) A metal column jig called a bonding tool, which presses the tip of the inner lead to the semiconductor electrode via conductive bumps while heating and mechanically and electrically joins them. (7) Encapsulate the package with resin etc. to enclose the electronic element,
( 8 ) パッケージの外側に延出したィンナーリ一ドまたはアウターリ一ドを外部 回路 （ソケッ 卜） に接続 （挿入） しゃすい形に整形する、  (8) Connect the inner lead or outer lead extending outside the package to the external circuit (socket) (insert).
というものである。 That is.
この T A B技術の特長は、 電子素子の各電極とィ ンナーリー ドを同時に接続す ることができるため、 ワイヤーボンディ ングなどの方法に比べて生産性を高める ことができる点などである。 特に、 電子素子が多数の電極をもつほど有利となる。 したがって、 最近の電子素子の電極数の増大傾向は、 T A B技術の優位性をます ます際立たせている。  One of the features of this TAB technology is that since the electrodes of the electronic element and the inner leads can be connected at the same time, productivity can be increased compared to methods such as wire bonding. In particular, it is advantageous that the electronic element has a large number of electrodes. Therefore, the recent trend of increasing the number of electrodes in electronic devices has further emphasized the superiority of TAB technology.
また、 T A B技術のもう一つの特長は、 電子素子パッケージの厚みを薄くする ことが容易である点である。 電卓などの携帯用電子機器の薄型化は、 T A B技術 なしでは考えられないとされる。  Another feature of TAB technology is that it is easy to reduce the thickness of electronic device packages. It is said that thinning of portable electronic devices such as calculators cannot be considered without TAB technology.
また、 この T A B技術の改良技術として転写バンプ T A B技術がある。 この転 写バンプ T A B技術では、 上記 （ 4 ) の工程で電子素子の電極側に導電バンプを 形成する代わりに、 ィンナーリ一ド側に別途形成した導電バンプを先に接合し、 後で導電バンプ付きィンナーリ一ドを電子素子の電極に接合するという ものであ る。 この転写バンプ T A B技術は、 電子素子の電極に直接導電バンプを形成する 必要がないため、 そのための特別な設計や工程を持たない通常の電子素子に広く 使用することができる。 このほか T A B技術にはさまざまなバリエーショ ンがあ る。  Further, there is a transfer bump TAB technology as an improved technology of the TAB technology. In this transfer bump TAB technology, instead of forming a conductive bump on the electrode side of the electronic element in the above step (4), a conductive bump separately formed on the inner lead side is bonded first, and then a conductive bump is formed on the inner lead side. The inner lead is joined to the electrode of the electronic element. This transfer bump TAB technology does not require a conductive bump to be formed directly on the electrode of an electronic device, and can be widely used for ordinary electronic devices that do not have a special design or process. In addition, there are various variations of TAB technology.
また、 上記 （ 1 ) 〜 （ 6 ) の代わりにワイヤーボンディ ングなどの方法により リ一ド線と電子素子の電極を接合し、 以下は T A B技術の上記工程 （ 7 ) ~ ( 8 ) と同様に電子素子を封止してパッケージ化し、 パッケージから延出する リ一ド線 を整形して電子素子パッケージを製造する技術もある。  In addition, instead of the above (1) to (6), the lead wire and the electrode of the electronic element are joined by a method such as wire bonding. There is also a technology for manufacturing electronic element packages by encapsulating and packaging electronic elements and shaping the lead wires extending from the package.
上記 （ 7 ) の工程で電子素子を封止する方法としては、 上下の金型などを合わ せてつく るモールド型の内部にィンナーリ一ドなどのリ一ド線を接合した電子素 子を置き、 このモールド型内に樹脂などのモールド材を注入してモールドパッケ ージを製造することが広く行なわれている。  As a method of sealing an electronic element in the above step (7), an electronic element to which a lead wire such as an inner lead is joined is placed inside a mold formed by combining upper and lower dies. It is widely practiced to inject a molding material such as a resin into the mold to produce a mold package.
このような電子素子パッケージの製造方法の例として、 特開平 5 - 3 4 3 4 7 7号公報に記載された電子素子パッケージの製造方法が知られている。  As an example of a method for manufacturing such an electronic element package, there is known a method for manufacturing an electronic element package described in Japanese Patent Application Laid-Open No. 5-34437.
図 5は、 この電子素子パッケージの製造方法で作製されるフィルムキヤ リァ接 合済み電子素子の平面図である。 電子素子 2 7の四辺に配置された電極に、 フィ ルムキヤ リアの基板フィルム 2 1 に密着しエッチングなどにより形成されたィ ン ナーリー ド 2 2が接合されている。 このイ ンナーリー ド 2 2は同時にこれと一体 的に形成されたダムバー 2 4により連絡されている。 FIG. 5 is a plan view of a film carrier-bonded electronic device manufactured by the method for manufacturing an electronic device package. The electrodes arranged on the four sides of the electronic element 27 An inner lead 22 formed by etching or the like in close contact with the substrate film 21 of the Lum carrier is joined. The inner lead 22 is connected at the same time by a dam bar 24 integrally formed therewith.
図 6は、 図 5のフイルムキヤ リァ接合済み電子素子をモールド型内に置いてパ ッケージ化する様子を示す断面図である。 フィルムキヤ リァのィ ンナーリ一ド 2 2が電極に接合された電子素子 2 7が上金型 2 8 と下金型 2 9に挟まれ、 これら の間に形成されるモールド型の内部に置かれている。 このモールド型の内部にゲ 一卜 3 0からモールド材 3 1が注入され、 電子素子 2 7を内包するようにモール ド型内に充満する。 このとき、 ダムバー 2 4はパッケージ外周部における上金型 2 8 と下金型 2 9との隙間を埋め、 モールド材 3 1がこの隙間から漏出しないよ うになつている。 また、 モールド材の注入前には、 電子素子 2 7はモールド型に 接触することがないように、 ィンナーリー ド 2 2に支えられてモールド型內に浮 いた状態で保持されている。  FIG. 6 is a cross-sectional view showing a state in which the film carrier-bonded electronic device of FIG. 5 is placed in a mold to form a package. An electronic element 27 in which a film carrier inner lead 22 is joined to an electrode is sandwiched between an upper mold 28 and a lower mold 29, and is placed inside a mold formed therebetween. ing. A mold material 31 is injected from the gate 30 into the mold, and fills the mold so as to include the electronic element 27. At this time, the dam bar 24 fills the gap between the upper mold 28 and the lower mold 29 in the outer peripheral portion of the package, so that the molding material 31 does not leak from this gap. Before the injection of the mold material, the electronic element 27 is supported by the inner lead 22 and held in a state of being floated on the mold die 2 so as not to come into contact with the mold.
モールド材 3 1が固化した後に上金型 2 8 と下金型 2 9を除去し、 ィンナーリ ー ド 2 2 (またはアウターリー ド 2 3 ) のパッケージから延出する部分を整形し て電子素子パッケージとするというものである。  After the molding material 31 has solidified, the upper mold 28 and the lower mold 29 are removed, and the part extending from the inner lead 22 (or outer lead 23) package is shaped to form an electronic element package. It is said that.
本発明者らは、 このような従来の電子素子パッケージの製造方法では、 薄型の 電子素子パッケージを製造する際の歩留まりが低下したり、 製造された電子素子 パッケージの信頼性が低下する場合があることを見出した。 すなわち、 インナー リー ド 2 2によってモールド型内に保持されている電子素子 2 7がたまたまわず かに傾いていたり、 モールド材 3 1の流れが不均等であったりすると、 モールド 材 3 1の流れによる力を受けてリ― ド線ゃ電子素子 2 7の一部がパッケージ外部 に露出したり、 パッケージ内部で大きく傾く ことがあった。 リー ド線ゃ電子素子 2 7の一部がパッケージ外部に露出すると電子素子 2 7の信頼性が大きく損なわ れる。 また、 電子素子 2 7の傾きが一定の範囲を越えるとィンナーリー ド 2 2同 士で接触するあるいはィンナーリー ド 2 2が断線するなどの不良が発生するので ある。 この傾向はパッケージが薄型であるほど強いため、 パッケージが薄くなる ほど歩留まりが低下する。  The present inventors have found that in such a conventional method of manufacturing an electronic element package, the yield when manufacturing a thin electronic element package may be reduced, or the reliability of the manufactured electronic element package may be reduced. I found that. That is, if the electronic element 27 held in the mold by the inner lead 22 happens to be slightly inclined or the flow of the molding material 31 is uneven, the flow of the molding material 31 In some cases, the lead wire / electronic element 27 was exposed to the outside of the package due to the force of, or was greatly inclined inside the package. If a part of the lead wire / electronic element 27 is exposed to the outside of the package, the reliability of the electronic element 27 is greatly impaired. If the inclination of the electronic element 27 exceeds a certain range, defects such as contact between the inner leads 22 or disconnection of the inner leads 22 occur. This tendency is stronger as the package is thinner, so the yield decreases as the package becomes thinner.
また、 パッケージ内部で電子素子が大きく傾いている電子素子パッケージは、 リ一ド線などに不当な応力がかかり電極との接合性が悪化するため信頼性が低か つた。  Also, the reliability of the electronic element package, in which the electronic element is greatly inclined inside the package, was low because undue stress was applied to the lead wires and the like, and the bondability with the electrodes was deteriorated.
本発明の目的は、 上記従来の技術の問題点を解消しょうとするものであり、 薄 型の電子素子パッケージであっても、 パッケージ外部に電子素子が露出せず、 パ ッケージ内部で電子素子が傾いていない信頼性の高い電子素子パッケージを提供 すること、 およびパッケージ内部での電子素子の傾きや電子素子のパッケージ外 部への露出を抑制することにより歩留まりよく電子素子パッケージを製造する方 法を提供することにある。 An object of the present invention is to solve the above-mentioned problems of the conventional technology. Even if the electronic device package is of the type, it is necessary to provide a highly reliable electronic device package in which the electronic device is not exposed to the outside of the package and the electronic device is not tilted inside the package. An object of the present invention is to provide a method for manufacturing an electronic device package with a high yield by suppressing the tilt and the exposure of the electronic device to the outside of the package.
発明の開示  Disclosure of the invention
本発明の電子素子パッケージは、 電子素子と、 前記電子素子を内包する保護部 材と、 前記電子素子に接合され前記保護部材の外部に露出する リー ド線と、 前記 保護部材の前記電子素子面に並向する外緣面および前記リ一ド線の間に設けられ たスぺーザとを備えたことを特徴としている。  The electronic element package according to the present invention includes: an electronic element; a protection member including the electronic element; a lead wire joined to the electronic element and exposed to the outside of the protection member; and the electronic element surface of the protection member. And a spacer provided between the lead wires.
また、 本発明の電子素子パッケージの別の態様は、 リー ド線の一端を接合され てなる電子素子がモールド型内に置かれ、 前記モールド型内にモールド材を注入 され、 前記モールド型を除去されてなる電子素子パッケージであって、 かつ、 前 記モールド型の前記電子素子面に並向する面と前記リ一ド線との間にスぺーサを 設けられて前記モールド型内に前記モールド材を注入されてなることを特徴とし ている。  In another aspect of the electronic element package of the present invention, an electronic element formed by joining one end of a lead wire is placed in a mold, a molding material is injected into the mold, and the mold is removed. An electronic element package, wherein a spacer is provided between a surface of the mold die parallel to the electronic element surface and the lead wire, and the mold is provided in the mold die. It is characterized by being injected with materials.
また、 本発明の電子素子パッケージの好ましい態様は、 前記スぺーサは、 前記 保護部材の外縁面側に前記保護部材と同種の材質からなる被覆部材を備えてなる ことを特徴としている。  In a preferred aspect of the electronic element package of the present invention, the spacer is provided with a covering member made of the same material as the protective member on an outer edge surface side of the protective member.
また、 本発明の電子素子パッケージの好ま しい態様は、 前記リー ド線は、 導電 バンプを介して前記電子素子の電極に接合されてなることを特徴としている。 また、 本発明の電子素子パッケージの別の態様は、 電子素子と、 前記電子素子 の電極に一端を接合されかつフィルムキヤリアの基板フィル厶の一部が密着した ィンナーリ一ドと、 前記電子素子を内包しかつ前記ィンナーリ一ドの他端を外部 に露出するようにモールド成形された保護部材を有し、 かつ、 前記基板フィルム 力、'、 前記保護部材の前記電子素子面に並向する外縁面に並向して複数の前記ィン ナーリ一ドに密着されてなることを特徴としている。  In a preferred aspect of the electronic element package according to the present invention, the lead wire is bonded to an electrode of the electronic element via a conductive bump. Further, another aspect of the electronic element package of the present invention is an electronic element, an inner lead having one end joined to an electrode of the electronic element and a part of a substrate film of a film carrier adhered to the electronic element, A protective member encapsulated therein and molded so as to expose the other end of the inner lead to the outside, and an outer edge surface of the substrate film which is parallel to the electronic element surface of the protective member. And a plurality of said inner leads are in close contact with each other.
また、 本発明の電子素子パッケージの製造方法は、 リー ド線の一端を接合され てなる電子素子をモールド型内に置き、 該モールド型内にモールド材を注入し、 しかる後、 前記モールド型を除去して電子素子パッケージを製造するに際して、 前記モールド型の前記電子素子面に並向する面と前記リ一ド線との間にスぺーサ を設けて前記モールド型内に前記モールド材を注入することを特徴としている。 また、 本発明の電子素子パッケージの製造方法の好ま しい態様は、 前記リー ド 線は、 導電バンプを介して前記電子素子の電極に接合されていることを特徴とし ている。 Further, in the method of manufacturing an electronic element package according to the present invention, an electronic element having one end of a lead wire is placed in a mold, a molding material is injected into the mold, and then the mold is removed. In manufacturing the electronic device package by removing the spacer, a spacer is provided between a surface of the mold that is parallel to the electronic device surface and the lead wire, and the mold material is injected into the mold. It is characterized by doing. In a preferred aspect of the method for manufacturing an electronic element package according to the present invention, the lead wire is bonded to an electrode of the electronic element via a conductive bump.
また、 本発明の電子素子パッケージの製造方法の好ま しい態様は、 前記スぺ一 サを、 前記モールド型の前記電子素子面と並向する面に向けて付勢しながら前記 モールド型内にモールド材を注入することを特徴としている。  In a preferred aspect of the method for manufacturing an electronic element package according to the present invention, the mold is molded into the mold while urging the spacer toward a surface parallel to the electronic element surface of the mold. It is characterized by injecting a material.
また、 本発明の電子素子パッケージの製造方法の好ま しい態様は、 前記スぺー ザが前記モールド型の前記電子素子に並向する面に対して付勢される向きに前記 モールド材を注入することを特徴としている。  In a preferred aspect of the method for manufacturing an electronic element package according to the present invention, the mold material is injected in a direction in which the spacer is urged against a surface of the mold die parallel to the electronic element. It is characterized by.
また、 本発明の電子素子パッケージの製造方法の好ま しい態様は、 前記スぺー サを前記リ一ド線の弾性力により前記モールド型の前記電子素子面に並向する面 に対して付勢しながら前記モールド型内にモールド材を注入することを特徴とし ている。  In a preferred aspect of the method for manufacturing an electronic element package of the present invention, the spacer is urged against a surface parallel to the electronic element surface of the mold by the elastic force of the lead wire. It is characterized in that a mold material is injected into the mold while the mold material is being injected.
また、 本発明の電子素子パッケージの製造方法の好ましい態様は、 前記スぺー ザとしては、 前記モールド型の側が前記モールド材と同種の材質により被覆され たものを用いることを特徴としている。  In a preferred aspect of the method for manufacturing an electronic element package according to the present invention, as the spacer, one in which the side of the mold is coated with the same material as the molding material is used.
また、 本発明の電子素子パッケージの製造方法の好ましい態様は、 前記スぺー サとしては、 複数のリ一ド線に密着されたものを用いるこ.とを特徴としている。 また、 本発明の電子素子パッケージの製造方法の別の態様は、 フィルムキヤリ ァのインナーリー ドに電子素子を接合し、 該電子素子をモールド型内に置き、 該 モールド型内にモールド材を注入し、 しかる後、 前記モールド型を除去せしめて 電子素子パッケージを製造するに際して、 前記ィンナーリ一ドのうち前記モール ド型内に置かれる部位が、 前記フィルムキヤ リァの基板フィルムの一部と密着さ れてなるものを用いることを特徴としている。  In a preferred aspect of the method for manufacturing an electronic element package according to the present invention, the spacer used is one closely attached to a plurality of lead wires. In another aspect of the method for manufacturing an electronic element package according to the present invention, an electronic element is bonded to an inner lead of a film carrier, the electronic element is placed in a mold, and a molding material is injected into the mold. Thereafter, when manufacturing the electronic element package by removing the mold, a part of the inner lead placed in the mold is in close contact with a part of the substrate film of the film carrier. It is characterized by the use of such a device.
また、 本発明の電子素子パッケージの製造方法の別の態様は、 前記基板フィル ムの前記ィンナーリ一ドとの密着部は、 前記モールド型の側が前記モールド材と 同種の材質により被覆されてなることを特徴としている。  In another aspect of the method for manufacturing an electronic element package according to the present invention, a contact portion of the substrate film with the inner lead is formed such that a side of the mold is coated with a material of the same type as the molding material. It is characterized by.
本発明の電子素子パッケージによれば、 パッケージ内部における電子素子の傾 きを小さくすることができる。 これにより、 薄型パッケージにおいてもリー ド線 に不当な応力が加わることがないため、 パッケ一ジの信頼性が高い。  According to the electronic element package of the present invention, the inclination of the electronic element inside the package can be reduced. As a result, undue stress is not applied to the lead wire even in a thin package, and the reliability of the package is high.
また、 本発明の電子素子パッケージの製造方法によれば、 モールド型内におい て電子素子の傾きが極端に増大することがなく、 パッケージの外部に電子素子が 露出したり、 パッケージ化の際にリ一 ド線同士が接触したり リ一 ド線が断線する といった不良が発生しにく く歩留まりを向上することができる。 Further, according to the method for manufacturing an electronic element package of the present invention, the inclination of the electronic element does not extremely increase in the mold, and the electronic element is mounted outside the package. Yields can be improved because defects such as exposure, lead wires contacting each other at the time of packaging, and breakage of the lead wires do not easily occur.
また、 本発明の電子素子パッケージの製造方法によれば、 モールド型内の電子 素子の位置が安定し、 不良が発生しにく いため、 歩留ま りよく電子素子パッケ一 ジを製造することができる。  Further, according to the method for manufacturing an electronic element package of the present invention, since the position of the electronic element in the mold is stable and a defect is unlikely to occur, an electronic element package can be manufactured with good yield. it can.
図面の簡単な説明  BRIEF DESCRIPTION OF THE FIGURES
図 1は、 本発明の電子素子パッケージの製造方法に用いられるフィルムキヤ リ ァ接合済み電子素子の一実施例を示す平面図である。  FIG. 1 is a plan view showing one embodiment of a film carrier bonded electronic element used in the method of manufacturing an electronic element package of the present invention.
図 2は、 本発明の電子素子パッケージの製造方法の一実施例の一工程を示す図 である。  FIG. 2 is a view showing one step of an embodiment of a method for manufacturing an electronic element package according to the present invention.
図 3は、 本発明の電子素子パッケージの製造方法の他の一実施例の一工程を示 す図である。  FIG. 3 is a view showing a step of another embodiment of the method of manufacturing an electronic element package according to the present invention.
図 4は、 本発明の電子素子パッケージの一実施例を示す図である。  FIG. 4 is a view showing one embodiment of the electronic element package of the present invention.
図 5は、 従来の電子素子パッケージの製造方法に用いられるフィルムキヤ リァ 接合済み電子素子の例を示す平面図である。  FIG. 5 is a plan view showing an example of a film carrier bonded electronic element used in a conventional method for manufacturing an electronic element package.
図 6は、 従来の電子素子パッケージの例を示す図である。  FIG. 6 is a diagram illustrating an example of a conventional electronic element package.
図 7は、 本発明の電子素子パッケージの製造方法に用いられるフィルムキヤリ ァ接合済み電子素子の他の一実施例を示す平面図である。  FIG. 7 is a plan view showing another embodiment of the film carrier-bonded electronic device used in the method for manufacturing an electronic device package of the present invention.
図 8は、 本発明の電子素子パッケージの製造方法に用いられるフィルムキヤ リ ァ接合済み電子素子の他の一実施例を示す平面図である。  FIG. 8 is a plan view showing another embodiment of the film carrier-bonded electronic element used in the method of manufacturing an electronic element package according to the present invention.
図面における符号は、 次のものを表す。  Reference numerals in the drawings represent the following.
1 : フィルムキャリア、 2 : インナーリー ド、 3 : アウターリー ド、 4 ： ダムバー、 5 ： スぺーサ、 6 ： デバイスホール、 7 ： 電子素子、 8 ： 上金型、 9 ： 下金型、 1 0 : ゲー ト、 1 1 : モールド材、  1: film carrier, 2: inner lead, 3: outer lead, 4: dam bar, 5: spacer, 6: device hole, 7: electronic element, 8: upper mold, 9: lower mold, 1 0: Gate, 1 1: Mold material,
1 2 : 被覆部材、 1 3 ： 電子素子パッケージ、 2 1 : フィルムキャリア、 2 2 : インナーリー ド、 2 3 : アウターリー ド、 2 4 ： ダムバー、 1 2 : Covering member, 1 3: Electronic element package, 2 1: Film carrier, 2 2: Inner lead, 2 3: Outer lead, 2 4: Dam bar,
2 6 : デバイスホール、 2 7 ： 電子素子、 2 8 ： 上金型、 2 9 ： 下金型、 3 0 ： ゲー 卜、 3 1 : モールド材 26: Device hole, 27: Electronic element, 28: Upper mold, 29: Lower mold, 30: Gate, 31: Mold material
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
本発明において電子素子としては、 各種半導体製の I Cや L S Iや誘電体製の 光回路素子などが好ま しく用いられる。  In the present invention, as the electronic element, various semiconductor ICs and LSIs, dielectric optical circuit elements, and the like are preferably used.
本発明において保護部材とは、 電子素子に水分や有害な光線あるいは熱が達す ることがないように、 電子素子を内包 （電子素子が外部に露出することがないよ うに包みこむこと） して保護する部材であり、 かかる目的を達成するものならば なんでもよい。 たとえば、 はじめペース 卜状の無機あるいは有機の材料を加熱や 放射線の照射などの物理的刺激や時間経過により固化したものが好ま しく用いら れる。 たとえば、 エポキシなどの各種の熱硬化性樹脂などと硬化材ゃシリカなど のフイラ一の混合物を、 電子素子を置いたモールド型内に注入し、 加熱するなど の方法により形成される。 また、 上記の混合物の粉末をあらかじめタブレツ ト状 に形成しておき、 これをモールド型の入り口 （ゲー ト） に供給して、 加熱加圧す ることで溶融させペース ト状にしてモールド型内に供給する方法 （ トランスファ 一モールド法） も好ま しく行なわれる。 In the present invention, the protective member is defined as a member to which moisture, harmful rays or heat reaches the electronic element. It is a member that protects the electronic element by encapsulating it (wrapping it so that the electronic element is not exposed to the outside) so that it does not occur. For example, a paste-like inorganic or organic material that has been solidified by physical stimulus such as heating or irradiation or by the passage of time is preferably used. For example, a mixture of various thermosetting resins, such as epoxy, and a filler, such as a hardening agent and silica, is injected into a mold in which electronic elements are placed, and heated. In addition, the powder of the above mixture is formed into a tablet in advance, and is supplied to the entrance (gate) of the mold, and is heated and pressurized to be melted and pasted into the mold. The supply method (transfer-mold method) is also preferably performed.
本発明においてリ一ド線としては、 電子素子に接合されパッケージの外部に露 出する部材であれば何でもよい。 たとえば、 T A B技術のインナーリー ドゃァゥ ターリー ドとよばれる導電性の箔を加工したものや、 ワイヤ一ボンディ ング技術 のボンディ ングワイヤやこれに接合する導電性のリ一ド線などが好ま しく用いら れる。 T A B技術におけるフィル厶キヤ リァのィンナ一.リ一ドゃアウターリ一ド は適当な剛性を持っているため好ましい。 また、 リー ド線は導電性を有するもの であってもよく、 そうでなくてもよい。 またリー ド線は信号や電力を電子素子に 伝達するものであってもよいが、 必ずしもかかる機能を有するものである必要は ない。 またパッケージの外側に露出しておればよく、 延出している必要はない。 また、 本発明において、 ある面に 「並向する」 とは、 その面に沿って概略平行 な方向に一次元的または二次元的に延びることを指す。 たとえば、 保護部材の電 子素子面 （電子素子を構成する面のうち最も面積の大きい面またはこれに対向す る面） に並向する外縁面とは、 保護部材の外緣面であって、 電子素子面に概略平 行な向きの面を指す。 同様にモールド型の電子素子面に並向する面とは、 モール ド型の内面であって電子素子面に概略平行な向きの面を指す。  In the present invention, the lead wire may be any member that is joined to the electronic element and exposed to the outside of the package. For example, it is preferable to use conductive foil called inner lead terlead of TAB technology, bond wire of wire-to-bond technology, or conductive lead wire bonded to this. Used. Film carrier inner leads and outer leads in TAB technology are preferred because they have adequate rigidity. In addition, the lead wire may or may not have conductivity. The lead wire may transmit a signal or power to an electronic element, but need not necessarily have such a function. It only needs to be exposed outside the package and does not need to be extended. Further, in the present invention, “parallel to” a certain surface means extending one-dimensionally or two-dimensionally in a direction substantially parallel to the surface. For example, the outer edge surface parallel to the electronic element surface of the protective member (the surface having the largest area or the surface facing the electronic device) is the outer surface of the protective member, Refers to a surface that is roughly parallel to the electronic element surface. Similarly, the surface parallel to the mold-type electronic element surface refers to a mold-type inner surface that is oriented substantially parallel to the electronic element surface.
本発明において、 スぺーサは電子素子をパッケージ化する際にリ一ド線が保護 部材の外縁に触れる （あるいは外部に露出する） ことがないように、 リー ド線を 保護部材の外縁から一定以上の距離だけ離間するために用いる。 たとえば、 リー ド線を接合された電子素子をモールド型内に置き、 モールド型内にモールド材を 注入する場合は、 スぺーサはモールド型とリー ド線の間にあって、 リー ド線とモ ールド型の間の距離をスぺーザの厚さ以上に保つ作用を有する。 リ一ド線は電子 素子に接合されているため、 これにより電子素子とモールド型の間の距離も一定 以上に保つことができ、 電子素子がパッケージ外部に露出したりパッケージ内部 で大きく傾く ことを防ぐことができる。 また、 スぺ一サを電子素子の 2以上の辺 に接合されたリ一ド線とモールド型の間に置く ことにより、 電子素子のパッケー ジ内部での傾きを効果的に抑制することができる。 これにより、 リー ド線に不当 な応力などが加わることがなく、 リー ド線の断線などを防ぐことができる。 また, 複数の辺に沿う電極に接合されたリ一ド線とモールド型との間にスぺーサを置く ときは、 そのリ一ド線が設けられている全ての辺にスぺーサを設けるのが好まし く、 スぺーザの強度を確保するためには例えば図 1に示すように隣り合うスぺ一 ザが結合していることが好ま しい。 図 1では 4辺に沿う方向のすべてのスぺーサ が結合しており、 実質的に一体となっている。 一方、 スぺーサは、 一の辺に設け られた複数の電極に接合されたリ一ド線とモールド型との間において、 その辺に 対応する一片として連続して設けられているものに限定されない。 すなわち、 図 8に示すように、 一の辺に配置されたスぺ一サは、 連続した一片ではなく、 複数 の片からなるものでもよい。 In the present invention, the spacer keeps the lead wire constant from the outer edge of the protective member so that the lead wire does not touch (or is exposed to the outside) the outer edge of the protective member when packaging the electronic element. Used to separate by the above distance. For example, when an electronic device with a lead wire is placed in a mold and the molding material is injected into the mold, the spacer is located between the mold and the lead wire. It has the effect of keeping the distance between the molds greater than the thickness of the spacer. Since the lead wire is bonded to the electronic element, the distance between the electronic element and the mold is constant. Thus, the electronic element can be prevented from being exposed to the outside of the package or greatly tilted inside the package. Also, by placing the spacer between the lead wire bonded to two or more sides of the electronic element and the mold, the inclination of the electronic element inside the package can be effectively suppressed. . As a result, unreasonable stress or the like is not applied to the lead wire, and disconnection of the lead wire can be prevented. When placing a spacer between a lead wire joined to electrodes along a plurality of sides and a mold, the spacer should be provided on all sides where the lead wire is provided. In order to secure the strength of the spacer, it is preferable that adjacent spacers are connected as shown in FIG. 1, for example. In FIG. 1, all spacers along the four sides are connected, and are substantially integrated. On the other hand, the spacer is limited to one that is continuously provided as a piece corresponding to the side between the lead wire bonded to a plurality of electrodes provided on one side and the mold. Not done. That is, as shown in FIG. 8, the spacers arranged on one side may be composed of a plurality of pieces instead of a continuous piece.
なお、 スぺーサ自身はパッケージ外部に露出しても露出しなくてもよい。 ただ し、 スぺーザの材質とパッケージの保護部材の材質の組み合わせによっては、 パ ッケージの経時変化によりスぺーザとパッケージの間に隙間ができ、 この隙間よ り水分等がパッケージ内に進入するおそれがある場合がある。 このような場合は， スぺ一ザの表面を保護部材と親和性のよい材質で被覆するのがよい。  The spacer itself may or may not be exposed outside the package. However, depending on the combination of the material of the spacer and the material of the protective material of the package, there is a gap between the spacer and the package due to the aging of the package, and moisture enters the package through the gap. There may be a risk. In such a case, it is preferable to cover the surface of the spouter with a material having a good affinity for the protective member.
また、 スぺーサを設けることにより、 モールド型にモールド材を注入する位置 の設定の自由度を高めることができる。 これは、 モールド材の流れの力が電子素 子やリ一ド線に対してスぺーザのある側に付勢される向きに加わることが、 電子 素子をパッケージ外部に露出させることがないためである。 むしろこのような向 きの力が加わることにより、 電子素子のモールド型内の位置を安定化するため好 ましい。  Further, by providing the spacer, the degree of freedom in setting the position where the molding material is injected into the mold can be increased. This is because the flow force of the molding material is applied to the direction in which the electronic element and the lead wire are urged toward the side where the spacer is located, and the electronic element is not exposed to the outside of the package. It is. Rather, it is preferable to apply such a force to stabilize the position of the electronic element in the mold.
また、 スぺーサはリー ド線と密着していると、 モールド材がモールド型内に注 入されるときにスぺーザが移動することがなく好ましい。 また、 スぺーサは複数 のリー ド線と密着してリー ド線同士を連絡することも好ましい。 これにより、 リ 一ド線の剛性を補い、 モールド材がモールド型内に注入されるときにリー ド線同 士が接触する可能性を低減することができる。 一方、 モールド材の粘度が比較的 高い場合、 図 7に示すように電子素子の対向する 2辺のみに沿う方向にスぺーサ を設けたり、 図 8に示すように一の辺に配置されたスぺーザが連続した一片では なく、 複数の片からなるものとすることにより、 モールド材の流れを良好に保ち ながらモールド型に充填できるので好ま しく採用できる。 Further, it is preferable that the spacer is in close contact with the lead wire because the spacer does not move when the molding material is poured into the mold. It is also preferable that the spacer be in close contact with a plurality of lead wires and connect the lead wires. This makes it possible to supplement the rigidity of the lead wires and reduce the possibility that the lead wires come into contact with each other when the molding material is injected into the mold. On the other hand, when the viscosity of the molding material is relatively high, a spacer is provided in the direction along only the two opposing sides of the electronic element as shown in FIG. 7 or arranged on one side as shown in FIG. In a continuous piece of sousa Instead, it can be preferably used because it can be filled into the mold while maintaining good flow of the mold material by using a plurality of pieces.
また、 スぺーサはリ一ド線に対して電子素子の側にあってもその反対側にあつ てもよい。 モールド材をモールド型に注入する際に、 電子素子およびリー ド線に スぺ一ザがない側の向きにモールド材の流れの強い力が加わらなければよい。 ま た、 スぺーサをリー ド線の電子素子側とその反対側の両方に設けてもよい。 この 場合は、 モールド材の流れの力がどのような向きに加わっても電子素子が傾いた りパッケージ外部に露出したりすることがなく好ましい。  The spacer may be on the side of the electronic element with respect to the lead wire or on the opposite side. When injecting the mold material into the mold, it is only necessary that strong force of the flow of the mold material is not applied to the side where the electronic element and the lead wire have no spacer. Further, the spacer may be provided on both the electronic element side of the lead wire and the opposite side. In this case, it is preferable that the electronic element does not tilt or is exposed to the outside of the package regardless of the direction in which the force of the flow of the molding material is applied.
また、 パッケージ形状やモールド型の形状などの都合上、 電子素子またはリー ド線にスぺーザがない側の向きにモールド材の流れの力が加わる場合には、 たと えばリ一ド線の弾性力などにより、 スぺーザが電子素子面に並向するモールド型 の面に対して付勢しながらモールド型内にモールド材を注入するのが好ましい。 また、 モールド材の流れの力が電子素子やリ一ド線に対してスぺーザがない側に 加わらない場合でも、 リ一ド線などの弾性力を利用してかかる付勢を行なうのが 好ましい。 また、 スぺーザがモールド型の電子素子面に並向する面に対して付勢 される向きにモールド材の流れの力が加わるようにモールド材を注入するのが、 さらに好ましい。  Also, due to the shape of the package or the shape of the mold, if the force of the flow of the molding material is applied to the side where the electronic element or lead wire has no spacer, for example, the elasticity of the lead wire It is preferable to inject the molding material into the mold while applying a force to the surface of the mold that is parallel to the electronic element surface by force or the like. In addition, even when the force of the flow of the molding material is not applied to the electronic element or the lead wire on the side where the spacer is not provided, it is preferable to use the elastic force of the lead wire to apply the bias. preferable. It is more preferable to inject the molding material so that the force of the flow of the molding material is applied in a direction in which the spacer is urged against a surface parallel to the surface of the electronic device of the mold.
このように付勢することによりモールド材の注入中の電子素子やリ一ド線の位 置が安定し、 電子素子やリ一ド線がパッケージ外部に露出したり電子素子が傾く ことを防ぐことができる。  By applying such a force, the position of the electronic element and the lead line during the injection of the molding material is stabilized, and the electronic element and the lead line are prevented from being exposed to the outside of the package and the electronic element is prevented from tilting. Can be.
また、 スぺ一ザの保護部材の外緣面側には被覆部材を備えているのが好ましい c また、 被覆部材はモールド材と同種の材質 （モールド材と化学的に親和性を有す るもの） からなることが好ま しい。 これにより、 スぺーザがパッケージの外縁に 露出しにく く、 スぺーザとモールド材の間に隙間が発生しにくいため、 水分がリ ー ド線に伝わる可能性を低減することができる。 被覆部材の厚さは、 2 0〜2 0 0 β m程度が好ましい。 Moreover, also preferably c that is outside緣面side of the scan Bae one The protective member is provided with a covering member, the covering member is that having a material of the molding material and the same type (molding material chemically affinity It is preferable to consist of This makes it difficult for the spacer to be exposed to the outer edge of the package and hardly generates a gap between the spacer and the molding material, thereby reducing the possibility of water being transmitted to the lead wire. The thickness of the covering member is preferably about 20 to 200 βm.
また、 T A B技術では、 フィルムキャ リアの基板フィルムの一部をインナーリ ー ドに残し、 これをスぺ一サとして用いることができる。 これは、 たとえば、 図 1のように、 フィルムキヤリア 1のィンナーリ一 ド 2にスぺ一サ 5が残るように フィルムキヤリァ 1の基板フィルムをェッチングすればよい。 フィルムキヤ リァ の製造工程において、 インナーリー ド 2などの導電パターンは、 たとえば電解め つきなどにより形成するため、 イ ンナ一リー ド 2とスぺ一サ 5の密着性を一般に 高くすることが容易である。 また、 複数のィ ンナーリー ドと密着したスぺ一サを 形成することが容易である。 このような特性から、 T A B技術で製造する電子素 子パッケージは本発明の適用対象として好ま しい。 In the TAB technology, a part of the substrate film of the film carrier can be left on the inner lead and used as a spacer. For example, as shown in FIG. 1, the substrate film of the film carrier 1 may be etched so that the spacer 5 remains in the inner lead 2 of the film carrier 1. In the manufacturing process of the film carrier, since the conductive pattern such as the inner lead 2 is formed by, for example, electrolytic plating, the adhesion between the inner lead 2 and the spacer 5 is generally improved. It is easy to raise it. Further, it is easy to form a spacer in close contact with a plurality of inner leads. Due to such characteristics, an electronic element package manufactured by TAB technology is preferable as an application target of the present invention.
また、 本発明においてモールド型としては、 図 3に示したような上金型と下金 型を組み合わせ、 その間隙にパッケージの形状を有するモールド型が好ま しく用 いられる。 また、 モールド型の材質としては金属やセラ ミ ックなどが用いられる c モールド材を注入する位置は、 モールド材の流れの力が電子素子やリ一ド線にス ぺーサのない側への強い付勢を行なうことのないように決定するのが好ま しい。 たとえば、 図 3のようにスぺーサ 5を上金型 8 と電子素子 7の間に設けるときは、 モールド材の注入位置 （ゲー ト 1 0 ) は図 3のように下金型 9側に設けるのが好 ましい。 このような位置からモールド材を注入すれば、 スぺーザがモールド型の 面に付勢される方向の力が加わる場合が多いので、 好ま しい。 また、 モールド材 の注入位置を上金型 8側と下金型 9側の両方に設け、 下金型 9側の注入量を上金 型 8の注入量より多くするようにしてもよい。 この場合は、 モールド材の流れの 力が電子素子 7などにスぺーサのない側に付勢される方向には加わらず、 かつ、 電子素子 7の上金型 8側にも十分なモールド材を供給することができるので、 好 ましい。 In the present invention, as the mold, an upper mold and a lower mold as shown in FIG. 3 are combined, and a mold having a package shape in the gap is preferably used. In addition, metal or ceramic is used as the material of the mold. C The position where the mold material is injected is such that the force of the flow of the mold material is applied to the side where there is no spacer in the electronic element or lead wire. It is preferable to decide not to apply strong bias. For example, when the spacer 5 is provided between the upper die 8 and the electronic element 7 as shown in FIG. 3, the injection position (gate 10) of the molding material is set to the lower die 9 side as shown in FIG. It is preferable to provide it. It is preferable to inject the molding material from such a position, since a force in a direction in which the spacer is urged against the surface of the mold is often applied. Further, the injection position of the molding material may be provided on both the upper die 8 side and the lower die 9 side, and the injection amount of the lower die 9 may be larger than the injection amount of the upper die 8. In this case, the force of the flow of the molding material is not applied in the direction in which the electronic element 7 or the like is urged to the side where the spacer is not provided, and sufficient molding material is applied to the upper die 8 side of the electronic element 7. Can be supplied, so it is preferable.
さらに積極的にモールド材の流れの力によりスぺーサをモールド型の側に付勢 しょうとするときは、 たとえば図 3で下金型 9の電子素子 7に並向する面にゲー 卜を設けてもよい。  If you want to positively urge the spacer toward the mold by the force of the flow of the molding material, for example, install a gate on the surface of the lower mold 9 parallel to the electronic element 7 in Fig. 3. You may.
また、 モールド材の流れの力によりスぺーザにモールド型の側に付勢するとき は、 スぺーザがモールド型にほぼ密着した状態でモールドすることができる。 こ の場合は、 電子素子パッケージの外縁面と電子素子面がほぼ平行となり、 パッケ ージ内での電子素子の傾きを最小限とすることができるため、 好ましい。 また、 このような場合は、 スぺーザの厚さを、 電子素子パッケージの厚さからリー ド線 の厚さを減じたものの半分程度とすれば、 電子素子をパッケージのほぼ中央に確 実に配置することができ、 好ま しい。  Further, when the spacer is urged toward the mold by the force of the flow of the molding material, the molding can be performed in a state where the spacer is almost in close contact with the mold. In this case, the outer edge surface of the electronic element package is substantially parallel to the electronic element surface, and the inclination of the electronic element in the package can be minimized. In such a case, if the thickness of the spacer is about half of the thickness of the electronic element package minus the thickness of the lead wire, the electronic element is securely placed almost in the center of the package. Can be preferred.
実施例  Example
[実施例 1 ]  [Example 1]
図 1〜 3に示す工程を経て本発明の電子素子パッケージを製造した。  The electronic device package of the present invention was manufactured through the steps shown in FIGS.
まず、 図 1 に示すようなフィルムキャ リア接合済み電子素子を製造した。 フィ ル厶キヤ リァ 1 は、 ( 1 ) ポリィ ミ ドの基板フィルムに、 電解めつき法によりイ ンナーリー ド 2ゃァ ウタ一リー ド 3およびダムバー 4などの導電パターンを形成し、 First, an electronic device with a film carrier bonded as shown in Fig. 1 was manufactured. Film Carrier 1 (1) Conductive patterns such as inner leads 2 water leads 3 and dam bars 4 are formed on the polyimide substrate film by electrolytic plating.
( 2 ) つづいて基板フイルムをエッチングしてスぺーサ 5を残してデバイスホー ノレ 6を形成する、  (2) Subsequently, the substrate film is etched to form a device hole 6 while leaving the spacer 5;
ことにより作製した。 このフィルムキャ リア 1のインナーリー ド 2を T A B技術 で通常用いられるィンナ一リ一ドボンダ一により電子素子 7の四辺に配置された 電極に接合した。 In this way, it was produced. The inner lead 2 of the film carrier 1 was joined to the electrodes arranged on the four sides of the electronic element 7 by an inner bonder commonly used in TAB technology.
つづいて、 図 2のように、 上金型 8 と下金型 9の間に形成されたモールド型の 内部に上記のフィルムキャリア接合済みの電子素子 7を置き、 モールド材 1 1を 下金型 9に設けたゲー ト 1 0から注入し、 加熱した。 このとき、 ィンナーリ一ド 2の面と上金型 8の電子素子 7の面に並向する面の距離を、 スぺーサ 5の厚みよ りも短く した。 これにより、 スぺーサ 5をイ ンナーリー ド 2の弾性力により面に 並向する面に対して付勢した。 また、 ゲー ト 1 0を下金型 9の側に設け、 モール ド材 1 1の流れの力が電子素子 7ゃィンナーリ一ド 2に対しスぺーサ 5の側に若 干加わるようにした。 なお、 モールド材はエポキシ樹脂にフィラーと硬化材を混 入したものを用いた。  Subsequently, as shown in FIG. 2, the electronic element 7 having the film carrier bonded thereto is placed inside a mold formed between the upper mold 8 and the lower mold 9 and the molding material 11 is moved to the lower mold. It was injected from the gate 10 provided in 9 and heated. At this time, the distance between the surface of the inner lead 2 and the surface parallel to the surface of the electronic element 7 of the upper mold 8 was made shorter than the thickness of the spacer 5. Thus, the spacer 5 was urged against the surface parallel to the surface by the elastic force of the inner lead 2. Further, a gate 10 is provided on the side of the lower mold 9 so that the force of the flow of the molding material 11 is slightly applied to the spacer 5 side with respect to the electronic element 7 binary lead 2. The molding material was a mixture of epoxy resin and filler and hardener.
加熱後、 図 3のように上金型 8 と下金型 9を除去し、 電子素子パッケージ 1 3 の製造を完了した。  After the heating, the upper mold 8 and the lower mold 9 were removed as shown in FIG. 3, and the manufacture of the electronic element package 13 was completed.
この電子素子パッケージ 1 3の厚みは 0 . 5 m mと非常に薄いものであつたが、 電子素子 7力、'パッケージ外部に露出したり、 ハ°ッケージ内部で大きく傾くなどの 不良はほとんど発生しなかった。  Although the thickness of the electronic element package 13 was very thin, 0.5 mm, there were almost no defects such as the electronic element being exposed to the outside of the package and being greatly inclined inside the package. Did not.
[実施例 2 ]  [Example 2]
スぺーサ表面に被覆部材を設けたほかは実施例 1 と同様の電子素子パッケージ を製造した。 図 4は、 図 2に対応する工程を示す断面図である。 スぺーサ 5の表 面にモールド材 1 1 と同種の材料で被覆部材 1 2を設けた。 被覆部材 1 2の厚さ は 4 0 mとした。 被覆部材 1 2は電子素子 7 と接合する前のフィルムキヤ リア 1のスぺ一サ 5に密着する部位のみに描画型の樹脂塗布装置により塗布して形成 した。  An electronic element package was manufactured in the same manner as in Example 1 except that a covering member was provided on the spacer surface. FIG. 4 is a cross-sectional view showing a step corresponding to FIG. A covering member 12 was provided on the surface of the spacer 5 with the same material as the molding material 11. The thickness of the covering member 12 was 40 m. The coating member 12 was formed by applying a drawing-type resin coating device only to a portion of the film carrier 1 that was in close contact with the spacer 5 before being bonded to the electronic element 7.
完成した電子素子パッケージは、 パッケージ外部にスぺーザが露出することが なく、 保護部材とスぺーサとの間から水分が入り込む可能性がほとんどなくなつ た。  In the completed electronic element package, the spacer was not exposed to the outside of the package, and there was almost no possibility of moisture entering between the protective member and the spacer.
[実施例 3 ] スぺ一サを電子素子の対向する 2辺に沿う方向に延びるもののみ設け、 樹脂と して拈度の高いものを用いたほかは実施例 1 と同様の電子素子パッケージを製造 した。 図 7は、 図 1 に対応する工程を示す平面図である。 スぺーサ 5は樹脂注入 時の樹脂流動方向に対して平行になるような配置で設けた。 これにより、 粘度の 高い樹脂を用いた場合にも流動を良好に保ちながら樹脂をモールド型に充填でき、 電子素子パッケージを製造できた。 [Example 3] An electronic element package similar to that of Example 1 was manufactured except that only a spacer extending in a direction along two opposing sides of the electronic element was provided, and a resin having a high degree of sharpness was used as the resin. FIG. 7 is a plan view showing a step corresponding to FIG. The spacer 5 was provided in such a manner as to be parallel to the resin flow direction during resin injection. As a result, even when a resin having a high viscosity was used, the resin could be filled into the mold while maintaining good flow, and an electronic element package could be manufactured.
[実施例 4 ]  [Example 4]
複数の独立したスぺーサを電子素子の 4辺に沿う方向に設けたほかは実施例 1 と同様の電子素子パッケージを製造した。 図 8は、 図 1 に対応する工程を示す平 面図である。 スぺーサ 5は、 図 8に示すように複数の独立した片とし、 不連続な 配置で設けた。 これにより、 電子素子の上面における樹脂の流動の自由度が高く なり、 粘度の高い樹脂を用いた場合にも流動を良好に保ちながら樹脂をモールド 型に充填でき、 電子素子パッケージを製造できた。  An electronic device package similar to that of Example 1 was manufactured except that a plurality of independent spacers were provided in a direction along four sides of the electronic device. FIG. 8 is a plan view showing a process corresponding to FIG. The spacers 5 were provided as a plurality of independent pieces as shown in FIG. As a result, the degree of freedom of the resin flow on the upper surface of the electronic element was increased, and the resin could be filled into the mold while maintaining a good flow even when a high-viscosity resin was used, thereby producing an electronic element package.
産業上の利用可能性  Industrial applicability
本発明によれば、 薄型の電子素子パッケージであっても、 パッケージ外部に電 子素子が露出せず、 パッケージ内部で電子素子が傾いていない信頼性の高い電子 素子パッケージを提供でき、 パッケージ内部での電子素子の傾きや電子素子のパ ッケージ外部への露出を抑制することにより歩留まりよく電子素子パッケージを 製造する方法を提供できる。  ADVANTAGE OF THE INVENTION According to this invention, even if it is a thin electronic element package, a highly reliable electronic element package in which an electronic element is not exposed outside a package and an electronic element is not tilted inside a package can be provided. By suppressing the inclination of the electronic element and the exposure of the electronic element to the outside of the package, it is possible to provide a method of manufacturing an electronic element package with high yield.

Claims

請求の範囲 The scope of the claims
1 . 電子素子と、 前記電子素子を内包する保護部材と、 前記電子素子に接合され 前記保護部材の外部に露出する リ一ド線と、 前記保護部材の前記電子素子面に並 向する外緣面および前記リ一ド線の間に設けられたスぺーザとを備えたことを特 徴とする電子素子パッケージ。  1. An electronic element, a protection member including the electronic element, a lead wire joined to the electronic element and exposed to the outside of the protection member, and an outer surface parallel to the electronic element surface of the protection member. An electronic element package comprising a surface and a spacer provided between the lead wire.
2 . リー ド線の一端を接合されてなる電子素子がモールド型内に置かれ、 前記モ —ルド型内にモールド材を注入され、 前記モールド型を除去されてなる電子素子 パッケージであって、 かつ、 前記モールド型の前記電子素子面に並向する面と前 記リ一ド線との間にスぺーサを設けられて前記モールド型内に前記モールド材を 注入されてなることを特徴とする電子素子パッケージ。  2. An electronic element package in which an electronic element having one end of a lead wire joined is placed in a mold, a molding material is injected into the mold, and the mold is removed, And, a spacer is provided between a surface of the mold that is parallel to the electronic element surface and the lead line, and the mold material is injected into the mold. Electronic element package.
3 . 前記スぺーサは、 前記保護部材の外縁面側に前記保護部材と同種の材質から なる被覆部材を備えてなることを特徴とする請求項 1 または 2に記載の電子素子 ノヽ ッゲー ン 0 3. The spacer, the electronic device Nono Gge down 0 according to claim 1 or 2, characterized in that it comprises a covering member consisting of the protective member and the material of the same type on the outer edge surface of the protective member
4 . 前記リー ド線は、 導電バンプを介して前記電子素子の電極に接合されてなる ことを特徴とする請求項 1 〜 3のいずれかに記載の電子素子パッケージ。  4. The electronic element package according to claim 1, wherein the lead wire is bonded to an electrode of the electronic element via a conductive bump.
5 . 電子素子と、 前記電子素子の電極に一端を接合されかつフィルムキャリアの 基板フイルムの一部が密着したィンナーリー ドと、 前記電子素子を内包しかつ前 記ィンナーリ一ドの他端を外部に露出するようにモールド成形された保護部材を 有し、 かつ、 前記基板フィルムが、 前記保護部材の前記電子素子面に並向する外 縁面に並向して複数の前記ィンナーリ一ドに密着されてなることを特徴とする電 子素子パッケージ。  5. An electronic element, an inner lead having one end joined to an electrode of the electronic element and a part of a substrate film of a film carrier being in close contact with the electronic element, and the other end of the inner lead enclosing the electronic element and being externally connected. A protective member molded so as to be exposed, and wherein the substrate film is closely attached to the plurality of inner leads in parallel with an outer peripheral surface of the protective member in parallel with the electronic element surface. An electronic device package comprising:
6 . リー ド線の一端を接合されてなる電子素子をモールド型内に置き、 該モール ド型内にモールド材を注入し、 しかる後、 前記モールド型を除去して電子素子パ ッケージを製造するに際して、 前記モールド型の前記電子素子面に並向する面と 前記リ一ド線との間にスぺーサを設けて前記モールド型内に前記モールド材を注 入することを特徴とする電子素子パッケージの製造方法。  6. An electronic element having one end of the lead wire joined is placed in a mold, a molding material is injected into the mold, and then the mold is removed to manufacture an electronic element package. In this case, a spacer is provided between a surface of the mold die parallel to the electronic device surface and the lead wire, and the mold material is poured into the mold die. Package manufacturing method.
7 . 前記リー ド線は、 導電バンプを介して前記電子素子の電極に接合されている ことを特徴とする請求項 6に記載の電子素子パッケージの製造方法。  7. The method for manufacturing an electronic element package according to claim 6, wherein the lead wire is bonded to an electrode of the electronic element via a conductive bump.
8 . 前記スぺーサを、 前記モールド型の前記電子素子面と並向する面に向けて付 勢しながら前記モールド型内にモールド材を注入することを特徴とする請求項 6 または 7に記載の電子素子パッケージの製造方法。  8. The mold material is injected into the mold while energizing the spacer toward a surface of the mold parallel to the electronic element surface. Method for manufacturing electronic device package.
9 . 前記スぺーザが前記モールド型の前記電子素子に並向する面に対して付勢さ れる向きに前記モールド材を注入することを特徴とする請求項 8に記載の電子素 子パッケージの製造方法。 9. The spacer is urged against a surface of the mold that is parallel to the electronic element. 9. The method for manufacturing an electronic device package according to claim 8, wherein the mold material is injected in a direction in which the mold is inserted.
1 0 . 前記スぺ一サを前記リー ド線の弾性力により前記モールド型の前記電子素 子面に並向する面に対して付勢しながら前記モールド型内にモールド材を注入す ることを特徴とする請求項 8または 9に記載の電子素子パッケージの製造方法。 10. Injecting a molding material into the mold while urging the spacer against the surface of the mold parallel to the electron element surface by the elastic force of the lead wire. The method for manufacturing an electronic element package according to claim 8, wherein:
1 1 . 前記スぺーサとしては、 前記モールド型の側が前記モールド材と同種の材 質により被覆されたものを用いることを特徴とする請求項 6〜 1 0のいずれかに 記載の電子素子パッケージの製造方法。 11. The electronic element package according to any one of claims 6 to 10, wherein the spacer is a spacer whose side of the mold is coated with the same material as the molding material. Manufacturing method.
1 2 . 前記スぺ一サとしては、 複数のリー ド線に密着されたものを用いることを 特徴とする請求項 6〜 1 1のいずれかに記載の電子素子パッケージの製造方法。 12. The method for manufacturing an electronic element package according to any one of claims 6 to 11, wherein the spacer used is one closely attached to a plurality of lead wires.
1 3 . フィルムキヤリアのィンナーリー ドに電子素子を接合し、 該電子素子をモ 一ルド型内に置き、 該モールド型内にモールド材を注入し、 しかる後、 前記モー ルド型を除去せしめて電子素子パッケージを製造するに際して、 前記ィ ンナーリ 一ドのうち前記モールド型内に置かれる部位が、 前記フィル厶キヤ リァの基板フ ィルムの一部と密着されてなるものを用いることを特徴とする電子素子パッケ一 ジの製造方法。 13 3. Join the electronic element to the inner lead of the film carrier, place the electronic element in a mold, inject a molding material into the mold, and then remove the mold to remove the electron. In manufacturing an element package, an electronic device is used in which a part of the inner lead placed in the mold is in close contact with a part of a substrate film of the film carrier. Manufacturing method of element package.
1 4 . 前記基板フィルムの前記インナ一リー ドとの密着部は、 前記モールド型の 側が前記モールド材と同種の材質により被覆されてなることを特徴とする請求項 1 3に記載の電子素子パッケージの製造方法。  14. The electronic element package according to claim 13, wherein a close contact portion of the substrate film with the inner lead is formed such that a side of the mold is covered with the same material as the molding material. Manufacturing method.
PCT/JP1995/000977 1994-05-23 1995-05-22 Electronic device package and its manufacture WO1995032520A1 (en)

Priority Applications (1)

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KR1019950705781A KR960703272A (en) 1994-05-23 1995-05-22 ELECTRONIC DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME

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JP6/108592 1994-05-23
JP10859294 1994-05-23

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Cited By (1)

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Publication number Priority date Publication date Assignee Title
DE19921867A1 (en) * 1999-05-11 2000-11-30 Siemens Ag Semiconductor component, e.g. a polymer stud grid array component, is produced by forming connected conductor lines outside an encapsulation region and, after chip mounting and encapsulation, separating the lines

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JPH06334109A (en) * 1993-05-27 1994-12-02 Hitachi Cable Ltd Lead frame for semiconductor device and manufacture of semiconductor device

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JPS5754356A (en) * 1980-08-05 1982-03-31 Gao Ges Automation Org
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JPS63190363A (en) * 1987-02-02 1988-08-05 Matsushita Electronics Corp Power package
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Publication number Priority date Publication date Assignee Title
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