JP4840305B2 - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device in which the lead frame is used as a wiring base material. <P>SOLUTION: A plurality of semiconductor chips 21 are respectively mounted on the lead frame 60 through connecting members 22. A plurality of lead electrodes 23 are disposed on the side of the lower plane 21b of the chip. The lead electrode includes a thin inner electrode portion 23a having a part connected to a lead 24 at the upper plane side, and a thick outer electrode portion 23b protruded in the lower plane direction for forming an outer connection part. A plurality of semiconductor chips, lead electrodes, and connection leads are sealed in one body with a moulding resin layer 25. The back side of the moulding resin layer forms the same plane with the lower plane of the inner lead portion of the lead electrode. The outer electrode portion is protruded to lower side from back side of the moulding resin layer, and a conductive ball 26 is attached to the outer electrode portion. <P>COPYRIGHT: (C)2008,JPO&amp;INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device using a lead frame as a wiring substrate.

  With the high integration of semiconductor chips, ball grid array (BALL Grid Array, hereinafter referred to as BGA) type semiconductor devices in which external leads are arranged in a planar shape are often used. Usually, a BGA type semiconductor device is often used with a printed circuit board as a wiring base material. However, since it is expensive, a BGA type semiconductor device using an inexpensive lead frame as a wiring base material has been put into practical use. .

  Hereinafter, a semiconductor device using a conventional lead frame as a wiring substrate will be described with reference to the drawings. FIG. 11A is a cross-sectional view showing a configuration of a conventional BGA type semiconductor device disclosed in, for example, Japanese Patent Application Laid-Open No. 11-74404, and FIG. 11B is a bottom view of FIG. FIG. 12A is a plan view showing a lead frame used in a conventional BGA type semiconductor device arranged in a single row, and FIG. 12B is a view taken along line XIIb-XIIb in FIG. 12A. Sectional drawing and FIG.12 (c) are sectional drawings seen from the arrow XIIc-XIIc line | wire of Fig.12 (a).

  11 (a), 11 (b), 12 (a), 12 (b), and 12 (c), a conventional BGA type semiconductor device uses a lead frame 50 as a wiring substrate, and a pad. A semiconductor chip 1 having an electrode is mounted on a die pad 2 via a bonding member 3, has a solder ball mounting portion (hereinafter referred to as an external electrode portion) 4, and an inner tip portion thereof is disposed around the die pad 2. The lead electrode 5 and the pad electrode of the semiconductor chip 1 are connected by the connection lead 6. The semiconductor chip 1 and the connection lead 6 are sealed with a sealing resin layer 7, and the portions 4 a and 4 b except for the external electrode portion 4 connected to the back side of the lead electrode 5 are thinly formed by etching. Therefore, the die pad 2, the external electrode portion 4, and the suspension lead 8 that supports the die pad 2 are exposed on the same surface as the lower surface of the sealing resin layer 7. Solder balls 9 are attached to the external electrode portion 4, and finally the end portions of the lead electrode 5 and the suspension lead 8 are cut along the resin sealing line 7a.

  Next, a manufacturing method is demonstrated using FIGS. 13A and 13B are explanatory views showing a conventional method for manufacturing a BGA type semiconductor device. FIG. 13A is a cross-sectional view of the lead frame shown in FIG. 12, and FIG. 13B is a mold when sealing with a sealing resin layer. Sectional drawing which shows the state which attached | subjected, (c) shows sectional drawing which completed the assembly process until it attaches a solder ball.

  First, a lead frame 50 as shown in FIGS. 12A, 12B, and 12C is manufactured. That is, after forming a resist film (not shown) on the upper surface 50a and the lower surface 50b of the lead frame 50 and performing patterning as shown in FIG. 12A, etching is performed from the upper surface 50a and the lower surface 50b. The external electrode portion 4, the lead electrode 5, the suspension lead 8, and the dam bar 50c are formed so as to be connected to each other separated by the openings 50d and 50e. Thereafter, after forming a resist film (not shown) on the lower surface 50b side of the lead frame 50 excluding the parts 4a and 4b on the back side of the lead electrode 5, the parts 4a and 4b are formed by performing half etching.

  Next, the bonding member 3 is applied onto the die pad 2 to mount the semiconductor chip 1 having the pad electrode. Thereafter, the pad electrode of the semiconductor chip 1 and the inner tip of the lead electrode 5 are connected by the connection lead 6. Next, as shown in FIG. 13B, after the lower mold 10 is attached in contact with the die pad 2 and the external electrode portion 4, the upper mold 11 is aligned with the resin sealing line 7a to lead the lead frame. Attach to the top of 50. Next, after both molds 10 and 11 are tightened, the semiconductor chip 1, the die pad 2, the lead electrode 5 and the connection lead 6 are sealed with a sealing resin layer 7 by a transfer molding method. Thereafter, when the upper mold 11 and the lower mold 10 are removed, as shown in FIG. 13C, a non-lead type semiconductor device before the solder ball 9 is attached is obtained.

  Next, a solder paste is applied to the external electrode part 4 and the solder balls 9 are attached to the external electrode part 4. Thereafter, the lead electrode 5 protruding outward from the resin sealing line 7a and the sealing resin layer 7 wrapping around the portions 4a and 4b on the back side of the lead electrode 5 formed thin by half etching are resin-sealed. When cutting along the line 7a using a cutting device, the conventional BGA type semiconductor device shown in FIG. 11 is obtained.

Japanese Patent Laid-Open No. 11-068006 JP-A-11-176975 JP-A-11-177010

  In the type semiconductor device using such a conventional lead frame as a wiring substrate, the die pad 2, the external electrode portion 4, the lead electrode 5, the suspension lead 8, and the dam bar 50c are connected to each other with the openings 50d and 50e being separated from each other. Therefore, when the molds 10 and 11 are attached and then sealed with the sealing resin layer 7, the sealing resin layer 7 melted to a low viscosity is also formed in the opening 50d. . For this reason, the resin melted to a low viscosity enters the gap between the slight contact surfaces where the die pad 2, the external electrode portion 4 and the suspension lead 8 are in contact with the lower die 10, and a thin resin film (hereinafter, There was a problem of forming a thin burr).

  If the contact pressure between the external electrode part 4 and the lower mold 10 is large, generation of thin burrs formed between the external electrode part 4 and the lower mold 10 can be suppressed. However, the lead electrode 5 is thinly formed by etching and is supported like a cantilever at the portion sandwiched between the lower mold 10 and the upper mold 11 at the position of the resin sealing line 7a. Therefore, when the external electrode part 4 is pressed by the lower mold 10, the lead electrode 5 is deformed by the force, and the contact pressure sufficient to suppress the occurrence of thin flash is applied to the external electrode part 4 and the lower mold. 10 could not be secured.

  The degree of occurrence of thin burrs varies depending on the degree of surface finish roughness (hereinafter referred to as surface roughness) of the surface where the die pad 2 and the external electrode portion 4 are in contact with the lower mold 10. Normally, thin burrs do not adhere to a mold having good surface roughness, but adhere to die pad 2, external electrode portion 4 and the like having poor surface roughness. Therefore, for example, thin burrs attached to external electrode portion 4 are removed. It was necessary. In order to remove thin burrs, water pressure deburring, chemical deburring, chemical water pressure deburring, etc. are performed. After thin deburring, steps such as washing and drying are required, which increases the manufacturing cost. It was.

  In addition, the lead electrode 5 projecting outward from the resin sealing line 7a, the sealing resin layer 7 and the suspension lead 8 wrapping around the thinly formed portions 4a and 4b are provided along the resin sealing line 7a. In this case, the cutting portion of the sealing resin layer 7 that wraps around to the portion 4b is likely to be chipped. For this reason, the resin sealing line 7a is not straight and has a complicated crushing shape. There was a problem of becoming a defective product.

  Further, since the linear expansion coefficients of the semiconductor chip 1, the die pad 2, the bonding member 3, the lead electrode 5, and the sealing resin layer 7 constituting the semiconductor device are different, warpage due to thermal deformation occurs during the manufacture of the semiconductor device. For this reason, when the non-lead type semiconductor device is attached to another board, there is a problem that the external electrode portion is inclined and a good contact surface cannot be obtained in electrical connection with the other board.

  The present invention has been made to solve the above-described problems, and it is possible to prevent the occurrence of thin burrs between the surface that comes into contact with the lower mold, for example, the die pad, the external electrode portion, and the lower mold. It is to provide a semiconductor device that can be used.

  It is another object of the present invention to provide a semiconductor device that can prevent the separation portion of the sealing resin layer of the semiconductor device from having a complicated crushing shape.

  Furthermore, even when the semiconductor device is warped due to thermal deformation, when the semiconductor device is mounted on another board, a good contact surface can be obtained in the electrical connection between the external electrode portion and the other board. It is to provide a semiconductor device that can be used.

The manufacturing method of the semiconductor device of this invention is as follows:
Consists of a plate-like body having a plurality of regions with an uneven upper surface and a flat lower surface,
Each of the plurality of regions of the plate-like body
A thick first portion for mounting a first semiconductor chip having a plurality of pad electrodes;
A plurality of first thick portions provided to form each external electrode portion arranged corresponding to the pad electrode of the first semiconductor chip outside the first portion;
A thin second portion for mounting a second semiconductor chip having a plurality of pad electrodes;
A plurality of second thick portions provided to form each external electrode portion arranged corresponding to the pad electrode of the second semiconductor chip outside the second portion;
Using a lead frame comprising a thin portion provided so as to surround each of the plurality of first thick portions and the plurality of second thick portions,
Electrically connecting the plurality of pad electrodes of the first semiconductor chip mounted on the first portion and the plurality of first thick portions with a first connecting means;
Furthermore, after electrically connecting the plurality of pad electrodes of the second semiconductor chip mounted on the second portion and the plurality of second thick portions by the second connecting means,
The first and second semiconductor chips, the top surfaces of the plurality of first thick portions, the top surfaces of the plurality of second thick portions, the top surfaces of the thin portions, and the connecting means are encapsulated resin layers Sealed together,
By removing the thin portion and the thin second portion by etching, the plurality of first thick portions are electrically separated from each other as external electrode portions constituting a connection portion to the outside, and the plurality The second thick part is electrically separated from each other as an external electrode part constituting a connection part to the outside.

  Since the present invention is configured as described above, the following effects can be obtained.

  According to the method for manufacturing a semiconductor device of the present invention, the first, second, and third thin portions formed on the lead frame made of a plate-like body having an uneven upper surface and a flat lower surface are removed by etching. Accordingly, each of the plurality of lead electrodes includes a thin internal lead portion having a connection portion with a connection means on the upper surface side, and a thick external electrode portion that protrudes toward the lower surface and constitutes a connection portion to the outside. The sealing resin layer is formed so that the back surface thereof constitutes substantially the same surface as the bottom surface of the internal lead portion of the lead electrode, and the external electrode portion protrudes downward from the back surface of the sealing resin layer. As a result, the lower surface side of the semiconductor device is configured such that the external electrode portion protrudes downward from the back surface of the sealing resin layer, so that warpage due to the thermal expansion coefficient of the component parts of the semiconductor device occurs. Even external electrode part and other boards In the electrical connection, it is possible to obtain a good contact surface.

  Further, the first, second and third thin portions can form a recess on the upper surface of the lead frame. Then, by removing the first, second, and third thin portions by etching, a semiconductor device including the outer peripheral portion of the concave portion and the semiconductor chip, lead electrode, sealing resin layer, etc. provided in the concave portion It will be in the state where the outer peripheral part was continued. In this state, by extruding the semiconductor device from the lower surface side of the lead frame, the lead frame and the semiconductor device can be easily separated without using a cutting device, and the lead frame and the semiconductor device are separated from each other. It becomes possible to prevent a complicated crushing shape.

  Preferably, since the first, second and third thin portions have substantially the same thickness, the lower surface side of the lead frame can be integrated with the first, second and third thin portions. For this reason, when the lower surface side of the lead frame is in full contact with the lower mold and sealed with the sealing resin layer, the sealing resin layer is blocked by the first, second, and third thin portions. Since the sealing resin layer does not flow into the surface where the lower surface and the lower mold are in contact with each other, generation of thin burrs can be prevented.

  Preferably, a plurality of thin portions of the first, second, third, and fourth portions formed on the lead frame made of a plate-like body having a concavo-convex upper surface and a flat lower surface are removed by etching. Each of the lead electrodes is formed to have a thin internal lead portion having a connection portion with a connection means on the upper surface side, and a thick external electrode portion that protrudes toward the lower surface and constitutes a connection portion to the outside, The sealing resin layer is formed such that the back surface forms substantially the same surface as the internal lead portion of the lead electrode and the bottom surface of the auxiliary electrode, and the external electrode portion protrudes downward from the back surface of the sealing resin layer. Thus, the lower surface side of the semiconductor device is configured such that the external electrode portion protrudes downward from the back surface of the sealing resin layer, so that even if warpage due to the thermal expansion coefficient of the component parts of the semiconductor device occurs , With external electrode part and other board In the electrical connection, it is possible to obtain a good contact surface.

  Further, the first, second and third thin portions can form a concave portion on the upper surface side of the lead frame, and the second thick portion provided for constituting the auxiliary electrode is arranged around the concave portion. be able to. Then, by removing the first, second, third and fourth thin portions by etching, from the auxiliary electrode provided around the concave portion and the semiconductor chip, lead electrode, sealing resin layer, etc. provided in the concave portion The constructed semiconductor device is separated from the lead frame at the outer peripheral portion of the semiconductor device. For this reason, the semiconductor device can be automatically separated from the lead frame, and the semiconductor device and the lead frame can be easily separated without using a cutting device. Can be prevented from becoming a complicated crushing shape.

  More preferably, since the first, second, third and fourth thin portions have substantially the same thickness, the lower surface side of the lead frame can be integrated with the first, second, third and fourth thin portions. For this reason, in manufacturing a semiconductor device using this lead frame as a wiring substrate, the lower surface side of the lead frame can be integrated with the first, second, third and fourth thin portions. Therefore, in the manufacture of a semiconductor device using this lead frame as a wiring substrate, when the lower surface side of the lead frame is in full contact with the lower mold and is sealed with the sealing resin layer, the sealing resin layer is Since the sealing resin layer does not flow into the surface where the lower surface of the lead frame is in contact with the lower mold because it is blocked by the thin portions of 1, 2, 3, and 4, prevent the occurrence of thin burrs. Can do.

Embodiment 1 FIG.
FIG. 1A is a cross-sectional view illustrating a configuration of a semiconductor device, and FIG. 1B is a bottom view of FIG. FIG. 2A is a plan view of a lead frame used as the wiring substrate of the first embodiment arranged in a single row, and FIG. 2B is a view taken along line IIb-IIb in FIG. 2A. FIG. 2C is a sectional view taken along the line IIc-IIc in FIG. 2A.

  First, the shape of the lead frame 60 will be described. As shown in FIG. 2A, FIG. 2B, and FIG. 2C, the lead frame 60 is a plate having conductivity such as copper having an uneven upper surface 60a and a flat lower surface 60b. Consists of the body. The plate-like body corresponds to the pad electrode of the semiconductor chip 21 around the first thin part 60c for mounting the semiconductor chip 21 having a plurality of pad electrodes (not shown). The plurality of first thick portions 60d provided to constitute each of the lead electrodes 23 arranged in this manner, and the second thin portion 60e provided between the plurality of first thick portions 60d. Similarly, a third thin part 60f provided so as to surround the plurality of first thick parts 60d, and a second thick part 60g provided around the third thin part 60f. I have. The first thin part 60c, the second thin part 60e, and the third thin part 60f have substantially the same thickness, and the thin part 60c, 60e, 60f forms a recess 60h having an outer peripheral part 60i. Moreover, the convex part is formed by the thick parts 60d and 60g.

  Using such a lead frame 60, the semiconductor device 20 as shown in FIGS. 1A and 1B is obtained. The semiconductor device 20 includes an upper surface 21a and a lower surface 21b, and a semiconductor chip 21 having a plurality of pad electrodes (not shown) is mounted on a first thin portion 60c of a lead frame 60 (not shown) via a bonding member 22, and the semiconductor chip A plurality of lead electrodes 23 extending in the outer peripheral direction on the lower surface 21b side of the member 21 are arranged corresponding to the plurality of pad electrodes, and the plurality of pad electrodes and the plurality of lead electrodes 23 are connected by connection leads 24 as connection means. is doing. Each of the plurality of lead electrodes 23 includes a thin internal lead portion 23a having a connection portion with the connection lead 24 on the upper surface side, and a thick external electrode portion 23b that protrudes toward the lower surface and constitutes a connection portion to the outside. It is made up of.

  The semiconductor chip 21, the lead electrode 23 and the connection lead 24 are integrally sealed with a sealing resin layer 25. The sealing resin layer 25 has a back surface that is substantially the same as the bottom surface of the internal lead portion 23a of the lead electrode 23, and the external electrode portion 23b protrudes downward from the back surface of the sealing resin layer. is doing. A conductive ball 26 is attached to the external electrode portion 23b. As will be described later, the thin portion of the lead frame 60 is removed by etching, and the lead frame 60 is finally separated along the outer peripheral portion 60i of the concave portion 60h of the lead frame 60, as will be described later. The semiconductor device 20 shown in FIG. 1A is obtained.

  Next, a method for manufacturing a semiconductor device will be described with reference to FIGS. FIG. 3 is an explanatory view showing a method of manufacturing a semiconductor device according to the first embodiment. FIG. 3A shows an electrical connection between a semiconductor chip and a lead electrode mounted on a lead frame in which a thin portion and a lead electrode are formed. Sectional drawing which shows the state connected to A, the sectional view which shows the state where (b) attached the upper metallic mold and the lower metallic mold, and was sealed with the sealing resin layer, (c) formed the external electrode part Sectional view showing a state in which an etching resist film is attached for the purpose, (d) is a sectional view showing a state in which the external electrode portion is protruded by etching, and (e) is for attaching a conductive ball to the external electrode portion It is sectional drawing which shows the state.

  First, after forming a resist film (not shown) on the upper surface 60a of the lead frame 60 made of a plate-like material and performing patterning as shown in FIG. 2), a plate-like body having an uneven upper surface 60a and a flat lower surface 60b as shown in FIG. That is, the first thin portion 60c for mounting the semiconductor chip 21 having a plurality of pad electrodes (not shown) is disposed around the first thin portion 60c so as to correspond to the pad electrodes of the semiconductor chip 21. In addition, a plurality of first thick portions 60d provided for constituting each lead electrode 23 and a second thin portion 60e provided between the plurality of first thick portions 60d, A third thin portion 60f provided so as to surround the plurality of first thick portions 60d, and a second thick portion 60g provided around the third thin portion 60f are formed. The

  The first thin portion 60c, the second thin portion 60e, and the third thin portion 60f have substantially the same thickness, and the thin portions 60c, 60e, 60f form a recess 60h. Convex portions are formed by the thick portions 60d and 60g to form a plate-like body having an uneven upper surface 60a and a flat lower surface 60b. The cross-sectional shape in the plate thickness direction of the outer peripheral portion 60i of the recess 60h formed by etching is smooth so that it slightly spreads from the third thin portion 60f toward the upper surface 60a of the lead frame by side etching specific to etching. A draft is formed naturally. For this reason, it becomes easy to separate the outer peripheral portion 25b of the sealing resin layer 25 described later from the outer peripheral portion 60i of the recess 60h of the lead frame 60. The outer peripheral portion 60i is formed so as to be larger than the resin sealing line 25a, for example, by the depth of the concave portion 60h, or the resin sealing line 25a so as to facilitate positioning of the upper mold 31 described later. May be matched.

  Next, as shown in FIG. 3A, a bonding member 22 made of, for example, an epoxy resin, a silver-containing epoxy resin, an adhesive tape, solder, or the like is applied to the central portion of the first thin portion 60c to thereby attach the semiconductor chip 21. Join (joining process). Thereafter, the semiconductor chip 21 and the lead electrode 23 are connected using a connection lead 24 made of, for example, a gold wire or an aluminum wire (connection process).

  Next, as shown in FIG. 3B, after the lower surface 60b of the lead frame 60 completed up to the joining step and the connecting step is mounted on the lower die 30, the upper die 31 is attached to the resin sealing line 25a. And attached to the upper surface 60a of the lead frame 60. Next, after clamping both dies 30 and 31, the thermosetting sealing resin layer 25 made of, for example, epoxy resin, phenol resin, or the like is made into a liquid low viscosity by a transfer molding method at a high pressure. Inject (sealing process). At this time, the lower surface 60b side of the lead frame 60 is integrated with the thin portions 60c, 60e, and 60f and comes into full contact with the lower mold 30, and the sealing resin layer 25 is blocked by the thin portions 60c, 60e, and 60f. Therefore, the sealing resin layer 25 does not flow into the surface where the lower surface 60b of the lead frame 60 and the lower mold 30 are in contact. For this reason, generation | occurrence | production of a thin burr | flash can be prevented.

  After the sealing step, both molds 30 and 31 are removed, and as shown in FIG. 3C, a portion where the external electrode portion 23b is formed on the lower surface 60b side of the lead frame 60 and the outer peripheral portion 60i of the recess 60h. The portion surrounding the outside is masked with a resist film 32 and is removed by half etching until it becomes flush with the lower surface of the sealing resin layer 25. As a result, as shown in FIG. 3D, the bonding member 22 is exposed, and each of the plurality of lead electrodes 23 protrudes on the back surface of the lead electrode 23 toward the lower surface to form a connection portion to the outside. A thick external electrode portion 23b is formed (external electrode portion forming step).

  That is, the semiconductor chip 21, the lead electrode 23, and the connection lead 24 are integrally sealed with the sealing resin layer 25, and the back surface of the sealing resin layer 25 is substantially the same as the lower surface of the internal lead portion 23 a of the lead electrode 23. The same surface is configured, and the external electrode portion 23b protrudes downward from the back surface of the sealing resin layer. Further, the lead frame 60 and the semiconductor device 20 are connected at the outer peripheral portion 25 b of the sealing resin layer 25 and the outer peripheral portion 60 i of the concave portion 60 h of the lead frame 60.

  In this state, the semiconductor device 20 is separated from the lead frame 60 by pushing out the semiconductor device 20 from the direction of arrow (A) shown in FIG. Therefore, the semiconductor device 20 and the lead frame 60 can be easily separated without using a cutting device, and the separation portion of the sealing resin layer 25 of the semiconductor device 20 is prevented from having a complicated crushed shape. be able to. Further, even if a thin burr is formed in the gap between the upper mold 31 and the lead frame 60, the thin burr can be removed in this separation step.

  Note that the semiconductor device in a state after the separation step can be incorporated into a thin small device such as a mobile phone as a non-lead type semiconductor device. Prior to the separation step, as shown in FIG. 3E, a solder paste (not shown) is applied to the external electrode portion 23b to connect a conductive ball, for example, a solder ball 26. Thereafter, the semiconductor device 20 is separated from the lead frame 60 by extruding the semiconductor device 20 from the direction indicated by the arrow (A) in the portion where the semiconductor device 20 and the outer peripheral portion 60i of the lead frame 60 are connected. A BGA type semiconductor device as shown in FIG.

  That is, by using the lead frame 60 as a wiring substrate, it is possible to realize a BGA type semiconductor device by adding a conductive ball attaching step before performing a separation step for obtaining a non-lead type semiconductor device, The production process can be shared between the non-lead type semiconductor device and the BGA type semiconductor device, and an efficient production line can be constructed.

  Further, since the lower surface side of the semiconductor device 20 is configured such that the external electrode portion 23b protrudes downward from the back surface of the sealing resin layer, warping due to the thermal expansion coefficient of the component parts of the semiconductor device occurs. However, a good contact surface can be obtained in electrical connection between the external electrode portion 23b and another board. Even if there is a warp in another board in addition to the warp that occurs in the semiconductor device 20 itself, the external electrode portion 23b does not necessarily come into contact with the other board and lift up. For this reason, when used in a non-lead type semiconductor device such as a mobile phone that is required to be miniaturized, for example, the solder ball diameter of 0.45 mm can be reduced.

  In the first embodiment, the semiconductor device using the lead frame 60 formed in a strip shape as shown in FIGS. 2A and 2B as a wiring base material has been described. The formed lead frame may be used, and the same effect as the above is achieved.

  In addition, an example in which one semiconductor chip 21 is mounted on the lead frame 60 and a plurality of lead electrodes 25 are arranged around the semiconductor chip 21 is configured in a single row. 4 (a) and 4 (b), a plurality of semiconductor chips 21 may be mounted in a plurality of rows and a plurality of columns, and the same effects as described above can be obtained. In order to obtain a semiconductor device called a multi-chip package in which two semiconductor chips having the same function and the same calorific value are sealed with one resin at the same time, for example, in FIG. A lead frame having a recess outer periphery 60i as shown and having a cross section as shown in FIG. 4C may be used, and the same effects as described above can be obtained.

  Further, in order to obtain a semiconductor device called a multi-chip package in which a power semiconductor chip having a large amount of heat generation and a semiconductor chip having a small amount of heat generation are sealed together with a resin, FIG. 5A and FIG. As shown, a heat radiating plate 61 may be provided in a region where a power semiconductor chip that generates a large amount of heat is mounted. 4 and 5, the same reference numerals as those shown in FIG. 1 and FIG. 2 indicate the same or equivalent parts, and the description thereof is omitted.

  In addition, the connection leads 24 that electrically connect the semiconductor chip 21 and the lead electrodes 23 have been described with gold wires, aluminum wires, etc., but as shown in FIG. The semiconductor chip 21 and the lead electrode 23 may be connected to each other via a connecting member 27 called an inner bump such as (Au Bump) or solder bump. Play. In this case, since the joining member 22 that joins the semiconductor chip 21 can be omitted, the warp of the semiconductor device caused by materials having different linear expansion coefficients is reduced. When the semiconductor chip 21 generates a large amount of heat, the heat sink 61 may be attached to the bonding member 22 as shown in FIG.

Embodiment 2. FIG.
FIG. 8A is a cross-sectional view showing the configuration of the semiconductor device according to the second embodiment of the present invention, and FIG. 8B is a bottom view of FIG. 8A. 9A is a plan view of a lead frame used as the wiring substrate of the second embodiment, FIG. 9B is a cross-sectional view taken along line IXb-IXb in FIG. 9A, and FIG. (C) is sectional drawing seen from the arrow IXc-IXc line | wire in Fig.9 (a).

  First, the shape of the lead frame 70 will be described. As shown in FIGS. 9A, 9B, and 9C, the lead frame 70 is formed of a plate-like body having an uneven upper surface 70a and a flat lower surface 70b. This plate-like body is arranged corresponding to the pad electrode of the semiconductor chip 31 around the first thin portion 70c for mounting the semiconductor chip 31 having a plurality of pad electrodes, and around the first thin portion 70c. A plurality of first thick portions 70d provided to constitute each of the lead electrodes 23, and a second thin portion 70e provided between the plurality of first thick portions 70d, Similarly, a third thin portion 70f provided so as to surround the plurality of first thick portions 70d, and provided around the third thin portion 70f, and provided to constitute the auxiliary electrode 36. The second thick part 70g, the fourth thin part 70h provided around the second thick part 70g, and the third thick part provided around the fourth thin part 70h. Part 70i is provided.

  The first thin part 70c, the second thin part 70e, the third thin part 70f, and the fourth thin part 70h have substantially the same thickness, and these thin parts 70c, 70e, 70f, and 70h A concave portion 70j having an outer peripheral portion 70k is formed, and convex portions are formed by the thick portions 70d, 70g, and 70i.

  Using such a lead frame 70, a semiconductor device 30 as shown in FIGS. 8A and 8B is obtained. The semiconductor device 30 includes an upper surface 31a and a lower surface 31b, and a semiconductor chip 31 having a plurality of pad electrodes (not shown) is mounted on a first thin portion 70c of a lead frame 70 (not shown) via a bonding member 32. A plurality of lead electrodes 33 extending in the outer peripheral direction on the lower surface 31b side of 31 are arranged corresponding to the plurality of pad electrodes, and the plurality of pad electrodes and the plurality of lead electrodes 33 are connected by connection leads 34 as connection means. is doing. Each of the plurality of lead electrodes 33 includes a thin internal lead portion 33a having a connection portion with the connection lead 34 on the upper surface side, and a thick external electrode portion 33b that protrudes toward the lower surface and constitutes a connection portion to the outside. It is made up of. The auxiliary electrode 36 provided around the plurality of lead electrodes 33 is connected to the lead electrode 33 or the pad electrode by a connection member (not shown). The auxiliary electrode 36 is used for a power supply layer, a ground layer, a neutral layer, and the like as necessary.

  The semiconductor chip 31, the lead electrode 33, the connection lead 34, and the auxiliary electrode 36 are integrally sealed with a sealing resin layer 35. The back surface of the sealing resin layer 35 constitutes substantially the same surface as the inner lead portion 33a of the lead electrode 33 and the lower surface of the auxiliary electrode 36, and the external electrode portion 33b extends downward from the back surface of the sealing resin layer. It is configured to protrude. In the case of a BGA type semiconductor device, a conductive ball (not shown) is attached to the external electrode portion 33b. As will be described later, the thin portion of the lead frame 70 is removed by etching, and the outer peripheral portion 70l of the second thick portion 70g provided to form the auxiliary electrode 36 is finally obtained. By the way, the semiconductor device 30 shown in FIGS. 8A and 8B is obtained by separating the lead frame 70.

  Next, a method for manufacturing a semiconductor device will be described with reference to FIGS. FIG. 10 is an explanatory view showing a method of manufacturing a semiconductor device according to the second embodiment, in which (a) shows a semiconductor chip and a lead electrode mounted on a lead frame in which a thin portion, a lead electrode and an auxiliary electrode are formed. Sectional drawing which shows the state which was electrically connected, The sectional view which shows the state which the (b) attached the upper metal mold | die and the lower metal mold | die, and sealed with the sealing resin layer, The (c) is an external electrode FIG. 6 is a cross-sectional view showing a state in which an etching resist film is formed to form a portion, and (d) is a cross-sectional view showing a state in which an external electrode portion is projected by etching.

  First, a resist film (not shown) is formed on the upper surface 70a of the lead frame 70 and patterned as shown in FIG. 9A, and then subjected to half etching, so that the cross sections thereof are shown in FIGS. 9B and 9C. ) Is formed into a plate-like body having an uneven upper surface 70a and a flat lower surface 70b. That is, a first thin portion 70c for mounting a semiconductor chip 31 having a plurality of pad electrodes (not shown) is disposed around the first thin portion 70c so as to correspond to the pad electrodes of the semiconductor chip 31. In addition, a plurality of first thick portions 70d provided for constituting each lead electrode 33, and a second thin portion 70e provided between the plurality of first thick portions 70d, A third thin portion 70f provided so as to surround the plurality of first thick portions 70d, and provided around the third thin portion 70f and provided to constitute the auxiliary electrode 36. The second thick part 70g, the fourth thin part 70h provided around the second thick part 70g, and the third thick part provided around the fourth thin part 70h 70i is formed.

  The first thin portion 70c, the second thin portion 70e, the third thin portion 70f, and the fourth thin portion 70h have substantially the same thickness, and the thin portions 70c, 70e, and 70f form a recess 70j. In addition, convex portions are formed by the thick portions 70d, 70g, and 70i to form a plate-like body having an uneven upper surface 70a and a flat lower surface 70b. The outer periphery 36a of the auxiliary electrode 36 is formed to be larger than the resin sealing line 35a so as to facilitate alignment of the upper mold 41, which will be described later, for example, to be larger by the depth of the recess 70j, or resin sealing You may match with the stop line 35a.

  Next, as shown in FIG. 10A, a bonding member 32 made of, for example, epoxy resin, silver-containing epoxy resin, adhesive tape, solder, or the like is applied to the central portion of the first thin portion 70c, and the semiconductor chip 31 is formed. Join (joining process). Thereafter, the semiconductor chip 31 and the lead electrode 33 are connected using a connection lead 34 made of, for example, a gold wire or an aluminum wire (connection process).

  Next, as shown in FIG. 10B, after the lower surface 70b of the lead frame 70 completed up to the joining step and the connecting step is mounted on the lower die 40, the upper die 41 is attached to the resin sealing line 35a. And attached to the upper surface 70a of the lead frame 70. Next, after clamping both dies 40 and 41, the thermosetting sealing resin layer 35 made of, for example, an epoxy resin, a phenol resin, or the like is made into a liquid low viscosity by a transfer molding method at a high pressure. Inject (sealing process). At this time, the lower surface 70b side of the lead frame 70 is integrated with the thin portions 70c, 70e, 70f, and 70h, and comes into full contact with the lower mold 40, and the sealing resin layer 35 is formed with the thin portions 70c, 70e, 70f, Since it is blocked by 70h, the sealing resin layer 35 does not flow into the surface where the lower surface 70b of the lead frame 70 and the lower mold 40 are in contact. For this reason, generation | occurrence | production of a thin burr | flash can be prevented.

  After the sealing step, both molds 40 and 41 are removed, and as shown in FIG. 10C, the portion where the external electrode portion 33b is formed on the lower surface 70b side of the lead frame 70 and the fourth thin portion 70h. The portion surrounding the outside is masked with a resist film 42 and removed by half-etching until it becomes flush with the lower surface of the sealing resin layer 35. As a result, as shown in FIG. 10 (d), the bonding member 32 is exposed, and the plurality of lead electrodes 33 each project on the back surface of the lead electrode 33 toward the bottom surface to form an external connection portion. A thick external electrode portion 33b is formed (external electrode portion forming step).

  That is, the semiconductor chip 31, the lead electrode 33, and the connection lead 34 are integrally sealed with the sealing resin layer 35, and the back surface of the sealing resin layer 35 is the lower surface of the internal lead portion 33 a of the lead electrode 33 and the auxiliary lead. A surface substantially the same as that of the electrode 36 is formed, and the external electrode portion 33b protrudes downward from the back surface of the sealing resin layer. Further, since the lead frame 70 and the semiconductor device 30 are separated at the outer peripheral portion 36a of the auxiliary electrode 36, the semiconductor device 30 is automatically separated from the lead frame 70 (separation process). Therefore, the semiconductor device 30 and the lead frame 70 can be easily separated without using a cutting device, and the separation portion of the sealing resin layer 35 of the semiconductor device 30 is prevented from having a complicated crushed shape. be able to.

  Even if the sealing resin layer 35 leaks from the resin sealing line 35a of the upper mold 41 to the surface of the auxiliary electrode 36 and a thin burr is formed, further outflow occurs at the outer peripheral portion 36a of the auxiliary electrode 36. The thin burr does not fall off, so that a high-quality semiconductor device can be obtained, and the auxiliary electrode 36 can protect the outer periphery of the lower surface of the semiconductor device 30.

  Note that the semiconductor device in a state after the separation step can be incorporated into a thin small device such as a mobile phone as a non-lead type semiconductor device. Further, before the separation step, a solder paste (not shown) is applied to the external electrode portion 33b, and a conductive ball (not shown) such as a solder ball is connected. Thereafter, the semiconductor device 30 and the lead frame 70 are separated at the outer peripheral portion 36a of the auxiliary electrode 36, and the semiconductor device 30 is separated from the lead frame 70, so that a BGA type semiconductor device can be obtained.

  Further, since the lower surface side of the semiconductor device 30 is configured such that the external electrode portion 33b protrudes downward from the back surface of the sealing resin layer, warping due to the thermal expansion coefficient of the component parts of the semiconductor device occurs. However, a good contact surface can be obtained in electrical connection between the external electrode portion 33b and another board. Even if there is a warp in another board in addition to the warp that occurs in the semiconductor device 30 itself, the external electrode portion 33b does not necessarily come into contact with the connection part of the other board and lift up.

FIG. 1A is a cross-sectional view showing the configuration of the semiconductor device according to the first embodiment of the present invention, and FIG. 1B is a bottom view of FIG. FIG. 2A is a plan view of a lead frame used as the wiring substrate of the first embodiment arranged in a single row, and FIG. 2B is a view taken along line IIb-IIb in FIG. 2A. FIG. FIG. 3A is an explanatory diagram illustrating the method for manufacturing the semiconductor device according to the first embodiment. FIG. 3A is an electrical connection between the semiconductor chip mounted on the lead frame in which the thin portion and the lead electrode are formed and the lead electrode. FIG. 3B is a cross-sectional view showing a state where the upper die and the lower die are attached and sealed with a resin, and FIG. 3C is for forming the external electrode portion. FIG. 3D is a cross-sectional view showing a state in which an etching resist film is attached, FIG. 3D is a cross-sectional view showing a state in which the external electrode portion is projected by etching, and FIG. It is sectional drawing which shows the state attached. 4 (a) is a plan view of a lead frame used as another wiring substrate in the first embodiment of the present invention, and FIGS. 4 (b) and 4 (c) are arrows IVb- in FIG. 4 (a). It is sectional drawing seen from IVb and arrow IVc-IVc line. FIG. 5A is a plan view of a lead frame used as another wiring substrate according to the first embodiment of the present invention, and FIG. 5B is a cross-sectional view taken along line Vb-Vb in FIG. 5A. FIG. It is sectional drawing of the semiconductor device which shows Embodiment 1 of this invention. It is sectional drawing which shows the structure of the other semiconductor device in Embodiment 1 of this invention. It is sectional drawing which shows the structure of the other semiconductor device in Embodiment 1 of this invention. FIG. 8A is a cross-sectional view showing the configuration of the semiconductor device according to the second embodiment of the present invention, and FIG. 8B is a bottom view of FIG. 8A. FIG. 9A is a plan view of a lead frame used as the wiring substrate of the second embodiment arranged in a single row, and FIG. 9B is a view from the arrow IXb-IXb line in FIG. 9A. FIG. FIG. 9 is an explanatory view showing a method for manufacturing a semiconductor device according to a second embodiment, in which (a) shows an electrical connection between a semiconductor chip and a lead electrode mounted on a lead frame in which a thin portion, a lead electrode, and an auxiliary electrode are formed; A cross-sectional view showing a state of being connected to the upper part, (b) is a cross-sectional view showing a state in which an upper mold and a lower mold are attached and sealed with resin, and (c) is for forming an external electrode portion It is sectional drawing which shows the state in which the resist film for etching was formed, (d) is sectional drawing which shows the state which protruded the external electrode part by the etching. FIG. 11A is a cross-sectional view showing a configuration of a conventional semiconductor device, and FIG. 11B is a bottom view of FIG. FIG. 12 is a plan view showing a lead frame used in a conventional BGA type semiconductor device arranged in a single row. It is explanatory drawing which shows the manufacturing method of the conventional BGA type | mold semiconductor device, (a) is sectional drawing of the lead frame which shows the cross section of FIG.12 (c), When that (b) seals with resin, sealing metal Sectional drawing which shows the state which attached the type | mold, (c) shows sectional drawing which completed the assembly process before attaching a solder ball.

Explanation of symbols

  21, 31 Semiconductor chip 21a, 31a Upper surface 21b, 31b Lower surface 23, 33 Lead electrode 23a, 33a Internal lead portion 23b, 33b External electrode portion 24, 34 Connection means 25, 35 Sealing resin layer 36 Auxiliary electrode 60, 70 Lead frame 60a, 70a Upper surface 60b, 70b Lower surface 60c, 70c 1st thin part 60d, 70d 1st thick part 60e, 70e 2nd thin part 60f, 70f 3rd thin part 60g, 70g 2nd thick part 70h 4th thin part 70i 3rd thick part

Claims (1)

Consists of a plate-like body having a plurality of regions with an uneven upper surface and a flat lower surface,
Each of the plurality of regions of the plate-like body
A thick first portion for mounting a first semiconductor chip having a plurality of pad electrodes;
A plurality of first thick portions provided to form each external electrode portion arranged corresponding to the pad electrode of the first semiconductor chip outside the first portion;
A thin second portion for mounting a second semiconductor chip having a plurality of pad electrodes;
A plurality of second thick portions provided to form each external electrode portion arranged corresponding to the pad electrode of the second semiconductor chip outside the second portion;
Using a lead frame comprising a thin portion provided so as to surround each of the plurality of first thick portions and the plurality of second thick portions,
Electrically connecting the plurality of pad electrodes of the first semiconductor chip mounted on the first portion and the plurality of first thick portions with a first connecting means;
Furthermore, after electrically connecting the plurality of pad electrodes of the second semiconductor chip mounted on the second portion and the plurality of second thick portions by the second connecting means,
The first and second semiconductor chips, the top surfaces of the plurality of first thick portions, the top surfaces of the plurality of second thick portions, the top surfaces of the thin portions, and the connecting means are encapsulated resin layers Sealed together,
By removing the thin portion and the thin second portion by etching, the plurality of first thick portions are electrically separated from each other as external electrode portions constituting a connection portion to the outside, and the plurality The second thick portion is electrically isolated from each other as an external electrode portion constituting a connection portion to the outside.

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