JP2002164497A - Semiconductor device and method for manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve reliability by preventing a package crack even if a encap sulation resin and a die pad are delaminated. SOLUTION: A die pad 2 formed in a P-VQFN semiconductor device has a surface area of an opposite surface to a chip mounting surface, that is an encapsulation resin adherence surface, smaller than a surface area of a mounting surface where a semiconductor chip 4 is mounted and the side surfaces of four sides in the die pad have inclinations respectively. It is possible to disperse the stress and prevent generation of cracks reaching to the surface of the package 7 by the inclinations of the side surface even if the die pad 2 expands or shrinks.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for improving connection reliability in a semiconductor device, and more particularly, to P-VQFN.
(Plastic Very Fine Fine Quad F
The present invention relates to a technique which is effective when applied to secure a sufficient stand-off in a semiconductor device (lat Non-leaded package).

[0002]

2. Description of the Related Art According to studies made by the present inventor, there is a P-VQFN semiconductor device as one of surface mounting packages. The P-VQFN type semiconductor device has a configuration in which a plurality of electrode pads are provided on four side surfaces of a package.

In this semiconductor device, a die pad on which a semiconductor chip is mounted is smaller than the semiconductor chip.
Some die pads and semiconductor chips are sealed with a mold resin.

Japanese Patent Application Laid-Open No. Hei 10-189830 discloses an example of this type of semiconductor device in detail, which describes a QFN type semiconductor device.

[0005]

However, the present inventor has found that the above-described semiconductor device has the following problems.

That is, since the die pad is smaller than the semiconductor chip, a part of the semiconductor chip protruding from the die pad is directly sealed with the mold resin. As a result, the mold resin and the die pad may peel off.

[0007] When the peeling of the mold resin and the die pad progresses, the peeling propagates on the side surface of the die pad and eventually develops into a package crack, which may impair the reliability of the semiconductor device.

An object of the present invention is to provide a semiconductor device capable of preventing a package crack even if a mold resin and a die pad are peeled off and greatly improving reliability.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0010]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, a semiconductor device according to the present invention is arranged such that a semiconductor chip having a surface electrode formed on a surface thereof, a square die pad on which the semiconductor chip is mounted, and a periphery of the die pad. A mounting surface for a die pad on which a semiconductor chip is mounted, comprising a plurality of electrode portions connected to the surface electrode via a connection member, and a plurality of electrode portions, a semiconductor chip, a die pad, and a sealing portion for sealing the connection member. Is larger than the surface area of the other main surface on the opposite side.

Further, the semiconductor device of the present invention is arranged such that a semiconductor chip having a surface electrode formed on a surface thereof, a square die pad on which the semiconductor chip is mounted, and a periphery of the die pad. A plurality of electrode portions connected via the surface electrode and the connection member, a plurality of electrode portions,
A semiconductor chip, a die pad, and a sealing portion for sealing a connection member, wherein the surface area of the mounting surface of the die pad on which the semiconductor chip is mounted is larger than the surface area of the other main surface on the opposite side. The slope is formed on each side.

Further, the semiconductor device of the present invention is arranged so that a semiconductor chip having a surface electrode formed on a surface thereof, a square die pad on which the semiconductor chip is mounted, and a periphery of the die pad. A mounting surface for a die pad on which a semiconductor chip is mounted, comprising a plurality of electrode portions connected to the surface electrode via a connection member, and a plurality of electrode portions, a semiconductor chip, a die pad, and a sealing portion for sealing the connection member. Is larger than the surface area of the other main surface on the opposite side, the slope is formed on each of the four side surfaces of the die pad, and at least one contact hole for bringing the sealing portion into close contact with the other main surface of the die pad. Is provided.

Further, a method of manufacturing a semiconductor device according to the present invention
A die pad for mounting a semiconductor chip having a surface area of a mounting surface larger than the surface area of the other main surface on the opposite side and having a slope formed on each of four side surfaces; A step of preparing a lead frame on which a plurality of electrode portions corresponding to the electrodes are formed,
Joining the semiconductor chip and the die pad, connecting the surface electrode of the semiconductor chip and the corresponding electrode portion with a connection member, covering the semiconductor chip, the die pad, and the connection member with a sealing resin, The method includes a step of exposing the electrode portion to the mounting surface side of the device and performing resin molding to form a sealing portion, and a process of separating the electrode portion from the frame portion of the lead frame and forming an external electrode portion. .

Further, according to the method of manufacturing a semiconductor device of the present invention, the surface area of the mounting surface on which the semiconductor chip is mounted is larger than the surface area of the other main surface on the opposite side, and the inclination is formed on each of the four side surfaces. On the other main surface opposite to the mounting surface,
A step of preparing a lead frame in which a die pad provided with at least one contact hole for making the sealing portion adhere, and a plurality of electrode portions arranged around the die pad and corresponding to surface electrodes of the semiconductor chip are formed. Bonding the semiconductor chip and the die pad, connecting the surface electrode of the semiconductor chip and the corresponding electrode portion with a connecting member, covering the semiconductor chip, the die pad, and the connecting member with a sealing resin. Having a step of exposing the electrode portion to the mounting surface side of the semiconductor device and performing resin molding to form a sealing portion, and a process of separating the electrode portion from the frame portion of the lead frame and forming an external electrode portion It is.

As described above, cracks reaching the surface of the sealing portion of the semiconductor device can be prevented, and the reliability of the semiconductor device can be improved.

[0017]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a perspective view of a semiconductor device according to a first embodiment of the present invention, FIG. 2 is a bottom view of the semiconductor device of FIG. 1, FIG. 3 is a cross-sectional view of the semiconductor device of FIG.
8 are explanatory diagrams of the manufacturing process in the semiconductor device of FIG. 1, FIG. 9 is a flowchart of the manufacturing process in the semiconductor device of FIG. 1, and FIG. 10 is a sectional view of the semiconductor device studied by the present inventors.

In the present embodiment, the semiconductor device 1
P-VQ, one of the non-lead surface mount type packages
Consists of FN. As shown in FIGS. 1 to 3, the semiconductor device 1 has a die pad 2 located at the center, and a semiconductor chip 4 is bonded and fixed on the die pad 2 via an adhesive 3 such as a silver paste adhesive. Have been.

The die pad 2 has a surface opposite to the mounting surface on which the semiconductor chip 4 is mounted, that is, a contact surface on which the sealing resin adheres, is smaller than a mounting surface on which the semiconductor chip 4 is mounted. It is formed so as to be inclined. In addition, a plurality of inner leads 5 are located near the periphery of the four sides of the semiconductor chip 4.

The tips of the inner leads 5 and the electrodes (surface electrodes) formed on the semiconductor chip 4 are electrically connected by bonding wires (connection members) 6 made of gold wire or the like.

Further, the semiconductor chip 4, the inner leads 5, and the bonding wires 6 are sealed with a thermosetting sealing resin to form a rectangular package (sealing portion).
7 are formed.

A plurality of external electrodes 8 are formed on four sides of the package 7. The external electrode 8 is formed so as to be exposed from the mounting surface to the side surface of the package 7. The surface of the external electrode 8 is, for example, plated with solder by electrolytic plating or the like.

These external electrodes 8 are overlapped with lands serving as connection electrodes formed on a printed wiring board on which electronic components and the like are mounted when the semiconductor device 1 is mounted, and are electrically connected to each other.

Next, a method of manufacturing a semiconductor device according to the present embodiment will be described with reference to FIGS. 1 to 3 and FIGS.

First, a lead frame is prepared (step S101). The lead frame is formed, for example, by etching or pressing a metal plate made of iron or copper and patterning the plate.

The lead frame has a metal ribbon structure in which the above-described die pad 2, inner lead 5, and outer lead 9 serving as an external electrode portion are formed, and several or more of these patterns are connected.

As described above, the side surface of the die pad 2 has a surface area of the mounting surface so as to be inclined from the mounting surface on which the semiconductor chip 4 is mounted to the sealing resin adhesion surface (opposite to the mounting surface). The surface area on the opposite surface is smaller than that on the opposite side. The inclination of the side surface of the die pad 2 is formed by, for example, an etching process.

Then, as shown in FIG.
Apply adhesive 3 such as silver paste adhesive to the mounting surface of
As shown in FIG. 5, the semiconductor chip 4 is mounted and adhered and fixed (Step S102).

After that, as shown in FIG. 6, the electrodes 4a of the semiconductor chip 4 and the inner leads 5 of the lead frame are joined by bonding wires 6 and electrically connected (step S103).

As shown in FIG. 7, the lead frame to which the wire bonding has been performed is resin-sealed by forming a semiconductor mold using a molding apparatus, and a package 7 is formed as shown in FIG. 8 (step S104).

The molding device sandwiches the outer leads 9 of the lead frame in the thickness direction of the lead frame, and transfers the sealing resin J from the gates of the molds K1 and K2 provided near the leads supporting the die pad 3 to the cavities. The package 7 is formed by injection. Therefore, the outer leads 9 are exposed on the mounting surface of the package 7.

Thereafter, the outer leads 9 of the lead frame on which the package 7 is formed are plated with solder, for example, by electrolytic plating or the like (step S10).
5), these plated outer leads 9
The package 7 is cut from the side surface so as to be flat without any step (Step S106), and the external electrodes 8 serving as external lead lines are formed, and the semiconductor device 1 shown in FIGS. 1 to 3 is completed (Step S108). .

As shown in FIG. 8, the semiconductor device 1 as a product overlaps with the lands formed on the printed wiring board P, which is a mounting board, and is electrically connected by reflow soldering or the like. Mounted on a board.

Here, a technique for preventing a package crack in the semiconductor device 1 using the die pad 2 having a slope formed on the side surface will be described.

For example, when the semiconductor device 1 is heated (or cooled), the die pad 2 expands (or contracts) in the plane direction of the die pad 2 due to a difference in thermal expansion coefficient or the like.

The package 7 has a smaller amount of expansion (or shrinkage) than the die pad 2 due to a difference in thermal expansion coefficient and the like. Therefore, stress is concentrated on the interface between the die pad 2 and the package 7.

At this time, since the slope is formed on the side surface of the die pad 2, the stress is dispersed along the slope formed on the side surface of the die pad 2, and cracks reaching the surface of the package 7 are formed. Will be prevented.

Further, since the stress is distributed along the slope, even when a strong stress is applied, the die pad 2
Only the package 2 is peeled off along the sealing resin contact surface, and the package crack from the die pad 2 to the surface of the package 7 can be prevented.

On the other hand, the semiconductor device 30 examined by the present inventor
Is shown in FIG. In this semiconductor device 30, the configuration of a die pad 31, an adhesive 32, a semiconductor chip 33, an inner lead 34, a bonding wire 35, a package 36, and an external electrode 37 is the same as that of the semiconductor device 1. The difference is that no slope is formed. That is, the surface area of the mounting surface of the semiconductor chip 4 is the same as that of the opposite surface, and the side surface is formed perpendicular to the plane direction of the die pad 31.

In this case, when the die pad 31 expands (or contracts) in the plane direction of the die pad 31, stress concentrates on the interface between the die pad 31 and the package 36, so that the side of the die pad 31 faces the mounting surface of the package 36. Then, a crack is generated, and the crack CK eventually progresses to the surface of the package 36.

Thus, according to the present embodiment, cracks in the package 7 can be prevented by the die pad 2 having slopes formed on the four side surfaces, so that the reliability of the semiconductor device 1 is improved. Can be.

In the present embodiment, the die pad 2 has a shape in which the four side surfaces are inclined. For example, the die pad 2a of the semiconductor device 1a has four side surfaces as shown in FIG. Alternatively, holes HP may be provided by dimple processing or the like on the sealing resin contact surface of the die pad 2 (FIG. 3) having the respective inclinations.

As a result, the surface area of the sealing resin contact surface with the die pad 2a is increased, so that the die pad 2a and the package 7 can be more strongly adhered to each other. Can be prevented.

Further, in this embodiment, the case where the surface area of the sealing resin contact surface is made smaller than that of the mounting surface of the semiconductor chip and the four sides of the die pad are inclined on the side surface is shown in FIG. As described above, the semiconductor device 1b
The side surfaces of the four sides of the die pad 2b may be rounded with an R.

This also prevents the package 7 from cracking, so that the reliability of the semiconductor device 1 can be improved.

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above embodiments, and various modifications may be made without departing from the gist of the invention. Needless to say, it can be changed.

For example, in the above embodiment, P-VQ
Although the FN type semiconductor device has been described, the QFP (Quu
A configuration may be adopted in which a side surface of a die pad provided in a semiconductor device of the “ad flat package” type is formed with a slope to prevent a package crack.

In this case, the semiconductor device 1c of the QFP type
As shown in FIG. 13, the die pad 2c located at the center
A semiconductor chip 4 is bonded and fixed thereon via an adhesive 3 such as a silver paste adhesive, and the die pad 2c is
It is a so-called small tab type having a smaller surface area than the semiconductor chip 4.

A plurality of inner leads 5 are located near the four sides of the semiconductor chip 4, and the tips of the inner leads 5 and the electrodes formed on the semiconductor chip 4 are bonded by gold wires or the like. They are electrically connected by wires 6 respectively.

Further, the semiconductor chip 4, the inner leads 5, and the bonding wires 6 are sealed with a thermosetting sealing resin to form a rectangular package 7, and gull wings are formed from four sides of the package 7. The external connection terminal 10 has a protruding shape.

Also in this semiconductor device 1c, the die pad 2c has a surface opposite to the mounting surface on which the semiconductor chip 4 is mounted, that is, a sealing resin contact surface is smaller than the mounting surface. It is formed so as to be inclined.

As a result, even if stress is applied between the die pad 2c and the package 7, the stress is dispersed along the slope formed on the side surface of the die pad 2c, and cracks reaching the surface of the package 7 are prevented. Can be prevented.

[0054]

Advantageous effects obtained by typical ones of the inventions disclosed by the present application will be briefly described as follows.
It is as follows.

(1) According to the present invention, by forming a slope on each side surface of the die pad, it is possible to prevent package cracks in the sealing portion due to concentration of stress.

(2) In the present invention, according to the above (1), the reliability of the semiconductor device can be improved and the production yield can be improved.

[Brief description of the drawings]

FIG. 1 is a perspective view of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a bottom view of the semiconductor device of FIG. 1;

FIG. 3 is a sectional view of the semiconductor device of FIG. 1;

FIG. 4 is an explanatory view of a manufacturing process in the semiconductor device of FIG. 1;

FIG. 5 is an explanatory view of the semiconductor device manufacturing process following FIG. 4;

FIG. 6 is an explanatory view of the manufacturing process of the semiconductor device, following FIG. 5;

FIG. 7 is an explanatory view of the semiconductor device manufacturing process following FIG. 6;

FIG. 8 is an explanatory view of the manufacturing process of the semiconductor device, following FIG. 7;

FIG. 9 is a flowchart of a manufacturing process in the semiconductor device of FIG. 1;

FIG. 10 is a sectional view of a semiconductor device studied by the present inventors.

FIG. 11 is a sectional view showing an example of a semiconductor device according to another embodiment of the present invention.

FIG. 12 is a sectional view showing another example of a semiconductor device according to another embodiment of the present invention.

FIG. 13 is a sectional view showing an example of a semiconductor device according to another embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor device 1a-1c Semiconductor device 2 Die pad 2a-2c Die pad 3 Adhesive material 4 Semiconductor chip 5 Inner lead 6 Bonding wire (connection member) 7 Package (sealing part) 8 External electrode 9 Outer lead 10 External connection terminal HP hole J sealing Stopping resin K1, K2 Mold die 30 Semiconductor device 31 Die pad 32 Adhesive material 33 Semiconductor chip 34 Inner lead 35 Bonding wire 36 Package 37 External electrode

Claims (5)

[Claims] 1. A semiconductor chip having a surface electrode formed on a surface thereof, a square die pad on which the semiconductor chip is mounted, and a semiconductor chip arranged to surround a periphery of the die pad. A semiconductor device comprising: a plurality of electrode units connected via a wire; and a plurality of the electrode units, the semiconductor chip, the die pad, and a sealing unit for sealing the connection member, wherein the semiconductor chip is mounted. A semiconductor device, wherein the surface area of the mounting surface of the die pad is larger than the surface area of the other main surface on the opposite side. 2. A semiconductor chip having a surface electrode formed on a surface thereof, a square die pad on which the semiconductor chip is mounted, and a semiconductor chip arranged so as to surround a periphery of the die pad. A semiconductor device comprising: a plurality of electrode units connected via a wire; and a plurality of the electrode units, the semiconductor chip, the die pad, and a sealing unit for sealing the connection member, wherein the semiconductor chip is mounted. A semiconductor device, wherein a surface area of a mounting surface of the die pad is larger than a surface area of another main surface on an opposite side, and inclinations are formed on four side surfaces of the die pad, respectively. 3. A semiconductor chip having a surface electrode formed on a surface thereof, a square die pad on which the semiconductor chip is mounted, and a semiconductor chip arranged so as to surround a periphery of the die pad. A semiconductor device comprising: a plurality of electrode units connected via a wire; and a plurality of the electrode units, the semiconductor chip, the die pad, and a sealing unit for sealing the connection member, wherein the semiconductor chip is mounted. The surface area of the mounting surface of the die pad is larger than the surface area of the other main surface on the opposite side, and slopes are formed on four side surfaces of the die pad, respectively.
A semiconductor device, wherein at least one contact hole for contacting the sealing portion is provided on another main surface of the die pad. 4. A die pad for mounting a semiconductor chip having a surface area of a mounting surface larger than a surface area of the other main surface on the opposite side and having a slope formed on each of four side surfaces, and a die pad disposed on a periphery of the die pad. Preparing a lead frame on which a plurality of electrode portions corresponding to surface electrodes of the semiconductor chip are formed; bonding the semiconductor chip and the die pad; and corresponding to the surface electrodes of the semiconductor chip. Connecting the electrode portion with a connection member, covering the semiconductor chip, the die pad, and the connection member with a sealing resin, and exposing the electrode portion to the mounting surface side of the semiconductor device, and performing resin molding. Forming a sealing portion; and separating the electrode portion from a frame portion of the lead frame to form an external electrode portion. The method of manufacturing a semiconductor device according to. 5. A mounting surface on which the semiconductor chip is mounted is larger than a surface area of the other main surface on the opposite side, and slopes are formed on four side surfaces, respectively, and the other main surface on the opposite surface is opposite to the mounting surface. A lead having a surface provided with at least one contact hole for bringing the sealing portion into close contact with each other, and a plurality of electrode portions disposed around the die pad and corresponding to surface electrodes of the semiconductor chip; A step of preparing a frame; a step of joining the semiconductor chip and the die pad; a step of connecting a surface electrode of the semiconductor chip and the corresponding electrode portion with a connection member; the semiconductor chip and the die pad And a step of covering the connection member with a sealing resin and exposing the electrode portion to the mounting surface side of the semiconductor device and performing resin molding to form a sealing portion. Separating the electrode portion from the frame portion of the lead frame to form an external electrode portion.