JP2003170465A - Method for manufacturing semiconductor package and sealing mold therefor - Google Patents
Method for manufacturing semiconductor package and sealing mold thereforInfo
- Publication number
- JP2003170465A JP2003170465A JP2001369397A JP2001369397A JP2003170465A JP 2003170465 A JP2003170465 A JP 2003170465A JP 2001369397 A JP2001369397 A JP 2001369397A JP 2001369397 A JP2001369397 A JP 2001369397A JP 2003170465 A JP2003170465 A JP 2003170465A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- resin
- sealing
- semiconductor package
- adhesive film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Moulds For Moulding Plastics Or The Like (AREA)
- Injection Moulding Of Plastics Or The Like (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、半導体パッケージ
の製造方法およびそのための封止金型に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor package and a sealing die for the same.
【0002】[0002]
【従来の技術】近年、電子機器の小型化や消費電力の増
大化が進むにつれ、半導体パッケージがプリント配線基
板に高密度に実装されるようになってきた。2. Description of the Related Art In recent years, with the miniaturization of electronic equipment and the increase of power consumption, semiconductor packages have been mounted on a printed wiring board at a high density.
【0003】図6はCSPと呼ばれる小型の半導体パッ
ケージの一例を示す。この半導体パッケージ1では、配
線基板2の上面に接着剤などを介して半導体チップ3が
接合され、この半導体チップ3の上面の周縁部に形成さ
れた電極パッド(図示せず)と、前記配線基板2の上面
の周縁部に形成された接続電極(図示せず)とが、ボン
ディングワイヤ4によって電気的に接続され、半導体チ
ップ3、ボンディングワイヤ4、および配線基板2の上
部が樹脂パッケージ5(封止樹脂)で覆われている。配
線基板2の下面には、前記接続電極に対してスルーホー
ル内のコンタクトにより電気的に接続された外部接続電
極6が形成されていて、この外部接続電極6によって、
プリント配線基板(図示せず)などに電気的に接続され
るようになっている。FIG. 6 shows an example of a small semiconductor package called CSP. In this semiconductor package 1, a semiconductor chip 3 is joined to the upper surface of a wiring board 2 with an adhesive or the like, and electrode pads (not shown) formed on the peripheral portion of the upper surface of the semiconductor chip 3 and the wiring board. 2 is electrically connected to a connection electrode (not shown) formed on the peripheral portion of the upper surface of the semiconductor chip 3, the bonding wire 4 and the upper portion of the wiring board 2 by the resin package 5 (sealed). Resin). An external connection electrode 6 electrically connected to the connection electrode by a contact in a through hole is formed on the lower surface of the wiring board 2. By the external connection electrode 6,
It is adapted to be electrically connected to a printed wiring board (not shown) or the like.
【0004】このような半導体パッケージ1の配線基板
2としては、高密度配線が可能で、かつ高熱伝導性等の
特性を備えたセラミック配線基板が重用されてきてい
る。一方、樹脂封止には、半導体チップ3と配線基板2
とを封止金型のキャビティ内に配置し、このキャビティ
内に樹脂注入するトランスファーモールド工法が重用さ
れている。なぜなら、ポッティング樹脂封止工法や樹脂
印刷封止工法などの他の封止工法に比べて、高生産性で
あり、自動化が容易である、等の利点を有するからであ
る。As the wiring board 2 of such a semiconductor package 1, a ceramic wiring board which is capable of high-density wiring and has characteristics such as high thermal conductivity has been widely used. On the other hand, for resin sealing, the semiconductor chip 3 and the wiring substrate 2 are used.
A transfer molding method is widely used, in which and are placed in a cavity of a sealing die, and resin is injected into the cavity. This is because it has advantages such as higher productivity and easier automation than other sealing methods such as the potting resin sealing method and the resin printing sealing method.
【0005】したがって、セラミック配線基板を使用し
トランスファーモールド工法によって封止する、という
半導体パッケージの製造方法が望まれるわけであるが、
セラミック配線基板は、硬くて脆いという性質を有して
いるため、封止金型で直接にクランプする通常の製造方
法ではクラックが生じることがある。Therefore, there is a demand for a method of manufacturing a semiconductor package in which a ceramic wiring board is used and sealing is performed by a transfer molding method.
Since the ceramic wiring board has the property of being hard and brittle, cracks may occur in the usual manufacturing method of directly clamping with a sealing die.
【0006】この問題を解決する方法は、例えば特開2
000−133748号公報に開示されている。同公報
に記載された樹脂封止工程を図7によって説明する。セ
ラミック配線基板2を、外部接続電極6が形成された下
面の少なくとも周縁部(全面でもよい)において、接着
フィルム7を介して枠体8に固定する。また、セラミッ
ク配線基板2の上面に半導体チップ3を接合し、この半
導体チップ2の電極パッド(図示せず)と基板上面の接
続電極(図示せず)とをボンディングワイヤ4により電
気的に接続する。A method for solving this problem is disclosed in, for example, Japanese Patent Laid-Open No.
No. 000-133748. The resin sealing process described in the publication will be described with reference to FIG. The ceramic wiring board 2 is fixed to the frame body 8 via the adhesive film 7 at least at the peripheral portion (may be the entire surface) of the lower surface on which the external connection electrodes 6 are formed. Further, the semiconductor chip 3 is joined to the upper surface of the ceramic wiring board 2, and the electrode pads (not shown) of the semiconductor chip 2 and the connection electrodes (not shown) on the upper surface of the substrate are electrically connected by the bonding wires 4. .
【0007】次いで、この枠体8に固定されたセラミッ
ク配線基板2を封止金型9の下金型9aの所定位置に配
置し、枠体8を、凹部を持った上金型9bとの間でクラ
ンプする。それにより、下金型9a,枠体8,上金型9
bからなるキャビティ10内に半導体チップ3,ボンデ
ィングワイヤ4,セラミック配線基板2の上部が内包さ
れた状態となるので、このキャビティ10内に、溶融さ
れた封止樹脂11を上金型9b,枠体8間の樹脂注入口
12から注入する。封止樹脂11が硬化したら完成品を
取り出す。Next, the ceramic wiring board 2 fixed to the frame body 8 is arranged at a predetermined position of the lower die 9a of the sealing die 9, and the frame body 8 is combined with the upper die 9b having a recess. Clamp between. Thereby, the lower mold 9a, the frame body 8, the upper mold 9
Since the semiconductor chip 3, the bonding wire 4, and the upper portion of the ceramic wiring board 2 are enclosed in the cavity 10 formed by b, the molten sealing resin 11 is placed in the cavity 10 in the upper mold 9b and the frame. It is injected from the resin injection port 12 between the bodies 8. When the sealing resin 11 is cured, the finished product is taken out.
【0008】このような製造方法によれば、セラミック
配線基板2を固着した枠体8を封止金型9によってクラ
ンプするので、上述したようなセラミック配線基板2の
破損は回避できる。つまり、セラミック配線基板2を使
用し、かつ、トランスファーモールド工法を採用すると
いう半導体パッケージ1の製造方法を実現できる。な
お、セラミック配線基板2を接着フィルム7に固着して
いるのは、外部接続電極6を形成しているセラミック配
線基板2の下面に封止樹脂が付着するのを防ぐためであ
る。According to such a manufacturing method, since the frame body 8 to which the ceramic wiring board 2 is fixed is clamped by the sealing die 9, the damage to the ceramic wiring board 2 as described above can be avoided. That is, the manufacturing method of the semiconductor package 1 that uses the ceramic wiring substrate 2 and adopts the transfer molding method can be realized. The ceramic wiring board 2 is fixed to the adhesive film 7 in order to prevent the sealing resin from adhering to the lower surface of the ceramic wiring board 2 forming the external connection electrodes 6.
【0009】[0009]
【発明が解決しようとする課題】しかしながら、上記し
たようにして枠体8をクランプする方法は、セラミック
配線基板2を直接にクランプする方法に比べて、基板下
面側への樹脂漏れが発生しやすい。これは、樹脂注入口
12がセラミック配線基板2の側方に配置されているた
め、封止樹脂11はセラミック配線基板2の側面に垂直
に加圧されるように注入され、その際にセラミック配線
基板2と接着フィルム7との間で剥離が生じ、封止樹脂
11が浸入してしまうためである。However, in the method of clamping the frame body 8 as described above, resin leakage to the lower surface side of the board is more likely to occur than in the method of directly clamping the ceramic wiring board 2. . This is because the resin injection port 12 is disposed on the side of the ceramic wiring board 2 so that the sealing resin 11 is injected so as to be vertically pressurized on the side surface of the ceramic wiring board 2, and the ceramic wiring is then applied. This is because peeling occurs between the substrate 2 and the adhesive film 7 and the sealing resin 11 enters.
【0010】つまり、セラミック配線基板2と接着フィ
ルム7とは、接着フィルム7の粘着力のみの弱い力で接
着している。一方、封止樹脂11はセラミック配線基板
2の側面方向からキャビティ10内に流入するため、セ
ラミック配線基板2の側面に樹脂注入圧がかかり、セラ
ミック配線基板2から接着フィルム7を剥離させる方向
の力が発生する。この剥離力がセラミック配線基板2と
接着フィルム7との接着力よりも大きくなると、セラミ
ック配線基板2から接着フィルム7が剥離され、その間
隙に封止樹脂11が浸入して基板下面側へ回り込むので
ある。That is, the ceramic wiring board 2 and the adhesive film 7 are adhered by a weak force only by the adhesive force of the adhesive film 7. On the other hand, since the sealing resin 11 flows into the cavity 10 from the side surface direction of the ceramic wiring board 2, a resin injection pressure is applied to the side surface of the ceramic wiring board 2 and a force in a direction for separating the adhesive film 7 from the ceramic wiring board 2. Occurs. When this peeling force becomes larger than the adhesive force between the ceramic wiring board 2 and the adhesive film 7, the adhesive film 7 is peeled from the ceramic wiring board 2, and the sealing resin 11 penetrates into the gap and wraps around to the lower surface side of the substrate. is there.
【0011】このような場合に、セラミック配線基板2
の下面に形成された外部接続電極6に封止樹脂11が付
着することがあり、樹脂付着が発生した半導体パッケー
ジ1は、電気機器の配線基板との電気接続を良好に保つ
のが難しくなる。In such a case, the ceramic wiring board 2
The sealing resin 11 may adhere to the external connection electrodes 6 formed on the lower surface of the semiconductor package 1, and it becomes difficult for the semiconductor package 1 with the resin adhesion to maintain good electrical connection with the wiring board of the electric device.
【0012】本発明は上記問題を解決するもので、セラ
ミック配線基板などを用いてトランスファーモールド工
法により樹脂封止する際に、基板下面に封止樹脂が付着
しないようにすることを目的とする。An object of the present invention is to solve the above problems and to prevent the sealing resin from adhering to the lower surface of the substrate when resin-sealing by a transfer molding method using a ceramic wiring substrate or the like.
【0013】[0013]
【課題を解決するための手段】上記課題を解決するため
に、請求項1記載の発明は、配線基板を接着フィルムを
介して枠体の内周側に固定する工程と、前記配線基板の
上面に半導体素子を搭載する工程と、前記半導体素子を
搭載した配線基板が固定された枠体を上金型と下金型と
でクランプし、前記枠体の内側に形成されたキャビティ
に封止樹脂を注入して、前記キャビティに内包された半
導体素子および配線基板の上部を樹脂封止する工程とを
行なって半導体パッケージを製造するに際し、前記樹脂
封止する工程において、前記配線基板の上方より封止樹
脂を注入することを特徴とする。この構成によれば、封
止樹脂の注入圧が配線基板を接着フィルムに押し込む方
向に働くため、接着フィルムと配線基板との間に封止樹
脂が入り込むのを防止できる。よって、配線基板の下面
のコンタクトあるいは電極に封止樹脂が付着するのを防
止できる。In order to solve the above-mentioned problems, the invention according to claim 1 is to fix the wiring board to the inner peripheral side of the frame through an adhesive film, and the upper surface of the wiring board. A step of mounting a semiconductor element on the substrate, and a frame body to which the wiring board on which the semiconductor element is mounted is fixed, is clamped by an upper mold and a lower mold, and a sealing resin is formed in a cavity formed inside the frame body. And the step of resin-encapsulating the semiconductor element and the upper part of the wiring board enclosed in the cavity to manufacture a semiconductor package, in the step of resin-sealing, sealing from above the wiring board. It is characterized by injecting a stop resin. With this configuration, the injection pressure of the sealing resin acts in the direction of pushing the wiring board into the adhesive film, so that the sealing resin can be prevented from entering between the adhesive film and the wiring board. Therefore, it is possible to prevent the sealing resin from adhering to the contacts or electrodes on the lower surface of the wiring board.
【0014】請求項2記載の発明は、請求項1に記載の
半導体パッケージの製造方法において、配線基板がセラ
ミック配線基板であることを特徴とするもので、枠体を
封止金型でクランプする構成であるため、クラックが生
じやすいセラミック材料を用いたセラミック配線基板の
使用が可能になり、したがって高密度配線を実現でき
る。According to a second aspect of the present invention, in the method of manufacturing a semiconductor package according to the first aspect, the wiring board is a ceramic wiring board, and the frame is clamped by a sealing die. Because of the configuration, it is possible to use a ceramic wiring board using a ceramic material that easily causes cracks, and thus realize high-density wiring.
【0015】請求項3記載の発明は、請求項1に記載の
半導体パッケージの製造方法において、接着フィルム
が、接着剤層と基材とからなる2層構造であり、前記接
着剤層が、配線基板の下面に形成された電極の厚みより
も厚く設定されたことを特徴とするもので、電極による
凹凸形状に接着剤層が容易に追従するため、配線基板と
接着フィルムとの接着を良好に保つことができる。According to a third aspect of the present invention, in the method of manufacturing a semiconductor package according to the first aspect, the adhesive film has a two-layer structure including an adhesive layer and a base material, and the adhesive layer is a wiring. It is characterized in that it is set thicker than the thickness of the electrode formed on the lower surface of the substrate, and the adhesive layer easily follows the uneven shape due to the electrode, so that the adhesion between the wiring substrate and the adhesive film is improved. Can be kept.
【0016】請求項4記載の発明は、請求項1に記載の
半導体パッケージの製造方法において、封止樹脂の注入
を、外周縁部10%を除いた前記配線基板の中央部の上
方より行なうことを特徴とする。一般に、外周縁部の上
方から封止樹脂を注入すると、樹脂注入経路の延長部が
配線基板の外周端に近くなるため、この外周端より外方
にある接着フィルムに、流動性の大きい封止樹脂から剥
離方向の力が作用し、配線基板と接着フィルムとの間に
封止樹脂が浸入することがある。このような現象を防止
できるのが、外周縁部10%を除いた前記配線基板の中
央部の上方である。ここで外周縁部10%とは、外周縁
から一定幅の領域であって、配線基板の上面全体の面積
の10%を占める領域をいう。According to a fourth aspect of the present invention, in the method of manufacturing a semiconductor package according to the first aspect, the injection of the sealing resin is performed from above the central portion of the wiring board excluding the outer peripheral edge portion 10%. Is characterized by. In general, when the sealing resin is injected from above the outer peripheral edge, the extension part of the resin injection path is close to the outer peripheral edge of the wiring board, so that the adhesive film outside this outer peripheral edge has a highly fluid sealing. A force in the peeling direction acts from the resin, and the sealing resin may penetrate between the wiring board and the adhesive film. Such a phenomenon can be prevented above the central portion of the wiring board except the outer peripheral edge portion 10%. Here, the outer peripheral edge portion 10% means a region having a constant width from the outer peripheral edge and occupying 10% of the total area of the upper surface of the wiring board.
【0017】請求項5記載の発明は、請求項3に記載の
半導体パッケージの製造方法において、接着フィルムの
基材がポリイミド樹脂よりなることを特徴とするもの
で、ポリイミド樹脂は高温環境下でも変形しにくいた
め、セラミック配線基板に半導体素子を固着する際、セ
ラミック配線基板と半導体素子とにボンディングワイヤ
を接合する際、および樹脂封止する際も、接着フィルム
とセラミック配線基板との密着を保つことができ、隙間
の発生を防止できる。According to a fifth aspect of the present invention, in the method of manufacturing a semiconductor package according to the third aspect, the base material of the adhesive film is made of a polyimide resin, and the polyimide resin is deformed even in a high temperature environment. Therefore, it is difficult to keep the adhesion between the adhesive film and the ceramic wiring board when fixing the semiconductor element to the ceramic wiring board, joining the bonding wire to the ceramic wiring board and the semiconductor element, and sealing with resin. It is possible to prevent the formation of gaps.
【0018】請求項6記載の発明は、半導体パッケージ
を製造する樹脂封止工程で使用される封止金型であっ
て、配線基板が接着フィルムを介して内周側に固定され
た枠体をクランプする上金型と下金型とからなり、上記
上金型は、前記配線基板およびその上面に搭載された半
導体素子を内包するキャビティを枠体の内側に形成する
凹部と、前記下金型上に設定された基板設置領域の上方
に開口した樹脂注入口とを有したことを特徴とする。According to a sixth aspect of the present invention, there is provided a sealing die used in a resin sealing process for manufacturing a semiconductor package, wherein a wiring board is fixed to an inner peripheral side through an adhesive film. The upper mold includes a lower mold and an upper mold for clamping. The upper mold has a recess for forming a cavity for enclosing the wiring board and a semiconductor element mounted on the upper surface thereof inside a frame, and the lower mold. It has a resin injection port opened above the substrate installation region set above.
【0019】請求項7記載の発明は、請求項6記載の封
止金型において、上金型の樹脂注入口は、下金型上に設
定された基板設置領域の外周縁部10%を除いた中央部
の上方に開口したことを特徴とする。According to a seventh aspect of the present invention, in the sealing die according to the sixth aspect, the resin injection port of the upper die excludes the outer peripheral edge portion 10% of the substrate installation area set on the lower die. It is characterized by opening above the central part.
【0020】[0020]
【発明の実施の形態】本発明の実施の形態における半導
体パッケージの製造方法を、図面を参照しながら説明す
る。完成品としての半導体パッケージは先に図6を用い
て説明した従来のものと同様なので、図6を援用して詳
しい説明を省略する。DESCRIPTION OF THE PREFERRED EMBODIMENTS A method of manufacturing a semiconductor package according to an embodiment of the present invention will be described with reference to the drawings. Since the semiconductor package as a finished product is the same as the conventional one described with reference to FIG. 6, detailed description thereof will be omitted with reference to FIG.
【0021】図1に示すように、ランド状の外部接続電
極6が下面に形成されたセラミック配線基板2を、その
下面の少なくとも周縁部において、接着フィルム7を介
して枠体8に固定する。この時には、セラミック配線基
板2と接着フィルム7との間に隙間が出来ないように固
着する。As shown in FIG. 1, the ceramic wiring substrate 2 having the land-shaped external connection electrodes 6 formed on the lower surface is fixed to the frame body 8 via the adhesive film 7 at least at the peripheral portion of the lower surface. At this time, the ceramic wiring board 2 and the adhesive film 7 are fixed so that no gap is formed between them.
【0022】このためには、接着フィルム7は、図2に
示すように、接着剤層7aと基材7bとからなる2層構
造とし、接着剤層7aは、タングステン等の金属で形成
されている外部接続電極6(厚み数ミクロンから数十ミ
クロン)による凹凸形状に追従できる厚さ、望ましくは
外部接続電極6の厚みよりも厚く設定しておく。基材7
bは、ポリイミド樹脂などの温度変化しにくい材料を用
いる。接着剤層7aはアクリル樹脂、熱可塑性ポリイミ
ド樹脂等を用いる。For this purpose, as shown in FIG. 2, the adhesive film 7 has a two-layer structure composed of an adhesive layer 7a and a base material 7b, and the adhesive layer 7a is made of a metal such as tungsten. The thickness of the external connection electrode 6 (thickness of several microns to several tens of microns) is set so as to be able to follow the uneven shape, and is preferably thicker than the thickness of the external connection electrode 6. Base material 7
For b, a material such as a polyimide resin that is unlikely to change in temperature is used. The adhesive layer 7a is made of acrylic resin, thermoplastic polyimide resin, or the like.
【0023】次に、セラミック配線基板2の上面に接着
剤などにより半導体チップ3を接合し、この半導体チッ
プ3の電極パッド(図示せず)とセラミック配線基板2
の上目の接続電極(図示せず)とをボンディングワイヤ
4により電気的に接続する。Next, the semiconductor chip 3 is bonded to the upper surface of the ceramic wiring board 2 with an adhesive or the like, and the electrode pads (not shown) of the semiconductor chip 3 and the ceramic wiring board 2 are bonded.
The upper connection electrode (not shown) is electrically connected by the bonding wire 4.
【0024】次に、図3に示すように、枠体8に固定さ
れたセラミック配線基板2を下金型7aの所定位置に配
置し、枠体8を、上金型7bとの間でクランプして、下
金型7a,枠体8,上金型7bからなるキャビティ10
内に、半導体チップ3,ボンディングワイヤ4,セラミ
ック配線基板2の上部を内包する。Next, as shown in FIG. 3, the ceramic wiring board 2 fixed to the frame body 8 is placed at a predetermined position of the lower mold 7a, and the frame body 8 is clamped between the upper mold 7b and the frame body 8. Then, the cavity 10 composed of the lower mold 7a, the frame body 8 and the upper mold 7b.
The semiconductor chip 3, the bonding wires 4, and the upper part of the ceramic wiring board 2 are included therein.
【0025】このためには、下金型7aは、凹状のワー
ク保持部9cなど、接着フィルム7,セラミック配線基
板2,枠体8を所定の設置位置に位置決めし、セラミッ
ク配線基板2の上部を所望高さだけ露出させ得る構造を
備えたものを用いる。上金型9bは、半導体チップ3,
ボンディングワイヤ4,セラミック配線基板2の上部を
内包できるキャビティ104を構成する幅寸法と高さ寸
法とを持った凹部9dと、下金型9aの基板設置位置の
上方に相応するように凹部の中央部に開口した樹脂注入
口12とを備えたものを用いる。図示を省略するが、上
金型9bには、樹脂注入口12に連通し、内部に投入さ
れる固形熱硬化性樹脂などの封止樹脂を加熱溶融するポ
ットと、このポット内で溶融された封止樹脂を突き上げ
るプランジャーと呼ばれる突き上げ治具とを設け、上金
型9bと下金型9aのいすれかには、キャビティ内の空
気を排出するための排気孔を設けておく。For this purpose, the lower die 7a positions the adhesive film 7, the ceramic wiring board 2, and the frame body 8 such as the concave work holding portion 9c at a predetermined installation position, and the upper portion of the ceramic wiring board 2 is positioned. A structure having a structure capable of exposing a desired height is used. The upper die 9b includes the semiconductor chip 3 and
A recess 9d having a width dimension and a height dimension that form a cavity 104 capable of containing the bonding wire 4 and the upper portion of the ceramic wiring substrate 2, and a center of the recess portion corresponding to above the substrate installation position of the lower mold 9a. A resin injection port 12 that is opened in the section is used. Although illustration is omitted, the upper mold 9b is connected to the resin injection port 12, and a pot for heating and melting a sealing resin such as a solid thermosetting resin to be charged therein, and a pot melted in the pot. A push-up jig called a plunger for pushing up the sealing resin is provided, and an exhaust hole for exhausting the air in the cavity is provided in one of the upper die 9b and the lower die 9a.
【0026】そして、上記したように枠体8を下金型9
aと上金型9bとでクランプした状態で、ポットに投入
された固形の封止樹脂を加熱溶融し、プランジャーで突
き上げることにより、溶融した封止樹脂11を樹脂注入
口12を通じてキャビティ10内に圧入し、充満させ
る。Then, as described above, the frame body 8 is attached to the lower mold 9.
In the state of being clamped by a and the upper mold 9b, the solid sealing resin put into the pot is heated and melted, and the plunger is pushed up to push the molten sealing resin 11 into the cavity 10 through the resin injection port 12. Press into and fill up.
【0027】キャビティ4内の封止樹脂が硬化したら、
上金型9b,下金型9aを開き、接着層9a、枠体8か
ら剥離することにより、樹脂パッケージ5,半導体チッ
プ3,ボンディングワイヤ4,セラミック配線基板2か
らなる半導体パッケージ1を取り出す。When the sealing resin in the cavity 4 is cured,
The upper mold 9b and the lower mold 9a are opened, and the adhesive layer 9a and the frame 8 are peeled off to take out the semiconductor package 1 including the resin package 5, the semiconductor chip 3, the bonding wires 4, and the ceramic wiring board 2.
【0028】このような方法によれば、セラミック配線
基板2を封止金型9によって直接にクランプしないの
で、セラミック配線基板2にクランプ破損が生じること
はない。According to this method, since the ceramic wiring board 2 is not directly clamped by the sealing mold 9, the ceramic wiring board 2 is not damaged by the clamp.
【0029】また、樹脂封止時に樹脂注入口12を通じ
て上方より封止樹脂11を圧入しているので、封止樹脂
11はセラミック配線基板2の上面に下方への圧力をか
けることになり、すなわち、セラミック配線基板2は接
着フィルム7に押し込まれる圧力を受けることになり、
この時のセラミック配線基板2と接着フィルム7との接
着力は接着フィルム7の粘着力と樹脂注入圧とを合算し
た力となる。このため、接着フィルム7はセラミック配
線基板2から剥離しにくくなり、封止樹脂11はセラミ
ック配線基板2と接着フィルム7との間に入り込みにく
くなり、基板下面への封止樹脂11の付着は防止され
る。なおこのとき、樹脂注入口12を、セラミック配線
基板2の中央点を通る軸に近づけておくほど、基板下面
9への封止樹脂11の浸入を抑制する効果は高くなる。
特に、基板平面サイズの10%の外縁エリアを除いた中
央エリアの上方に樹脂注入口12を設けておけば、基板
下面への封止樹脂11の浸入を効果的に防止できる。Further, since the sealing resin 11 is press-fitted from above through the resin injection port 12 during resin sealing, the sealing resin 11 applies downward pressure to the upper surface of the ceramic wiring board 2, that is, , The ceramic wiring board 2 will be pressed by the adhesive film 7,
At this time, the adhesive force between the ceramic wiring board 2 and the adhesive film 7 is the sum of the adhesive force of the adhesive film 7 and the resin injection pressure. Therefore, the adhesive film 7 is less likely to be peeled off from the ceramic wiring substrate 2, the sealing resin 11 is less likely to enter between the ceramic wiring substrate 2 and the adhesive film 7, and the adhesion of the sealing resin 11 to the lower surface of the substrate is prevented. To be done. At this time, the closer the resin injection port 12 is to the axis passing through the center point of the ceramic wiring substrate 2, the higher the effect of suppressing the intrusion of the sealing resin 11 into the lower surface 9 of the substrate.
Particularly, if the resin injection port 12 is provided above the central area excluding the outer edge area of 10% of the substrate plane size, it is possible to effectively prevent the sealing resin 11 from entering the lower surface of the substrate.
【0030】さらに、接着フィルム7の基材7bにポリ
イミドのような温度変化しにくい材料を用いているの
で、セラミック配線基板2に半導体チップ3を固着する
際、セラミック配線基板2と半導体チップ3とにボンデ
ィングワイヤ4を接合する際、樹脂封止する際に、セラ
ミック配線基板2,接着フィルム7,枠体8からなる複
合体が120℃から250℃程度の高温環境下に置かれ
ても、接着フィルム7は寸法安定性を発揮する。したが
って、接着フィルム7が大きく変形することはなく、セ
ラミック配線基板2との密着が保たれ、隙間の発生が防
止され、このことによっても、基板下面への封止樹脂1
1の付着が防止される。Furthermore, since a material such as polyimide, which does not easily change in temperature, is used for the base material 7b of the adhesive film 7, when the semiconductor chip 3 is fixed to the ceramic wiring board 2, the ceramic wiring board 2 and the semiconductor chip 3 At the time of bonding the bonding wire 4 to and the resin sealing, even if the composite body including the ceramic wiring board 2, the adhesive film 7, and the frame body 8 is placed in a high temperature environment of about 120 ° C. to 250 ° C. The film 7 exhibits dimensional stability. Therefore, the adhesive film 7 is not largely deformed, the close contact with the ceramic wiring substrate 2 is maintained, and the generation of the gap is prevented, which also prevents the sealing resin 1 on the lower surface of the substrate.
The adhesion of 1 is prevented.
【0031】なお、上記した実施の形態では、半導体チ
ップ3をセラミック配線基板2に搭載した場合を説明し
たが、セラミック配線基板2に限定されず、樹脂基板あ
るいは金属基板にて構成された配線基板を使用する場合
も、配線基板を直接にクランプせずに枠体8をクランプ
する本発明の方法は有用である。In the above embodiment, the case where the semiconductor chip 3 is mounted on the ceramic wiring board 2 has been described, but the wiring board is not limited to the ceramic wiring board 2 and is composed of a resin substrate or a metal substrate. The method of the present invention in which the frame 8 is clamped without directly clamping the wiring board is also useful when using the.
【0032】また、上記した実施の形態では、半導体チ
ップ3を搭載し枠体8に固定されたセラミック配線基板
2を下金型9aの所定位置に配置したが、下金型9aの
上でセラミック配線基板2と枠体8とを固定し、半導体
チップ3を搭載してもよい。Further, in the above-mentioned embodiment, the ceramic wiring substrate 2 on which the semiconductor chip 3 is mounted and fixed to the frame body 8 is arranged at a predetermined position of the lower mold 9a, but the ceramic is placed on the lower mold 9a. The wiring board 2 and the frame 8 may be fixed and the semiconductor chip 3 may be mounted.
【0033】さらに、上記した実施の形態では、セラミ
ック配線基板2の下面の周縁部のみを接着フィルム7に
固着したが、下面の少なくとも周縁部において固着すれ
ばよく、図4に示すように下面全面を固着してもよい。Further, in the above-described embodiment, only the peripheral portion of the lower surface of the ceramic wiring board 2 is fixed to the adhesive film 7, but it is sufficient to fix it at least at the peripheral portion of the lower surface, as shown in FIG. May be fixed.
【0034】上記した実施の形態では、半導体チップ3
を一個だけセラミック配線基板2に搭載した半導体パッ
ケージ1を製造する場合を説明したが、図5に示すよう
に、複数個の半導体チップ3をセラミック配線基板2に
搭載して半導体パッケージ1を製造する場合にも、本発
明の方法は有用である。In the above embodiment, the semiconductor chip 3 is used.
The case of manufacturing the semiconductor package 1 in which only one is mounted on the ceramic wiring board 2 has been described. However, as shown in FIG. 5, a plurality of semiconductor chips 3 are mounted on the ceramic wiring board 2 to manufacture the semiconductor package 1. In some cases, the method of the present invention is useful.
【0035】上記した各実施の形態では、セラミック配
線基板2の下面の広いエリアにランド状の外部接続電極
6が形成されていて、これらの外部接続電極6を接着フ
ィルム7とともに収容するワーク保持部9cが下金型9
aに形成された例を図示したが、セラミック配線基板2
の下面の周縁部にのみ外部接続電極6が形成されてい
て、その外部接続電極6が入り込む接着フィルム7が使
用される場合、あるいは樹脂封止後にボール状の外部接
続電極6を設ける場合は、ワーク保持部9cは接着フィ
ルム7のみを収容する大きさとすればよい。キャビティ
10の形状も、樹脂パッケージ5の所望形状に応じて適
宜に変更可能である。In each of the above-mentioned embodiments, the land-shaped external connection electrodes 6 are formed in a wide area on the lower surface of the ceramic wiring board 2, and the work holding portion for accommodating these external connection electrodes 6 together with the adhesive film 7 is provided. 9c is the lower mold 9
Although the example formed in a is illustrated, the ceramic wiring substrate 2
When the external connection electrode 6 is formed only on the peripheral portion of the lower surface of the and the adhesive film 7 into which the external connection electrode 6 enters is used, or when the ball-shaped external connection electrode 6 is provided after resin sealing, The work holding portion 9c may be sized to accommodate only the adhesive film 7. The shape of the cavity 10 can also be appropriately changed according to the desired shape of the resin package 5.
【0036】[0036]
【発明の効果】以上のように本発明によれば、半導体素
子を搭載した配線基板を接着フィルムを介して枠体に接
着し、この枠体を封止金型でクランプした状態で配線基
板の上方から樹脂注入するようにしたため、配線基板と
接着フィルムとの間に封止樹脂が浸入して、配線基板の
下面すなわち電極形成面に封止樹脂が付着するのを防止
でき、品質の良好な半導体パッケージが得られる。As described above, according to the present invention, the wiring board on which the semiconductor element is mounted is adhered to the frame body through the adhesive film, and the wiring board of the wiring board is clamped with the sealing die. Since the resin is injected from above, it is possible to prevent the sealing resin from penetrating between the wiring board and the adhesive film, and to prevent the sealing resin from adhering to the lower surface of the wiring board, that is, the electrode formation surface. A semiconductor package is obtained.
【図面の簡単な説明】[Brief description of drawings]
【図1】本発明の第1の実施の形態における半導体パッ
ケージの製造方法であって、1個の半導体素子を搭載し
た配線基板を下面周縁部において接着フィルムを介して
枠体に固定した状態を示す断面図FIG. 1 is a method for manufacturing a semiconductor package according to a first embodiment of the present invention, showing a state in which a wiring board on which one semiconductor element is mounted is fixed to a frame body with an adhesive film at a peripheral portion of a lower surface. Sectional view
【図2】図1に示した接着フィルム部分の拡大断面図FIG. 2 is an enlarged cross-sectional view of the adhesive film portion shown in FIG.
【図3】図1に示した半導体素子,配線基板,接着フィ
ルム,枠体を封止金型に配置して樹脂封止する工程を示
す断面図FIG. 3 is a cross-sectional view showing a step of placing the semiconductor element, the wiring board, the adhesive film, and the frame body shown in FIG. 1 in a sealing die and resin-sealing them.
【図4】本発明の第2の実施の形態における半導体パッ
ケージの製造方法であって、1個の半導体素子を搭載し
た配線基板を下面全面において接着フィルムに接着した
状態で樹脂封止する工程の断面図FIG. 4 is a method of manufacturing a semiconductor package according to a second embodiment of the present invention, which includes a step of resin-sealing a wiring board on which one semiconductor element is mounted, with the entire lower surface adhered to an adhesive film. Cross section
【図5】本発明の第3の実施の形態における半導体パッ
ケージの製造方法であって、2個の半導体素子を搭載し
た配線基板を下面周縁部において接着フィルムに接着し
た状態で樹脂封止する工程の断面図FIG. 5 is a method of manufacturing a semiconductor package according to a third embodiment of the present invention, which is a step of resin-sealing a wiring board on which two semiconductor elements are mounted while being adhered to an adhesive film at a peripheral portion of a lower surface. Cross section of
【図6】従来よりある半導体パッケージの断面図FIG. 6 is a sectional view of a conventional semiconductor package.
【図7】従来の半導体パッケージの製造方法における樹
脂封止工程の断面図FIG. 7 is a cross-sectional view of a resin sealing step in a conventional semiconductor package manufacturing method.
1 半導体パッケージ 2 セラミック配線基板 3 半導体チップ 6 外部接続電極 7 接着フィルム 7a 接着剤層 7b 基材 8 枠体 9 封止金型 9a 下金型 9b 上金型 10 キャビティ 11 封止樹脂 12 樹脂注入口 1 Semiconductor package 2 Ceramic wiring board 3 semiconductor chips 6 External connection electrode 7 Adhesive film 7a adhesive layer 7b substrate 8 frame 9 Sealing mold 9a Lower mold 9b Upper mold 10 cavities 11 Sealing resin 12 Resin injection port
───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 4F202 AD04 AD18 AD23 AD27 AH37 CA11 CA12 CB01 CB12 CB17 CK06 CQ01 CQ05 4F206 AD04 AD18 AD23 AD27 AH37 JA02 JA07 JB12 JB17 JF05 JF35 JL02 JM04 JN21 JQ81 5F061 AA01 BA03 CA21 DA07 ─────────────────────────────────────────────────── ─── Continued front page F term (reference) 4F202 AD04 AD18 AD23 AD27 AH37 CA11 CA12 CB01 CB12 CB17 CK06 CQ01 CQ05 4F206 AD04 AD18 AD23 AD27 AH37 JA02 JA07 JB12 JB17 JF05 JF35 JL02 JM04 JN21 JQ81 5F061 AA01 BA03 CA21 DA07
Claims (7)
内周側に固定する工程と、前記配線基板の上面に半導体
素子を搭載する工程と、前記半導体素子を搭載した配線
基板が固定された枠体を上金型と下金型とでクランプ
し、前記枠体の内側に形成されたキャビティに封止樹脂
を注入して、前記キャビティに内包された半導体素子お
よび配線基板の上部を樹脂封止する工程とを行なって半
導体パッケージを製造するに際し、 前記樹脂封止する工程において、前記配線基板の上方よ
り封止樹脂を注入することを特徴とする半導体パッケー
ジの製造方法。1. A step of fixing a wiring board to an inner peripheral side of a frame body with an adhesive film, a step of mounting a semiconductor element on an upper surface of the wiring board, and a wiring board on which the semiconductor element is mounted is fixed. The frame body is clamped by an upper die and a lower die, and a sealing resin is injected into a cavity formed inside the frame body, and a semiconductor element and a wiring board upper part encapsulated in the cavity are filled with resin. A method of manufacturing a semiconductor package, wherein, when a semiconductor package is manufactured by performing a sealing step, a sealing resin is injected from above the wiring board in the resin sealing step.
とを特徴とする請求項1記載の半導体パッケージの製造
方法。2. The method of manufacturing a semiconductor package according to claim 1, wherein the wiring board is a ceramic wiring board.
なる2層構造であり、前記接着剤層が、配線基板の下面
に形成された電極の厚みよりも厚く設定されたことを特
徴とする請求項1記載の半導体パッケージの製造方法。3. The adhesive film has a two-layer structure consisting of an adhesive layer and a base material, and the adhesive layer is set to be thicker than the thickness of the electrode formed on the lower surface of the wiring board. The method for manufacturing a semiconductor package according to claim 1.
いた前記配線基板の中央部の上方より行なうことを特徴
とする請求項1記載の半導体パッケージの製造方法。4. The method for manufacturing a semiconductor package according to claim 1, wherein the injection of the sealing resin is performed from above the central portion of the wiring board except for the outer peripheral edge portion 10%.
りなることを特徴とする請求項3記載の半導体パッケー
ジの製造方法。5. The method of manufacturing a semiconductor package according to claim 3, wherein the base material of the adhesive film is made of a polyimide resin.
程で使用される封止金型であって、 配線基板が接着フィルムを介して内周側に固定された枠
体をクランプする上金型と下金型とからなり、 前記上金型は、前記配線基板およびその上面に搭載され
た半導体素子を内包するキャビティを枠体の内側に形成
する凹部と、前記下金型上に設定された基板設置領域の
上方に開口した樹脂注入口とを有したことを特徴とする
封止金型。6. An encapsulating mold used in a resin encapsulating process for manufacturing a semiconductor package, wherein the wiring substrate is an upper mold for clamping a frame body fixed to an inner peripheral side through an adhesive film. A lower mold, wherein the upper mold is a recess formed in the frame body to form a cavity for enclosing the wiring board and a semiconductor element mounted on the upper surface thereof, and a substrate set on the lower mold. A sealing mold having a resin injection port opened above the installation region.
された基板設置領域の外周縁部10%を除いた中央部の
上方に開口したことを特徴とする請求項6記載の封止金
型。7. The resin injection port of the upper mold is opened above the central portion of the substrate installation region set on the lower mold except for 10% of the outer peripheral edge portion. Sealing mold.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001369397A JP2003170465A (en) | 2001-12-04 | 2001-12-04 | Method for manufacturing semiconductor package and sealing mold therefor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001369397A JP2003170465A (en) | 2001-12-04 | 2001-12-04 | Method for manufacturing semiconductor package and sealing mold therefor |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2003170465A true JP2003170465A (en) | 2003-06-17 |
Family
ID=19178795
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Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2001369397A Pending JP2003170465A (en) | 2001-12-04 | 2001-12-04 | Method for manufacturing semiconductor package and sealing mold therefor |
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