JP2004207307A - Semiconductor device and its manufacturing method - Google Patents

Semiconductor device and its manufacturing method Download PDF

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Publication number
JP2004207307A
JP2004207307A JP2002371545A JP2002371545A JP2004207307A JP 2004207307 A JP2004207307 A JP 2004207307A JP 2002371545 A JP2002371545 A JP 2002371545A JP 2002371545 A JP2002371545 A JP 2002371545A JP 2004207307 A JP2004207307 A JP 2004207307A
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semiconductor chip
semiconductor device
heat sink
die pad
heat
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Shuichi Ogata
秀一 尾方
Toshiko Nakajima
利子 中島
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/741—Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L24/743—Apparatus for manufacturing layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/32257—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic the layer connector connecting to a bonding area disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which can easily perform a heat sink measures after mounting and which has a high heat sink effect, and to provide a method for manufacturing the same. <P>SOLUTION: The semiconductor device includes a die pad 1, a semiconductor chip 3 adhered to the surface of this die pad 1, leads 5, 6 disposed on the periphery of the die pad 1 and electrically connected to the electrodes of the semiconductor chip 3 via fine metal wiring 4, a heat sink plate 9 connected to the surface of the semiconductor chip 3 so as to be able to heat transfer, and a sealing resin 7 for sealing the semiconductor chip 3 and the fine metal wiring 4 so as to expose this heat sink plate 9. The surface of the die pad 1 opposite to the surface adhered with the semiconductor chip 3 is exposed from the sealing resin 7. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は、ＤＶＤ、ＣＤ−ＲＯＭ等のモータドライバ用、音声増幅用、電源用、オーディオ用などの発熱量が大きく、なお且つ薄型が必要な半導体チップを搭載するのに適応した半導体装置およびその製造方法に関するものである。
【０００２】
【従来の技術】
近年、電子機器の多機能化、小型化、高密度化に対応するために、半導体装置などの半導体部品の高密度、高機能化が要求され、それに伴って、半導体部品に対しても薄型で良好な放熱が要望されている。
【０００３】
以下、従来の半導体装置について説明する。
【０００４】
一般に高放熱用に用いられる半導体装置は金属板を介して一方向のみの放熱経路となるよう構成されている。図１１は、従来の半導体装置を示す図であり、図１１（ａ）は代表的な半導体装置のダイパッドを露出したパッケージの断面図であり、図１１（ｂ）は代表的な半導体装置の放熱板を内蔵したパッケージの断面図である。図１１（ａ）および図１１（ｂ）に示すように、従来の半導体装置はダイパッド１あるいは放熱板８に接着剤２を塗布して、その上に半導体チップ３を固着している。その半導体チップ３には金属細線４が接続され、ダイパッド１あるいは放熱板８の周辺にある複数本のインナーリード５とそれぞれ電気的に接続されている。各インナーリード５と一体的に連結された各アウターリード６は封止樹脂体７から導出され、ダイパッド１あるいは放熱板８、接着剤２、半導体チップ３、金属細線４およびインナーリード５は封止樹脂体７で封止されている。また、封止樹脂体７は４辺形の平板状に形成されているとともに、アウターリード６は封止樹脂体７の４辺からそれぞれ引き出されている。そして、ダイパッド１あるいは放熱板８の露出面（半導体チップ３を搭載した面と反対側の面）は封止樹脂体７から露出している。
【０００５】
この半導体装置は、通常、封止樹脂体７から露出したダイパッド１あるいは放熱板８の露出面はプリント基板（図示せず）に接するように実装される。発熱源である半導体チップ３を搭載したダイパッド１あるいは放熱板８が封止樹脂体７より露出されているため、外気に直接放熱することができ、高い放熱性を保つことができる。
【０００６】
【特許文献】
特開平０６−３４２８７３号公報
【０００７】
【発明が解決しようとする課題】
しかしながら、上述した従来の半導体装置では、半導体チップ３の表面で発生した熱を半導体チップ３、接着剤２、ダイパッド１あるいは放熱板８を介した一方向のみにだけ放熱させる構造になっており、それぞれの熱伝導性に影響され、熱の放熱効率が悪くなっている。
【０００８】
また、その放熱効率の悪さを補うために更にダイパッド１を大きくしたり、放熱板８を厚くしたりする必要があり、小型、薄型化が困難となっている。
【０００９】
更に、ダイパッド１を露出させた半導体装置では、プリント基板への実装時、封止樹脂体７の上下バランスが悪いため、半導体装置に反りが生じ、実装性に影響し放熱性を悪化させる要因となっている。
【００１０】
また、放熱経路が一方向のため、実装後の放熱対策が困難となっている。
【００１１】
本発明は、上述の課題を解決するもので、実装後の放熱対策も容易に出来る放熱効果の高い半導体装置およびその製造方法を提供することを目的とする。
【００１２】
【課題を解決するための手段】
請求項１記載の半導体装置は、ダイパッドと、このダイパッドの表面に搭載された半導体チップと、ダイパッドの周辺に配置されて半導体チップの電極と金属細線により電気的に接続されたリードと、半導体チップの表面に熱伝達可能に接続した放熱板と、この放熱板が露出するように半導体チップおよび金属細線が封止された封止樹脂とを備えたものである。
【００１３】
請求項１記載の半導体装置によれば、半導体チップを搭載したダイパッドと半導体チップの表面に接続した放熱板の露出部からの２方向で直接外部に放熱させるため、高い放熱効果が得られる。したがって、例えばダイパッドの露出面からプリント基板に直接放熱させるだけでなく、実装後にも放熱板を使って、充分な熱対策ができる、品質の優れた半導体装置である。
【００１４】
請求項２記載の半導体装置は、請求項１において、ダイパッドの半導体チップが接着されている面と反対側の面が封止樹脂から露出しているものである。
【００１５】
請求項２記載の半導体装置によれば、請求項１と同様な効果がある。
【００１６】
請求項３記載の半導体装置は、配線電極を形成した基板と、この基板の表面に搭載された半導体チップと、配線電極と半導体チップの電極とが電気的に接続された金属細線と、半導体チップの表面に熱伝達可能に接続した放熱板と、この放熱板が露出するように半導体チップおよび金属細線を封止する封止樹脂とを備えたものである。
【００１７】
請求項３記載の半導体装置によれば、請求項１と同様な効果がある。
【００１８】
請求項４記載の半導体装置は、請求項１または請求項３において、放熱板の封止樹脂からの露出面に、凹部が形成されているものである。
【００１９】
請求項４記載の半導体装置によれば、請求項１または請求項３と同様な効果のほか、放熱面積が大きいほど放熱性が良くなる事から、放熱板に凹凸を設けることにより更に放熱効果を向上させ、あわせて封止樹脂体との接合面積が増え、密着性、信頼性が向上する。
【００２０】
請求項５記載の半導体装置は、請求項１または請求項３において、放熱板に複数の貫通穴が設けられているものである。
【００２１】
請求項５記載の半導体装置によれば、請求項１または請求項３と同様な効果のほか、半導体チップの表面に接続された放熱板に貫通穴を設ける事により、更に放熱効果および樹脂との密着性が良くなり信頼性が向上する。
【００２２】
請求項６記載の半導体装置は、請求項１または請求項３において、放熱板の露出面には複数の溝が設けられているものである。
【００２３】
請求項６記載の半導体装置によれば、請求項１または請求項３と同様な効果のほか、半導体チップの表面に接続された放熱板に複数の溝を設ける事により、放熱面積をより広く確保でき、更に放熱効果および樹脂との密着性が良くなり信頼性が向上する。とくに、放熱板の露出面の周縁に沿ってリング状の溝を設ける事により、樹脂封止時に、封止金型と放熱板の露出面との間に樹脂が回り込むのを溝で防止し、放熱板の露出面にできる薄バリの大きさを制約することができる。
【００２４】
請求項７記載の半導体装置は、請求項１または請求項３において、放熱板に形成された凸部が半導体チップと接着されているものである。
【００２５】
請求項７記載の半導体装置によれば、請求項１または請求項３と同様な効果がある。
【００２６】
請求項８記載の半導体装置は、請求項１または請求項３において、放熱板の表面は絶縁処理されているものである。
請求項８記載の半導体装置によれば、請求項１または請求項３と同様な効果のほか、放熱板に絶縁処理を施すことにより、金属細線と放熱板とのショートを防止できる。
【００２７】
請求項９記載の半導体装置は、請求項１または請求項３において、半導体チップと放熱板とが突起電極により接続されているものである。
【００２８】
請求項９記載の半導体装置によれば、請求項１または請求項３と同様な効果のほか、
請求項１０記載の半導体装置は、請求項１または請求項３において、半導体チップと放熱板とは、シリコン樹脂により接着されているものである。
【００２９】
請求項１０記載の半導体装置によれば、請求項１または請求項３と同様な効果のほか、
請求項１１記載の半導体装置の製造方法は、ダイパッドに半導体チップを搭載する工程と、ダイパッドの周囲に配置されたリードと半導体チップの電極とを金属細線により電気的に接続する工程と、半導体チップに放熱板を熱伝達可能に接続する工程と、ダイパッドおよび放熱板が露出するように、少なくとも半導体チップおよび金属細線を封止樹脂により封止する工程とを含むものである。
【００３０】
請求項１１記載の半導体装置の製造方法によれば、請求項１と同様な効果のほか、樹脂封止する際の半導体チップにかかる応力を低減しながら高放熱を確保することができ、半導体装置の薄型が可能となる。
【００３１】
請求項１２記載の半導体装置の製造方法は、配線電極を形成した基板の表面に半導体チップを搭載する工程と、配線電極と半導体チップの電極とを金属細線により電気的に接続する工程と、半導体チップに放熱板を熱伝達可能に接続する工程と、半導体チップおよび金属細線を封止樹脂により封止し、放熱板を封止樹脂から露出させる工程とを含むものである。
【００３２】
請求項１２記載の半導体装置の製造方法によれば、請求項１１と同様な効果がある。
【００３３】
【発明の実施の形態】
以下、本発明による半導体装置の実施形態について説明する。
【００３４】
図１は、第１の実施形態による半導体装置の上面図（ａ）と断面図（ｂ）である。図１に示すように、第１の実施形態による半導体装置は、ダイパッド１の表面に接着剤２を塗布して、その上に半導体チップ３の裏面を固着している。その半導体チップ３の電極には金属細線４が接続され、ダイパッド１の周辺にある複数本のインナーリード５とそれぞれ電気的に接続されている。更に、半導体チップ３の表面には放熱性に優れた放熱板９の下面に形成された凸部９ａが接着剤１０によって熱伝達可能に固着されている。各インナーリード５と一体的に連結された各アウターリード６は封止樹脂体７から導出され、ダイパッド１、接着剤２、半導体チップ３、金属細線４、放熱板９、接着剤１０およびインナーリード５は封止樹脂体７で封止されている。放熱板９は例えば、Ｆｅ、Ｎｉ、Ｃｕ等の材料から構成され、接着剤１０は例えば、シリコン樹脂、Ａｇフィラーが混入したペーストから構成され、厚みは１０〜２０[μｍ]である。また、封止樹脂体７は４辺形の平板状に成形されているとともに、アウターリード６は封止樹脂体７の少なくとも２辺、実施の形態では４辺からそれぞれ引き出されている。そして、ダイパッド１および放熱板９のそれぞれ半導体チップ１と反対側の面の露出面は封止樹脂体７から露出されている。
【００３５】
放熱板９の表面は凹凸を含む凹部が施してあり（図示せず）、これにより放熱効果が向上する。また、封止樹脂体７との密着性も上がるので、信頼性も向上する。更に、半導体チップ３の表面と放熱板９を弾力性のある接着剤１０で接続することで、封止時の半導体チップ３への応力を緩和することができる。
【００３６】
図２は、第２の実施形態による半導体装置の上面図（ａ）と断面図（ｂ）である。第２の実施形態は前述の第１の実施形態と殆ど変わらないが、図２にもあるように、放熱板９に凹部として貫通穴１１を設けている点が異なる。これにより、第１の実施形態より更に、封止樹脂体７との密着性が良くなり、信頼性を向上させることができる。また、貫通穴１１は穴径を大きくする（図示せず）ことにより、金属細線４の占める領域を回避でき、更に薄型が可能となる。
【００３７】
図３は、第３の実施形態による半導体装置の上面図（ａ）と断面図（ｂ）である。実施形態は第１および第２の実施形態と殆ど変わらないが、放熱板９の露出面側に凹部として多数の溝１２を設けることにより、放熱面積が広くなり、半導体装置単体でも空気中への熱拡散がより効率よく行われ、更には、実装後の放熱対策にも有効に使用できる。
【００３８】
第３の実施の形態の変形形態として、放熱板９の露出面の周縁に沿ってリング状の溝を設けることにより、樹脂封止時に、封止金型と放熱板の露出面との間に樹脂が回り込むのを溝で防止し、放熱板９の露出面にできる薄バリの大きさを制約することができる。
【００３９】
図４は、第４の実施形態による半導体装置の断面図である。図４にもあるように、半導体チップ３の表面と放熱板９との接続に突起電極例えばＡｕバンプ１３を用いることで、より熱伝達の良い状態を作ることができる。更に、ボンディングパッド１９とインナーリード５とを電気的に接続する工程にて、同時にＡｕバンプ１３を形成することが可能なので、設備が容易に準備できる。また、Ａｕバンプ１３は封止時の放熱板９から半導体チップ３の表面への応力も緩和できるため、信頼性への影響を低減できる。
【００４０】
本実施形態では、ダイパッド１およびインナーリード５がＦｅ等からなるリードフレームから構成されるが、次のような構成であってもよい。すなわち、配線電極を形成した例えば樹脂またはセラミックからなる基板の表面と、半導体チップの裏面とを接着し、基板の表面に形成された配線電極と半導体チップの電極とが金属細線により電気的に接続され、半導体チップおよび金属細線が封止樹脂により封止され、半導体チップの表面と熱伝達可能に接続した放熱板、および基板の裏面の電極群が封止樹脂から露出した構成であってもよい。
【００４１】
次に、図１〜図４に示した半導体装置を製造する方法を図５〜図１０に基づいて説明する。
【００４２】
図５はダイボンディングの前工程を説明するための工程断面図、図６はダイボンディング工程を説明するための工程断面図であり、図７はワイヤーボンディング工程を説明するための工程断面図である。
【００４３】
まず、ダイパッド１と、ダイパッド１の周辺に配置される複数本のインナーリード５と、そのインナーリード５にそれぞれ連結された各アウターリード６とを、金属板を型抜きして構成したリードフレームを準備する。
【００４４】
つぎに、図５に示すように、半導体チップボンディング装置（図示せず）のステージ１５上において、ダイパッド１上に半導体チップ３を固着するための接着剤２を塗布する。接着剤２の塗布はディスペンサ１６を用いて、接着剤２を滴下することにより行う。接着剤２は一例として熱硬化性のエポキシ樹脂にＡｇ粉を混合させたＡｇペーストからなる。
【００４５】
次に、図６に示すように、接着剤２を塗布したダイパッド１上にコレット１７を用いて半導体チップ３を搭載した後、ヒートステージ（図示せず）上で加熱し、接着剤２を硬化させる。一例として、半導体チップ３は、外形寸法が４ｍｍ角、厚さが０．１ｍｍ程度のシリコン単結晶である。また、加熱条件は１８０〜２５０℃、３０秒から６０秒程度である。なお、接着剤２の硬化はキュア炉を用いても良い。
【００４６】
次に、図７に示すように、ダイパッド１に固着された半導体チップ３のボンディングパッド１９とインナーリード５とを金属細線４を用いて電気的に接続する。ワイヤーボンド装置（図示せず）のヒートステージ１８には、ダイパッド１が入る逃がし部が形成されており、インナーリード５のワイヤーボンディング領域外周部を固定治具２０によって固定しながら行う。一例として、金属細線は、直径２０〜３５μｍのＡｕワイヤを用いる。
【００４７】
次に、放熱板９の半導体チップ３への接続工程を説明するための工程断面図である図８、図９に基づき放熱板接続工程について説明する。
【００４８】
まず図８（ａ）に示しているように、接着剤１０を用いて接続を行う場合、前述のダイボンディング工程と同様に、ステージ１５上において、ワイヤーボンディングされた半導体チップ３の表面に放熱板９を固着するための接着剤１０を塗布する。接着剤１０の塗布はディスペンサ１６を用いて、接着剤１０を滴下することにより行う。接着剤１０は、一例として熱硬化性のシリコン樹脂を使用する。
【００４９】
次に別の方法として、図８（ｂ）に示しているように、Ａｕバンプ１３を用いて接続を行う場合、前述のワイヤーボンディング工程と同様に、ヒートステージ１８上において、半導体チップ３の表面に設けられたＡｕバンプ１３用のボンディングパッド（図示せず）上にＡｕバンプ１３を形成する。この方法であれば、ワイヤーボンド工程にて、同時に行うことが可能なため、設備投資せずに製造できるメリットがある。
【００５０】
次に、図９（ａ）に示すように、図８（ａ）で説明した工程にて接着剤１０を塗布した半導体チップ３の表面に放熱板用コレット２１を用いて放熱板９を搭載した後、ヒートステージ（図示せず）上で加熱し、接着剤１０を硬化させる。また、他に放熱板９の半導体チップ３の表面と接続する箇所に、あらかじめ貼り付けされた熱硬化性のＬＥテープ（ダイボンディングテープ）を使用して接続することも可能である。
【００５１】
また、図９（ｂ）に示すように、図８（ｂ）で説明した工程を経てＡｕバンプ１３が形成された半導体チップ３の表面に、ワイヤーボンド工程と同様に、ヒートステージ１８上において、放熱板用コレット２１を用いて放熱板９を搭載する。この工程も、前述のＡｕバンプ形成工程同様、同時に行うことが可能なため、設備投資せずに製造できるメリットがある。
【００５２】
このようにして、各単位のリードフレーム毎にダイボンディング、ワイヤーボンディング、放熱板接続が施された後、単位リードフレーム群を一括して樹脂封止して封止樹脂体７群が同時成形される。
【００５３】
次に、樹脂封止工程を説明するための工程断面図である図１０を参照しながら、樹脂封止工程について説明する。
【００５４】
図１０は、トランスファ成形装置を示しており、シリンダ装置（図示せず）によって型締めされる一対の上型２３と下型２４とを備えており、キャビティ上２５とキャビティ下２６とで、キャビティ単体を形成するように、それぞれ複数組み埋設されている。上型２３の合わせ面にはポット２７が開設されており、ポット２７にはシリンダ装置（図示せず）により進退されるプランジャ２８が成形材料としての樹脂を送給し得るように挿入されている。下型２４の合わせ面にはカル２９がポット２７と対向位置に配されて埋設されているとともに、ランナ３０がポット２７とそれぞれ接続されている。更に各ランナ３０の他端部はキャビティ下２６にそれぞれ接続されており、その接続部にはゲート３１が樹脂をキャビティ内に注入し得るよう形成されている。また、下型２４の合わせ面には、逃がし部３２がリードフレーム重合体２２におけるリードフレーム１４の厚み分を逃げ得るように、その外形も若干大きめの長方形で、その厚さよりも若干浅い深さに成形されている。このような構成のトランスファ成形装置を用いて、樹脂封止は以下の方法で行われる。
【００５５】
１８０℃程度に加熱されたトランスファ装置の封止金型の逃がし部３２にリードフレーム重合体２２を装着し封止金型を型締めする。このようにリードフレームのアウターリードを封止金型に型締めする事によって、ダイパッドおよび放熱板の露出面を封止金型の底部および頂部に押し付ける。
【００５６】
次に、円錐形に打錠された樹脂（図示せず）をポット２７に挿入し、プランジャ２８により樹脂がカル２９、ランナ３０、ゲート３１を通じて各キャビティに圧入される。注入後、樹脂が熱硬化されて封止樹脂体７が形成されると、上型２３および下型２４は型開きされるとともに、エジェクタ・ピン（図示せず）により封止樹脂体７群が離型され、樹脂成形されたリードフレーム重合体２２はトランスファ成形装置から脱装される。
【００５７】
このようにして、樹脂成形された封止樹脂体７の内部には、ダイパッド１、接着剤２、半導体チップ３、金属細線４、インナーリード５、接着剤１０及び放熱板９が樹脂封止されることとなる。
【００５８】
次に、樹脂成形されたリードフレーム重合体２２の封止樹脂体７以外の部分に半田外装めっきを施す（図示せず）。リードフレーム１４の少なくとも半導体装置の完成品となる部分にＰｄめっきが施されている場合は、半田外装めっきは必要としない。
【００５９】
半田外装めっきを経た後、あるいは半田外装めっきされる前の樹脂成形されたリードフレーム重合体２２を、切断装置（図示せず）によって、各単位リードフレーム毎に順次、ダムバー（図示せず）を切断する。
【００６０】
次に、リード成形装置（図示せず）によって、アウターリード６に先端と内枠の一部を切断した後、アウターリード６をガルウイング形状に屈曲成形し、内枠の一部を切断し、半導体装置を外枠から切り離す。
【００６１】
以上のようにして、図１〜図４に示す半導体装置を完成することができる。
【００６２】
上記本発明の半導体装置の製造方法では、ダイスボンド設備およびワイヤーボンド設備を活用し、放熱板の接続を行える事が特徴で、新たに設備投資の必要が無く、用途に応じ放熱板の形状や製造方法を変えることもできる。
【００６３】
またダイパットに代えて、電極を有するセラミックなどの基板に半導体チップを搭載する半導体装置の製造方法も、上記製造方法と同様に行うことができる。
【００６４】
なお、放熱板９の表面は絶縁処理することができる。
【００６５】
【発明の効果】
請求項１記載の半導体装置によれば、半導体チップを搭載したダイパッドと半導体チップの表面に接続した放熱板の露出部からの２方向で直接外部に放熱させるため、高い放熱効果が得られる。したがって、例えばダイパッドの露出面からプリント基板に直接放熱させるだけでなく、実装後にも放熱板を使って、充分な熱対策ができる、品質の優れた半導体装置である。
【００６６】
請求項２記載の半導体装置によれば、請求項１と同様な効果がある。
【００６７】
請求項３記載の半導体装置によれば、請求項１と同様な効果がある。
【００６８】
請求項４記載の半導体装置によれば、請求項１または請求項３と同様な効果のほか、放熱面積が大きいほど放熱性が良くなる事から、放熱板に凹凸を設けることにより更に放熱効果を向上させ、あわせて封止樹脂体との接合面積が増え、密着性、信頼性が向上する。
【００６９】
請求項５記載の半導体装置によれば、請求項１または請求項３と同様な効果のほか、半導体チップの表面に接続された放熱板に貫通穴を設ける事により、更に放熱効果および樹脂との密着性が良くなり信頼性が向上する。
【００７０】
請求項６記載の半導体装置によれば、請求項１または請求項３と同様な効果のほか、半導体チップの表面に接続された放熱板に複数の溝を設ける事により、放熱面積をより広く確保でき、更に放熱効果および樹脂との密着性が良くなり信頼性が向上する。とくに、放熱板の露出面の周縁に沿ってリング状の溝を設ける事により、樹脂封止時に、封止金型と放熱板の露出面との間に樹脂が回り込むのを溝で防止し、放熱板の露出面にできる薄バリの大きさを制約することができる。
【００７１】
請求項７記載の半導体装置によれば、請求項１または請求項３と同様な効果のがある。
【００７２】
請求項８記載の半導体装置によれば、請求項１または請求項３と同様な効果のほか、放熱板に絶縁処理を施すことにより、金属細線と放熱板とのショートを防止できる。
【００７３】
請求項９記載の半導体装置によれば、請求項１または請求項３と同様な効果のほか、
請求項１０記載の半導体装置によれば、請求項１または請求項３と同様な効果のほか、
請求項１１記載の半導体装置の製造方法によれば、請求項１と同様な効果のほか、樹脂封止する際の半導体チップにかかる応力を低減しながら高放熱を確保することができ、半導体装置の薄型が可能となる。
【００７４】
請求項１２記載の半導体装置の製造方法によれば、請求項１１と同様な効果がある。
【図面の簡単な説明】
【図１】本発明の第１の実施形態に係る半導体装置を示す図であり、（ａ）は半導体装置の上面図、（ｂ）は半導体装置の断面図である。
【図２】本発明の第２の実施形態に係る半導体装置を示す図であり、（ａ）は半導体装置の上面図、（ｂ）は半導体装置の断面図である。
【図３】本発明の第３の実施形態に係る半導体装置を示す図であり、（ａ）は半導体装置の上面図、（ｂ）は半導体装置の断面図である。
【図４】本発明の第４の実施形態に係る半導体装置の断面図である。
【図５】第１の実施の形態から第４の実施の形態のダイボンディング工程の前工程を説明するための工程断面図である。
【図６】第１の実施の形態から第４の実施の形態のダイボンディング工程を説明するための工程断面図である。
【図７】第１の実施の形態から第４の実施の形態のワイヤーボンディング工程を説明するための工程断面図である。
【図８】第１の実施の形態から第４の実施の形態の放熱板を接続する工程の前工程を説明するための図であり、（ａ）は接着剤を使用する場合の工程断面図、（ｂ）はＡｕバンプを使用する場合の工程断面図である。
【図９】第１の実施の形態から第４の実施の形態の放熱板を接続する工程を説明するための図であり、（ａ）は接着剤を使用する場合の工程断面図、（ｂ）はＡｕバンプを使用する場合の工程断面図である。
【図１０】第１の実施の形態から第４の実施の形態の樹脂封止工程を説明するための工程断面図である。
【図１１】従来の半導体装置を示す図であり、（ａ）はダイパッドを露出する半導体装置の断面図、（ｂ）は放熱板を内蔵する半導体装置の断面図である。
【符号の説明】
１ ダイパッド
２ 接着剤
３ 半導体チップ
４ 金属細線
５ インナーリード
６ アウターリード
７ 封止樹脂体
９ 放熱板
１０ 接着剤
１１ 貫通穴
１２ 溝
１３ Ａｕバンプ
１４ リードフレーム
１５ ステージ
１６ ディスペンサ
１７ コレット
１８ ヒートステージ
１９ ボンディングパッド
２０ 固定治具
２１ 放熱板用コレット
２２ リードフレーム重合体
２３ 上型
２４ 下型
２５ キャビティ上
２６ キャビティ上
２７ ポット
２８ プランジャ
２９ カル
３０ ランナ
３１ ゲート
３２ 逃がし部[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention is directed to a semiconductor device adapted to mount a semiconductor chip that generates a large amount of heat and is thin, such as a motor driver for a DVD or a CD-ROM, an audio amplifier, a power supply, and an audio. It relates to a manufacturing method.
[0002]
[Prior art]
In recent years, high density and high functionality of semiconductor components such as semiconductor devices have been demanded in order to respond to multifunctional, miniaturized and high density electronic devices. Good heat dissipation is desired.
[0003]
Hereinafter, a conventional semiconductor device will be described.
[0004]
In general, a semiconductor device used for high heat dissipation is configured to have a heat dissipation path in only one direction via a metal plate. 11A and 11B are views showing a conventional semiconductor device, FIG. 11A is a cross-sectional view of a package in which a die pad of a typical semiconductor device is exposed, and FIG. 11B is heat radiation of a typical semiconductor device. It is sectional drawing of the package which incorporated the board. As shown in FIGS. 11A and 11B, in a conventional semiconductor device, an adhesive 2 is applied to a die pad 1 or a heat sink 8, and a semiconductor chip 3 is fixed thereon. A thin metal wire 4 is connected to the semiconductor chip 3 and is electrically connected to a plurality of inner leads 5 around the die pad 1 or the heat sink 8. Each outer lead 6 integrally connected to each inner lead 5 is led out of the sealing resin body 7, and the die pad 1 or the heat sink 8, the adhesive 2, the semiconductor chip 3, the thin metal wire 4 and the inner lead 5 are sealed. It is sealed with a resin body 7. The sealing resin body 7 is formed in a quadrangular flat plate shape, and the outer leads 6 are drawn out from four sides of the sealing resin body 7, respectively. The exposed surface of the die pad 1 or the heat sink 8 (the surface opposite to the surface on which the semiconductor chip 3 is mounted) is exposed from the sealing resin body 7.
[0005]
This semiconductor device is usually mounted such that the exposed surface of the die pad 1 or the heat sink 8 exposed from the sealing resin body 7 is in contact with a printed circuit board (not shown). Since the die pad 1 or the heat radiating plate 8 on which the semiconductor chip 3 as a heat source is mounted is exposed from the sealing resin body 7, heat can be directly radiated to the outside air, and high heat radiating property can be maintained.
[0006]
[Patent Document]
JP 06-342873 A
[Problems to be solved by the invention]
However, the above-described conventional semiconductor device has a structure in which heat generated on the surface of the semiconductor chip 3 is radiated only in one direction via the semiconductor chip 3, the adhesive 2, the die pad 1, or the heat radiating plate 8, Due to the thermal conductivity of each, the heat radiation efficiency is poor.
[0008]
In addition, it is necessary to further increase the size of the die pad 1 and the thickness of the heat radiating plate 8 in order to compensate for the poor heat radiation efficiency, which makes it difficult to reduce the size and thickness.
[0009]
Further, in the semiconductor device with the die pad 1 exposed, when mounted on a printed circuit board, the sealing resin body 7 has a poor vertical balance, so that the semiconductor device is warped, affecting the mountability and deteriorating heat dissipation. Has become.
[0010]
In addition, since the heat dissipation path is unidirectional, it is difficult to take measures for heat dissipation after mounting.
[0011]
An object of the present invention is to solve the above-mentioned problems and to provide a semiconductor device having a high heat radiation effect and a method of manufacturing the same, which can easily perform heat radiation measures after mounting.
[0012]
[Means for Solving the Problems]
2. The semiconductor device according to claim 1, wherein the semiconductor chip includes a die pad, a semiconductor chip mounted on a surface of the die pad, leads arranged around the die pad and electrically connected to electrodes of the semiconductor chip by thin metal wires. And a sealing resin in which the semiconductor chip and the fine metal wires are sealed such that the heat sink is exposed.
[0013]
According to the semiconductor device of the first aspect, since heat is directly radiated to the outside in two directions from the die pad on which the semiconductor chip is mounted and the exposed portion of the heat radiating plate connected to the surface of the semiconductor chip, a high heat radiation effect is obtained. Therefore, for example, a high-quality semiconductor device that can not only radiate heat directly from the exposed surface of the die pad to the printed circuit board but also perform a sufficient heat countermeasure by using the heat radiating plate even after mounting.
[0014]
According to a second aspect of the present invention, in the first aspect, the surface of the die pad opposite to the surface to which the semiconductor chip is adhered is exposed from the sealing resin.
[0015]
According to the semiconductor device of the second aspect, the same effect as that of the first aspect is obtained.
[0016]
4. The semiconductor device according to claim 3, wherein: a substrate on which the wiring electrode is formed; a semiconductor chip mounted on the surface of the substrate; a thin metal wire in which the wiring electrode and the electrode of the semiconductor chip are electrically connected; And a sealing resin for sealing the semiconductor chip and the fine metal wires such that the heat sink is exposed.
[0017]
According to the semiconductor device of the third aspect, the same effect as that of the first aspect is obtained.
[0018]
According to a fourth aspect of the present invention, in the semiconductor device according to the first or third aspect, a concave portion is formed on an exposed surface of the heat sink from the sealing resin.
[0019]
According to the semiconductor device of the fourth aspect, in addition to the same effects as those of the first or third aspect, the larger the heat radiation area, the better the heat radiation property. In addition, the bonding area with the sealing resin body is increased, and the adhesion and reliability are improved.
[0020]
According to a fifth aspect of the present invention, there is provided the semiconductor device according to the first or third aspect, wherein the heat sink has a plurality of through holes.
[0021]
According to the semiconductor device of the fifth aspect, in addition to the same effects as those of the first or third aspect, by providing a through hole in the heat sink connected to the surface of the semiconductor chip, the heat dissipation effect and the resin can be further improved. Adhesion is improved and reliability is improved.
[0022]
According to a sixth aspect of the present invention, in the semiconductor device according to the first or third aspect, a plurality of grooves are provided on an exposed surface of the heat sink.
[0023]
According to the semiconductor device of the sixth aspect, in addition to the same effects as those of the first or third aspect, by providing a plurality of grooves on the heat dissipation plate connected to the surface of the semiconductor chip, a wider heat dissipation area is ensured. The heat radiation effect and the adhesion to the resin are improved, and the reliability is improved. In particular, by providing a ring-shaped groove along the periphery of the exposed surface of the heat sink, the groove prevents resin from flowing between the sealing mold and the exposed surface of the heat sink during resin sealing, The size of the thin burr formed on the exposed surface of the heat sink can be restricted.
[0024]
According to a seventh aspect of the present invention, in the semiconductor device according to the first or third aspect, the protrusion formed on the heat sink is bonded to the semiconductor chip.
[0025]
According to the semiconductor device of the seventh aspect, the same effect as that of the first or third aspect is obtained.
[0026]
An eighth aspect of the present invention is the semiconductor device according to the first or third aspect, wherein the surface of the heat sink is subjected to insulation treatment.
According to the semiconductor device of the eighth aspect, in addition to the same effects as those of the first or third aspect, by performing insulation treatment on the radiator plate, it is possible to prevent a short circuit between the thin metal wire and the radiator plate.
[0027]
A semiconductor device according to a ninth aspect is the semiconductor device according to the first or third aspect, wherein the semiconductor chip and the heat sink are connected by a protruding electrode.
[0028]
According to the semiconductor device of the ninth aspect, in addition to the same effect as the first or third aspect,
According to a tenth aspect of the present invention, in the semiconductor device according to the first or third aspect, the semiconductor chip and the heat sink are bonded with a silicone resin.
[0029]
According to the semiconductor device of the tenth aspect, in addition to the same effect as the first or third aspect,
12. The method of manufacturing a semiconductor device according to claim 11, further comprising: mounting a semiconductor chip on the die pad; electrically connecting leads arranged around the die pad to electrodes of the semiconductor chip by thin metal wires; And a step of sealing at least the semiconductor chip and the thin metal wires with a sealing resin so that the die pad and the heat sink are exposed.
[0030]
According to the method of manufacturing a semiconductor device according to the eleventh aspect, in addition to the same effect as that of the first aspect, it is possible to secure high heat radiation while reducing the stress applied to the semiconductor chip during resin sealing. Can be made thinner.
[0031]
13. The method of manufacturing a semiconductor device according to claim 12, wherein: a step of mounting a semiconductor chip on a surface of the substrate on which the wiring electrodes are formed; a step of electrically connecting the wiring electrodes and the electrodes of the semiconductor chip by thin metal wires; The method includes a step of connecting a heat radiating plate to the chip so that heat can be transferred, and a step of sealing the semiconductor chip and the fine metal wires with a sealing resin and exposing the heat radiating plate from the sealing resin.
[0032]
According to the method of manufacturing a semiconductor device of the twelfth aspect, the same effect as that of the eleventh aspect can be obtained.
[0033]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of a semiconductor device according to the present invention will be described.
[0034]
FIG. 1 is a top view (a) and a cross-sectional view (b) of the semiconductor device according to the first embodiment. As shown in FIG. 1, in the semiconductor device according to the first embodiment, an adhesive 2 is applied to a surface of a die pad 1 and a back surface of a semiconductor chip 3 is fixed thereon. A thin metal wire 4 is connected to an electrode of the semiconductor chip 3, and is electrically connected to a plurality of inner leads 5 around the die pad 1. Further, on the surface of the semiconductor chip 3, a convex portion 9a formed on the lower surface of the heat radiating plate 9 excellent in heat radiation is fixed by an adhesive 10 so as to be able to transfer heat. Each outer lead 6 integrally connected to each inner lead 5 is led out of the sealing resin body 7, and is provided with a die pad 1, an adhesive 2, a semiconductor chip 3, a thin metal wire 4, a heat sink 9, an adhesive 10, and an inner lead. Reference numeral 5 is sealed with a sealing resin body 7. The heat radiation plate 9 is made of, for example, a material such as Fe, Ni, or Cu, and the adhesive 10 is made of, for example, a paste mixed with a silicon resin and an Ag filler, and has a thickness of 10 to 20 [μm]. The sealing resin body 7 is formed in a quadrangular flat plate shape, and the outer leads 6 are drawn out from at least two sides of the sealing resin body 7, in the embodiment, four sides. The exposed surfaces of the die pad 1 and the heat radiating plate 9 opposite to the semiconductor chip 1 are exposed from the sealing resin body 7.
[0035]
The surface of the heat radiating plate 9 is provided with concave portions including irregularities (not shown), thereby improving the heat radiating effect. In addition, since the adhesion to the sealing resin body 7 is improved, the reliability is also improved. Further, by connecting the surface of the semiconductor chip 3 and the heat radiating plate 9 with an elastic adhesive 10, stress on the semiconductor chip 3 at the time of sealing can be reduced.
[0036]
FIG. 2 is a top view (a) and a cross-sectional view (b) of the semiconductor device according to the second embodiment. The second embodiment is almost the same as the first embodiment described above, but differs in that the heat sink 9 is provided with a through hole 11 as a recess as shown in FIG. Thereby, the adhesion to the sealing resin body 7 is further improved than in the first embodiment, and the reliability can be improved. Further, by increasing the diameter of the through-hole 11 (not shown), the area occupied by the thin metal wire 4 can be avoided, and the thickness can be further reduced.
[0037]
FIGS. 3A and 3B are a top view and a cross-sectional view of the semiconductor device according to the third embodiment. Although the embodiment is almost the same as the first and second embodiments, by providing a large number of grooves 12 as recesses on the exposed surface side of the heat radiating plate 9, the heat radiating area is widened, and even a single semiconductor device can be exposed to air. Thermal diffusion is performed more efficiently, and furthermore, it can be effectively used as a heat radiation measure after mounting.
[0038]
As a modification of the third embodiment, by providing a ring-shaped groove along the periphery of the exposed surface of the heat sink 9, the space between the sealing mold and the exposed surface of the heat sink during resin sealing is provided. The groove prevents the resin from flowing around and restricts the size of the thin burr formed on the exposed surface of the heat sink 9.
[0039]
FIG. 4 is a sectional view of the semiconductor device according to the fourth embodiment. As shown in FIG. 4, by using a bump electrode, for example, an Au bump 13 for connection between the surface of the semiconductor chip 3 and the heat radiating plate 9, a better heat transfer state can be created. Further, in the step of electrically connecting the bonding pad 19 and the inner lead 5, the Au bump 13 can be formed at the same time, so that the equipment can be easily prepared. The Au bumps 13 can also reduce the stress from the heat radiating plate 9 to the surface of the semiconductor chip 3 at the time of sealing, so that the influence on the reliability can be reduced.
[0040]
In the present embodiment, the die pad 1 and the inner leads 5 are formed of a lead frame made of Fe or the like, but may have the following structure. That is, the surface of the substrate made of, for example, resin or ceramic on which the wiring electrodes are formed is adhered to the back surface of the semiconductor chip, and the wiring electrodes formed on the surface of the substrate and the electrodes of the semiconductor chip are electrically connected by thin metal wires. The semiconductor chip and the fine metal wires may be sealed with a sealing resin, and a heat sink connected to the front surface of the semiconductor chip so as to be able to conduct heat, and an electrode group on the back surface of the substrate may be exposed from the sealing resin. .
[0041]
Next, a method of manufacturing the semiconductor device shown in FIGS. 1 to 4 will be described with reference to FIGS.
[0042]
5 is a process cross-sectional view for explaining a pre-process of die bonding, FIG. 6 is a process cross-sectional view for explaining a die bonding process, and FIG. 7 is a process cross-sectional view for explaining a wire bonding process. .
[0043]
First, a lead frame in which a die pad, a plurality of inner leads 5 arranged around the die pad 1, and respective outer leads 6 connected to the inner leads 5 are formed by cutting a metal plate is used. prepare.
[0044]
Next, as shown in FIG. 5, on a stage 15 of a semiconductor chip bonding apparatus (not shown), an adhesive 2 for fixing the semiconductor chip 3 to the die pad 1 is applied. The application of the adhesive 2 is performed by dropping the adhesive 2 using a dispenser 16. The adhesive 2 is made of, for example, an Ag paste in which Ag powder is mixed with a thermosetting epoxy resin.
[0045]
Next, as shown in FIG. 6, after mounting the semiconductor chip 3 using the collet 17 on the die pad 1 on which the adhesive 2 has been applied, the semiconductor chip 3 is heated on a heat stage (not shown) to cure the adhesive 2. Let it. As an example, the semiconductor chip 3 is a silicon single crystal having an outer dimension of 4 mm square and a thickness of about 0.1 mm. The heating conditions are 180 to 250 ° C. and about 30 to 60 seconds. The curing of the adhesive 2 may be performed using a curing furnace.
[0046]
Next, as shown in FIG. 7, the bonding pads 19 of the semiconductor chip 3 fixed to the die pad 1 and the inner leads 5 are electrically connected using the thin metal wires 4. A relief portion into which the die pad 1 enters is formed on the heat stage 18 of the wire bonding device (not shown), and the outer peripheral portion of the wire bonding area of the inner lead 5 is fixed by a fixing jig 20. As an example, as the thin metal wire, an Au wire having a diameter of 20 to 35 μm is used.
[0047]
Next, the radiator plate connecting step will be described with reference to FIGS. 8 and 9 which are process cross-sectional views for describing the step of connecting the radiator plate 9 to the semiconductor chip 3.
[0048]
First, as shown in FIG. 8A, when the connection is performed using the adhesive 10, the heat sink is provided on the surface of the wire-bonded semiconductor chip 3 on the stage 15, as in the above-described die bonding step. An adhesive 10 for fixing the adhesive 9 is applied. The application of the adhesive 10 is performed by dropping the adhesive 10 using a dispenser 16. As the adhesive 10, a thermosetting silicone resin is used as an example.
[0049]
Next, as another method, as shown in FIG. 8B, when connection is performed using the Au bumps 13, the surface of the semiconductor chip 3 is placed on the heat stage 18 similarly to the above-described wire bonding step. The Au bumps 13 are formed on the bonding pads (not shown) for the Au bumps 13 provided on the substrate. According to this method, it is possible to carry out the wire bonding process at the same time, so that there is an advantage that the manufacturing can be performed without capital investment.
[0050]
Next, as shown in FIG. 9A, the heat radiating plate 9 is mounted on the surface of the semiconductor chip 3 to which the adhesive 10 has been applied in the process described with reference to FIG. Thereafter, the adhesive 10 is heated on a heat stage (not shown) to cure the adhesive 10. In addition, it is also possible to use a thermosetting LE tape (die bonding tape) attached in advance to a portion of the heat sink 9 connected to the surface of the semiconductor chip 3 for connection.
[0051]
Further, as shown in FIG. 9B, the surface of the semiconductor chip 3 on which the Au bumps 13 are formed through the process described with reference to FIG. The radiator plate 9 is mounted using the radiator plate collet 21. This step can be performed simultaneously, similarly to the above-described Au bump formation step, and thus has an advantage that it can be manufactured without capital investment.
[0052]
In this way, after die bonding, wire bonding, and heat sink connection are performed for each lead frame of each unit, the unit lead frame group is collectively resin-sealed, and the sealing resin body 7 group is simultaneously molded. You.
[0053]
Next, the resin sealing step will be described with reference to FIG. 10 which is a process cross-sectional view for explaining the resin sealing step.
[0054]
FIG. 10 shows a transfer molding apparatus, which includes a pair of an upper mold 23 and a lower mold 24 which are clamped by a cylinder device (not shown). A plurality of each are buried so as to form a single body. A pot 27 is opened on the mating surface of the upper mold 23, and a plunger 28 that is advanced and retracted by a cylinder device (not shown) is inserted into the pot 27 so that resin as a molding material can be fed. . On the mating surface of the lower mold 24, a cull 29 is arranged and buried at a position facing the pot 27, and a runner 30 is connected to the pot 27, respectively. Further, the other end of each runner 30 is connected to the lower part 26 of the cavity, and a gate 31 is formed at the connection part so that resin can be injected into the cavity. The outer surface of the lower mold 24 is slightly larger than the thickness of the rectangular shape so that the escape portion 32 can escape the thickness of the lead frame 14 in the lead frame polymer 22 so that the escape portion 32 can escape. It is molded. Using the transfer molding apparatus having such a configuration, resin sealing is performed by the following method.
[0055]
The lead frame polymer 22 is mounted on the relief portion 32 of the sealing die of the transfer device heated to about 180 ° C., and the sealing die is clamped. By clamping the outer leads of the lead frame to the sealing mold in this manner, the exposed surfaces of the die pad and the heat sink are pressed against the bottom and top of the sealing mold.
[0056]
Next, a resin (not shown) compressed in a conical shape is inserted into the pot 27, and the resin is pressed into each cavity by the plunger 28 through the cull 29, the runner 30, and the gate 31. After the injection, the resin is thermally cured to form the sealing resin body 7. When the upper mold 23 and the lower mold 24 are opened, the sealing resin body 7 group is opened by ejector pins (not shown). The mold release and resin molded lead frame polymer 22 is removed from the transfer molding apparatus.
[0057]
The die pad 1, the adhesive 2, the semiconductor chip 3, the fine metal wires 4, the inner leads 5, the adhesive 10, and the heat radiating plate 9 are resin-sealed inside the resin molded sealing resin body 7 in this manner. The Rukoto.
[0058]
Next, a portion of the resin-molded lead frame polymer 22 other than the sealing resin body 7 is plated with a solder exterior (not shown). When Pd plating is applied to at least a part of the lead frame 14 which will be a completed semiconductor device, no solder outer plating is required.
[0059]
After the solder outer plating or before the solder outer plating, the resin-molded lead frame polymer 22 is sequentially cut into dam bars (not shown) for each unit lead frame by a cutting device (not shown). Disconnect.
[0060]
Next, after cutting the tip of the outer lead 6 and a part of the inner frame by a lead forming device (not shown), the outer lead 6 is bent and formed into a gull wing shape, and a part of the inner frame is cut. Disconnect the device from the outer frame.
[0061]
As described above, the semiconductor device shown in FIGS. 1 to 4 can be completed.
[0062]
The method for manufacturing a semiconductor device according to the present invention is characterized in that a radiator plate can be connected by utilizing a die bond facility and a wire bond facility, and there is no need for a new capital investment. The manufacturing method can be changed.
[0063]
Further, instead of the die pad, a method for manufacturing a semiconductor device in which a semiconductor chip is mounted on a substrate such as a ceramic having electrodes can be performed in the same manner as the above-described manufacturing method.
[0064]
In addition, the surface of the heat sink 9 can be insulated.
[0065]
【The invention's effect】
According to the semiconductor device of the first aspect, since heat is directly radiated to the outside in two directions from the die pad on which the semiconductor chip is mounted and the exposed portion of the heat radiating plate connected to the surface of the semiconductor chip, a high heat radiation effect is obtained. Therefore, for example, a high-quality semiconductor device that can not only radiate heat directly from the exposed surface of the die pad to the printed circuit board but also perform a sufficient heat countermeasure by using the heat radiating plate even after mounting.
[0066]
According to the semiconductor device of the second aspect, the same effect as that of the first aspect is obtained.
[0067]
According to the semiconductor device of the third aspect, the same effect as that of the first aspect is obtained.
[0068]
According to the semiconductor device of the fourth aspect, in addition to the same effects as those of the first or third aspect, the larger the heat radiation area, the better the heat radiation property. In addition, the bonding area with the sealing resin body is increased, and the adhesion and reliability are improved.
[0069]
According to the semiconductor device of the fifth aspect, in addition to the same effects as those of the first or third aspect, by providing a through hole in the heat sink connected to the surface of the semiconductor chip, the heat dissipation effect and the resin can be further improved. Adhesion is improved and reliability is improved.
[0070]
According to the semiconductor device of the sixth aspect, in addition to the same effects as those of the first or third aspect, by providing a plurality of grooves on the heat dissipation plate connected to the surface of the semiconductor chip, a wider heat dissipation area is ensured. The heat radiation effect and the adhesion to the resin are improved, and the reliability is improved. In particular, by providing a ring-shaped groove along the periphery of the exposed surface of the heat sink, the groove prevents resin from flowing between the sealing mold and the exposed surface of the heat sink during resin sealing, The size of the thin burr formed on the exposed surface of the heat sink can be restricted.
[0071]
According to the semiconductor device of the seventh aspect, there is an effect similar to that of the first or third aspect.
[0072]
According to the semiconductor device of the eighth aspect, in addition to the same effects as those of the first or third aspect, by performing insulation treatment on the radiator plate, it is possible to prevent a short circuit between the thin metal wire and the radiator plate.
[0073]
According to the semiconductor device of the ninth aspect, in addition to the same effect as the first or third aspect,
According to the semiconductor device of the tenth aspect, in addition to the same effect as the first or third aspect,
According to the method of manufacturing a semiconductor device according to the eleventh aspect, in addition to the same effect as that of the first aspect, it is possible to secure high heat radiation while reducing the stress applied to the semiconductor chip during resin sealing. Can be made thinner.
[0074]
According to the method of manufacturing a semiconductor device of the twelfth aspect, the same effect as that of the eleventh aspect can be obtained.
[Brief description of the drawings]
FIGS. 1A and 1B are views showing a semiconductor device according to a first embodiment of the present invention, wherein FIG. 1A is a top view of the semiconductor device and FIG. 1B is a cross-sectional view of the semiconductor device.
FIGS. 2A and 2B are views showing a semiconductor device according to a second embodiment of the present invention, wherein FIG. 2A is a top view of the semiconductor device and FIG. 2B is a cross-sectional view of the semiconductor device.
3A and 3B are views showing a semiconductor device according to a third embodiment of the present invention, wherein FIG. 3A is a top view of the semiconductor device and FIG. 3B is a cross-sectional view of the semiconductor device.
FIG. 4 is a sectional view of a semiconductor device according to a fourth embodiment of the present invention.
FIG. 5 is a process cross-sectional view for explaining a pre-process of a die bonding process of the first embodiment to the fourth embodiment.
FIG. 6 is a process cross-sectional view for explaining a die bonding process of the first embodiment to the fourth embodiment.
FIG. 7 is a process cross-sectional view for explaining a wire bonding process of the first embodiment to the fourth embodiment.
FIG. 8 is a diagram for explaining a pre-process of a process of connecting a heat sink according to the first to fourth embodiments, and FIG. 8A is a process cross-sectional view when an adhesive is used; (B) is a process sectional view in the case of using an Au bump.
FIGS. 9A and 9B are diagrams for explaining a process of connecting the heat sinks according to the first to fourth embodiments, wherein FIG. 9A is a process cross-sectional view when an adhesive is used, and FIG. () Is a process sectional view in the case of using an Au bump.
FIG. 10 is a process cross-sectional view for describing a resin sealing process of the first embodiment to the fourth embodiment.
11A and 11B are views showing a conventional semiconductor device, in which FIG. 11A is a cross-sectional view of a semiconductor device exposing a die pad, and FIG. 11B is a cross-sectional view of a semiconductor device having a built-in heat sink.
[Explanation of symbols]
REFERENCE SIGNS LIST 1 die pad 2 adhesive 3 semiconductor chip 4 metal wire 5 inner lead 6 outer lead 7 sealing resin body 9 heat sink 10 adhesive 11 through hole 12 groove 13 Au bump 14 lead frame 15 stage 16 dispenser 17 collet 18 heat stage 19 bonding Pad 20 Fixing jig 21 Heat sink collet 22 Lead frame polymer 23 Upper die 24 Lower die 25 Cavity upper 26 Cavity upper 27 Pot 28 Plunger 29 Cull 30 Runner 31 Gate 32 Escape part

Claims (12)

ダイパッドと、このダイパッドの表面に搭載された半導体チップと、前記ダイパッドの周辺に配置されて前記半導体チップの電極と金属細線により電気的に接続されたリードと、前記半導体チップの表面に熱伝達可能に接続した放熱板と、この放熱板が露出するように前記半導体チップおよび前記金属細線が封止された封止樹脂とを備えた半導体装置。A die pad, a semiconductor chip mounted on the surface of the die pad, a lead disposed around the die pad and electrically connected to an electrode of the semiconductor chip by a thin metal wire, and capable of transferring heat to the surface of the semiconductor chip. And a sealing resin in which the semiconductor chip and the thin metal wires are sealed such that the heat sink is exposed. ダイパッドの半導体チップが接着されている面と反対側の面が封止樹脂から露出している請求項１記載の半導体装置。2. The semiconductor device according to claim 1, wherein a surface of the die pad opposite to a surface to which the semiconductor chip is bonded is exposed from the sealing resin. 配線電極を形成した基板と、この基板の表面に搭載された半導体チップと、前記配線電極と前記半導体チップの電極とが電気的に接続された金属細線と、前記半導体チップの表面に熱伝達可能に接続した放熱板と、この放熱板が露出するように前記半導体チップおよび前記金属細線を封止する封止樹脂とを備えた半導体装置。A substrate on which a wiring electrode is formed, a semiconductor chip mounted on the surface of the substrate, a thin metal wire in which the wiring electrode and the electrode of the semiconductor chip are electrically connected, and heat transfer to the surface of the semiconductor chip. And a sealing resin for sealing the semiconductor chip and the fine metal wires such that the heat sink is exposed. 放熱板の封止樹脂からの露出面に、凹部が形成されている請求項１または請求項３記載の半導体装置。4. The semiconductor device according to claim 1, wherein a concave portion is formed on an exposed surface of the heat sink from the sealing resin. 放熱板に複数の貫通穴が設けられている請求項１または請求項３記載の半導体装置。4. The semiconductor device according to claim 1, wherein the heat sink has a plurality of through holes. 放熱板の露出面には複数の溝が設けられている請求項１または請求項３記載の半導体装置。4. The semiconductor device according to claim 1, wherein a plurality of grooves are provided on an exposed surface of the heat sink. 放熱板に形成された凸部が半導体チップと接着されている請求項１または請求項３記載の半導体装置。The semiconductor device according to claim 1, wherein the protrusion formed on the heat sink is bonded to the semiconductor chip. 放熱板の表面は絶縁処理されている請求項１または請求項３記載の半導体装置。4. The semiconductor device according to claim 1, wherein the surface of the heat sink is insulated. 半導体チップと放熱板とが突起電極により接続されている請求項１または請求項３に記載の半導体装置。The semiconductor device according to claim 1, wherein the semiconductor chip and the heat sink are connected by a protruding electrode. 半導体チップと放熱板とは、シリコン樹脂により接着されている請求項１または請求項３記載の半導体装置。The semiconductor device according to claim 1, wherein the semiconductor chip and the heat sink are bonded with a silicone resin. ダイパッドに半導体チップを搭載する工程と、前記ダイパッドの周囲に配置されたリードと前記半導体チップの電極とを金属細線により電気的に接続する工程と、前記半導体チップに放熱板を熱伝達可能に接続する工程と、前記ダイパッドおよび前記放熱板が露出するように、少なくとも前記半導体チップおよび前記金属細線を封止樹脂により封止する工程とを含む半導体装置の製造方法。Mounting a semiconductor chip on the die pad, electrically connecting leads arranged around the die pad and electrodes of the semiconductor chip by thin metal wires, and connecting a heat sink to the semiconductor chip so that heat can be transferred. And a step of sealing at least the semiconductor chip and the thin metal wires with a sealing resin so that the die pad and the heat sink are exposed. 配線電極を形成した基板の表面に半導体チップを搭載する工程と、前記配線電極と前記半導体チップの電極とを金属細線により電気的に接続する工程と、前記半導体チップに放熱板を熱伝達可能に接続する工程と、前記半導体チップおよび前記金属細線を封止樹脂により封止し、前記放熱板を前記封止樹脂から露出させる工程とを含む半導体装置の製造方法。A step of mounting a semiconductor chip on the surface of the substrate on which the wiring electrodes are formed, a step of electrically connecting the wiring electrodes and the electrodes of the semiconductor chip with thin metal wires, and allowing a heat sink to be transferred to the semiconductor chip. A method for manufacturing a semiconductor device, comprising: a step of connecting; and a step of sealing the semiconductor chip and the fine metal wire with a sealing resin and exposing the heat sink from the sealing resin.
JP2002371545A 2002-12-24 2002-12-24 Semiconductor device and its manufacturing method Pending JP2004207307A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011181824A (en) * 2010-03-03 2011-09-15 Hitachi Automotive Systems Ltd Power semiconductor device and ac power generator for vehicle
CN101826496B (en) * 2005-05-23 2015-03-18 揖斐电株式会社 Printed wiring board and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101826496B (en) * 2005-05-23 2015-03-18 揖斐电株式会社 Printed wiring board and manufacturing method thereof
JP2011181824A (en) * 2010-03-03 2011-09-15 Hitachi Automotive Systems Ltd Power semiconductor device and ac power generator for vehicle

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