Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
  • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
• • C—CHEMISTRY; METALLURGY
  • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
  • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
  • C23F4/00—Processes for removing metallic material from surfaces, not provided for in group C23F1/00 or C23F3/00
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
  • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
  • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
  • H01L21/321—After treatment
  • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
  • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
  • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
  • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas

Definitions

• the present invention relates to the processing of A and alloys, and particularly to the processing of A and alloy layers in the production of fine electronic components such as semiconductor elements, magnetic elements, dielectric elements, semiconductor integrated circuits, and the like.
• the present invention relates to a dry etching method for an alloy, and more particularly to a dry etching method for forming fine wiring of A and an alloy for the above-mentioned fine electronic components.
• the A configuration of integrated circuits and the like has been processed by a wet etching method using a ring-based solution, but in recent years, in response to the miniaturization and high integration of integrated circuits, higher precision has been achieved.
• a dry etching method using glow discharge plasma that can realize microfabrication is being introduced.O In this method, chlorine, etc., which are generated in the plasma and have high chemical activity, have a direct difference.
• the etching shape is faithful to the mask pattern, and the mask bottom that can be seen by the wet etching method is used.
• gas plasma generally contains a large amount of neutral radicals that are not ionized but have strong chemical activity in the excited state, and are incident on the sample surface because they are electrically neutral.
• the orientation is isotropic, which often results in side etching similar to that of wet etching. Therefore, in realizing fine machining without the need for dry etching using the dry etching method, Therefore, it is very important to reduce the neutral radical concentration.
• there is a method to increase the ionization rate by increasing the electron temperature by increasing the high-frequency electric field intensity that generates force plasma that usually lowers the plasma pressure. is there.
• the sample surface temperature increases when the electron temperature increases.
• problems such as rising to 100 or more than 0'0, and the etching rate of the material to be etched is increased and the selectivity of the desired etching is reduced. .
• An object of the present invention is to provide a method for dry etching of an M alloy which does not have the above-mentioned problems, does not cause etching under a neutral radius in plasma, and does not generate etching.
• a dry etching method for A and an alloy according to the present invention is a dry etching method for processing a workpiece using glow discharge plasma of a gas containing a chloride gas, wherein the gas is
• at least one selected from hydrogen and hydride gas should be contained at 0.5 to: LO vol, preferably 1 to 4 vol%.
• the hydrogen compound gas may be at least one selected from, for example, hydrogen chloride, methane, ethylene, methyl chloride, and ethyl chloride.
• the above-mentioned chloride gas which is conventionally used for dry etching of A and its alloys, is generally usable force. Usually, it is boron trichloride or carbon tetrachloride or a mixed gas thereof. Boron trichloride is often used. These chloride gases may be mixed alone with hydrogen and / or a hydrogen compound gas; other gases may be mixed. That is, it is possible to use a mixed gas containing chloride gas, which has been conventionally used for dry etching of alloys and alloys. A predetermined amount of hydrogen and / or hydrogen is added to this mixed gas. What is necessary is just to add a compound gas. For example, a gas obtained by mixing boron trifluoride with less than or equal to 32 vol. ⁇ Of fluorene and / or less than or equal to 6.5 vol.% Of oxygen (for details, see the Official Gazette It is described in No. 55-94948 :).
• the pattern is the etching mask.
• Samples with photoresist pattern formed on the surface A of the etching ⁇ "material due to ratio, samples with silicon nitride agricultural pattern formed, silicon nitride film Create a pattern-shaped sample To, BC ⁇ 3 mixed gas (CF 4 force and CF 4;. was 1 0 vo under the same et etching conditions by plasma of l, was Delahaye Tutsi in g a result, the mined registry In the case of using a mask, no side etching occurred at all, whereas in the sample using silicon oxide or silicon nitride as a mask, significant side etching occurred.
• the selectivity of etching with the photoresist is increased, and when the etching speed of the photoresist is reduced, significant side etching similarly occurs. From the above results, there is no side etching of M only when the photoresist mask is etched fast enough, resulting in a force that is generated from the photoresist during etching.
• the component is a plasma It is presumed that the neutral radicals in the metal are selectively consumed to suppress side etching, and that the components generated from the photo resist are considered to be hydrogen and hydrocarbons.
• the A-dry etching method of the present invention has the same effect as suppressing side etching when hydrogen or hydrocarbons are generated from the etching mask as discovered by the present inventors. It is intended to be realized by adding a small amount of hydrogen or a hydrogen compound gas such as hydrocarbon to the etching gas in advance.
• any material that does not deform can be used as the etching mask, and it is possible to stably realize fine processing without side etching.
• the photoresist formed by applying a viscous liquid has a thickness of one according to the undulation of the substrate surface. There are locally thin spots.
• the etching method of the present invention must use silicon nitride, silicon oxide or the like as an etching mask in dry etching of an alloy containing Cu such as A-Cu-Si alloy. It is very effective to prevent ching.
• a material for such a heat-resistant etching mask a material which does not deform even when the temperature is raised to about 100 ° G, preferably 120 ° C. and which can withstand the dry etching atmosphere is used.
• the force that should be applied usually the above-mentioned silicon nitride, silicon oxide, polycrystalline silicon, molybutin, tungsten, gold, etc., is the impetus.
• the Cu compound that is a Cu residue does not evaporate sufficiently, and at a workpiece temperature exceeding this temperature range or on the surface of the alloy workpiece. This causes undesired results.
• ripening the workpiece temperature to a very high temperature has a problem in terms of equipment, and from this point, the above-mentioned temperature range g is improper.
• any of those conventionally known as small distribution materials and microelectrode materials can be used, but the Cu content should be 0.5 to 4 wt ⁇ . .
• a predetermined material made of silicon nitride or the like is used.
• the present invention can be applied to a workpiece composed of, but can also be applied to an A alloy.
• an A alloy to which the present invention can be applied for example, an alloy containing at least one selected from 0.5 to 4 wt% Cu and 0.8 to 2.3 wt% Si (that is,
• One Si, one Cu and A-Cu-Si alloy has the above-mentioned remarkable effects on dry etching of a ⁇ alloy containing Cu.
• the etching mask, the thickness of the workpiece, and the like may be the same as those in the prior art, and also include other etching conditions not described above. It is only necessary to follow the conventional technology.
• FIGS. 1 and 2 is for explaining the Dora Lee et pitch in g steps in Kazumi ⁇ of the present invention
• FIG. 3 is Eta 2 contained in the gas Ru used Dora Ye pitch in g the amount and graphs showing the relationship between the position Tsuchie Tsu quenching of the workpiece
• S i mined Les Soo bets
• S i 0 2 is a graph showing the relationship between the second embodiment and the etching speed.
• a silicon oxide film 5 having an opening at a predetermined position is formed on the upper surface. After that, a —2Si alloy (the added amount of the M alloy is
• the film 2 is deposited to a thickness of 1 Am, and then the silicon nitride film 3 is thickened by plasma CVD (chemical vapor deposition).
• AZ135OJ is formed by a photolithographic process.
• a pattern 4 was formed. This sample is accommodated in a reactive sputtering type drying apparatus. First, the nitriding / recon film 3 is dry-etched using a well-known CF 4 gas plasma, and then the photo-etching is performed. the registry 4 ashing removal in plasma of 0 2 gas, pulling followed by a second figure indicates to nitrided Li co Npata down 3 'as a mask Ji - dry et Tutsi ring of ° Si alloy film I went. The atmosphere used for the etching was BC,
• the substrate surface temperature is about 50
• Wiring material is — 4 Cu-2 ⁇ Si alloy, and A alloy
• the pedestal on which the workpiece is placed is heated by infrared heating or heating by the built-in heater to set the surface temperature of the workpiece to 160'0.
• a k-alloy wiring was formed in the same manner as in Example 1. As a result, it occurs when etching is performed at a low temperature of 10 O'O or lower.- It is possible to form a good A-4Cu-2 ⁇ Si alloy wiring without cracking the Cu residue. did it. In addition, side etching was not recognized.
• Example 2 was repeated except that the gas used for etching the A alloy was a mixed gas of BC ⁇ 3 , CF 4 t CH 3 C £, that is, CH 3 was used instead of H 2. Similarly, when —4% Cu-2 ⁇ Si alloy wiring was formed, almost the same results as in Example 2 were obtained.
• Fig. 3 shows the relationship between (vol ⁇ ) and the side etching amount (m) of the layer.
• Figure 4 shows Si, mined registry (AZ 1 3 5 0 J) and Si 0 2 of d pitch in g speed in the same conditions for reference.
• the present invention can be used for micromachining of and alloy layers, and is particularly suitable for micromachining of an A alloy layer containing Cu.

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• Engineering & Computer Science (AREA)
• Physics & Mathematics (AREA)
• Chemical & Material Sciences (AREA)
• Power Engineering (AREA)
• Computer Hardware Design (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Manufacturing & Machinery (AREA)
• Condensed Matter Physics & Semiconductors (AREA)
• General Physics & Mathematics (AREA)
• Mechanical Engineering (AREA)
• Metallurgy (AREA)
• Organic Chemistry (AREA)
• Materials Engineering (AREA)
• Plasma & Fusion (AREA)
• Chemical Kinetics & Catalysis (AREA)
• General Chemical & Material Sciences (AREA)
• Drying Of Semiconductors (AREA)
• ing And Chemical Polishing (AREA)

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• 1981
  • 1981-04-15 JP JP56055548A patent/JPS57170534A/ja active Granted
• 1982
  • 1982-04-09 DE DE8282901018T patent/DE3274886D1/de not_active Expired
  • 1982-04-09 US US06/453,894 patent/US4511429A/en not_active Expired - Lifetime
  • 1982-04-09 WO PCT/JP1982/000116 patent/WO1982003636A1/ja not_active Ceased
  • 1982-04-09 EP EP82901018A patent/EP0076860B1/en not_active Expired

Patent Citations (2)

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