USRE48018E1 - Method and arrangement for attaching a chip to a printed conductive surface - Google Patents
Method and arrangement for attaching a chip to a printed conductive surface Download PDFInfo
- Publication number
- USRE48018E1 USRE48018E1 US16/007,530 US201016007530A USRE48018E US RE48018 E1 USRE48018 E1 US RE48018E1 US 201016007530 A US201016007530 A US 201016007530A US RE48018 E USRE48018 E US RE48018E
- Authority
- US
- United States
- Prior art keywords
- chip
- conductive surface
- printed conductive
- printed
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active, expires
Links
- 238000000034 method Methods 0.000 title claims description 45
- 238000003825 pressing Methods 0.000 claims abstract description 55
- 239000000463 material Substances 0.000 claims abstract description 28
- 239000000758 substrate Substances 0.000 claims description 75
- 238000012546 transfer Methods 0.000 claims description 21
- 230000004907 flux Effects 0.000 claims description 18
- 239000002245 particle Substances 0.000 claims description 17
- 238000007639 printing Methods 0.000 claims description 14
- 238000010438 heat treatment Methods 0.000 claims description 11
- 230000001070 adhesive effect Effects 0.000 claims description 9
- 239000000853 adhesive Substances 0.000 claims description 8
- 229910052751 metal Inorganic materials 0.000 claims description 8
- 239000002184 metal Substances 0.000 claims description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 5
- 229910052710 silicon Inorganic materials 0.000 claims description 5
- 239000010703 silicon Substances 0.000 claims description 5
- 238000002844 melting Methods 0.000 description 41
- 230000008018 melting Effects 0.000 description 41
- 239000003292 glue Substances 0.000 description 21
- 230000008569 process Effects 0.000 description 21
- 229910000679 solder Inorganic materials 0.000 description 15
- 239000004065 semiconductor Substances 0.000 description 13
- 238000004519 manufacturing process Methods 0.000 description 11
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 6
- 239000004922 lacquer Substances 0.000 description 6
- 238000012360 testing method Methods 0.000 description 6
- 235000012431 wafers Nutrition 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 239000004020 conductor Substances 0.000 description 5
- 238000001816 cooling Methods 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 229910052709 silver Inorganic materials 0.000 description 5
- 239000004332 silver Substances 0.000 description 5
- 238000004026 adhesive bonding Methods 0.000 description 4
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 4
- 239000011111 cardboard Substances 0.000 description 4
- 150000001875 compounds Chemical class 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 229910000765 intermetallic Inorganic materials 0.000 description 4
- 229920000642 polymer Polymers 0.000 description 4
- 230000001681 protective effect Effects 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 229910052797 bismuth Inorganic materials 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 3
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 3
- 239000012528 membrane Substances 0.000 description 3
- 239000011087 paperboard Substances 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000013459 approach Methods 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 239000000112 cooling gas Substances 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- 239000012768 molten material Substances 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 230000001902 propagating effect Effects 0.000 description 2
- 238000003892 spreading Methods 0.000 description 2
- 230000007480 spreading Effects 0.000 description 2
- 239000010935 stainless steel Substances 0.000 description 2
- 229910001220 stainless steel Inorganic materials 0.000 description 2
- 238000004804 winding Methods 0.000 description 2
- 229910001152 Bi alloy Inorganic materials 0.000 description 1
- 229910000846 In alloy Inorganic materials 0.000 description 1
- 101150044561 SEND1 gene Proteins 0.000 description 1
- 229910001128 Sn alloy Inorganic materials 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 238000007792 addition Methods 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- 230000003190 augmentative effect Effects 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000005097 cold rolling Methods 0.000 description 1
- 239000002178 crystalline material Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 235000013305 food Nutrition 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000004807 localization Effects 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 238000012805 post-processing Methods 0.000 description 1
- 230000000644 propagated effect Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
- B23K1/0008—Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
- B23K1/0016—Brazing of electronic components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
- H05K13/04—Mounting of components, e.g. of leadless components
- H05K13/046—Surface mounting
- H05K13/0465—Surface mounting by soldering
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
- H05K3/323—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3494—Heating methods for reflowing of solder
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0278—Flat pressure, e.g. for connecting terminals with anisotropic conductive adhesive
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/111—Preheating, e.g. before soldering
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
- H05K3/1266—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by electrographic or magnetographic printing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/53—Means to assemble or disassemble
- Y10T29/5313—Means to assemble electrical device
- Y10T29/53174—Means to fasten electrical component to wiring board, base, or substrate
- Y10T29/53178—Chip component
Definitions
- the present invention relates generally to the technology of connecting an integrated circuit component, also known as a chip, to a surface that comprises conductive patterns. Especially the present invention concerns a case in which said conductive patterns are produced by printing.
- PCB printed circuit board
- a traditional, epoxy- or polyester based circuit board is often referred to as a printed circuit board (PCB)
- PCB printed circuit board
- the use of (silk screen) printing is limited to producing the etch-resistant ink patterns prior to the etching of unwanted copper, as well as to producing visible markings on the surface of an otherwise completed board.
- True printed electronics mean that conductive, semiconductive and possibly other patterns that constitute actual functional elements of the electronic circuit are formed on a substrate in a printing process, i.e. printed on the substrate.
- the dimensions of typical printed electronics are macroscopic, at least compared to the micro- or nanometre scale line widths and other structures encountered in integrated circuits. This means that implementing complex functionalities with printed electronics requires using a relatively large surface area and/or augmenting the actual printed electronics with integrated circuit components or chips. Also the longer designation “semiconductor chip” can be used, but it should be noted that the base of a chip is not always made of semiconductor material: also e.g. glass-, sapphire-, and steel based chips are known, as well as chips printed with semiconductive polymers onto an isolating polymer base. If chips are to be used, there arises the natural need to attach and connect a chip to the printed electronics.
- the term to attach and its derivatives mean attaching physically, i.e. keeping from coming loose, while the term to connect and its derivatives mean producing an electrically conductive connection. It should be noted, though, that these terms are not mutually exclusive, but a strong enough method like e.g. soldering may be used to simultaneously attach and connect.
- FIG. 1 illustrates a known method for attaching and connecting a chip 101 to printed electronics, of which there are shown the conductive areas 102 and 103 that have been printed on a substrate 104 .
- the substrate 104 is paper or cardboard
- the conductive areas 102 and 103 are pieces of metallic foil (or more generally: areas covered with an essentially metallic compound).
- solder bumps 105 and 106 are solder bumps 105 and 106 , and corresponding patches of solder flux 107 and 108 have been spread on the conductive areas 102 and 103 .
- the flux could also have been spread on the solder bumps 105 and 106 , or provided in the material of the solder bumps.
- a drop of glue 109 has been applied to that surface of the chip 101 that faces the substrate 104 .
- the glue helps to keep the chip immobilized at the desired location during the time when sufficient heat is applied to cause at least partial melting of the solder bumps.
- the flux helps to control the flowing of the melted solder. After cooling, the chip remains attached to the substrate, with electric connections established at the locations where the melting solder formed a bond with the appropriate parts of the conductive areas.
- a disadvantage of the prior art method illustrated in FIG. 1 is that it is relatively slow. It is not uncommon that 10 to 15 seconds are needed to attach and connect a single chip. This may prove way too slow for example for large-scale manufacturing of cardboard-made consumer packages for food supplies.
- An advantageous feature of embodiments of the present invention is the provision of a method and an arrangement for attaching and connecting a chip to a printed conductive surface quickly, smoothly and reliably.
- the objectives of the present invention are achieved by using a material with particular melting characteristics to produce at least a part of the printed conductive surface, and by bringing the necessary heat to the bonding phase together with the chip.
- a printed conductive surface to which a chip should be attached, of a material that has a melting point at a temperature that is lower than what the chip can stand without being damaged.
- Melting may take place at the printed conductive surface, at a solder bump or other contact area of the chip, or both. The melting may be assisted by pressing the chip against the printed conductive surface with a suitable force.
- a particular class of embodiments of the present invention involves using a steel- or other metal based chip, which can stand relatively a large strain. Consequently a relatively large force can be used to press the chip against the printed conductive surface, so that in the combination of temperature and pressing force the latter has a significant role in causing the melting at the desired locations.
- Another particular class of embodiments of the present invention involves using a chip where the base is solely made of silicon or other crystalline matter. Crystalline substances of this kind break relatively easily under strain, which means that only a relatively light force can be used to press the chip against the printed conductive surface. Considering the combination of temperature and pressing force, in this class of embodiments the melting is essentially exclusively caused by the former.
- One class of embodiments of the present invention involves using a layer of anisotropically conductive glue on the printed conductive surface.
- Anisotropically conductive glue is initially not electrically conductive to any significant extent. Locally applying heat will cause conductive particles in the glue to melt and form a conductive path through the glue at a particular location.
- FIG. 1 illustrates a prior art method
- FIG. 2 illustrates attaching and connecting a chip according to an embodiment of the present invention
- FIG. 3 illustrates a detail related to melting the material of the printed conductive surface
- FIG. 4 illustrates a detail related to melting the material of the contact point
- FIG. 5 illustrates a detail related to the use of anisotropically conductive glue
- FIG. 6 illustrates an apparatus according to an embodiment of the present invention
- FIG. 7 illustrates an apparatus according to another embodiment of the present invention
- FIG. 8 illustrates a printing section
- FIG. 9 illustrates a method according to an embodiment of the present invention
- FIG. 10 illustrates an apparatus according to an embodiment of the present invention
- FIG. 11 illustrates a detail of the apparatus of FIG. 10 .
- FIG. 12 illustrates another detail of the apparatus of FIG. 10 .
- FIG. 13 illustrates an apparatus according to an embodiment of the present invention.
- the chip can be heated to a first temperature, and the heated chip can be pressed against the printed conductive surface with a first pressing force, so that the combination of the first temperature and the first pressing force is sufficient to at least partly melt the material of either the printed conductive surface, or a contact point on the chip, or both.
- the localization of melting and other phenomena related to melting and attachment of components to each other, and the behaviour of molten and/or nearly molten material can be further controlled through the controlled application of flux.
- FIG. 2 illustrates an example, in which a substrate 204 comprises one or more printed conductive surfaces, of which the upper surface with patterns 202 and 203 is shown in FIG. 2 .
- the chip 201 is heated to a first temperature as shown on the left in FIG. 2 .
- the chip should be workable after connecting, which leads to the natural consequence that said first temperature must be lower than what the chip can stand without being damaged by the heat.
- the heated chip is pressed against the printed conductive surface with a first pressing force, as illustrated in the middle part of FIG. 2 .
- the combination of the first temperature and the first pressing force is sufficient to at least partly melt the material of either the patterns 202 and 203 of printed conductive surface, or the contact points 205 and 206 on the chip, or both.
- the chip becomes both attached and connected to the printed conductive surface, as illustrated on the right in FIG. 2 .
- the chip 201 comprises a metal base.
- Kovio Inc. 233 S. Hillview Dr., Milpitas, Calif., USA, provides chips where semiconductor parts made of printed silicon reside on a stainless steel base.
- Metal-based chips are available from other manufacturers as well, and other metals than stainless steel can be used as the base.
- a metal-base chip may stand temperatures up to 400 degrees centigrade, and the metal base has also excellent mechanical strength, meaning that it can stand a relatively high strain.
- the last-mentioned characteristic allows pressing a heated metal-base chip against a printed conductive surface with a pressing force that creates a pressure between 1 and 10 MPa (megapascals), calculated by dividing the pressing force by the surface area of the chip.
- MPa megapascals
- metal-based chips allow using a relatively large pressing force, they do not necessarily require it if the process is otherwise made such that a smaller force is enough.
- the pressure used with metal-based chips could be 0.1 MPa or even less.
- the surface pressure experienced by the printed conductive surface is highest at those almost point-like areas where the contact points 205 and 206 touch the patterns 202 and 203 respectively.
- This high local pressure together with the heat conducted to the same regions from the body of the chip 201 , causes localized phenomena related to melting and attachment that produces an essentially solder-type joint at each contact point.
- the point-like nature of the heat conduction and surface pressure application at the contact points ensures that most of the patterns 202 and 203 remain not melted, which in turn means that the local topology of the contact area remains well organized and does not become messy. This is advantageous, because difficultly controlled large-scale melting of the material of the patterns 202 and 203 could easily create short circuits between parts of the resulting electric circuit that must remain isolated from each other. Especially if the printed conductive surface is not exactly horizontal at the moment of attaching and connecting the chip, and/or if the state of movement of the mechanical system changes causing acceleration forces, large-scale melting of the patterns 202 and 203 could also cause significant portions of the molten conductive material to flow out of its intended position on the surface of the substrate 204 .
- the pace at which solidifying occurs can be affected by actively controlling an ambient temperature at the location of pressing the heated chip against the printed conductive surface.
- an ambient temperature at the location of pressing the heated chip against the printed conductive surface.
- there may be a cooled or otherwise temperature-controlled support below the substrate 204 which quickly absorbs heat by conduction through the patterns 202 and 203 and the substrate 204 .
- Such a support may take e.g. the form of a roll or a planar support.
- Another exemplary way of actively controlling an ambient temperature is to deliver cooled gas to an area surrounding or adjacent to the location of pressing the heated chip against the printed conductive surface.
- the base of the chip 201 can be made of glass or sapphire; or silicon or other crystalline material that is used as a base for semiconductor components.
- the base of the chip 201 can be made of glass or sapphire; or silicon or other crystalline material that is used as a base for semiconductor components.
- most other than metallic base materials have a lower mechanical strength, and in many cases also a lower critical temperature that the chip can stand without being damaged by the heat.
- the process parameters (temperatures, pressing force, handling speed, etc.) need to be carefully selected so that they suit the chip technology that is used.
- the first temperature, to which the chip is heated is not significantly higher than 200 degrees centigrade; and the first pressing force, with which the chip is pressed against the printed conductive surface, is not significantly larger than 1 megapascal.
- FIGS. 3 and 4 illustrate two basic approaches to making the solder joint between a chip and a conductive pattern.
- the contact point 305 is made of a conductive material that has a relatively high melting temperature, such as gold, silver, copper, or aluminium.
- the melting temperature of the contact point 305 may be the same as with conductive pattern, whereupon both are at least partly melt in the process.
- the pattern 302 is made of a conductive material that has a relatively low melting temperature, for example of a metallic compound that constitutes or resembles a low-temperature solder.
- a melting temperature (at least under pressure) of the material of the pattern 302 is lower than the highest temperature that the chip 201 (and the substrate 204 ) can stand without being damaged by the heat.
- the chip 201 is made sufficiently hot so that the temperature of the contact point 305 , together with the force pressing the chip 201 against the substrate 204 , suffices to locally melt the material of the pattern 302 .
- the contact point 405 is made of a conductive material that has a relatively low melting temperature, such as a metallic compound that constitutes or resembles a low-temperature solder.
- the melting temperature of the contact point 305 may be the same as with conductive pattern, whereupon both are at least partly melt in the process.
- the pattern 402 is made of a conductive material that has a higher melting temperature than the contact point 405 , for example gold, silver, copper, aluminium, or some metallic or non-metallic conductive compound. In this case it is essential that a melting temperature (at least under pressure) of the material of the contact point 405 is lower than the highest temperature that the chip 201 can stand without being damaged by the heat.
- the substrate 204 does not need to be particularly heat-resistant, because the pattern 402 is between it and the heated chip, and because the heat of the chip can be kept from advancing to the substrate in any excessive amount by selecting the temperatures, forces, time durations, support structure characteristics and/or ambient cooling suitably.
- the chip 201 is made sufficiently hot so that the temperature of the contact point 405 , together with the force pressing the chip 201 against the substrate 204 , suffices to locally melt the material of the contact point 405 .
- FIGS. 3 and 4 Cross-breeds between the embodiments of FIGS. 3 and 4 are possible, either so that melting occurs at least partly both in a contact point and in the printed conductive surface it touches, or so that a chip has contact points made of different materials, and it is attached to a number of patterns of different materials on the printed conductive surfaces, so that in some of the contact point—pattern pairs melting occurs in the former, and in others in the latter.
- the contact point of a chip is not necessarily bump-formed or protruding to any significant extent.
- chips that have their contact points formed as conductive pads on a surface that otherwise has been oxidized or otherwise made unconductive.
- bump-like contact points may involve advantages in controlling the pressure distribution at the zone where melting is to occur, for the purposes of the present invention it is not important, how the contact points of the chips are formed.
- FIG. 5 illustrates yet another alternative embodiment, in which attaching and connecting a chip to a printed conductive surface is accomplished with the help of anisotropically conductive glue.
- a printed conductive surface which comprises a conductive pattern 501 and a layer 502 of anisotropically conductive glue.
- the last-mentioned originally comprises a large number of conductive particles, typically of the size of 5-50 micrometres in diameter, each enclosed inside an isolating layer or otherwise manufactured so that they do not make conductive connections with each other.
- sufficient heat typically 75-140 degrees centigrade
- the isolating layer and/or a viscous agent mixed with the particles is sticky in order to realize the glueing function.
- a heated contact point 205 of a chip comes into contact with the layer 502 of anisotropically conductive glue, it dissolves, burns, evaporates, or otherwise destroys the isolating layer, or produces another reaction that causes the particles to become macroscopically conductive, in a number of conductive particles in the vicinity.
- the conductive particles that are affected form an electrically conductive connection 503 between the contact point and the conductive pattern.
- the glueing function of that part of the anisotropically conductive glue where the isolating layers are still intact (or where some of the viscous agent remains) may be utilized to assist attaching the chip in place.
- the glueing function may be utilized at parts of the chip that are not adjacent to the contact point.
- the heat brought along by the chip may be sufficient to melt those conductive particles that constitute the conductive connection, which makes it essentially a solder joint.
- anisotropically conductive glue limiting the melting to small areas around the contact points was advantageous because it helped to avoid unwanted smearing of other conductive parts of the circuit. Also with anisotropically conductive glue, it is advantageous (if not even essential) to limit the reaction where the particles become to form a macroscopically conductive connection to only small areas around the contact points, but for a slightly different reason. Avoiding the smearing of other inherently conductive parts of the circuit is not such an issue, because anisotropically conductive glue is not macroscopically conductive before the application of sufficient heat. However, it is advantageous to keep it that way, i.e.
- anisotropically conductive glue may even be spread as a continuous layer across the whole printed conductive surface. Applying continuous layers, or at least avoiding the need for very carefully designed, patterned layers, is typically advantageous in printing, because it may eliminate and/or simplify patterning steps from the manufacturing process and thus make it cheaper and technically simpler.
- FIG. 6 illustrates schematically an apparatus for attaching a chip to a printed conductive surface.
- the apparatus has been built as a part of a larger printing process.
- a substrate web is unrolled from an input roll 601 , and fed through an optional tension controller 602 to a nip where the substrate web passes between an impression roll 603 and a corresponding support roll 604 .
- a printing arrangement 605 is configured to interact with the impression roll 603 so that as a result, the impression roll 603 produces a printed conductive surface on the substrate web, typically comprising a number of conductive patterns.
- Various technologies exist for producing a printed conductive surface on a substrate web and they are outside the scope of the present invention, so they do not need to be discussed here in more detail. Examples of such technologies are known for example from the PCT publication number WO2009/135985.
- Semiconductor chips have been previously manufactured and arranged in a particular pattern, which corresponds to the patterning of said printed conductive surface, on a carrier band.
- the carrier band is unwound from a carrier band roll 606 at a speed that is synchronized with the propagation speed of the substrate web.
- An optional flux application arrangement 607 may be provided for applying flux to selected parts (typically the exposed contact points) of the chips on the carrier band. It is also possible that flux has been applied to the contact points of the chips already previously before winding the carrier band on the carrier band roll 606 . In some embodiments flux may not be needed at all, but in many cases it is advantageous because it helps to focus the subsequent melting of solder (or particles of anisotropically conductive glue) to the desired locations.
- the substrate web with its printed conductive surface, and the carrier band with the chips it carries, are both taken to a nip between a heated roll 609 and a support roll 610 .
- the flux may be applied on the conductive pattern especially to areas where the chip contact points are to be located and/or attached.
- An optional tension controller 608 is shown to control the tension of the substrate web.
- the carrier band comes into contact with the heated roll 609 earlier than the substrate web, causing the chips on the carrier band to be heated to a predetermined first temperature, which is lower than what the chips can stand without being damaged by the heat.
- the substrate and/or the conductive pattern may be preheated before the chip attachment. For example an antenna is warm after its printing process, whereafter if the antenna is then still kept warm, it is already preheated for the chip attachment, whereupon the later chip attachment with the antenna is much more easier and faster. In addition the preheated antenna reduces the need of additional heating.
- the printed conductive surface and/or substrate may be preheated for example to temperatures between 25-200 degrees centigrade before attaching the chip to the printed conductive pattern.
- the chip can also be attached without heating the substrate and/or conductive pattern, whereupon the needed heat energy is transferred by, from or via the chip.
- the chip may be for example preheated.
- the heated chips carried by the carrier band become pressed against the printed conductive surface with a first pressing force.
- a combination of said first temperature and said first pressing force is sufficient to at least partly melt the material of the printed conductive surface and/or the contact point on a chip.
- the temporary attachment of the chips to the carrier band is such that the chips become detached from the band web simultaneously when they become attached to the printed conductive surface.
- the remaining carrier band is collected on a collector roll 611 .
- the printed conductive surface with the chips attached thereto is optionally cooled with a cooling gas flow from a nozzle 612 , and also optionally protected with a layer of protective lacquer sprayed from another nozzle 613 before winding the chip-equipped substrate onto an output roll 614 .
- FIG. 7 illustrates schematically another apparatus for attaching a chip to a printed conductive surface.
- the apparatus has again been built as a part of a larger process, which includes printing and other operations for manufacturing a product, such as an intelligent package.
- Sheets of a substrate material, such as cardboard are brought to the process on an input tray 701 .
- One sheet at a time is input to the process on a conveyor 702 .
- a printing machine 703 such as a digital printer or an apparatus known from WO2009/135985, is used to form a printed conductive surface on the substrate sheet.
- the printed conductive surface may comprise for example conductive patterns that are designed to function as parts of electric circuits.
- the apparatus for attaching the chips to the printed conductive surface comprises one or more manipulator arms, of which arm 705 is shown as an example.
- the apparatus is configured to use a manipulator arm to pick a chip from the tray and to place the chip at a correct location on the printed conductive surface.
- a combination of the temperature of the chip and the pressing force used to press it against the printed conductive surface is sufficient to at least partly melt the material of either the printed conductive surface, or a contact point on the chip, or both.
- the tray 704 may comprise a heater configured to heat at least some of the chips on the tray.
- the manipulator arm 705 used to transfer the chip from the tray to the printed conductive surface may comprise an integrated heater configured to transfer heat to the picked chip, or there may be a separate heater apparatus or heating zone through which the manipulator arm is configured to take the chip on its way from the tray to the printed conductive surface.
- this embodiment of the invention allows controlling the temperature and/or pressing force of each chip very accurately. It is even possible to use the very same apparatus to simultaneously (or in close succession) attach and connect chips that require different temperatures, different pressing forces and/or other kind of different handling.
- Using a manipulator arm to press the chip against the printed conductive surface involves the additional advantage that the time during which the manipulator arm keeps the chip in place before letting go can be selected relatively freely.
- the embodiment of FIG. 7 allows using the manipulator arm to keep the chip in place until the melted parts of the printed conductive surface and/or the contact point on the chip have solidified again, which significantly reduces the risk of creeping type alignment errors.
- Local cooling can be used if necessary to accelerate the cooling, for example in the form of a locally administrated cooling gas jet or a conductive cooling arrangement integrated in the manipulator arm.
- the process may include optional additional processing steps, of which the spreading of a protective lacquer with a nozzle 706 and cutting the substrate sheet with a cutting machine 707 are shown in FIG. 7 .
- Other possible additional processing steps include but are not limited to creasing, glueing, bending, and the adding of additional electronics, like an RFID tag.
- Completed workpieces are collected on an output tray 708 .
- FIG. 8 illustrates schematically a printing section, which has been illustrated only schematically as 603 , 604 , and 605 in FIGS. 6 and 703 in FIG. 7 .
- a first section 801 is configured to print patterns 802 and 803 of an adhesive on the surface of a substrate 804 .
- a fluidized powderbed or some other kind of particle applicator 807 has been configured to temporarily cover the electrically charged surface of the dielectric transfer roll 805 with a continuous layer of conductive particles.
- the surface of the substrate with the patterns of the adhesive is arranged to come into contact with the continuous layer of conductive particles on the electrically charged surface of the dielectric transfer roll. Electrically conductive particles stick to the adhesive patterns, thus constituting the basis for the conductive patterns and in general the printed conductive surface.
- the advantageous characteristics of conductivity of the conductive patterns can be enhanced by subsequently cold rolling them like in the nip 809 of FIG. 8 , and/or by heating them so that at least partial melting of the conductive particles occurs.
- FIG. 9 is a general representation of a method according to an embodiment of the invention.
- Step 901 represents manufacturing a semiconductor chip; correspondingly step 902 represents manufacturing a substrate which in the completed construction will form the basis on which the combination of a printed conductive surface and the chip attached and connected thereto will appear.
- Steps 903 and 904 represent preparing the chip and the substrate respectively.
- preparing the chip at step 903 may comprise placing the chip onto a tray or a carrier band, and possibly also applying flux to selected locations of the chip.
- Preparing the substrate at step 904 may comprise cleaning the surface of the substrate and/or otherwise ensuring that the surface of the substrate is ready for receiving printed conductive patterns.
- Step 905 represents heating the chip to a first temperature, which is lower than what the chip can stand without being damaged by the heat.
- step 906 represents forming the printed conductive surface, which typically means forming conductive patterns on a surface of the substrate in a printing process.
- the heated chip is pressed against the printed conductive surface with a first pressing force.
- a combination of said first temperature and said first pressing force is sufficient to at least partly melt the material of the printed conductive surface and/or a contact point on the chip.
- Step 908 represents post-processing, non-limiting examples of which have been considered in the description of FIGS. 6 and 7 .
- FIG. 10 is a top view of an exemplary apparatus according to an embodiment of the invention.
- the task of the apparatus is to attach and connect a semiconductor chip to each piece of printed electronics that travels through the apparatus.
- the pieces of printed electronics are loop-formed antennae, but the same principle is naturally applicable irrespective of what are the exact nature and form of the semiconductor chips and the pieces of printed electronics.
- the apparatus should post-process the printed electronics to ensure that they are ready for use as e.g. RFID tags.
- the main sections of the apparatus is the chip attaching and connecting section 1001 , the slitter winder section 1002 , the lacquer deposition section 1003 and the testing unit 1004 .
- the slitter winder section 1002 is configured to cut a substrate carrying the workpieces into smaller parts for easier further handling
- the lacquer deposition section 1003 is configured to spread a layer of protective lacquer on the workpieces
- the testing unit 1004 is configured to test the workpieces for appropriate operation.
- the semiconductor chips are brought to the process on a tray, of which tray 1005 is shown as an example.
- the semiconductor chips may have been manufactured as parts of a silicon wafer, for example a 6 inches or 12 inches wafer, and cut loose to make them ready for picking.
- the step of cutting loose individual semiconductor chips from the wafer may be integrated as a part of the chip attaching and connecting section 1001 .
- FIG. 11 illustrates a principle according to which a so-called pick-flip manipulator 1101 picks a chip 1102 and flips over so that the chip 1102 is offered to a next handling step.
- FIG. 11 illustrates a principle according to which a so-called pick-flip manipulator 1101 picks a chip 1102 and flips over so that the chip 1102 is offered to a next handling step.
- FIG. 12 illustrates a principle according to which a place-and-press manipulator 1201 takes the chip offered by the pick-flip manipulator 1101 and applies flux to its desired portions for example by bringing the chip close enough to a rotating flux applicator 1202 in a desired manner.
- the right part of FIG. 12 illustrates a place-and-press manipulator placing a semiconductor chip at the right location in the piece of printed electronics and pressing it against the printed conductive surface in order to implement the combined attaching and connecting according to an embodiment of the invention.
- heating the chip to a first temperature can be accomplished in many ways: for example by applying heat through the place-and-press manipulator 1201 , and/or through a heater element 1203 below the workpiece, and/or by using a heated gas jet or a radiation heater, which are not shown in FIG. 12 .
- element 1203 can be considered to illustrate a back support that supports the substrate and workpieces during the time when the chip is pressed against the printed conductive surface.
- the place-and-press manipulator implements pressing the heated chip against the printed conductive surface with a first pressing force. A combination of the first temperature and the first pressing force is sufficient to at least partly melt the material of the printed conductive surface and/or a contact point on the chip.
- a first exemplary setup involved a substrate web the width (i.e. the dimension in the direction perpendicular to the arrow indicating propagating direction in FIG. 10 ) of which was half of that illustrated in FIG. 10 . It carried two parallel lines of antennae (instead of the four parallel lines shown in FIG. 10 ), each line having 16 antennae per metre of length of the substrate. The substrate propagated in the direction illustrated with the arrow in FIG. 10 at a speed of 12 centimetres per second, which equals 7.2 metres per minute.
- Chips were brought to the process on a single wafer.
- the place-and-press manipulators were made movable so that they could keep a chip in place at its desired location on the printed conductive surface for the duration of one second. This was found sufficient to cause the chip to be attached and connected. Due to parallel operation in the two lines, the production rate was 32 units per metre times 7.2 metres per minute, equalling 224 manufactured units per minute or 13440 manufactured units per hour.
- a second exemplary setup was otherwise equal with the first, but it involved a substrate web twice as wide, with four parallel lines of antennae, chips on two wafers, as well as two parallel pick-flip manipulator and place-and-press manipulator units, making the configuration identical to that shown in FIG. 10 .
- the production rate was twice that of the first example, equalling 26880 manufactured units per hour.
- Image recognition capability would be advantageously built into the apparatus of FIG. 10 in order to enable continuous and accurate position control in placing the chips.
- One alternative is to have two assembly heads per antenna, one of them performing image recognition while the other picks and places the chip.
- infrared heating was applied to heat chips that are waiting to be picked.
- the place-and-press manipulators were heated, resulting in a chip temperature between 150 and 180 degrees centigrade at the time of pressing the chip against the printed conductive surface.
- accurate local injection or spraying of flux was considered. It is considered possible to reduce the time that is required to keep a chip in place at its desired location on the printed conductive surface from one second to 0.3 seconds or even less.
- the value 0.3 seconds would allow shortening the distance that the place-and-press manipulator moves along with the substrate from 12 centimetres (required above by the propagating speed 12 cm per second) to about 4 centimetres; or alternatively it would allow increasing the propagation speed of the substrate from 12 cm per second to about 36 centimetres per second.
- the last-mentioned alternative would naturally increase the production rate to three times that mentioned above.
- Buffered operation may be used, so that the substrate is stationary in relation to the chip attaching and connecting mechanism for the short time it takes to attach and connect a chip, and possibly then accelerates to a higher than average speed for a moment so that despite of the stopover, a desired average speed of production is maintained.
- Buffered operation is generally considered to allow reaching better accuracy, because there are fewer degrees of freedom in the movements that need to be controlled during attaching and connecting a chip.
- the temperatures mentioned above were related to a particular selection of the substance used to produce the conductive patterns on the substrate.
- the mentioned lower limit of 150 degrees could be significantly lowered by selecting for example an alloy of tin, bismuth, and indium, which has a melting point at about 75 degrees centigrade.
- Chips that were considered were RFID chips, some exemplary brands of which are the TI GEN2, HIGGS, MONZA2, and UCODE G2X in the UHF (ultrahigh frequency) range and the MIFARE UL and UCODE G2X in the HF (high frequency) range.
- the largest considered chip size was 7 mm times 2 mm, but it is believed to be advantageous if the apparatus has small die handling capacity down to 0.3 mm.
- the associated die thickness was between 0.07 and 0.5 mm, and bump height on the chips was between 10 and 30 micrometres. Using a relatively large chip of 10 square millimetres as an example, a pressing force between 0.2 and 5 newtons means a pressure between 0.02 and 0.5 megapascals.
- Assembling accuracy was required to have its so-called 3sigma value smaller than 100 micrometres, and the orientation accuracy was required to be ⁇ 30 degrees or lower.
- the process was suitable for both 6 inches and 12 inches wafers, and it specifically did not use any adhesive, neither conductive nor non-conductive (ACP/NCP; anisotropically conductive paste/non-conductive paste).
- the protective lacquer was applied after the attaching and connecting of the chips.
- As substrates, coated paper and cardboard were considered.
- the testing unit could advantageously be one that is capable of both HF testing and UHF testing.
- FIG. 13 is a schematic side view of an apparatus according to an embodiment of the invention.
- a substrate 1301 has at least one printed conductive surface, on which conductive patterns 1302 appear.
- the task of the apparatus is here to attach and connect one chip to each conductive pattern; chip 1303 is shown as an example.
- Chips originally come on a dicing membrane 1304 , which has a release polymer coating (not separately shown in FIG. 13 ).
- the chips are transferred onto a transfer film 1305 , the lower surface of which is covered with thermally releasing adhesive. It is also possible to manufacture the whole transfer film of a thermally decomposable material. If chips are originally available on a membrane that has (or the surface adhesive of which has) suitable release properties, it is not necessary to transfer the chips from one membrane to another for the purposes of this process.
- the transfer film 1305 brings the chips close to the conductive patterns on the printed conductive surface.
- a heat applicator 1306 “shoots” the chip off the transfer film 1305 by providing some very accurately localized heating.
- the amount of heat transferred is enough to release the chip from the transfer film and also enough to heat the chip to a first temperature, which is lower than what the chip can stand without being damaged by the heat but high enough to work in favour of attaching and connecting the chip.
- the heated chip is pressed against the printed conductive surface with a first pressing force either by the heat applicator 1306 or by a separate pressing means (not separately shown in FIG. 13 ).
- the speed at which the released chip is shot off the transfer film is high enough to cause the occurrence of a decelerating force when the chip hits the printed conductive surface, so that the decelerating force is simultaneously the pressing force.
- a combination of said first temperature and said first pressing force is sufficient to at least partly melt the material of the printed conductive surface and/or a contact point on the chip.
- the remaining transfer film is removed from the process, and the substrate with its chip-equipped printed conductive surface is taken to further processing steps, which may resemble e.g. those that were described earlier as steps 1002 , 1003 , and 1004 in FIG. 10 .
- “shooting” chips from the transfer film to the printed conductive surface may be used for only putting the chips in place, after which there would be a separate step in the process that applied the heat and the pressing force that eventually cause the chip to be attached and connected.
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mechanical Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16/007,530 USRE48018E1 (en) | 2010-10-14 | 2010-10-14 | Method and arrangement for attaching a chip to a printed conductive surface |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16/007,530 USRE48018E1 (en) | 2010-10-14 | 2010-10-14 | Method and arrangement for attaching a chip to a printed conductive surface |
US13/878,864 US9629255B2 (en) | 2010-10-14 | 2010-10-14 | Method and arrangement for attaching a chip to a printed conductive surface |
PCT/FI2010/050797 WO2012049352A1 (en) | 2010-10-14 | 2010-10-14 | Method and arrangement for attaching a chip to a printed conductive surface |
Publications (1)
Publication Number | Publication Date |
---|---|
USRE48018E1 true USRE48018E1 (en) | 2020-05-26 |
Family
ID=45937939
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US16/007,530 Active 2031-03-05 USRE48018E1 (en) | 2010-10-14 | 2010-10-14 | Method and arrangement for attaching a chip to a printed conductive surface |
US13/878,864 Ceased US9629255B2 (en) | 2010-10-14 | 2010-10-14 | Method and arrangement for attaching a chip to a printed conductive surface |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US13/878,864 Ceased US9629255B2 (en) | 2010-10-14 | 2010-10-14 | Method and arrangement for attaching a chip to a printed conductive surface |
Country Status (12)
Country | Link |
---|---|
US (2) | USRE48018E1 (ru) |
EP (1) | EP2628370A4 (ru) |
JP (1) | JP6038035B2 (ru) |
KR (2) | KR20130138264A (ru) |
CN (1) | CN103190206B (ru) |
AU (1) | AU2010362421B2 (ru) |
BR (1) | BR112013009147B8 (ru) |
CA (1) | CA2813538C (ru) |
MX (1) | MX2013004101A (ru) |
MY (1) | MY168368A (ru) |
RU (1) | RU2563971C2 (ru) |
WO (1) | WO2012049352A1 (ru) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20130138264A (ko) | 2010-10-14 | 2013-12-18 | 스토라 엔소 오와이제이 | 인쇄된 도전성 표면에 칩을 부착하기 위한 방법 및 구조 |
US9105760B2 (en) | 2011-11-07 | 2015-08-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Pick-and-place tool for packaging process |
US9079351B2 (en) * | 2012-06-22 | 2015-07-14 | Wisconsin Alumni Research Foundation | System for transfer of nanomembrane elements with improved preservation of spatial integrity |
US9776270B2 (en) * | 2013-10-01 | 2017-10-03 | Globalfoundries Inc. | Chip joining by induction heating |
US11133866B2 (en) | 2014-02-25 | 2021-09-28 | Pharmaseq, Inc. | All optical identification and sensor system with power on discovery |
US9296056B2 (en) | 2014-07-08 | 2016-03-29 | International Business Machines Corporation | Device for thermal management of surface mount devices during reflow soldering |
EP3212749B1 (en) | 2014-10-31 | 2023-04-19 | The Lubrizol Corporation | Marine diesel lubricating composition |
SE538792C2 (en) * | 2015-02-06 | 2016-11-29 | Stora Enso Oyj | Apparatus and method for component assembly |
US10882258B1 (en) * | 2016-01-22 | 2021-01-05 | Pharmaseq, Inc. | Microchip affixing probe and method of use |
US10977540B2 (en) | 2016-07-27 | 2021-04-13 | Composecure, Llc | RFID device |
US10762412B2 (en) | 2018-01-30 | 2020-09-01 | Composecure, Llc | DI capacitive embedded metal card |
US11151437B2 (en) | 2017-09-07 | 2021-10-19 | Composecure, Llc | Metal, ceramic, or ceramic-coated transaction card with window or window pattern and optional backlighting |
MX2021012822A (es) | 2017-09-07 | 2023-03-02 | Composecure Llc | Tarjeta de transaccion con componentes electronicos incorporados y procedimiento para su fabricacion. |
SE542007C2 (en) | 2017-10-13 | 2020-02-11 | Stora Enso Oyj | A method and an apparatus for producing a radio-frequency identification transponder |
MX2020004012A (es) | 2017-10-18 | 2020-09-25 | Composecure Llc | Tarjeta de transacción de metal, cerámica o recubierta con cerámica con ventana o patrón de ventana y retroiluminación opcional. |
SE541653C2 (en) * | 2017-11-03 | 2019-11-19 | Stora Enso Oyj | Method for manufacturing an RFID tag and an RFID tag comprising an IC and an antenna |
SE541540C2 (en) * | 2017-12-21 | 2019-10-29 | Stora Enso Oyj | Method for manufacturing a collar piece comprising an RFID tag |
JP6967726B2 (ja) * | 2018-01-31 | 2021-11-17 | パナソニックIpマネジメント株式会社 | はんだペーストおよび実装構造体 |
RU2729606C1 (ru) * | 2019-11-25 | 2020-08-11 | Акционерное общество «Информационные спутниковые системы» имени академика М.Ф.Решетнёва» | Способ совместного монтажа электрорадиоизделий и печатных плат радиоэлектронной аппаратуры |
US11546129B2 (en) | 2020-02-14 | 2023-01-03 | P-Chip Ip Holdings Inc. | Light-triggered transponder |
DE102020001439B3 (de) * | 2020-02-21 | 2021-06-10 | Mühlbauer Gmbh & Co. Kg | Vorrichtung und Verfahren zum Übertragen elektronischer Bauteile von einem ersten zu einem zweiten Träger |
US20220085992A1 (en) | 2020-09-17 | 2022-03-17 | P-Chip Ip Holdings Inc. | Devices, systems, and methods using microtransponders |
CN115113420B (zh) * | 2021-03-18 | 2024-10-15 | 北京小米移动软件有限公司 | 印刷头、印刷系统及印刷方法 |
CN113020880B (zh) * | 2021-04-14 | 2023-06-20 | 深圳市新晨阳电子有限公司 | 一种集成电路板研发用贴片电阻焊接试制工装 |
CN113490346B (zh) * | 2021-07-28 | 2022-10-04 | 苏州斯尔特微电子有限公司 | 一种芯片贴片机和芯片贴片方法 |
Citations (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3680196A (en) | 1970-05-08 | 1972-08-01 | Us Navy | Process for bonding chip devices to hybrid circuitry |
US3680198A (en) | 1970-10-07 | 1972-08-01 | Fairchild Camera Instr Co | Assembly method for attaching semiconductor devices |
US3680199A (en) | 1970-07-06 | 1972-08-01 | Texas Instruments Inc | Alloying method |
US4967950A (en) | 1989-10-31 | 1990-11-06 | International Business Machines Corporation | Soldering method |
JPH0521949A (ja) * | 1991-07-15 | 1993-01-29 | Hitachi Ltd | 表面実装部品位置決め装置 |
US5609292A (en) | 1992-12-04 | 1997-03-11 | International Business Machines Corporation | Manufacturing circuit boards using a pick and place machine |
JPH1050766A (ja) | 1996-08-02 | 1998-02-20 | Toshiba Corp | フェース・ダウン・ボンディング方法およびその装置 |
US5795818A (en) | 1996-12-06 | 1998-08-18 | Amkor Technology, Inc. | Integrated circuit chip to substrate interconnection and method |
RU2130125C1 (ru) | 1996-06-17 | 1999-05-10 | Научно-производственное объединение "Алтай" | Быстросгорающий заряд твердого топлива |
US6016949A (en) | 1997-07-01 | 2000-01-25 | International Business Machines Corporation | Integrated placement and soldering pickup head and method of using |
US6054682A (en) | 1999-03-11 | 2000-04-25 | Micron Electronics, Inc. | Method and system for reducing water vapor in integrated circuit packages prior to reflow |
US6108210A (en) | 1998-04-24 | 2000-08-22 | Amerasia International Technology, Inc. | Flip chip devices with flexible conductive adhesive |
US6466758B2 (en) * | 2000-02-28 | 2002-10-15 | Canon Kabushiki Kaisha | Developing apparatus having foreign matter accumulating space |
JP2003197683A (ja) | 2001-12-25 | 2003-07-11 | Matsushita Electric Ind Co Ltd | 電子部品のボンディング装置およびボンディング方法 |
JP2005161341A (ja) | 2003-12-01 | 2005-06-23 | Matsushita Electric Ind Co Ltd | はんだインク組成物 |
JP2005259925A (ja) | 2004-03-11 | 2005-09-22 | Sony Corp | 実装方法 |
JP2006007321A (ja) | 2004-05-28 | 2006-01-12 | Matsushita Electric Ind Co Ltd | 接合装置及び接合方法 |
US20060037997A1 (en) | 2004-05-28 | 2006-02-23 | Kazushi Higashi | Joining apparatus and method |
US20060051895A1 (en) | 2003-03-25 | 2006-03-09 | Fujitsu Limited | Method for manufacturing electronic component-mounted board |
JP2006222170A (ja) | 2005-02-09 | 2006-08-24 | Canon Inc | はんだ付け方法 |
US7129585B2 (en) | 2003-01-30 | 2006-10-31 | Samsung Electronics Co., Ltd. | Semiconductor device and method of packaging the same |
US20070134434A1 (en) | 2005-11-29 | 2007-06-14 | Hiroki Yokoyama | Method for forming solder pattern on board |
US20070141760A1 (en) | 2005-12-21 | 2007-06-21 | Ferguson Scott W | Electrical device and method of manufacturing electrical devices using film embossing techniques to embed integrated circuits into film |
US20070141750A1 (en) | 2005-12-15 | 2007-06-21 | Renesas Technology Corp. | Method of manufacturing semiconductor device |
CN101013674A (zh) | 2006-02-03 | 2007-08-08 | 株式会社半导体能源研究所 | 半导体器件的制造装置及半导体器件的制造方法 |
JP2007235114A (ja) | 2006-02-03 | 2007-09-13 | Semiconductor Energy Lab Co Ltd | 半導体装置の製造装置及び半導体装置の作製方法 |
US7344818B2 (en) * | 2003-03-24 | 2008-03-18 | Konica Minolta Business Technologies, Inc. | Method for producing toner and an image forming method employing the toner |
WO2008036512A2 (en) | 2006-09-18 | 2008-03-27 | Avery Dennison Corporation | Conductive pattern and method of making |
US20090020870A1 (en) | 2005-04-05 | 2009-01-22 | Shinji Watanabe | Electronic device provided with wiring board, method for manufacturing such electronic device and wiring board for such electronic device |
US20090205203A1 (en) | 2005-09-30 | 2009-08-20 | Matsushita Electric Industrial Co., Ltd. | Method of mounting electronic components |
WO2009135985A1 (en) | 2008-05-09 | 2009-11-12 | Stora Enso Oyj | An apparatus, a method for establishing a conductive pattern on a planar insulating substrate, the planar insulating substrate and a chipset thereof |
WO2010053454A1 (en) | 2008-11-07 | 2010-05-14 | Orion Systems Integration Pte Ltd | In-situ melt and reflow process for forming flip-chip interconnections and system thereof |
US20100159373A1 (en) * | 2008-12-22 | 2010-06-24 | Tombs Thomas N | Method of producing electronic circuit boards using electrophotography |
EA200802425A1 (ru) | 2008-12-02 | 2010-06-30 | Александр Иванович Таран | Способ совмещения элементов многокристальных модулей для копилярной сборки и установка для его реализации |
WO2012049352A1 (en) | 2010-10-14 | 2012-04-19 | Stora Enso Oyj | Method and arrangement for attaching a chip to a printed conductive surface |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
RU2130215C1 (ru) * | 1992-08-14 | 1999-05-10 | Государственное научно-производственное предприятие "НИИПП" | Способ создания монолитной интегральной свч схемы |
JP3665579B2 (ja) * | 2001-02-26 | 2005-06-29 | ソニーケミカル株式会社 | 電気装置製造方法 |
-
2010
- 2010-10-14 KR KR1020137012356A patent/KR20130138264A/ko not_active Application Discontinuation
- 2010-10-14 AU AU2010362421A patent/AU2010362421B2/en active Active
- 2010-10-14 WO PCT/FI2010/050797 patent/WO2012049352A1/en active Application Filing
- 2010-10-14 RU RU2013119471/07A patent/RU2563971C2/ru active
- 2010-10-14 MX MX2013004101A patent/MX2013004101A/es active IP Right Grant
- 2010-10-14 EP EP10858358.4A patent/EP2628370A4/en active Pending
- 2010-10-14 JP JP2013533247A patent/JP6038035B2/ja active Active
- 2010-10-14 CA CA2813538A patent/CA2813538C/en active Active
- 2010-10-14 BR BR112013009147A patent/BR112013009147B8/pt active IP Right Grant
- 2010-10-14 US US16/007,530 patent/USRE48018E1/en active Active
- 2010-10-14 US US13/878,864 patent/US9629255B2/en not_active Ceased
- 2010-10-14 MY MYPI2013001303A patent/MY168368A/en unknown
- 2010-10-14 KR KR1020177033061A patent/KR101941679B1/ko active IP Right Grant
- 2010-10-14 CN CN201080069606.0A patent/CN103190206B/zh active Active
Patent Citations (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3680196A (en) | 1970-05-08 | 1972-08-01 | Us Navy | Process for bonding chip devices to hybrid circuitry |
US3680199A (en) | 1970-07-06 | 1972-08-01 | Texas Instruments Inc | Alloying method |
US3680198A (en) | 1970-10-07 | 1972-08-01 | Fairchild Camera Instr Co | Assembly method for attaching semiconductor devices |
US4967950A (en) | 1989-10-31 | 1990-11-06 | International Business Machines Corporation | Soldering method |
JPH0521949A (ja) * | 1991-07-15 | 1993-01-29 | Hitachi Ltd | 表面実装部品位置決め装置 |
US5609292A (en) | 1992-12-04 | 1997-03-11 | International Business Machines Corporation | Manufacturing circuit boards using a pick and place machine |
RU2130125C1 (ru) | 1996-06-17 | 1999-05-10 | Научно-производственное объединение "Алтай" | Быстросгорающий заряд твердого топлива |
JPH1050766A (ja) | 1996-08-02 | 1998-02-20 | Toshiba Corp | フェース・ダウン・ボンディング方法およびその装置 |
US5795818A (en) | 1996-12-06 | 1998-08-18 | Amkor Technology, Inc. | Integrated circuit chip to substrate interconnection and method |
US6016949A (en) | 1997-07-01 | 2000-01-25 | International Business Machines Corporation | Integrated placement and soldering pickup head and method of using |
US6108210A (en) | 1998-04-24 | 2000-08-22 | Amerasia International Technology, Inc. | Flip chip devices with flexible conductive adhesive |
US6054682A (en) | 1999-03-11 | 2000-04-25 | Micron Electronics, Inc. | Method and system for reducing water vapor in integrated circuit packages prior to reflow |
US6466758B2 (en) * | 2000-02-28 | 2002-10-15 | Canon Kabushiki Kaisha | Developing apparatus having foreign matter accumulating space |
JP2003197683A (ja) | 2001-12-25 | 2003-07-11 | Matsushita Electric Ind Co Ltd | 電子部品のボンディング装置およびボンディング方法 |
US7129585B2 (en) | 2003-01-30 | 2006-10-31 | Samsung Electronics Co., Ltd. | Semiconductor device and method of packaging the same |
US7344818B2 (en) * | 2003-03-24 | 2008-03-18 | Konica Minolta Business Technologies, Inc. | Method for producing toner and an image forming method employing the toner |
US20060051895A1 (en) | 2003-03-25 | 2006-03-09 | Fujitsu Limited | Method for manufacturing electronic component-mounted board |
JP2005161341A (ja) | 2003-12-01 | 2005-06-23 | Matsushita Electric Ind Co Ltd | はんだインク組成物 |
JP2005259925A (ja) | 2004-03-11 | 2005-09-22 | Sony Corp | 実装方法 |
JP2006007321A (ja) | 2004-05-28 | 2006-01-12 | Matsushita Electric Ind Co Ltd | 接合装置及び接合方法 |
US20060037997A1 (en) | 2004-05-28 | 2006-02-23 | Kazushi Higashi | Joining apparatus and method |
JP2006222170A (ja) | 2005-02-09 | 2006-08-24 | Canon Inc | はんだ付け方法 |
US20090020870A1 (en) | 2005-04-05 | 2009-01-22 | Shinji Watanabe | Electronic device provided with wiring board, method for manufacturing such electronic device and wiring board for such electronic device |
US20090205203A1 (en) | 2005-09-30 | 2009-08-20 | Matsushita Electric Industrial Co., Ltd. | Method of mounting electronic components |
JP2007150051A (ja) | 2005-11-29 | 2007-06-14 | Tokuyama Corp | 基板上への半田パターン形成方法 |
US20070134434A1 (en) | 2005-11-29 | 2007-06-14 | Hiroki Yokoyama | Method for forming solder pattern on board |
US20070141750A1 (en) | 2005-12-15 | 2007-06-21 | Renesas Technology Corp. | Method of manufacturing semiconductor device |
US20070141760A1 (en) | 2005-12-21 | 2007-06-21 | Ferguson Scott W | Electrical device and method of manufacturing electrical devices using film embossing techniques to embed integrated circuits into film |
CN101346735A (zh) | 2005-12-21 | 2009-01-14 | 艾利丹尼森公司 | Rfid标牌薄膜压纹制造技术 |
JP2007235114A (ja) | 2006-02-03 | 2007-09-13 | Semiconductor Energy Lab Co Ltd | 半導体装置の製造装置及び半導体装置の作製方法 |
CN101013674A (zh) | 2006-02-03 | 2007-08-08 | 株式会社半导体能源研究所 | 半导体器件的制造装置及半导体器件的制造方法 |
US20070183184A1 (en) | 2006-02-03 | 2007-08-09 | Semiconductor Energy Laboratory Ltd. | Apparatus and method for manufacturing semiconductor device |
WO2008036512A2 (en) | 2006-09-18 | 2008-03-27 | Avery Dennison Corporation | Conductive pattern and method of making |
WO2009135985A1 (en) | 2008-05-09 | 2009-11-12 | Stora Enso Oyj | An apparatus, a method for establishing a conductive pattern on a planar insulating substrate, the planar insulating substrate and a chipset thereof |
WO2010053454A1 (en) | 2008-11-07 | 2010-05-14 | Orion Systems Integration Pte Ltd | In-situ melt and reflow process for forming flip-chip interconnections and system thereof |
EA200802425A1 (ru) | 2008-12-02 | 2010-06-30 | Александр Иванович Таран | Способ совмещения элементов многокристальных модулей для копилярной сборки и установка для его реализации |
US20100159373A1 (en) * | 2008-12-22 | 2010-06-24 | Tombs Thomas N | Method of producing electronic circuit boards using electrophotography |
WO2012049352A1 (en) | 2010-10-14 | 2012-04-19 | Stora Enso Oyj | Method and arrangement for attaching a chip to a printed conductive surface |
Non-Patent Citations (11)
Title |
---|
Allowance of Patent for Korean Patent Application No. 10-2017-7031061 dated Oct. 24, 2018. |
Canadian Office Action for Canadian Patent Application No. 2,813,538 dated Apr. 13, 2018. |
Decision on Granting for RU Application No. 2013119471/07(028894) dated Apr. 17, 2015. |
First Examination Report issued in Indian Application No. 2875/DELNP/2013 dated Oct. 9, 2018. |
First Office Action CN Application No. 201080069606.0; dated Jun. 12, 2015; 3 pages. |
Japanese First Office Action for Japanese Application No. 201080069606.0 dated Jun. 12, 2015. |
Japanese Notification of rejection for Japanese Application No. 2013-533247 dated Feb. 18, 2016. |
Japanese Notification of Rejection for Japanese Application No. 2013-533247; dated Feb. 18, 2016; 9 pages. |
Japanese Second Office Action for Japanese Application No. 201080069606.0 dated Feb. 14, 2016. |
Second Office Action CN Application No. 201080069606.0; dated Feb. 14, 2016; 3 pages. |
Supplementary European Search Report for EP10858358 date of completion of the search Jun. 23, 2017. |
Also Published As
Publication number | Publication date |
---|---|
US20130255079A1 (en) | 2013-10-03 |
AU2010362421A1 (en) | 2013-05-02 |
WO2012049352A1 (en) | 2012-04-19 |
BR112013009147A2 (pt) | 2016-07-26 |
CN103190206A (zh) | 2013-07-03 |
BR112013009147B8 (pt) | 2022-07-12 |
CA2813538A1 (en) | 2012-04-19 |
MX2013004101A (es) | 2013-07-17 |
CN103190206B (zh) | 2016-12-28 |
BR112013009147B1 (pt) | 2020-09-24 |
KR20130138264A (ko) | 2013-12-18 |
JP6038035B2 (ja) | 2016-12-07 |
EP2628370A4 (en) | 2017-08-02 |
EP2628370A1 (en) | 2013-08-21 |
CA2813538C (en) | 2019-05-07 |
US9629255B2 (en) | 2017-04-18 |
KR20170130614A (ko) | 2017-11-28 |
MY168368A (en) | 2018-10-31 |
RU2013119471A (ru) | 2014-11-20 |
KR101941679B1 (ko) | 2019-01-24 |
JP2013539921A (ja) | 2013-10-28 |
RU2563971C2 (ru) | 2015-09-27 |
AU2010362421B2 (en) | 2015-06-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
USRE48018E1 (en) | Method and arrangement for attaching a chip to a printed conductive surface | |
JP7566838B2 (ja) | 超小型又は超薄型ディスクリート部品の配置 | |
US20180190614A1 (en) | Massively parallel transfer of microLED devices | |
EP2377150B1 (en) | Method and apparatus for manufacturing an electronic assembly, electronic assembly manufactured with the method or in the apparatus | |
US7879691B2 (en) | Low cost die placement | |
JPH0771743B2 (ja) | 溶融半田を射出成形する装置および方法 | |
US20210066243A1 (en) | Micro led display and method for manufacturing the same | |
WO2010036305A1 (en) | Method for assembling integrated circuits involving a release member. | |
KR20180112197A (ko) | 비전도성 접착박막을 이용한 마이크로 소자 전사방법 | |
KR101820277B1 (ko) | 땜납 전사 시트, 땜납 범프 및 땜납 전사 시트를 사용한 땜납 프리코팅 방법 | |
EP2810541B1 (en) | Method and arrangement for transferring electrically conductive material in fluid form on a substrate to be printed | |
US8034663B2 (en) | Low cost die release wafer | |
JP7374090B2 (ja) | Rfidタグを備えるカラーピースの製造方法 | |
Akin et al. | Flip and Fuse: A New Technique for Diffusive Coating of Organic, Flexible, and Low-Transition-Temperature Substrates With Inorganic Materials in Roll-to-Roll Processes at Ambient Conditions | |
EP3844099A1 (en) | Nanostructure transfer method | |
JP2005086155A (ja) | 非接触icタグ付シートの製造方法 | |
Zakel et al. | Laser assisted flip chip assembly for LCD applications using ACP and NCP adhesive joining | |
CN105144405A (zh) | 用于制造包括设置有至少一个箔形部件的目标基底的产品的辊对辊装置和方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
FEPP | Fee payment procedure |
Free format text: ENTITY STATUS SET TO UNDISCOUNTED (ORIGINAL EVENT CODE: BIG.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
MAFP | Maintenance fee payment |
Free format text: PAYMENT OF MAINTENANCE FEE, 4TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1551); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY Year of fee payment: 4 |
|
AS | Assignment |
Owner name: DIGITAL TAGS FINLAND, OY, FINLAND Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:STORA ENSO OYJ;REEL/FRAME:057714/0638 Effective date: 20210919 |
|
MAFP | Maintenance fee payment |
Free format text: PAYMENT OF MAINTENANCE FEE, 8TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1552); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY Year of fee payment: 8 |