US6507139B1 - Apparatus having an electronic component located on a surface of a package member with a space therebetween - Google Patents

Apparatus having an electronic component located on a surface of a package member with a space therebetween Download PDF

Info

Publication number
US6507139B1
US6507139B1 US09/109,333 US10933398A US6507139B1 US 6507139 B1 US6507139 B1 US 6507139B1 US 10933398 A US10933398 A US 10933398A US 6507139 B1 US6507139 B1 US 6507139B1
Authority
US
United States
Prior art keywords
substrate
electronic component
via hole
electrode
hole electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US09/109,333
Other languages
English (en)
Inventor
Satoshi Ishino
Kenji Kubota
Tsuyoshi Saito
Michinobu Maesaka
Mamoru Ogawa
Jiro Inoue
Hiroaki Kaida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Assigned to MURATA MANUFACTURING CO., LTD. reassignment MURATA MANUFACTURING CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: KAIDA, HIROAKI, INOUE, JIRO, OGAWA, MAMAORU, MAESAKA, MICHINOBU, SAITO, TSUYOSHI, KUBOTA, KENJI, ISHINO, SATOSHI
Priority to US10/303,421 priority Critical patent/US6871388B2/en
Application granted granted Critical
Publication of US6507139B1 publication Critical patent/US6507139B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/05—Holders; Supports
    • H03H9/0504—Holders; Supports for bulk acoustic wave devices
    • H03H9/0514—Holders; Supports for bulk acoustic wave devices consisting of mounting pads or bumps
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/05—Holders; Supports
    • H03H9/0538—Constructional combinations of supports or holders with electromechanical or other electronic elements
    • H03H9/0547—Constructional combinations of supports or holders with electromechanical or other electronic elements consisting of a vertical arrangement
    • H03H9/0557—Constructional combinations of supports or holders with electromechanical or other electronic elements consisting of a vertical arrangement the other elements being buried in the substrate
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/05—Holders; Supports
    • H03H9/10—Mounting in enclosures
    • H03H9/1007—Mounting in enclosures for bulk acoustic wave [BAW] devices
    • H03H9/1014—Mounting in enclosures for bulk acoustic wave [BAW] devices the enclosure being defined by a frame built on a substrate and a cap, the frame having no mechanical contact with the BAW device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/42—Piezoelectric device making
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49162—Manufacturing circuit on or in base by using wire as conductive path
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49163—Manufacturing circuit on or in base with sintering of base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49169—Assembling electrical component directly to terminal or elongated conductor
    • Y10T29/49171—Assembling electrical component directly to terminal or elongated conductor with encapsulating

Definitions

  • the present invention relates to an apparatus, such as a piezoelectric resonance device, having an electronic component located on a surface of a package member with a space provided between the electronic component and the package member.
  • Some electronic devices require that a portion thereof does not contact a printed circuit board or substrate when mounted on the printed circuit board or substrate or the like.
  • a resonating section thereof in a piezoelectric resonator, a resonating section thereof must be arranged such that a sufficient space between the resonating section and the printed circuit substrate is provided in order to prevent interference with the oscillation of the resonating section.
  • it is necessary to mount the electronic component such that a sufficient space between the printed circuit board or substrate and the component is provided in order to prevent heat from conducting to the printed circuit board or substrate and other nearby elements.
  • FIG. 17 is a partially cutaway section view showing one example of a prior art structure for mounting a piezoelectric resonator.
  • electrode lands 52 a and 52 b are located on a substrate 51 .
  • a piezoelectric resonator 53 is mounted in contact with the electrode lands 52 a and 52 b.
  • the piezoelectric resonator 53 has a structure in which a terminal electrode 53 b is located at one end of a piezoelectric plate 53 a and a terminal electrode 53 c is located at the other end. It is noted that a resonance electrode not shown is connected to the terminal electrodes 53 b and 53 c.
  • the terminal electrodes 53 b and 53 c are connected to the electrode lands 52 a and 52 b via conductive adhesives 54 a and 54 b applied so as to have a certain thickness to prevent interference with the oscillation of a resonating section of the resonator 53 .
  • a gap 55 is created between the piezoelectric resonator 53 and an upper surface 51 a of the substrate 51 by increasing a thickness of the conductive adhesives 54 a and 54 b.
  • the conductive adhesives 54 a and 54 b are liquid when they are applied, the conductive adhesive material is liable to flow along the upper surface 51 a toward the center of the piezoelectric resonator 53 as shown by arrows A 1 and A 2 in FIG. 17 .
  • the resonating section is joined to the upper surface 51 a of the substrate 51 via the conductive adhesive in the mounting structure, thereby degrading the resonating characteristics of the resonator 53 .
  • the conductive adhesives 54 a, 54 b flow and extend along the upper surface 51 a, the vertical dimension of the gap 55 is reduced and cannot be accurately or reliably provided.
  • liquid conductive adhesives 54 a and 54 b are hardened after the application, the size and vertical dimension of the space 55 varies. Often, the resonating section of the resonator 53 contacts the upper surface 51 a of the substrate 51 , thereby damaging the resonating characteristics of the resonator 53 .
  • spacers 56 a and 56 b are interposed between the terminal electrodes 53 b and 53 c and the electrode lands 52 a and 52 b as shown in FIG. 18 .
  • the spacers 56 a and 56 b are made of an electrically conductive material such as metal and are joined to the terminal electrodes 53 b and 53 c as well as the electrode lands 52 a and 52 b via conductive adhesive or solder.
  • a space 55 A is defined between the piezoelectric resonator 53 and the upper surface 51 a of the substrate 51 by the vertical dimension of the spacers 56 a and 56 b.
  • this structure requires preparation of spacers 56 a and 56 b having a very accurate size and shape and also requires a difficult and time-consuming process of applying the spacers 56 a and 56 b to mount the piezoelectric resonator 53 .
  • FIGS. 19 a and 19 b are a partially cutaway plan view and a section view, respectively, showing the package structure of this prior art device.
  • the electronic component 61 includes an insulating substrate 62 and a cap 63 .
  • a piezoelectric resonator 64 is stored within the package.
  • through hole electrodes 65 a - 65 c are formed so as to extend through the substrate 62 .
  • the through hole electrodes 65 a - 65 c are constructed by creating through holes extending through the substrate 62 and by applying an electrode material on the inner peripheral surfaces of the through holes. The inner peripheral surfaces of the through holes and the electrodes extend to the upper and lower surfaces so as to form flange-like portions.
  • the piezoelectric resonator 64 is joined to the through hole electrodes 65 a - 65 c via conductive adhesives 66 a - 66 c.
  • the conductive adhesives 66 a - 66 c are disposed in the through hole electrodes 65 a - 65 c and are joined to the flange-like portion at the upper surface of the substrate 62 of the through hole electrodes 65 a - 65 c.
  • the electronic component 61 allows an area outside of the cap 63 to be reduced so that the device can be miniaturized because the piezoelectric resonator 64 is led to the outside via the through hole electrodes 65 a - 65 c.
  • the mounting structure shown in FIG. 18 has had problems with the manufacturing and assembly process being complicated and costly because the spacers 56 a and 56 b have to be used.
  • the preferred embodiments of the present invention provide an apparatus including an electronic component which is arranged and constructed to be fixed firmly to a package member with a space being reliably provided therebetween and to allow the component to be easily manufactured.
  • the preferred embodiments of the present invention provide an electronic component including a package member; a via hole electrode provided so as to extend through the package member and to protrude from a first surface of the package member; an electronic component located on the first surface of the package member with a space defined therebetween; the space between the electronic component and the first surface of the package member being determined by a protruding portion of the via hole electrode extending from the surface of the package member; and a joining member joining the electronic component with the via hole electrode.
  • via hole electrode described in the present specification is intended to mean a solid electrode in which an electrode material is filled completely within a through hole as described later.
  • the via hole electrode does not extend along an upper or first surface of the substrate or package member as in the prior art. Instead, the via hole electrode extends vertically upwardly from the first surface of the substrate or package.
  • the via hole electrode is a completely solid member having a rod-shaped configuration such that the rod-shaped member extends through the via hole and has an upper, rounded portion which extends vertically from the upper surface of the substrate or package member in a direction that is substantially perpendicular to the upper surface of the substrate or package member so as to support the resonator and to provide an accurate vertical dimension of the gap between the resonator and the package member.
  • a space having a desired size or vertical dimension can be reliably provided between the electronic component and the package member. Accordingly, it becomes possible to provide an electronic component such as a piezoelectric resonator which is mounted on the package member while reliably providing a sufficient space therebetween so that oscillation of the resonating section of the resonator is not hindered.
  • the desired space in the prior art devices could not be obtained due to the fluidity and spreading of the adhesive during application thereof in which the space between the electronic component and the package member is created by the conductive adhesive
  • a space having a sufficient vertical dimension is reliably provided in the preferred embodiments of the present invention because of the shape and arrangement of the via hole electrodes and protruding portions of the via hole electrodes.
  • the preferred embodiments of the present invention do not require an extra member such as a spacer to create the space having the desired vertical dimension, the electronic component of the preferred embodiments of the present invention is much easier and less expensive to manufacture.
  • the rod-shaped, solid via hole electrode filling the via holes in the substrate in the preferred embodiments of the present invention allow for significantly less adhesive to be used as compared to the prior art devices in which adhesive spread along the upper surface of the substrate and in some devices, the adhesive spread into the via holes.
  • the gap between the resonator and the substrate is accurately and reliably provided with an exact vertical dimension because of the rod-shaped, solid via hole electrodes.
  • the electronic component may be a piezoelectric resonator.
  • the via hole electrode may be exposed at a second surface of the package member wherein the first and the second surfaces of the package member are opposed to each other.
  • the electronic component at the upper surface (the first surface) of the package member may be electrically connected with the lower surface (the second surface) of the package member by using the via hole electrodes. Accordingly, this arrangement allows the electronic component which can be readily mounted on the package member surface to be obtained by forming connecting electrodes and terminal electrodes on the lower surface of the package member.
  • the package member may comprise a ceramic substrate and a plurality of internal electrodes may be provided in the package member so as to form at least one capacitor, and the via hole electrode may be electrically connected to the capacitor.
  • an electronic apparatus includes a complex type package structure having a circuit in which the capacitors are connected to the electronic component mounted on the package member.
  • the package member may comprise a ceramic substrate, a plurality of cutaways may be provided on a side of the ceramic substrate, and a plurality of external electrodes may be provided in the plurality of cutaways.
  • a method of forming the apparatus includes the steps of laminating a plurality of ceramic green sheets on a support film to obtain a ceramic green sheet laminate, forming through holes through the ceramic green sheet laminate at positions where via hole electrodes are to be located, applying conductive material into the through holes so as to fill the through holes and to be located on the upper surface of the ceramic green sheet laminate to form via hole electrodes, and sintering the ceramic green sheet laminate to form a substrate and so as to form protrusion portions of the via hole electrodes which protrude upward from the upper surface of the substrate.
  • the via hole electrodes that are formed by the above process are solid and substantially rod-shaped.
  • the via hole electrodes formed by the above process fill the via holes with the solid, rod-shaped configuration.
  • the protruding portions are formed because a coefficient of thermal contraction of the ceramics, during cooling after the sintering, is higher as compared to a coefficient of thermal contraction of the electrode material.
  • the method includes the step of setting the coefficient of thermal contraction of the ceramics to be higher than the coefficient of thermal contraction of the electrode material filled in the through holes by about 1% to about 20%. With this desired range, the size of the gap is accurately and reliably achieved.
  • FIG. 1 is a longitudinal section view showing an electronic component according to a first preferred embodiment of the present invention.
  • FIG. 2 is a transverse section view of the electronic component shown in FIG. 1 along a line A—A in FIG. 1 .
  • FIG. 3 is a transverse section view illustrating an electronic component according to a second preferred embodiment of the present invention.
  • FIG. 4 is a plan view of the electronic component shown in FIG. 3 .
  • FIG. 5 a is a partially cutaway section view illustrating a through hole electrode.
  • FIG. 5 b is a partially cutaway section view for illustrating a via hole electrode.
  • FIG. 6 a is a schematic plan view illustrating a positional relationship between an external electrode and an electronic component having a through hole electrode.
  • FIG. 6 b is a schematic plan view illustrating a positional relationship between an external electrode and an electronic component having a via hole electrode.
  • FIG. 7 is a transverse section view for explaining a modified example of the first preferred embodiment.
  • FIG. 8 a is a longitudinal section view illustrating another modified example of the first preferred embodiment.
  • FIG. 8 b is a transverse section view illustrating another modified example of the first preferred embodiment.
  • FIG. 9 a is a longitudinal section view illustrating another modified example of the first preferred embodiment.
  • FIG. 9 b is a transverse section view for explaining another modified example of the first preferred embodiment.
  • FIG. 10 is a transverse section view for explaining a modified example shown in FIG. 9 b.
  • FIG. 11 is an exploded perspective view for explaining an electronic component according a third preferred embodiment of the present invention.
  • FIG. 12 is a perspective view showing an appearance of the electronic component of the third preferred embodiment.
  • FIG. 13 is a longitudinal section view of the third preferred embodiment.
  • FIG. 14 is a section view along a line D—D in FIG. 13 .
  • FIG. 15 is a section view corresponding to a portion along a line E—E in FIG. 13 .
  • FIG. 16 a is a section view for illustrating a via hole electrode having an elliptic plan shape is elliptic.
  • FIG. 16 b is a plan view illustrating a via hole electrode having an elliptic plan shape.
  • FIG. 17 is a section view illustrating a prior art electronic component.
  • FIG. 18 is a partially cutaway section view illustrating another example of a prior art electronic component.
  • FIG. 19 a is a partially cutaway plan view illustrating still another example of a prior art electronic component.
  • FIG. 19 b is a partially cutaway section view illustrating another example of a prior art electronic component.
  • FIGS. 1 and 2 are frontal and side section views showing an electronic component according to a first preferred embodiment of the present invention.
  • a piezoelectric resonator 3 is mounted on a substrate 2 in a package arrangement. Further, a cap 4 preferably made of a metal is fixed to the substrate 2 so as to surround the piezoelectric resonator 3 . The cap 4 is arranged so as to create an internal space in which the piezoelectric resonator 3 is stored.
  • the internal space inside of the cap 4 is defined by the cap 4 having a substantially U-shape which is arranged so that the open portion thereof faces downward and is fixed to the upper surface of the substrate 2 via adhesive (not shown).
  • the substrate 2 is preferably made of insulating ceramics such as alumina. Via hole electrodes 5 and 6 are formed to extend through the substrate 2 .
  • the via hole electrodes preferably comprise solid, rod-shaped members which are arranged to penetrate through the substrate 2 such that protruding portions at the upper ends of the via hole electrodes 5 , 6 protrude upward from the upper surface 2 a of the substrate 2 . It is important to note that the protruding portions of the via hole electrodes 5 , 6 do not extend along the upper surface of the substrate 2 but instead extend vertically from the upper surface of the substrate 2 in a direction that is substantially perpendicular to the upper surface of the substrate 2 . Lower surfaces of the via hole electrodes 5 and 6 are exposed at a lower surface 2 b of the substrate 2 and are connected to terminal electrodes 7 a and 7 b disposed on the lower surface 2 b of the substrate 2 .
  • the piezoelectric resonator 3 is constructed by using a piezoelectric member 3 a formed of piezoelectric ceramics such as titanate piezoelectric ceramics.
  • the piezoelectric member 3 a is polarized in the thickness direction and has an internal electrode 3 b. Further, electrodes 3 c and 3 d are located on the upper and lower surfaces of the piezoelectric member 3 a so that the electrodes 3 c, 3 d overlap with the internal electrode 3 b at an approximately central region of the piezoelectric member 3 a.
  • the internal electrode 3 b is located at one end of the piezoelectric resonator 3 and is electrically connected to a terminal electrode 3 e which extends to the bottom surface of the piezoelectric member 3 a.
  • the electrodes 3 c and 3 d are electrically connected to each other by a terminal electrode 3 f located at the other end of the piezoelectric member 3 a.
  • the piezoelectric resonator 3 is preferably an energy trap piezoelectric resonator utilizing a thickness longitudinal oscillation mode and is driven when AC voltage is applied between the terminal electrodes 3 e and 3 f.
  • the piezoelectric resonator 3 is located on the portion of the via hole electrodes 5 and 6 which protrudes from the upper surface 2 a of the substrate 2 and is fixed thereto by conductive adhesives 8 a and 8 b on the substrate 2 .
  • a space 9 having a size or vertical dimension that is sufficient to prevent interference with the resonance of a resonating section is reliably provided between the lower surface of the piezoelectric resonator 3 and the upper surface 2 a of the substrate 2 .
  • the present preferred embodiment is characterized in that the via hole electrodes 5 and 6 are provided so as to extend through the substrate 2 , the upper ends of the via hole electrodes 5 and 6 protrude upward from the upper surface 2 a and the piezoelectric resonator 3 is arranged such that a space having a vertical dimension corresponding to the protrusion of the via hole electrodes 5 and 6 is defined between the substrate 2 and the resonator 3 .
  • the via hole electrodes 5 and 6 are preferably constructed by filling an electrode material in the through holes created through the substrate 2 .
  • the upper protrusion of the via hole electrodes 5 and 6 is preferably created by the following fabrication method.
  • a plurality of ceramic green sheets are laminated on a support film to obtain a ceramic green sheet laminate.
  • through holes are created through the ceramic green sheet laminate at the portions where the via hole electrodes 5 and 6 are to be located.
  • a squeegee step is performed from above the ceramic green sheet laminate supported by the support film to deposit the liquid or slurry conductive material such as conductive paste into the through holes. Because the through holes are filled with the conductive material via the squeegee, the upper surface of the electrode material filled in the through holes is shared with the upper surface of the ceramic green sheet laminate.
  • the protrusion portions which protrude upward from the upper surface 2 a of the substrate 2 are created above the via hole electrodes 5 and 6 as shown in FIG. 1 because a coefficient of thermal contraction of the ceramics, during cooling after the sintering, is higher as compared to a coefficient of thermal contraction of the electrode material, i.e. the coefficient of thermal contraction of the electrode material is smaller.
  • the space 9 having a sufficient size or vertical dimension can be reliably created below the piezoelectric resonator 3 by setting the coefficient of thermal contraction of the ceramics to be higher than the coefficient of thermal contraction of the electrode material filled in the through holes by about 1% to about 20%. It is noted that when the difference of the coefficients of thermal contraction described above is less than about 1%, the height of the protrusion portion of the via hole electrodes 5 and 6 becomes insufficient to reliably provide a space 9 that has a size or vertical dimension which allows for unhindered vibration of the resonator 3 .
  • FIGS. 3 and 4 are section and plan views for explaining a second preferred embodiment of the present invention.
  • FIG. 3 corresponds to FIG. 2 shown for the first preferred embodiment.
  • An electronic component 10 of the second preferred embodiment is characterized in that electronic components 11 a, 11 b, 11 c and 11 d which are preferably formed by the same method described above have via hole electrodes 5 and 6 formed on the sides of the substrate 2 .
  • the other features are preferably the same as the electronic component 1 of the first preferred embodiment.
  • the electronic components 11 a, 11 b, 11 c and 11 d are preferably formed by completely filling the electrode material within preferably substantially semicircular (in plan view) cutaways 2 e through 2 h formed in side surfaces 2 c and 2 d of the substrate 2 . That is, the electrode material composing the external electrodes 11 a through 11 d is applied so as to almost fill the cutaways 2 e through 2 h and so as not to reach the upper and lower surfaces of the substrate 2 .
  • the external electrodes 11 a through 11 d are preferably formed at the same time that the via hole electrodes 5 and 6 are formed. That is, a mother substrate for obtaining a plurality of substrates 2 is prepared, substantially circular through holes having a size (in plan view) that is about twice that of the cutaways 2 e through 2 h are created at the positions corresponding to the cutaways 2 e through 2 h on the mother substrate and at the same time, through holes for forming the via hole electrodes 5 and 6 are created.
  • a liquid conductive member such as a conductive paste is filled in each through hole via a squeegee and the mother ceramic green sheet laminate is cut in units of each substrate.
  • the ceramic green sheet laminate in which the electrode material is filled in the cutaways 2 e through 2 h is obtained.
  • the electrode material filled in the cutaways 2 e through 2 h are baked and the external electrodes 11 a through 11 d are formed as the substrate 2 is sintered and the via hole electrodes 5 and 6 are baked.
  • the external electrodes 11 a - 11 d are formed through the same process along with the via hole electrodes 5 and 6 .
  • the electronic components 11 c and 11 d are formed so as to be electrically connected with a terminal electrode 7 b located at the lower surface of the substrate 2 . Accordingly, during surface-mounting of the component 10 on a printed circuit board or substrate or the like, the electronic component 10 may be joined to electrode lands of the printed circuit board or substrate or the like by connecting the external electrodes 11 a - 11 d via soldering or the like.
  • the electronic component 10 of the present preferred embodiment allows the state of connection when mounted on the printed circuit substrate or the like to be readily confirmed visually. Also, the size of the substrate is significantly reduced as compared to the prior art electronic component in which external electrodes are formed on the side of the substrate in the same manner with through hole electrodes (FIG. 19) by forming the external electrodes 11 a - 11 d as described above. This will be explained with reference to FIGS. 5 a, 5 b, 6 a and 6 b.
  • FIG. 5 a is a partially cutaway section view showing a prior art through hole electrode.
  • the through hole electrode 61 is formed by creating a through hole 62 a through a substrate 62 and by applying an electrode material so as to extend to an inner peripheral portion and to upper and lower surfaces of the through hole 62 .
  • the via hole electrode is formed by creating a through hole 12 a through a mother substrate 12 and by filling an electrode material 13 within the through hole 12 a as shown in FIG. 5 b.
  • a flange portion 61 a of the through hole electrode 61 is formed so as to extend to the inside more than a cutaway 63 at the upper and lower surfaces of the substrate 62 as shown in FIG. 6 a.
  • the external electrode 13 A When the external electrode 13 A is formed as shown in FIG. 6 b by cutting along the center of the via hole electrode 13 , the external electrode 13 A will not extend to the inside more than the cutaway 12 a. Accordingly, when a distance between an inner edge of the external electrode 61 A shown in FIG. 6 a and an electronic component C mounted on the substrate 62 is made equal to a distance between an inner edge of the external electrode 13 A in FIG. 6 b and the electronic component C mounted on the substrate 12 , the size of the substrate 12 which does not have the flange portion 61 a may be reduced as compared to the substrate 62 by an amount equal to that portion. That is, the use of the external electrode 13 A formed in the same manner along with the via hole electrode allows the substrate to be miniaturized as compared to the external electrode 61 A formed in the same manner as the through hole electrode.
  • the external electrodes 11 a - 11 d are formed in the electronic component 10 shown in FIGS. 3 and 4, it allows the substrate 2 to be miniaturized or the electronic component 10 to be miniaturized as compared to the case of using the prior art external electrode formed in the same manner with the through hole electrode.
  • external electrodes 11 c and 11 d which are formed on the side of the substrate 2 have been formed so as to protrude upwardly from the upper surface of the substrate 2 in the electronic component 10 shown in FIG. 3, external electrodes 11 e and 11 f which extend to an intermediate vertical position may be formed as shown in FIG. 7 instead of the external electrodes 11 c and 11 d.
  • the state of connection of the electrode lands on the printed circuit substrate and the external electrodes 11 e and 11 f may be readily confirmed visually when the electronic component 14 is mounted on the printed circuit substrate or the like also when the external electrodes 11 e and 11 f are formed.
  • the substrate 2 may be miniaturized in the same manner as described above with reference to the second preferred embodiment.
  • the external electrodes 11 e and 11 f may be formed as follows. A first plurality of ceramic green sheets which corresponds to a ceramic layer on which the external electrodes 11 e and 11 f are to be formed are laminated on a support film to obtain a ceramic green sheet laminate by laminating the ceramic green sheets. At this time, through holes are created through each ceramic green sheet at a location where the external electrodes 11 e and 11 f are to be formed and a conductive member is injected to each through hole in advance. Then, the plurality of ceramic substrates are laminated while aligning the corresponding through holes to which the conductive member has been injected.
  • a second plurality of ceramic green sheets corresponding to the ceramic layer which is located above the upper end of the external electrodes 11 e and 11 f are laminated. Through holes are created through the second ceramic green sheets at the position where the via hole electrodes 5 and 6 are to be formed and a conductive member is filled in the through holes in advance of the lamination process.
  • the substrate 2 on which the external electrodes 11 e and 11 f are formed may be obtained by cutting the mother ceramic green sheet laminate in units of each individual substrate and by sintering the laminate.
  • FIGS. 8 a and 8 b are longitudinal and transverse section views showing another modified example of the electronic component 1 of the first preferred embodiment.
  • the cap 4 has been fixed on the substrate 2 in the electronic component 1 , the structure of the package for storing the electronic component may be changed as desired according to preferred embodiments of the present invention.
  • a structure in which a substantially rectangular frame 22 is combined with a cap 23 may be used instead of the cap 4 as in the electronic component 21 shown in FIGS. 8 a and 8 b.
  • the substantially rectangular frame 22 preferably made of insulating ceramics such as alumina is fixed to the upper surface of the ceramic substrate by using insulating adhesive and the cap 23 made of metal or plastic is fixed on the frame 22 .
  • the other components are the same as those of the electronic component 1 shown in FIG. 1, so that the same parts are denoted by the same reference numerals and repetitive explanation thereof will be omitted here.
  • FIGS. 9 a and 9 b It is also possible to construct a package by using a frame 24 which is thicker than the piezoelectric resonator 3 and by fixing a plate-like lid 25 on the upper surface of the frame 24 as shown in FIGS. 9 a and 9 b.
  • An electronic component 26 shown in FIGS. 9 a and 9 b is constructed in the same manner with as electronic component 1 except that the frame 24 and the plate-like lid 25 are used instead of the cap 4 (FIG. 1 ).
  • the material composing the frame 24 and the cap 25 is not specifically limited. Further, the frame may be made of the same material with the substrate or may be sintered at the same time with the substrate.
  • the component so as to be able to confirm the presence and physical characteristics of a fillet created by the solder or the like visually from the outside when mounted on a printed circuit substrate or the like by forming external electrodes 11 c and 11 d on the side of the ceramic substrate 2 like an electronic component 27 shown in a transverse section view of FIG. 10 in the same manner with the electronic component 10 shown in FIG. 3 .
  • the package preferably includes a substantially square package member 31 having an opening 31 a at the upper part thereof and a plate-like lid 32 fixed so as to close the opening 31 as shown in an exploded perspective view of FIG. 11.
  • a piezoelectric resonator 3 is stored within the package.
  • the piezoelectric resonator 3 is constructed in the same manner as the piezoelectric resonator 3 shown in FIG. 1 .
  • the electronic component 33 obtained in the present preferred embodiment has almost a substantially rectangular parallelepiped shape as shown in FIG. 12 .
  • FIG. 13 shows a longitudinal section view of the electronic component 33 .
  • FIG. 14 shows a transverse section view along an alternate dotted line D—D in FIG. 13 and
  • FIG. 15 shows a section corresponding to a part along an alternate dotted line E—E in FIG. 13 .
  • the package member 31 is preferably made of dielectric ceramics such as alumina. Via hole electrodes 35 , 36 and 40 are formed through the package member 31 so as to penetrate through the ceramic layer. The via hole electrodes 35 and 36 protrude upward from an inner bottom 31 b of the package member 31 . Accordingly, the piezoelectric resonator 3 placed on the package member 31 is disposed so as to float from the inner bottom 31 b while leaving a space A having a predetermined size or vertical dimension. Further, the piezoelectric resonator 3 is connected with the via hole electrodes 35 and 36 by conductive adhesives 37 a and 37 b.
  • the package member 31 has steps 31 c and 31 d at one pair of sides facing to each other.
  • the via hole electrode 36 is extended to the vertical position where the steps 31 c and 31 d are created.
  • a lower edge of the via hole electrode 36 is electrically connected with a connecting electrode 38 which is formed at the vertical position where the steps 31 c and 31 d are created.
  • a plurality of internal electrodes for composing capacitors are formed between the inner bottom 31 b of the package member 31 and the step 31 d. That is, a plurality of internal electrodes 39 a connected to the via hole electrodes 35 and 36 and a plurality of internal electrodes 39 b connected to the via hole electrode 40 are formed. The internal electrodes 39 a and the internal electrodes 39 b are disposed so as to overlap each other via the ceramic layers.
  • the via hole electrode 40 is connected to the uppermost one of the internal electrodes 39 b and the upper edge thereof does not reach the inner bottom 31 b as is apparent from FIG. 13 . Meanwhile, the lower edge of the via hole electrode 40 extends to the vertical position where the steps 31 c and 31 d are formed and is electrically connected with a connecting electrode 41 .
  • External electrodes 42 a - 42 c are formed at the part below the steps 31 c and 31 d of the package member 31 on the sides thereof (see FIG. 11 ).
  • the external electrodes 42 through 42 c are formed on the pair of sides facing each other.
  • the external electrodes 42 c are electrically connected with a connecting electrode 38 and consequently, are electrically connected with the via hole electrode 36 .
  • the external electrodes 42 b and 42 b are connected with the connecting electrode 41 and consequently, are electrically connected with a via hole electrode 40 as shown in FIG. 15 .
  • a circuit structure in which the piezoelectric resonator and two capacitors are connected between the external electrodes 42 a through 42 c may be realized in the electronic component 33 of the present preferred embodiment.
  • the electronic component of the present preferred embodiment of the present invention permits the capacitors including the plurality of internal electrodes to be constructed within the package member.
  • a desired circuit may be structured by electrically connecting the plurality of internal electrodes with the via hole electrodes.
  • the electronic component 33 of the present preferred embodiments has the circuit structure in which the piezoelectric resonator and two capacitors are connected as described above, it may be suitably used as a piezoelectric resonator for example.
  • the sectional profile of the via hole electrode is not limited to a substantially circular shape in the present invention.
  • the section of a via hole electrode 42 may be substantially elliptical as shown in FIGS. 16 a and 16 b.
  • an electronic component may be stably located via member 42 a protruding from a package member 43 .
  • the sectional profile of the via hole electrode is not limited to the substantially elliptical shape and may assume any shape such as a substantially rectangular or substantially square shape.

Landscapes

  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
US09/109,333 1997-06-30 1998-06-30 Apparatus having an electronic component located on a surface of a package member with a space therebetween Expired - Lifetime US6507139B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/303,421 US6871388B2 (en) 1997-06-30 2002-11-25 Method of forming an electronic component located on a surface of a package member with a space therebetween

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP17483797A JP3336913B2 (ja) 1997-06-30 1997-06-30 電子部品のパッケージ構造
JP9-174837 1997-06-30

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US10/303,421 Division US6871388B2 (en) 1997-06-30 2002-11-25 Method of forming an electronic component located on a surface of a package member with a space therebetween

Publications (1)

Publication Number Publication Date
US6507139B1 true US6507139B1 (en) 2003-01-14

Family

ID=15985529

Family Applications (2)

Application Number Title Priority Date Filing Date
US09/109,333 Expired - Lifetime US6507139B1 (en) 1997-06-30 1998-06-30 Apparatus having an electronic component located on a surface of a package member with a space therebetween
US10/303,421 Expired - Lifetime US6871388B2 (en) 1997-06-30 2002-11-25 Method of forming an electronic component located on a surface of a package member with a space therebetween

Family Applications After (1)

Application Number Title Priority Date Filing Date
US10/303,421 Expired - Lifetime US6871388B2 (en) 1997-06-30 2002-11-25 Method of forming an electronic component located on a surface of a package member with a space therebetween

Country Status (5)

Country Link
US (2) US6507139B1 (de)
EP (1) EP0889585B1 (de)
JP (1) JP3336913B2 (de)
CN (1) CN1144299C (de)
DE (1) DE69838312T2 (de)

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020096974A1 (en) * 2000-11-29 2002-07-25 Samsung Electro-Mechanics Co., Ltd Crystal oscillator with improved shock resistance
US20030197569A1 (en) * 2002-04-22 2003-10-23 Syuichi Mizusawa Surface-mount crystal unit
US20050269908A1 (en) * 2004-06-03 2005-12-08 Chin-Wen Chou Piezoelectric blades anchoring structure
US20070145858A1 (en) * 2005-12-23 2007-06-28 In-Hwa Song Surface mounted resonator having cap means and method of forming the same using insulating ceramic substrate
US20070176518A1 (en) * 2006-01-31 2007-08-02 Nihon Dempa Kogyo Co., Ltd. Surface mount type crystal device
US20070267642A1 (en) * 2006-05-16 2007-11-22 Luminus Devices, Inc. Light-emitting devices and methods for manufacturing the same
US20080253102A1 (en) * 2007-04-12 2008-10-16 Nihon Dempa Kogyo Co., Ltd., Electronic devices for surface mount
US20080265717A1 (en) * 2005-04-18 2008-10-30 Minoru Iizuka Piezoelectric Resonator Plate and Piezoelectric Resonator Device
US20090107698A1 (en) * 2007-10-30 2009-04-30 Zippy Technology Corp. Electric arc isolation structure for transformers
US20090179524A1 (en) * 2008-01-15 2009-07-16 Nihon Dempa Kogyo Co., Ltd. Crystal devices and methods for manufacturing same
US20110084571A1 (en) * 2009-10-14 2011-04-14 Murata Manufacturing Co., Ltd. Magnetic Head Driving Piezoelectric Ceramic Actuator
US20110121347A1 (en) * 2009-11-24 2011-05-26 Luminus Devices, Inc. Systems and methods for managing heat from an led
US20130214646A1 (en) * 2011-06-15 2013-08-22 Daishinku Corporation Electronic component package and piezoelectric resonator device
US20130264109A1 (en) * 2012-04-10 2013-10-10 Seiko Epson Corporation Electronic device, electronic apparatus, and method of manufacturing electronic device
US12028042B2 (en) 2018-12-27 2024-07-02 Daishinku Corporation Piezoelectric resonator device having a through hole and through electrode for conduction with an external electrode terminal

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4510982B2 (ja) * 2000-02-29 2010-07-28 京セラ株式会社 弾性表面波装置
JP3531573B2 (ja) 2000-03-17 2004-05-31 株式会社村田製作所 積層型セラミック電子部品およびその製造方法ならびに電子装置
JP3743302B2 (ja) 2001-04-25 2006-02-08 株式会社村田製作所 電子部品及び電子部品の基板電極形成方法
US7161089B2 (en) * 2002-12-04 2007-01-09 Tdk Corporation Electronic component
JP4131694B2 (ja) 2003-10-06 2008-08-13 三洋電機株式会社 積層セラミックス基板及びその製造方法
DE102005008514B4 (de) * 2005-02-24 2019-05-16 Tdk Corporation Mikrofonmembran und Mikrofon mit der Mikrofonmembran
DE102005008511B4 (de) * 2005-02-24 2019-09-12 Tdk Corporation MEMS-Mikrofon
DE102005050398A1 (de) * 2005-10-20 2007-04-26 Epcos Ag Gehäuse mit Hohlraum für ein mechanisch empfindliches elektronisches Bauelement und Verfahren zur Herstellung
DE102005053765B4 (de) * 2005-11-10 2016-04-14 Epcos Ag MEMS-Package und Verfahren zur Herstellung
DE112008003218B4 (de) * 2007-12-06 2019-01-31 Murata Mfg. Co., Ltd. Piezoelektrische Schwingungskomponente
US8082602B2 (en) * 2008-08-15 2011-12-27 Sport Maska Inc. Upper body protective garment
JP4823336B2 (ja) * 2009-06-22 2011-11-24 京セラ株式会社 弾性表面波装置、および実装構造体
DE102013106353B4 (de) * 2013-06-18 2018-06-28 Tdk Corporation Verfahren zum Aufbringen einer strukturierten Beschichtung auf ein Bauelement
CN107210724B (zh) * 2015-03-27 2020-11-10 京瓷株式会社 石英振子以及石英振动器件

Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3073975A (en) * 1958-12-23 1963-01-15 Rca Corp Crystal unit
US3735166A (en) * 1971-10-06 1973-05-22 Cts Corp Piezoelectric crystal assembly
US4033017A (en) * 1975-01-28 1977-07-05 Kabushiki Kaisha Seikosha Manufacturing method of a hermetically sealed terminal
US4035673A (en) * 1974-12-24 1977-07-12 Citizen Watch Co. Limited Hermetically sealed mount for a piezoelectric tuning fork
US4583019A (en) * 1983-05-30 1986-04-15 Fujitsu Limited Piezoelectric resonator using 165° Y-cut LiNbO3
JPH03112191A (ja) 1989-09-27 1991-05-13 Toshiba Corp セラミック配線基板およびその製造方法
JPH0583074A (ja) 1991-09-19 1993-04-02 Murata Mfg Co Ltd 圧電チツプ部品及びその製造方法
US5459368A (en) * 1993-08-06 1995-10-17 Matsushita Electric Industrial Co., Ltd. Surface acoustic wave device mounted module
JPH0888470A (ja) 1994-09-16 1996-04-02 Taiyo Yuden Co Ltd 電子部品実装用セラミック多層基板及びその製造方法
US5525855A (en) * 1992-10-29 1996-06-11 Nec Corporation Flat packaged piezoelectric device using a glass-ceramic composite material comprising forsterite as ceramics
JPH09283650A (ja) 1996-04-16 1997-10-31 Fuji Denka:Kk 気密封着用パッケージ
US5699027A (en) * 1995-03-28 1997-12-16 Matsushita Electric Industrial Co., Ltd. Surface acoustic wave devices having a guard layer
JPH10215074A (ja) 1997-01-31 1998-08-11 Sharp Corp セラミック多層基板およびその製造方法
US5801474A (en) * 1994-12-06 1998-09-01 Nec Corporation Surface acoustic wave (SAW) device
US5920242A (en) * 1997-06-09 1999-07-06 Ngk Spark Plug Co., Ltd. Multielement-type piezoelectric filter with through-hole connection of resonators to a base substrate circuit
US6078123A (en) * 1997-08-08 2000-06-20 Nec Corporation Structure and method for mounting a saw device

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6273799A (ja) * 1985-09-27 1987-04-04 日本電気株式会社 多層セラミツク配線基板
EP0241236A3 (de) * 1986-04-11 1989-03-08 AT&T Corp. Hohlraumgehäuse für Oberflächenwellenanordnungen und assoziierte Elektroniken
JPS62265796A (ja) * 1986-05-14 1987-11-18 株式会社住友金属セラミックス セラミツク多層配線基板およびその製造法
US5406682A (en) * 1993-12-23 1995-04-18 Motorola, Inc. Method of compliantly mounting a piezoelectric device
JPH07221589A (ja) * 1994-01-31 1995-08-18 Matsushita Electric Ind Co Ltd 電子部品とその製造方法
JP3146872B2 (ja) * 1994-08-31 2001-03-19 株式会社村田製作所 セラミックグリーンシートへの電極形成方法及び積層セラミック電子部品の製造方法
US5601672A (en) * 1994-11-01 1997-02-11 International Business Machines Corporation Method for making ceramic substrates from thin and thick ceramic greensheets

Patent Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3073975A (en) * 1958-12-23 1963-01-15 Rca Corp Crystal unit
US3735166A (en) * 1971-10-06 1973-05-22 Cts Corp Piezoelectric crystal assembly
US4035673A (en) * 1974-12-24 1977-07-12 Citizen Watch Co. Limited Hermetically sealed mount for a piezoelectric tuning fork
US4033017A (en) * 1975-01-28 1977-07-05 Kabushiki Kaisha Seikosha Manufacturing method of a hermetically sealed terminal
US4583019A (en) * 1983-05-30 1986-04-15 Fujitsu Limited Piezoelectric resonator using 165° Y-cut LiNbO3
JPH03112191A (ja) 1989-09-27 1991-05-13 Toshiba Corp セラミック配線基板およびその製造方法
JPH0583074A (ja) 1991-09-19 1993-04-02 Murata Mfg Co Ltd 圧電チツプ部品及びその製造方法
US5525855A (en) * 1992-10-29 1996-06-11 Nec Corporation Flat packaged piezoelectric device using a glass-ceramic composite material comprising forsterite as ceramics
US5459368A (en) * 1993-08-06 1995-10-17 Matsushita Electric Industrial Co., Ltd. Surface acoustic wave device mounted module
JPH0888470A (ja) 1994-09-16 1996-04-02 Taiyo Yuden Co Ltd 電子部品実装用セラミック多層基板及びその製造方法
US5801474A (en) * 1994-12-06 1998-09-01 Nec Corporation Surface acoustic wave (SAW) device
US5699027A (en) * 1995-03-28 1997-12-16 Matsushita Electric Industrial Co., Ltd. Surface acoustic wave devices having a guard layer
JPH09283650A (ja) 1996-04-16 1997-10-31 Fuji Denka:Kk 気密封着用パッケージ
JPH10215074A (ja) 1997-01-31 1998-08-11 Sharp Corp セラミック多層基板およびその製造方法
US5920242A (en) * 1997-06-09 1999-07-06 Ngk Spark Plug Co., Ltd. Multielement-type piezoelectric filter with through-hole connection of resonators to a base substrate circuit
US6078123A (en) * 1997-08-08 2000-06-20 Nec Corporation Structure and method for mounting a saw device

Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6628048B2 (en) * 2000-11-29 2003-09-30 Samsung Electro-Mechanics Co., Ltd. Crystal oscillator with improved shock resistance
US20020096974A1 (en) * 2000-11-29 2002-07-25 Samsung Electro-Mechanics Co., Ltd Crystal oscillator with improved shock resistance
US20030197569A1 (en) * 2002-04-22 2003-10-23 Syuichi Mizusawa Surface-mount crystal unit
US6778029B2 (en) * 2002-04-22 2004-08-17 Nihon Dempa Kogyo Co., Ltd. Surface-mount crystal unit
US20050269908A1 (en) * 2004-06-03 2005-12-08 Chin-Wen Chou Piezoelectric blades anchoring structure
US7235916B2 (en) * 2004-06-03 2007-06-26 Zippy Technology Corp. Piezoelectric blades anchoring structure
US8004157B2 (en) * 2005-04-18 2011-08-23 Daishinku Corporation Piezoelectric resonator plate and piezoelectric resonator device
US20080265717A1 (en) * 2005-04-18 2008-10-30 Minoru Iizuka Piezoelectric Resonator Plate and Piezoelectric Resonator Device
US20070145858A1 (en) * 2005-12-23 2007-06-28 In-Hwa Song Surface mounted resonator having cap means and method of forming the same using insulating ceramic substrate
US7449820B2 (en) * 2006-01-31 2008-11-11 Nihon Dempa Kogyo Co., Ltd. Surface mount type crystal device
US20070176518A1 (en) * 2006-01-31 2007-08-02 Nihon Dempa Kogyo Co., Ltd. Surface mount type crystal device
US20070267642A1 (en) * 2006-05-16 2007-11-22 Luminus Devices, Inc. Light-emitting devices and methods for manufacturing the same
US20080253102A1 (en) * 2007-04-12 2008-10-16 Nihon Dempa Kogyo Co., Ltd., Electronic devices for surface mount
US8064221B2 (en) * 2007-04-12 2011-11-22 Nihon Dempa Kogyo Co., Ltd. Electronic devices for surface mount
US20090107698A1 (en) * 2007-10-30 2009-04-30 Zippy Technology Corp. Electric arc isolation structure for transformers
US7974065B2 (en) * 2007-10-30 2011-07-05 Zippy Technology Corp. Electric arc isolation structure for transformers
US20090179524A1 (en) * 2008-01-15 2009-07-16 Nihon Dempa Kogyo Co., Ltd. Crystal devices and methods for manufacturing same
US7932662B2 (en) * 2008-01-15 2011-04-26 Nihon Dempa Kogyo Co., Ltd. Crystal devices and methods for manufacturing same
US20110084571A1 (en) * 2009-10-14 2011-04-14 Murata Manufacturing Co., Ltd. Magnetic Head Driving Piezoelectric Ceramic Actuator
US8471440B2 (en) * 2009-10-14 2013-06-25 Murata Manufacturing Co., Ltd. Magnetic head driving piezoelectric ceramic actuator
US20110121347A1 (en) * 2009-11-24 2011-05-26 Luminus Devices, Inc. Systems and methods for managing heat from an led
US10290788B2 (en) * 2009-11-24 2019-05-14 Luminus Devices, Inc. Systems and methods for managing heat from an LED
US20130214646A1 (en) * 2011-06-15 2013-08-22 Daishinku Corporation Electronic component package and piezoelectric resonator device
US9237668B2 (en) * 2011-06-15 2016-01-12 Daishinku Corporation Electronic component package and piezoelectric resonator device
TWI559583B (zh) * 2011-06-15 2016-11-21 Daishinku Corp Electronic components for the package and piezoelectric vibration components
US20130264109A1 (en) * 2012-04-10 2013-10-10 Seiko Epson Corporation Electronic device, electronic apparatus, and method of manufacturing electronic device
US9161450B2 (en) * 2012-04-10 2015-10-13 Seiko Epson Corporation Electronic device, electronic apparatus, and method of manufacturing electronic device
US12028042B2 (en) 2018-12-27 2024-07-02 Daishinku Corporation Piezoelectric resonator device having a through hole and through electrode for conduction with an external electrode terminal

Also Published As

Publication number Publication date
CN1208993A (zh) 1999-02-24
JP3336913B2 (ja) 2002-10-21
US20030076010A1 (en) 2003-04-24
DE69838312D1 (de) 2007-10-11
DE69838312T2 (de) 2008-05-21
EP0889585A2 (de) 1999-01-07
EP0889585A3 (de) 2002-04-17
EP0889585B1 (de) 2007-08-29
US6871388B2 (en) 2005-03-29
JPH1126628A (ja) 1999-01-29
CN1144299C (zh) 2004-03-31

Similar Documents

Publication Publication Date Title
US6507139B1 (en) Apparatus having an electronic component located on a surface of a package member with a space therebetween
KR100773198B1 (ko) 표면 실장형 커패시터 및 그 제조방법
JP3285847B2 (ja) 表面実装型水晶発振器
KR101485106B1 (ko) 콘덴서 부품 및 콘덴서 부품 실장 구조체
US6674221B2 (en) Electronic component module and piezoelectric oscillator device
JPH11150153A (ja) 電子部品
US6433466B2 (en) Piezoelectric resonant component
US20020160540A1 (en) Electronic component and method for forming substrate electrode of the same
KR100408608B1 (ko) 전자부품의 패키지용 기판 및 이를 사용하는 압전 공진부품
JP2000077943A (ja) 温度補償型水晶発振器
JP3413657B2 (ja) 表面実装型圧電振動子用パッケージの製造方法
JP4439291B2 (ja) 圧電振動子収納用パッケージおよび圧電装置
JP2010118810A (ja) 圧電デバイス
JP4576741B2 (ja) 圧電発振器
JP3317193B2 (ja) 電子部品のパッケージ構造及びその製造方法
JP7290062B2 (ja) 圧電振動デバイス用容器および当該容器を用いた圧電振動デバイス
JPH087696Y2 (ja) 複合電子部品
JPH1126901A (ja) セラミック基板、電子部品及びセラミック基板の製造方法
JP2003110399A (ja) 電子部品
JP3157975B2 (ja) ラダー型フィルタ
JPH0749858Y2 (ja) フラットパッケージ型圧電振動子
JP2002299993A (ja) 電子部品
JP2002299994A (ja) 電子部品
JPH08274569A (ja) 圧電共振子
JP2019134063A (ja) 配線基板、電子装置及び電子モジュール

Legal Events

Date Code Title Description
AS Assignment

Owner name: MURATA MANUFACTURING CO., LTD., JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:ISHINO, SATOSHI;KUBOTA, KENJI;SAITO, TSUYOSHI;AND OTHERS;REEL/FRAME:009532/0526;SIGNING DATES FROM 19980616 TO 19980729

STCF Information on status: patent grant

Free format text: PATENTED CASE

FPAY Fee payment

Year of fee payment: 4

FEPP Fee payment procedure

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

FPAY Fee payment

Year of fee payment: 8

FPAY Fee payment

Year of fee payment: 12