JP4823336B2 - 弾性表面波装置、および実装構造体 - Google Patents
弾性表面波装置、および実装構造体 Download PDFInfo
- Publication number
- JP4823336B2 JP4823336B2 JP2009147777A JP2009147777A JP4823336B2 JP 4823336 B2 JP4823336 B2 JP 4823336B2 JP 2009147777 A JP2009147777 A JP 2009147777A JP 2009147777 A JP2009147777 A JP 2009147777A JP 4823336 B2 JP4823336 B2 JP 4823336B2
- Authority
- JP
- Japan
- Prior art keywords
- acoustic wave
- surface acoustic
- wave device
- electrode
- base substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
Description
2:圧電基板
3:弾性表面波素子
4:筐体
5:接着樹脂
6:入出力電極
7:接地電極
8:入出力電極(引き出し電極)
9:接地電極(引き出し電極)
10:ワイヤ
11:蓋体
12:封止材
14:ベース基板
15:貫通孔
16:凹部
17:第1の導電材(金属膜)
18:第2の導電材
19:振動空間
20:信号配線部
21:保護膜
22:保護樹脂
S1〜S3:弾性表面波装置
Claims (4)
- 下面に励振電極と該励振電極に電気的に接続される引き出し電極とを有した弾性表面波素子と、
前記励振電極との間に存在する封止空間を介して前記弾性表面波素子と対向するように配置され、平面透視して前記封止空間の外側で前記弾性表面波素子に対し接合されたベース基板と、
上部が前記引き出し電極と電気的に接続された外部回路接続用の導電材と、を備え、
前記ベース基板は、異方性エッチングが可能な材料から構成され、且つ該ベース基板の前記励振電極と対向する部分には、異方性エッチングにより形成された凹部が設けられていることを特徴とする弾性表面波装置。 - 前記ベース基板はSi単結晶基板からなる、請求項1に記載の弾性表面波装置。
- 前記ベース基板は、前記導電材と前記引き出し電極との接続箇所と対応する位置に貫通孔を有しており、
前記導電材の下部は、前記貫通孔を介して前記封止空間よりも下側の高さ位置まで導出
されている、請求項1または2に記載の弾性表面波装置。 - 請求項1〜3のいずれか一項に記載の弾性表面波装置と、
前記弾性表面波装置が実装された外部回路基板と、を備えた実装構造体。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009147777A JP4823336B2 (ja) | 2009-06-22 | 2009-06-22 | 弾性表面波装置、および実装構造体 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009147777A JP4823336B2 (ja) | 2009-06-22 | 2009-06-22 | 弾性表面波装置、および実装構造体 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2000054164A Division JP4510982B2 (ja) | 2000-02-29 | 2000-02-29 | 弾性表面波装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009213174A JP2009213174A (ja) | 2009-09-17 |
JP4823336B2 true JP4823336B2 (ja) | 2011-11-24 |
Family
ID=41185800
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009147777A Expired - Lifetime JP4823336B2 (ja) | 2009-06-22 | 2009-06-22 | 弾性表面波装置、および実装構造体 |
Country Status (1)
Country | Link |
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JP (1) | JP4823336B2 (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5833102B2 (ja) * | 2011-03-28 | 2015-12-16 | 京セラ株式会社 | 弾性波素子およびそれを用いた弾性波装置 |
WO2014077239A1 (ja) * | 2012-11-13 | 2014-05-22 | 株式会社村田製作所 | 弾性波装置 |
CN109004080A (zh) * | 2018-08-10 | 2018-12-14 | 付伟 | 带有延伸双围堰及焊锡的芯片封装结构及其制作方法 |
JP7297329B2 (ja) * | 2019-05-16 | 2023-06-26 | 中芯集成電路(寧波)有限公司上海分公司 | エアギャップ型半導体デバイスのパッケージング構造及びその製作方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0590884A (ja) * | 1991-09-28 | 1993-04-09 | Murata Mfg Co Ltd | 弾性表面波装置及びその実装方法 |
JPH08274575A (ja) * | 1995-04-03 | 1996-10-18 | Kokusai Electric Co Ltd | 素子複合搭載回路基板 |
JP3336913B2 (ja) * | 1997-06-30 | 2002-10-21 | 株式会社村田製作所 | 電子部品のパッケージ構造 |
-
2009
- 2009-06-22 JP JP2009147777A patent/JP4823336B2/ja not_active Expired - Lifetime
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Publication number | Publication date |
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JP2009213174A (ja) | 2009-09-17 |
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