US20050040904A1 - Temperature compensation type oscillator - Google Patents

Temperature compensation type oscillator Download PDF

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Publication number
US20050040904A1
US20050040904A1 US10/501,774 US50177404A US2005040904A1 US 20050040904 A1 US20050040904 A1 US 20050040904A1 US 50177404 A US50177404 A US 50177404A US 2005040904 A1 US2005040904 A1 US 2005040904A1
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Prior art keywords
circuit
temperature
oscillation
temperature compensation
selection
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US10/501,774
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Yasuhiro Sakurai
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Citizen Holdings Co Ltd
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Citizen Watch Co Ltd
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Assigned to CITIZEN WATCH CO., LTD. reassignment CITIZEN WATCH CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: SAKURAI, YASUHIRO
Publication of US20050040904A1 publication Critical patent/US20050040904A1/en
Priority to US11/544,622 priority Critical patent/US7583157B2/en
Assigned to CITIZEN HOLDINGS CO., LTD. reassignment CITIZEN HOLDINGS CO., LTD. CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). Assignors: CITIZEN WATCH CO., LTD.
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/30—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator
    • H03B5/32—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/02—Details
    • H03B5/04—Modifications of generator to compensate for variations in physical values, e.g. power supply, load, temperature
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L1/00—Stabilisation of generator output against variations of physical values, e.g. power supply
    • H03L1/02—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only
    • H03L1/022—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature
    • H03L1/026—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature by using a memory for digitally storing correction values
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L1/00—Stabilisation of generator output against variations of physical values, e.g. power supply
    • H03L1/02—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only
    • H03L1/022—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature
    • H03L1/027—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature by using frequency conversion means which is variable with temperature, e.g. mixer, frequency divider, pulse add/substract logic circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop

Definitions

  • the present invention relates to a temperature compensated oscillator in which the frequency of an output signal is kept substantially constant irrespective of a change in ambient temperature and, more specifically, to a temperature compensated oscillator in which its temperature compensation function can also be disabled.
  • Temperature compensated oscillators used in various fields are in heavy use in portable mobile communication devices such as a cellular phone and so on in recent years.
  • a crystal oscillator is widely used in which an oscillation circuit is constituted of a 10 MHz band AT cut quartz crystal (resonator) as an oscillation source and provided with a temperature compensation circuit using some kind of frequency variable means so that the temperature characteristic in a cubic curve of the AT cut quartz crystal is cancelled to stabilize the oscillating frequency.
  • the temperature compensated oscillators are roughly divided into an analog temperature compensated oscillator and a digital temperature compensated oscillator.
  • FIG. 8 A package configuration example of a micro surface-mounted temperature compensated oscillator is shown in FIG. 8 .
  • This temperature compensated oscillator has a package (container) 10 which is constituted of a package main body 11 , a welded ring 12 , and a cover 13 , to the inside of which a quartz crystal (resonator) 15 , a MOS IC (integrated circuit) chip 16 constituting an oscillation circuit and a temperature compensation circuit which will be later described, and a circuit element 17 such as a chip capacitor or the like are attached and sealed.
  • a package (container) 10 which is constituted of a package main body 11 , a welded ring 12 , and a cover 13 , to the inside of which a quartz crystal (resonator) 15 , a MOS IC (integrated circuit) chip 16 constituting an oscillation circuit and a temperature compensation circuit which will be later described, and a circuit element 17 such as a chip capacitor or the like are attached and sealed.
  • the temperature compensated oscillator has a circuit configuration as shown in FIG. 9 .
  • An oscillation circuit 20 forms an inverter oscillation circuit in which the quartz crystal 15 , an inverter 21 , and a feedback resistor 22 are connected in parallel, and their both connection points are grounded via DC cut capacitors Cc and Cd and voltage-controlled variable capacitors 23 and 24 which are oscillation capacitors, respectively.
  • an output line 25 which outputs a signal based on an oscillation output is led out of the connection point on the output side of the inverter 21 and connected to an output terminal 26 .
  • another piezoelectric element can also be used as the resonator in place of the quartz crystal 15 .
  • a temperature detection circuit 18 which detects the temperature state near the quartz crystal 15 in the oscillation circuit 20 by a thermister or the like and a temperature compensation circuit 30 for keeping the frequency of the signal to be outputted to the output line 25 of the oscillation circuit 20 constant based on the temperature detection signal from the temperature detection circuit 18 , are provided.
  • the temperature compensation circuit 30 comprises a compensation data storage circuit (non-volatile memory) 31 which stores compensation data for performing temperature compensation and a D/A conversion circuit 32 which generates a control voltage based on the compensation data and the temperature detection signal from the temperature detection circuit 18 .
  • control voltage outputted from the D/A conversion circuit 32 is applied to the positive electrode side of the voltage-controlled variable capacitors 23 and 24 (the connection points with the DC cut capacitors Cc and Cd) via resistors R 1 and R 2 provided in the oscillation circuit 20 respectively, so as to change the capacitances of the voltage-controlled variable capacitors 23 and 24 in accordance with the voltage.
  • This controls the oscillation frequency of the oscillation circuit 20 to keep the frequency of the output signal substantially constant.
  • the oscillation circuits cannot be sufficiently compensated if the quartz crystals 15 exhibit a wide range of characteristic variation, and it is therefore necessary to adjust as much as possible the characteristics of the quartz crystals 15 in advance.
  • Step 1 Only the piezoelectric element such as the quartz crystal 15 or the like is mounted in the package (the package main body 11 in FIG. 8 ).
  • Step 2 The package is kept at a reference temperature (generally at room temperature: 25° C.), and an electrode film on the surface of the piezoelectric element is removed by an ion beam or the like while the resonant frequency of the piezoelectric element is being monitored by a network analyzer or the like to adjust the frequency to a desired frequency.
  • a reference temperature generally at room temperature: 25° C.
  • Step 3 The IC chip constituting the oscillation circuit and the temperature compensation circuit is mounted in the package.
  • Step 4 The package is exposed to a plurality of temperature states, and the oscillation frequency is measured in each of the temperature states to measure the difference with respect to the desired oscillation frequency fo.
  • Step 5 Based on the measurement values, temperature compensation data is created and stored into the compensation data storage circuit (non-volatile memory) of the IC chip.
  • the IC chip constituting the oscillation circuit is not mounted when the characteristics of the piezoelectric element such as the quartz crystal or the like is adjusted, but the piezoelectric element is caused to resonate and its resonant frequency is monitored from the outside by the network analyzer or the like and the electrode film on the surface of the piezoelectric element is removed so that the frequency has a desired value.
  • the piezoelectric element and the IC chip are mounted in the package and the oscillation circuit is caused to operate, and its oscillation frequency is monitored so that adjustment of the resonant frequency of the piezoelectric element at room temperature and creation of the compensation data thereafter can be performed in sequence in a state close to the actual use state, in which case, however, the temperature compensation circuit also operates.
  • no compensation data is stored in the temperature compensation data storage circuit in the initial state, but the initial value of the register for storing the data is unknown such that bits thereof are all “0” in some case and are all “1” in the other case. This brings about a problem that it is impossible to perform appropriate adjustment of the resonant frequency of the piezoelectric element such as the quartz crystal or the like and proper creation of the compensation data thereafter.
  • the invention has been developed to solve the problems described above, and its aspect is to make it possible, in a state in which a piezoelectric element such as a quartz crystal or the like, an IC chip, and so on are mounted in a package to constitute a temperature compensated oscillator, to allow its oscillation circuit to operate so as to accurately adjust the temperature characteristics of the piezoelectric element itself, and thereafter subsequently create compensation data and store it into a compensation data storage circuit, thereby simplifying adjustment steps of the temperature compensated oscillator and increasing the accuracy thereof.
  • a piezoelectric element such as a quartz crystal or the like, an IC chip, and so on
  • the invention is a temperature compensated oscillator comprising: an oscillation circuit whose oscillation frequency varies with a temperature change; an output line for outputting a signal based on an oscillation output of the oscillation circuit; a temperature detection circuit for detecting a temperature state near the oscillation circuit; and a temperature compensation circuit for keeping a frequency of the signal outputted to the output line substantially constant based on its temperature detection signal, wherein a selection means is provided which selects whether to enable or disable a temperature compensation function of the temperature compensation circuit.
  • variable frequency division circuit between the above-described circuit and the output line, wherein the selection means has means for allowing the temperature compensation circuit to vary a frequency division ratio of the variable frequency division circuit depending on a temperature detected by the temperature detection circuit when enabling the temperature compensation function of the temperature compensation circuit, and fixing the frequency division ratio of the frequency division circuit to a predetermined value when disabling the temperature compensation function.
  • the oscillation circuit has an oscillation capacitor
  • the selection means has means for allowing the temperature compensation circuit to vary a capacitance value of the oscillation capacitor depending on a temperature detected by the temperature detection circuit when enabling the temperature compensation function of the temperature compensation circuit, and fixing the capacitance of the oscillation capacitor to a predetermined capacitance value when disabling the temperature compensation function.
  • the oscillation capacitor includes a variable capacitor which varies in capacitance value in accordance with a voltage applied thereto, and the temperature compensation circuit has means for changing the voltage applied to the variable capacitor to change the capacitance value of the oscillation capacitor.
  • the selection means has means for fixing the voltage applied to the variable capacitor to a predetermined value when fixing the capacitance of the oscillation capacitor to the predetermined capacitance value.
  • the oscillation capacitor includes a plurality of fixed capacitors
  • the temperature compensation circuit has means for changing connection states of the plurality of fixed capacitors to change the capacitance of the oscillation capacitor.
  • the selection means has means for separating the variable capacitor so that the variable capacitor is not included in the oscillation capacitor when fixing the capacitance of the oscillation capacitor to the predetermined capacitance value.
  • these temperature compensated oscillators further comprise a selection information storage circuit which stores control information for controlling a selection state of the selection means.
  • both the circuits can be formed of an integrated storage circuit (for example, one non-volatile memory).
  • control information input terminal for inputting from outside control information for controlling a selection state of the selection means.
  • the control information input terminal may be an external terminal provided on a package constituting the temperature compensated oscillator.
  • the selection information storage circuit is composed of a predetermined conductive pattern and stores information for controlling a selection state of the selection means caused by the conductive pattern being cut.
  • FIG. 1 is a block circuit diagram showing the configuration of a first embodiment of a temperature compensated oscillator according to the invention
  • FIG. 2 is a circuit diagram showing another example of its oscillation circuit
  • FIG. 3 is a circuit diagram showing still another example of the same oscillation circuit
  • FIG. 4 is a block circuit diagram showing the configuration of a second embodiment of the temperature compensated oscillator according to the invention.
  • FIG. 5 is a block diagram showing an example of a variable frequency division circuit in FIG. 4 ;
  • FIG. 6 is a chart showing an example of the relationship among frequency division data M and N and a frequency division ratio (multiplication number) by the same variable frequency division circuit and a frequency of an output signal;
  • FIG. 7 is a block circuit diagram showing the configuration of a third embodiment of the temperature compensated oscillator according to the invention.
  • FIG. 8 is a schematic cross-sectional view showing an example of a package of the temperature compensated oscillator.
  • FIG. 9 is a block circuit diagram showing a configuration example of a conventional temperature compensated oscillator.
  • FIG. 1 is a block circuit diagram showing the configuration of a first embodiment of a temperature compensated oscillator according to the invention, in which portions equivalent to those in FIG. 8 and FIG. 9 are assigned the same numerals and symbols, and the description thereof will be omitted.
  • the temperature compensated oscillator shown in FIG. 1 comprises an oscillation circuit 20 having an output line 25 and an output terminal 26 , a temperature detection circuit 18 , and a temperature compensation circuit 30 which are similar to those of the conventional example shown in FIG. 9 .
  • the oscillator further comprises, as components specific to this embodiment, a selection circuit 40 that is a selection means, a selection information storage circuit (non-volatile memory) 50 which stores control information for controlling the selection state of the selection circuit 40 , and a constant voltage generation circuit 51 which outputs a constant voltage Vk.
  • a control information input terminal to which control information for controlling the selection state of the selection circuit 40 is inputted is further provided outside the package 10 shown in FIG. 8 as an external terminal 52 .
  • This control information input terminal may be provided inside the package main body 11 .
  • the selection circuit 40 is constituted of a pair of transmission gates 41 and 42 , a three-input NAND circuit 43 , and two inverters (NOT circuits) 44 and 45 .
  • a control voltage Vc that is the output of the temperature compensation circuit 30 is applied to a common connection point of the resistors RI and R 2 shown in FIG. 9 of the oscillation circuit 20 via one transmission gate 41 .
  • the constant voltage Vk that is the output of the constant voltage generation circuit 51 is applied similarly to the common connection point of the resistors R 1 and R 2 of the oscillation circuit 20 via the other transmission gate 42 .
  • the selection information storage circuit 50 outputs 3 bits of selection information, so that outputs of a bit 1 and a bit 3 become two inputs to the three-input NAND circuit 43 as they are and an output of a bit 2 is inverted by the inverter 44 to become the other input to the NAND circuit 43 . Accordingly, only when the selection information outputted from the selection information storage circuit 50 is “101,” all of the three inputs of the NAND circuit 43 become “1” so that its output becomes “0.”
  • the output of the NAND circuit 43 is directly applied to the gate on the negative logic side of the transmission gate 41 and the gate on the positive logic side of the transmission gate 42 , and is inverted by the inverter 45 and applied to the gate on the positive logic side of the transmission gate 41 and the gate on the negative logic side of the transmission gate 42 .
  • the transmission gate 41 is turned on while the transmission gate 42 is turned off, and therefore the control voltage Vc outputted from the temperature compensation circuit 30 passes through the transmission gate 41 and is applied to the oscillation circuit 20 to be applied to the voltage controlled variable capacitors 23 and 24 via the resistors R 1 and R 2 shown in FIG. 9 , whereby the capacitance value of the oscillation capacitor varies depending on the temperature so that the oscillation frequency of the oscillation circuit 20 is temperature-compensated to be kept constant.
  • the transmission gate 42 When the selection information outputted from the selection information storage circuit 50 is other than “101,” the transmission gate 42 is turned on while the transmission gate 41 is turned off, and therefore the constant voltage Vk outputted from the constant voltage generation circuit 51 passes through the transmission gate 42 and is applied to the oscillation circuit 20 to be applied to the voltage controlled variable capacitors 23 and 24 via the resistors R 1 and R 2 shown in FIG. 9 , whereby the capacitance value of the oscillation capacitor is fixed to predetermined capacitance value in accordance with the constant voltage so that the oscillation frequency of the oscillation circuit 20 is not temperature-compensated.
  • the selection circuit 40 selects either to supply the control voltage Vc from the temperature compensation circuit 30 to the oscillation circuit 20 to enable the temperature compensation function or to supply the constant (fixed) voltage Vk from the constant voltage generation circuit to the oscillation circuit 20 to disable the temperature compensation function, based on the 3-bit selection information outputted from the selection information storage circuit 50 .
  • the switching in the selection circuit 40 can be performed also by applying to the external terminal 52 a signal (voltage) at a high level “1” or a signal (voltage) at a low level “0” as the control information.
  • the selection information storage circuit 50 and the NAND circuit 43 and the inverter 44 in the selection circuit 40 may be omitted.
  • the initial adjustment of the quartz crystal in the oscillation circuit 20 and the adjustment work of creating and storing the temperature compensation data can be performed in a state in which the quartz crystal and the IC chip constituting the oscillation circuit, the temperature compensation circuit, and so on are mounted in the package to complete the temperature compensated oscillator and the oscillation circuit 20 is operated.
  • the selection information of the selection information storage circuit 50 is set to other than “101” to disable the temperature compensation function, and the oscillation circuit 20 is caused to perform oscillation operation with a predetermined oscillation capacitance.
  • Step 1 The IC chip constituting the oscillation circuit 20 and the circuits shown in FIG. 1 is mounted in the package (for example, the package main body 11 shown in FIG. 8 ), and then the quartz crystal is mounted therein.
  • Step 2 The package is kept at a reference temperature (generally at room temperature: 25° C.), the temperature compensation function of the temperature compensated oscillator is disabled whereby the temperature compensated oscillator is caused to operate as a simple oscillator, and an electrode film on the surface of the quartz crystal is removed by an ion beam or the like while its oscillation frequency is being monitored by a network analyzer or the like to adjust the frequency to a desired oscillation frequency f 0 .
  • a reference temperature generally at room temperature: 25° C.
  • Step 3 A cover is attached to the package to hermetically seal the quartz crystal.
  • Step 4 The package is exposed to a plurality of temperature states, and the oscillation frequency is measured in each of temperature states to measure the difference with respect to the desired oscillation frequency f 0 .
  • Step 5 Based on the measurement values, temperature compensation data is created and stored into the compensation data storage circuit (non-volatile memory) of the IC chip.
  • the temperature compensation function is enabled, whereby the temperature compensated oscillator is allowed to normally operate, resulting in a finished micro temperature compensated oscillator.
  • the temperature characteristics of the quartz crystal can be accurately adjusted, unaffected by the temperature compensation circuit while the oscillation circuit is oscillating as in the actual use state, and the work of creating the compensation data thereafter and storing it into the compensation data storage circuit can also be accurately performed subsequent thereto. This makes it possible to simplify the adjustment steps of the temperature compensated oscillator and increase the accuracy thereof.
  • step 2 keeping the package at the reference temperature (generally at room temperature: 25° C.) is preferably accomplished by putting the package into a constant temperature chamber and performing the adjustment work.
  • the reference temperature generally at room temperature: 25° C.
  • step 4 exposure of the package to the plurality of temperature states is preferably accomplished by changing the set temperature of the constant temperature chamber in sequence or by sequentially housing the package into a plurality of constant temperature chamber which are set at different temperatures.
  • the measurement temperature range is the operation guaranteed temperature range of this oscillator and should be, for example, set at appropriate points (for example, about 11 points) from minus 40° C. to plus 100° C.
  • the adjustment of the reference frequency of the quartz crystal is accomplished by depositing metal film such as silver or the like on the surface of the quartz crystal to form it in a film thickness (relatively thick) which allows the resonant frequency to be lower than the reference frequency in advance, and applying an ion beam to the electrode film on the surface of the quartz crystal using an ion gun or performing sputter etching for the electrode film to gradually decrease the mass of the electrode film.
  • the temperature characteristics of the oscillation frequency of the oscillation circuit using the AT cut quartz crystal as a resonator exhibit an almost cubic curb, and therefore even if the oscillation frequency is adjusted to become the desired frequency f 0 at the reference temperature, the oscillation frequency deviates therefrom due to a change in the environmental temperature. For this reason, the temperature is actually changed from the lower limit to the upper limit within the use guaranteed temperature range, and the actual oscillation frequency of the oscillation circuit, that is, the frequency of the signal outputted to the output terminal 26 is measured at each of the temperature states (measurement points) to measure the difference with respect to the desired oscillation frequency f 0 .
  • temperature compensation data necessary for generation of the control voltage Vc for bringing the difference to 0 in the temperature compensation circuit 30 is calculated and written into the compensation data storage circuit (non-volatile memory) 31 shown in FIG. 9 corresponding to temperature data.
  • the more measurement points are set the more highly accurate temperature compensation data can be created, but the longer the measurement time becomes, and therefore it is preferable to estimate the cubic curve of the temperature characteristics of the oscillation circuit from the measurement result in the appropriate number (for example, about 11 points) of temperature states, also create by interpolation temperature compensation data for temperatures between the measurement points, and write the data into the compensation data storage circuit.
  • FIG. 2 and FIG. 3 Another example of the oscillation circuit, in particular, its oscillation capacitor and it's capacitance variable means are shown in FIG. 2 and FIG. 3 .
  • the oscillation circuit shown in FIG. 2 forms, similarly to the oscillation circuit 20 shown in FIG. 9 , an inverter oscillation circuit in which a quartz crystal 15 , an inverter 21 , and a feedback resistor 22 are connected in parallel, and their both connection points are grounded via oscillation capacitors, respectively.
  • an inverter oscillation circuit in which a quartz crystal 15 , an inverter 21 , and a feedback resistor 22 are connected in parallel, and their both connection points are grounded via oscillation capacitors, respectively.
  • parallel circuits composed of a plurality of fixed capacitors are used in place of the voltage controlled variable capacitor.
  • a first capacitor array 27 in which capacitors C 1 to C 5 are connected in parallel via switches S 1 to S 5 is provided between the input side of the inverter 21 and the earth, and capacitors C 6 to C 10 are connected in parallel via switches S 7 to S 10 to form a second capacitor array 28 which is provided between the output side of the inverter 21 and the earth.
  • a switching element such as a MOS-FET or the like as each of the switches S 1 to S 10 .
  • a circuit is provided, as the temperature compensation circuit, which reads the compensation data corresponding to the temperature detection data by a temperature detection circuit 18 from a compensation data storage circuit 31 and outputs a variable switch control signal for controlling the ON/OFF state of the switches S 1 to S 10 of the oscillation circuit.
  • a circuit which generates a fixed switch control signal for turning on predetermined switches of the switches S 1 to S 10 (for example, the switches S 1 to S 3 and S 6 to S 8 ) of the oscillation circuit and turns off the other switches, so that either the fixed switch control signal or the variable switch control signal generated by the above-described temperature compensation circuit is selected by a selection means and applied to each control electrode of the switches S 1 to S 10 of the oscillation circuit so as to control ON/OFF of the switches.
  • a fixed switch control signal for turning on predetermined switches of the switches S 1 to S 10 (for example, the switches S 1 to S 3 and S 6 to S 8 ) of the oscillation circuit and turns off the other switches, so that either the fixed switch control signal or the variable switch control signal generated by the above-described temperature compensation circuit is selected by a selection means and applied to each control electrode of the switches S 1 to S 10 of the oscillation circuit so as to control ON/OFF of the switches.
  • the above-described fixed switch control signal is selected by the selection means and inputted into the oscillation circuit to turn on, for example, the switches S 1 to S 3 and S 6 to S 8 and turn off the other switches.
  • This fixes the capacitance value of the first capacitor array 27 to the capacitance value of the parallel circuit composed of the capacitors C 1 to C 3 , and the capacitance value of the second capacitor array 28 to the capacitance value of the parallel circuit composed of the capacitors C 6 to C 8 . Accordingly, the oscillation capacitance becomes constant irrespective of temperature change.
  • variable switch control signal from the temperature compensation circuit is selected by the selection means and inputted into the oscillation circuit to selectively turn on one or more of the switches S 1 to S 5 of the first capacitor array 27 and of the switches S 6 to S 10 of the second capacitor array 28 each. This changes the combination (connection state) of the enabled capacitors of the first capacitor array 27 and the second capacitor array 28 to vary the capacitance values (oscillation capacitance) of the capacitor arrays 27 and 28 depending on the temperature change.
  • the state in which the switches S 1 to S 3 of the first capacitor array 27 and S 6 to S 8 of the second capacitor array 28 are turned on so that the capacitors C 1 to C 3 and the capacitors C 6 to C 8 are connected in parallel respectively is defined as a normal state
  • the switch S 1 or S 2 or both is/are turned off and either the switch S 6 or S 7 or both is/are turned on from the above state
  • the capacitance values by the first capacitor array 27 and the second capacitor array 28 decrease.
  • the switch S 4 or S 5 or both is/are turned on and either the switch S 9 or S 10 or both is/are turned on from the normal state
  • the capacitance values by the first capacitor array 27 and the second capacitor array 28 increase.
  • the number of capacitors constituting the first capacitor array 27 and the second capacitor array 28 and the capacitance value of each of the capacitors are appropriately selected and their the connection state is changed, whereby the oscillation frequency can be temperature-compensated with the oscillation capacitance being considerably finely controlled.
  • series switches S 11 and S 12 are inserted into the voltage controlled variable capacitors 23 and 24 in the oscillation circuit 20 shown in FIG. 9 , respectively, and a series circuit composed of a capacitor Ca and a switch S 13 and a series circuit composed of a capacitor Cb and a switch S 14 are connected in parallel to the series circuit including the switch S 11 and the series circuit including the switch S 12 respectively.
  • the capacitors Ca and Cb are fixed capacitors and the capacitors Cc and Cd are DC component cut capacitors.
  • the switches S 11 and S 12 are turned off and the switches S 13 and S 14 . are turned on by the selection circuit, whereby the oscillation capacitance is fixed to the capacitance values of the capacitors Ca and Cb.
  • the voltage controlled variable capacitors 23 and 24 are brought into a separated state so that they are not included in the oscillation capacitor.
  • the switches S 11 and S 12 are turned on and the switches S 13 and S 14 are turned off by the selection circuit, whereby the voltage controlled variable capacitors 23 and 24 become the oscillation capacitor and the control voltage from the temperature compensation circuit is applied thereto via the resistors R 1 and R 2 so that each of their capacitance values varies depending on the temperature change and, as a result, the oscillation frequency can be temperature-compensated.
  • piezoelectric element can be used as the resonator in place of the quartz crystal also in these oscillation circuits.
  • FIG. 4 a compensation data storage circuit 31 and a selection information storage circuit 50 of the temperature compensation circuit in this embodiment form an integrated storage circuit, and one non-volatile memory 19 serves as both of them such that most of the storage region is used as the compensation data storage circuit 31 and a part of the region is used as the selection information storage circuit 50 .
  • a variable frequency division circuit 60 is provided between an oscillation circuit 20 and an output line 25 , and a first selection circuit 40 A and a second selection circuit 40 B are provided as a selection means.
  • the first and second selection circuits 40 A and 40 B have the same circuit configuration, and each is constituted of digital gate circuits 47 and 48 and a three-input AND circuit 46 , and two inverters (NOT circuits) 44 and 49 as shown in the second selection circuit 40 B.
  • the output of the AND circuit 46 is directly applied to a control terminal C of the digital gate circuit 47 , and is inverted by the inverter 49 and applied to the control terminal C of the digital gate circuit 48 .
  • the digital gate circuit 47 is turned on while the digital gate circuit 48 is turned off, and therefore the second selection circuit 40 B selects a variable frequency division number data Dc inputted from a compensation data output circuit 33 of a temperature compensation circuit 30 ′ and outputs it to the variable frequency division circuit 60
  • the digital gate circuit 48 is turned on while the digital gate circuit 47 is turned off, and therefore the second selection circuit 40 B selects a fixed frequency division number data Dk inputted from a ROM 52 and outputs it to the variable frequency division circuit 60 .
  • the first selection circuit 40 A has completely the same configuration as the above but is different only in that what is to be selected is switch control data Sc or Sk and the output destination of the selected switch control data is the oscillation circuit 20 .
  • the compensation data output circuit 33 of the temperature compensation circuit 30 ′ outputs variable switch control signal (digital data) Sc and frequency division number data Dc for performing temperature compensation with reference to the compensation data in the compensation data storage circuit 31 in accordance with the data on temperature detected by the temperature detection circuit 18 and inputs them into the digital gate circuits 47 of the first and second selection circuits 40 A and 40 B respectively.
  • ROM 52 that is a read only memory
  • fixed switch control signal (digital data) Sk and frequency division number data Dk are stored in advance, and each data is read out by a not-shown read circuit and inputted into the digital gate circuits 48 of the first and second selection circuits 40 A and 40 B respectively.
  • the first selection circuit 40 A selects the variable switch control signal Sc inputted from the compensation data output circuit 33 of the temperature compensation circuit 30 ′ and outputs it to the oscillation circuit 20 only when the selection information outputted from the selection information storage circuit 50 is “101,” and selects the fixed switch control signal Sk inputted from the ROM 52 and outputs it to the oscillation circuit 20 when the selection information outputted from the selection information storage circuit 50 is other than “101.”
  • the oscillation circuit 20 is a circuit using first and second capacitor arrays 27 and 28 in each of which many capacitors are provided in parallel via switches as the oscillation capacitor, and ON/OFF of each of switches S 1 to S 10 is controlled by the switch control signal (digital data) Sc or Sk outputted from the first selection circuit 40 A, whereby the oscillation capacitance can be controlled to vary the oscillation frequency.
  • switches S 1 to S 10 shown in FIG. 2 electronic switches are used whose ON/OFF can be controlled by a 1-bit digital signal, such as MOS-type analog switches or the like.
  • variable frequency division circuit 60 As the variable frequency division circuit 60 , a well-known circuit is used, and an example thereof will be described with FIG. 5 .
  • This variable frequency division circuit 60 is constituted of a reference divider 61 , a phase comparator 62 , a low-pass filter (hereinafter, abbreviated as an “LPF”) 63 , a voltage controlled oscillation circuit (hereinafter, abbreviated as a “VCO”) 64 , a feedback divider 65 , and an output buffer 66 .
  • LPF low-pass filter
  • VCO voltage controlled oscillation circuit
  • the oscillation output signal from the oscillation circuit 20 is divided by the reference divider 61 and inputted into the phase comparator 62 as a reference signal.
  • the oscillation signal of the VCO 64 is divided by the feedback divider 65 and inputted into the phase comparator 62 as a comparison signal.
  • the phase comparator 62 outputs a voltage in accordance with the phase difference between the two input signals, and the voltage is supplied to the VCO 64 via the LPF 63 to control the oscillation frequency of the VCO 64 .
  • the oscillation signal of the VCO is outputted to the output line 25 via the output buffer 66 .
  • Both the reference divider 61 and the feedback divider 65 are programmable dividers each capable of dividing the frequency by a variable integral value.
  • the reference divider 61 divides the frequency of the input signal into 1/M and outputs it, and the feedback divider 65 divides the frequency of the input signal into 1/N and outputs it.
  • the frequency fo of the output signal can be incremented or decremented by 0.1 MHz with respect to 20 MHz.
  • the frequency division ratio can be variously changed by the frequency division numbers M and N constituting the frequency division number data Dc, so that in the example shown in FIG. 6 the frequency division ratio (multiplication number) can be incremented or decremented by 0.005 starting from 1.000 to increment or decrement the frequency fo of the output signal by 0.1 MHz with reference to 20 MHz.
  • the minimum variable width (increment/decrement width) and the maximum variable range of the frequency division ratio (multiplication number) can be arbitrarily set by selection of the frequency division numbers M and N.
  • the selection information storage circuit 50 has the 3-bit selection information which is other than “101” during the time of initial adjustment until the resonant frequency of the quartz crystal of the oscillation circuit 20 is adjusted and the compensation data is created and stored into the compensation data storage circuit 31 .
  • the first selection circuit 40 A selects the fixed switch control circuit Sk inputted from the ROM 52 and outputs it to the oscillation circuit 20 . Further, the second selection circuit 40 B selects the fixed frequency division number data Dk also inputted from the ROM 52 and outputs it to the variable frequency division circuit 60 .
  • the fixed switch control signal Sk turns on, for example, only the switches S 1 to S 3 and S 6 to S 8 shown in FIG. 2 and turns off the other switches in the oscillation circuit 20 .
  • the capacitance value of the first capacitor array 27 is fixed to the capacitance value of the parallel circuit composed of the capacitors C 1 to C 3
  • the capacitance value of the second capacitor array 28 is fixed to the capacitance value of the parallel circuit composed of the capacitors C 6 to C 8 .
  • the temperature compensation function is disabled at this time, so that the temperature compensated oscillator shown in FIG. 4 operates as a simple oscillator.
  • “101” is written as selection information into the selection information storage circuit 50 in the non-volatile memory 19 at the time of writing the last compensation data into the compensation data storage circuit 31 or immediately thereafter.
  • the oscillation circuit 20 uses the variable switch control signal Sc to selectively turn on one or more of the switches S 1 to S 5 of the first capacitor array 27 and of the switches S 6 to S 10 of the second capacitor array 28 each. This changes the combination (connection state) of the enabled capacitors of the first capacitor array 27 and the second capacitor array 28 to vary the capacitance values (oscillation capacitance) of the capacitor arrays 27 and 28 depending on the temperature change, whereby adjustment is performed to compensate the frequency fc of the oscillation signal of the oscillation circuit 20 varying with temperature.
  • variable frequency division circuit 60 changes the frequency division ratio in accordance with the values of the frequency division numbers M and N constituting the inputted frequency division number data Dc to set the frequency fo of the output signal to fc ⁇ N/M and outputs it.
  • the frequency of the output signal can be incremented or decremented by 0.1 MHz with respect to 20 MHz.
  • another piezoelectric element can also be used as the resonator of the oscillation circuit 20 in place of the quartz crystal.
  • FIG. 7 portions equivalent to those in FIG. 1 are assigned the same numerals and symbols, and the description thereof will be omitted.
  • its selection circuit 40 ′ is a circuit made by omitting the NAND circuit 43 and the inverter 44 from the selection circuit 40 shown in FIG. 1 , and a selection information storage circuit 55 using a predetermined conductive pattern 56 is provided in place of the selection information storage circuit 50 constituted of a non-volatile memory in the temperature compensated oscillator shown in FIG. 1 .
  • the external terminal 52 in FIG. 1 is not provided.
  • the conductive pattern 56 is formed, for example, in the package main body 11 shown in FIG. 8 or on an insulated substrate provided at a position in the external part where it can be operated from the outside after completion of the initial adjustment.
  • One end of the conductive pattern is connected to a positive power source line 57 and the other end is grounded via a resistor 58 .
  • the voltage level at a P point that is a connection point between the conductive pattern 56 and the resistor 58 is outputted as binary selection information to the selection circuit 40 ′ and is inputted to each gate of transmission gates 41 and 42 directly or after inversion by an inverter 45 as shown in the drawing.
  • the conductive pattern 56 of the selection information storage circuit 55 is conducted in which the voltage level at the P point is high “1,” and therefore the transmission gate 42 of the selection circuit 40 ′ is on and the transmission gate 41 is off. Accordingly, a constant voltage Vk outputted by the constant voltage generation circuit 51 passes through the transmission gate 42 to be supplied to an oscillation circuit 20 and fix the value of the oscillation capacitance of the oscillation circuit 20 to a predetermined value, thereby disabling the temperature compensation function.
  • a control voltage Vc outputted by a temperature compensation circuit 30 in accordance with a temperature detection signal from a temperature detection circuit 18 is supplied to the oscillation circuit 20 via the transmission gate 41 to vary the oscillation capacitance value of the oscillation circuit 20 depending on the temperature change.
  • the temperature compensation function effectively operates to keep constant the oscillation frequency, that is, the frequency of the signal outputted to the output terminal 26 via the output line 25 .
  • the temperature compensation function is enabled by bringing the selection information of the selection information storage circuit 50 into “101” in the above-described first and second embodiments, the invention is not limited to this, any data may be employed as the selection information, and the number of digits of the data can be any number.
  • the non-volatile memory or the like constituting the selection information storage circuit 50 is generally likely to have data in the initial state of all “1” or all “0,” and therefore it is preferable to set data to other than “111” or “000” as the above-described selection information.
  • the temperature compensated oscillator in a state in which a piezoelectric element such as a quartz crystal or the like, an IC chip, and so on are mounted in a package to constitute the temperature compensated oscillator, its oscillation circuit is operated, and the temperature characteristics of the piezoelectric element itself can be accurately adjusted.
  • the work of creating the compensation data thereafter and storing it into the compensation data storage circuit can also be accurately performed subsequent thereto, whereby the adjustment steps can be simplified and increased in accuracy.

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  • Oscillators With Electromechanical Resonators (AREA)
  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
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US20090196323A1 (en) * 2008-02-01 2009-08-06 Mccarthy Evan Method and System for an Energy Efficient Temperature Sensing Crystal Integrated Circuit
US8174330B2 (en) * 2008-02-01 2012-05-08 Broadcom Corporation Method and system for an energy efficient temperature sensing crystal integrated circuit
US20120151244A1 (en) * 2010-12-13 2012-06-14 Curtis Ling Method and System for Precise Temperature and Timebase PPM Error Estimation Using Multiple Timebases
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EP1699136A1 (en) 2006-09-06
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KR100797661B1 (ko) 2008-01-23
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US7583157B2 (en) 2009-09-01
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US20070030084A1 (en) 2007-02-08

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