US10354919B2 - Wafer dividing method - Google Patents

Wafer dividing method Download PDF

Info

Publication number
US10354919B2
US10354919B2 US15/348,071 US201615348071A US10354919B2 US 10354919 B2 US10354919 B2 US 10354919B2 US 201615348071 A US201615348071 A US 201615348071A US 10354919 B2 US10354919 B2 US 10354919B2
Authority
US
United States
Prior art keywords
wafer
laser processed
processed groove
laser
wiring layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
US15/348,071
Other languages
English (en)
Other versions
US20170140989A1 (en
Inventor
Tomotaka Tabuchi
Kentaro Odanaka
Satoshi KUMAZAWA
Senichi Ryo
Yuki Ogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Disco Corp
Original Assignee
Disco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Disco Corp filed Critical Disco Corp
Assigned to DISCO CORPORATION reassignment DISCO CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: KUMAZAWA, SATOSHI, ODANAKA, KENTARO, OGAWA, YUKI, RYO, SENICHI, TABUCHI, TOMOTAKA
Publication of US20170140989A1 publication Critical patent/US20170140989A1/en
Application granted granted Critical
Publication of US10354919B2 publication Critical patent/US10354919B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05D—PROCESSES FOR APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05D1/00—Processes for applying liquids or other fluent materials
    • B05D1/002—Processes for applying liquids or other fluent materials the substrate being rotated
    • B05D1/005—Spin coating
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05D—PROCESSES FOR APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05D3/00—Pretreatment of surfaces to which liquids or other fluent materials are to be applied; After-treatment of applied coatings, e.g. intermediate treating of an applied coating preparatory to subsequent applications of liquids or other fluent materials
    • B05D3/06—Pretreatment of surfaces to which liquids or other fluent materials are to be applied; After-treatment of applied coatings, e.g. intermediate treating of an applied coating preparatory to subsequent applications of liquids or other fluent materials by exposure to radiation
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23D—PLANING; SLOTTING; SHEARING; BROACHING; SAWING; FILING; SCRAPING; LIKE OPERATIONS FOR WORKING METAL BY REMOVING MATERIAL, NOT OTHERWISE PROVIDED FOR
    • B23D19/00—Shearing machines or shearing devices cutting by rotary discs
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K10/00—Welding or cutting by means of a plasma
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/02—Positioning or observing the workpiece, e.g. with respect to the point of impact; Aligning, aiming or focusing the laser beam
    • B23K26/03—Observing, e.g. monitoring, the workpiece
    • B23K26/032—Observing, e.g. monitoring, the workpiece using optical means
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/08—Devices involving relative movement between laser beam and workpiece
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36—Removing material
    • B23K26/362—Laser etching
    • B23K26/364—Laser etching for making a groove or trench, e.g. for scribing a break initiation groove
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B28—WORKING CEMENT, CLAY, OR STONE
    • B28D—WORKING STONE OR STONE-LIKE MATERIALS
    • B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
    • B28D5/02—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by rotary tools, e.g. drills
    • B28D5/022—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by rotary tools, e.g. drills by cutting with discs or wheels
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components

Definitions

  • the present invention relates to a wafer dividing method for dividing a wafer into individual device chips.
  • a plurality of devices such as integrated circuits (ICs) and large scale integrations (LSIs) are formed on the front side of a wafer so as to be separated from each other by a plurality of crossing division lines.
  • the wafer thus having the plural devices on the front side is divided (cut) into individual device chips by a cutting apparatus having a rotatable cutting blade, for example.
  • the device chips are used in various electronic equipment such as mobile phones and personal computers.
  • As a method of dividing such a wafer there is a dividing method including the steps of applying a laser beam to the wafer to thereby form a laser processed groove along each division line on the front side of the wafer, and next using a cutting blade to fully cut the wafer along each laser processed groove.
  • the wafer to be divided by the above dividing method there is a wafer composed of a semiconductor substrate such as a silicon substrate and a wiring layer formed on the front side of the semiconductor substrate, the wiring layer including copper (Cu).
  • This wiring layer is formed so as to constitute not only the devices, but also the division lines formed on the front side of the wafer. Accordingly, when the wiring layer is cut by a cutting blade, there arises a problem such that Cu included in the wiring layer may adhere to the cutting blade.
  • a laser beam is first applied to the front side of the wafer along each division line to thereby cut and remove a part of the wiring layer including Cu along each division line by ablation. Accordingly, a laser processed groove having a depth reaching the silicon substrate is formed on the front side of the wafer along each division line. Thereafter, the wafer is fully cut along each laser processed groove by using a cutting blade (see Japanese Patent Laid-open No. 2006-190779, for example).
  • each laser processed groove has a width greater than the thickness of the cutting blade and less than the width of each division line.
  • each laser processed groove Cu included in the wiring layer may be melted by the application of the laser beam, and a part of the melted Cu may become debris adhering to the side walls and bottom of each laser processed groove.
  • a laser processing apparatus including a processing nozzle capable of removing the debris during processing (see Japanese Patent Laid-open No. 2007-069249, for example).
  • the debris including Cu may react with silicon and moisture in the air. More specifically, the debris including Cu comes into contact with the silicon substrate exposed to each laser processed groove, so that Cu 3 Si as a seed is formed on the side walls and bottom of each laser processed groove. Thereafter, Cu 3 Si reacts with moisture in the air to form a layer composed of Cu 2 O and Cu on the surface of Cu 3 Si. Further, a layer of SiO 2 is formed on the layer composed of Cu 2 O and Cu, so that the debris is gradually enlarged.
  • the Cu itself adhering to the silicon substrate cannot be removed by cleaning with a cleaning water or dry etching. Accordingly, cleaning with chemicals or wet etching is required for the removal of the Cu from the silicon substrate and it is therefore difficult to remove the Cu.
  • the debris enlarged on the side walls of the silicon substrate exposed to each laser processed groove is left as it is even after ending the cutting operation by the cutting blade, because the width of each laser processed groove is greater than the thickness of the cutting blade. Accordingly, there is a high possibility that the debris enlarged may continue to grow.
  • a wafer dividing method for dividing a wafer having a wiring layer including Cu on the front side, the front side of the wafer being partitioned by a plurality of crossing division lines to define a plurality of separate regions where a plurality of devices are formed, the wafer dividing method including a laser processed groove forming step of applying a laser beam having an absorption wavelength to the wafer, to the wiring layer along each division line to thereby remove the wiring layer along each division line and form a laser processed groove along each division line; a dry etching step of dry-etching at least each laser processed groove after performing the laser processed groove forming step; and a cutting step of using a cutting blade having a thickness smaller than the width of each laser processed groove to fully cut the wafer along each laser processed groove after performing the laser processed groove forming step.
  • the wafer dividing method further includes a protective film forming step of forming a protective film for protecting the front side of each device, before performing the dry etching step.
  • the wafer dividing method according to the present invention includes the dry etching step of dry-etching at least each laser processed groove after performing the laser processed groove forming step. Accordingly, a silicon substrate constituting the wafer is dry-etched in an area where debris including Cu adheres, thereby allowing the removal of the debris including Cu from the silicon substrate. As a result, the growth of the debris including Cu in each laser processed groove can be suppressed to thereby eliminate the possibility that the debris may come into contact with the wiring layer of each device chip obtained by dividing the wafer.
  • the protective film forming step of forming a protective film for protecting the front side of each device is performed before performing the dry etching step. Accordingly, an adverse effect on the front side of each device in the dry etching step can be further reduced.
  • FIG. 1 is a perspective view of a wafer to be divided by the wafer dividing method according to the present invention
  • FIG. 2 is an enlarged sectional view of an essential part of the wafer, showing a layer structure
  • FIG. 3 is a perspective view showing a condition that the wafer is transferred to a spin coater in a protective film forming step
  • FIG. 4 is an enlarged sectional view of an essential part of the wafer processed by the protective film forming step
  • FIG. 5 is a perspective view of the wafer supported through an adhesive tape to a ring frame
  • FIG. 6 is a perspective view showing a condition that a laser beam is applied to the wiring layer of the wafer along each division line in a laser processed groove forming step;
  • FIG. 7 is an enlarged sectional view of an essential part of the wafer in the condition where two laser processed grooves have been formed along each division line in the laser processed groove forming step;
  • FIG. 8 is an enlarged sectional view of an essential part of the wafer in the condition where a laser processed groove has been formed along each division line after performing the step shown in FIG. 7 , showing the adhesion of debris including Cu to the side walls of the laser processed groove;
  • FIG. 9 is a schematic sectional view of a plasma etching apparatus to be used in performing a dry etching step
  • FIG. 10 is an enlarged sectional view of an essential part of the wafer processed by the dry etching step
  • FIG. 11 is a perspective view showing a condition that the wafer is cut by a cutting apparatus in a cutting step.
  • FIG. 12 is an enlarged sectional view showing a positional relation between a cutting blade and the laser processed groove of the wafer in the cutting step.
  • FIG. 1 shows a wafer W to be divided by the wafer dividing method according to this preferred embodiment.
  • the wafer W shown in FIG. 1 has a substantially circular outside shape with an orientation flat OF indicating a crystal orientation.
  • the orientation flat OF of the wafer W is formed by flat cutting a part of the outer circumference of a circular wafer.
  • the wafer W has a front side (upper surface) W 2 a and a back side (lower surface) W 1 b .
  • the front side W 2 a of the wafer W is partitioned into a plurality of rectangular regions by a plurality of crossing division lines (streets) S, wherein a device D such as IC is formed in each rectangular region.
  • streets crossing division lines
  • the wafer W has a layer structure composed of a substrate W 1 and a wiring layer W 2 formed on the substrate W 1 .
  • the substrate W 1 has a front side (upper surface) W 1 a and a back side (lower surface) W 1 b .
  • the wiring layer W 2 has a front side (upper surface) W 2 a and a back side (lower surface) W 2 b .
  • the wiring layer W 2 is formed on the upper surface W 1 a of the substrate W 1 .
  • the substrate W 1 is formed of silicon (Si). That is, the substrate W 1 is a silicon substrate.
  • the wiring layer W 2 includes at least copper (Cu).
  • the upper surface W 2 a of the wiring layer W 2 is identical with the front side of the wafer W.
  • the lower surface W 1 b of the substrate W 1 is identical with the back side of the wafer W.
  • Each street S has a width Sw, and it is formed as a groove having a depth from the front side W 2 a of the wafer W (the upper surface W 2 a of the wiring layer W 2 ) to an intermediate position in the thickness direction (Z direction) of the wiring layer W 2 .
  • a protective film forming step is first performed in such a manner that a protective film W 3 (see FIG. 4 ) is formed on the front side W 2 a of the wafer W in order to protect the front side (upper surface) of each device D.
  • the wafer W is placed on a rotatable spinner table 400 of a spin coater 40 shown in FIG. 3 in the condition where the front side W 2 a is exposed.
  • Suction means (not shown) connected to the spin coater 40 is next operated to hold the wafer W on the spinner table 400 under suction.
  • a predetermined amount of protective film material e.g., water-soluble resin
  • a protective film material nozzle 41 is dropped from a protective film material nozzle 41 to the center of the front side W 2 a of the wafer W held on the spinner table 400 under suction.
  • the spinner table 400 is rotated at a predetermined speed, so that the protective film material dropped to the center of the front side W 2 a of the wafer W flows radially outward to the outer circumference of the wafer W due to a centrifugal force. Accordingly, the protective film material is leveled on the whole surface of the front side W 2 a of the wafer W. Thereafter, the protective film material in the liquid state on the front side W 2 a of the wafer W is dried to form the protective film W 3 having a substantially uniform thickness on the front side W 2 a of the wafer W as shown in FIG. 4 .
  • a laser processed groove M is formed in a laser processed groove forming step to be hereinafter described (see FIG. 8 )
  • the protective film W 3 formed along each street S is partially removed by the laser processed groove M.
  • a laser processed groove forming step is performed in such a manner that a laser beam having an absorption wavelength to the wafer W is applied to the wiring layer W 2 along each street S to thereby remove the wiring layer W 2 along each street S and form a laser processed groove M along each street S (see FIG. 8 ).
  • the wafer W Prior to performing the laser processed groove forming step, the wafer W is attached to an adhesive tape T supported to a ring frame F in the condition where the front side W 2 a is exposed as shown in FIG. 5 . Thereafter, the wafer W supported through the adhesive tape T to the ring frame F is carried and held on a chuck table 11 of a laser processing apparatus 1 shown in FIG. 6 .
  • the laser processing apparatus 1 to be used in performing the laser processed groove forming step essentially includes the chuck table 11 for holding the wafer W, laser beam applying means 12 for applying a laser beam having an absorption wavelength to the wafer W held on the chuck table 11 , and alignment means 13 for detecting each street S where the laser processed groove M (see FIG. 8 ) is to be formed, on the wafer W held on the chuck table 11 .
  • the chuck table 11 has a circular outside shape and it includes a suction holding portion 110 for holding the wafer W under suction and a frame portion 111 for supporting the suction holding portion 110 .
  • the suction holding portion 110 is in communication with a vacuum source (not shown).
  • the suction holding portion 110 has an exposed surface (upper surface) as a holding surface 110 a for holding the wafer W thereon under suction.
  • the chuck table 11 is movable back and forth in the X direction. Further, the chuck table 11 is rotationally driven by rotating means 112 provided below the chuck table 11 .
  • the laser beam applying means 12 is movable back and forth in the Y direction and the Z direction.
  • the laser beam applying means 12 includes a cylindrical housing 120 provided above the chuck table 11 so as to extend in a horizontal direction.
  • a laser oscillator 120 a is provided in the housing 120 to oscillate a laser beam.
  • Focusing means 121 is mounted on the front end of the housing 120 to focus the laser beam oscillated by the laser oscillator 120 a .
  • the focusing means 121 includes a mirror 121 a for reflecting the laser beam oscillated by the laser oscillator 120 a and a focusing lens 121 b for focusing the laser beam reflected by the mirror 121 a . Accordingly, the laser beam focused by the focusing lens 121 b can be scanned in an arbitrary direction in a plane parallel to the front side W 2 a of the wafer W.
  • the alignment means 13 includes imaging means 130 for imaging the front side W 2 a of the wafer W. Accordingly, each street S where the laser processed groove M is to be formed on the wafer W can be detected according to an image obtained by the imaging means 130 .
  • the alignment means 13 and the laser beam applying means 12 are united together, so that they are movable together in the Y direction and the Z direction.
  • the back side W 1 b of the wafer W is so positioned as to face the holding surface 110 a of the chuck table 11 shown in FIG. 6 .
  • the wafer W supported through the adhesive tape T to the ring frame F is placed on the chuck table 11 .
  • the vacuum source (not shown) connected to the chuck table 11 is operated to produce a suction force, which is transmitted to the holding surface 110 a of the chuck table 11 , thereby holding the wafer W on the chuck table 11 under suction in the condition where the wiring layer W 2 is oriented upward.
  • the ring frame F is not shown.
  • each street S is detected by the alignment means 13 . More specifically, each street S is imaged by the imaging means 130 , and image processing such as pattern matching is performed by the alignment means 13 according to an image of each street S obtained by the imaging means 130 . Thusly, the position of each street S is detected.
  • the laser beam applying means 12 is moved in the Y direction to position the focusing means 121 with respect to a predetermined one of the streets S extending in a first direction. That is, the focusing means 121 is positioned with respect to the predetermined street S in the Y direction. This positioning is performed so that the optical axis of the focusing lens 121 b included in the focusing means 121 is deviated from the center line of the predetermined street S in its lateral direction ( ⁇ Y direction).
  • the laser oscillator 120 a is operated to oscillate a laser beam having an absorption wavelength to the wafer W.
  • the laser beam oscillated from the laser oscillator 120 a is reflected by the mirror 121 a to enter the focusing lens 121 b .
  • the focusing lens 121 b is adjusted in height so that the focal point of the laser beam is set at a vertical position slightly below the upper surface W 1 a of the substrate W 1 in its thickness direction (Z direction) as viewed in FIG. 4 . Accordingly, the laser beam focused by the focusing lens 121 b is applied to the wiring layer W 2 of the wafer W with a predetermined focused spot diameter M 1 w (the width of a laser processed groove M 1 to be formed) shown in FIG. 7 .
  • the wafer W is fed in the ⁇ X direction at a predetermined speed as applying the laser beam to the wafer W, thereby performing ablation to the wafer W along the predetermined street S.
  • the laser processed groove M 1 is formed along the predetermined street S to thereby remove the wiring layer W 2 and the protective film W 3 in an area corresponding to the laser processed groove M 1 as shown in FIG. 7 .
  • the wafer W is fed in the ⁇ X direction to reach a predetermined position where the application of the laser beam is stopped, the feeding of the wafer W in the ⁇ X direction (forward direction) is once stopped.
  • the laser processed groove M 1 having the width M 1 w and a depth greater than the thickness of the wiring layer W 2 is formed along the predetermined street S of the wafer W as shown in FIG. 7 .
  • the focusing means 121 is moved in the +Y direction to thereby move the optical axis of the focusing lens 121 b of the focusing means 121 to a position deviated from the center line of the predetermined street S toward the +Y side opposite to the laser processed groove M 1 .
  • the laser beam is applied to the wiring layer M 2 of the wafer W with a predetermined focused spot diameter M 2 w (the width of a laser processed groove M 2 to be formed) shown in FIG. 7 .
  • the wafer W is fed in the +X direction (backward direction) at a predetermined speed as applying the laser beam to the wafer W, thereby performing ablation to the wafer W along the predetermined street S.
  • the laser processed groove M 2 is formed along the predetermined street S to thereby remove the wiring layer W 2 and the protective film W 3 in an area corresponding to the laser processed groove M 2 as shown in FIG. 7 . Accordingly, the two laser processed grooves M 1 and M 2 are formed on both sides of the center line of the predetermined street S. Both of the two laser processed grooves M 1 and M 2 are formed in the range of the width Sw of the predetermined street S.
  • the focusing means 121 shown in FIG. 6 is moved in the +Y direction to a position directly above the next street S adjacent to the predetermined street S where the two laser processed grooves M 1 and M 2 have been formed as mentioned above. Thereafter, the focusing means 121 is positioned with respect to the center line of this next street S in the Y direction in a manner similar to that mentioned above. Thereafter, the laser beam is applied to the wafer W as feeding the wafer W in the forward direction and the backward direction to thereby similarly form two laser processed grooves M 1 and M 2 along this next street S. Thus, this laser processing is similarly performed along all of the other streets S extending in the first direction to similarly form two laser processed grooves M 1 and M 2 along each street S extending in the first direction.
  • reference symbol Mw denotes the distance between the outer side wall of the laser processed groove M 1 on the ⁇ Y side and the outer side wall of the laser processed groove M 2 on the +Y side.
  • the optical axis of the focusing lens 121 b of the focusing means 121 is moved in the Y direction to a position on the center line of the predetermined street S.
  • the laser beam is changed to a wide beam having a predetermined focused spot diameter (e.g., a diameter not greater than the width Mw of the laser processed groove M to be formed).
  • this wide beam is applied to the wafer W along the predetermined street S as feeding the wafer W in the ⁇ X direction (forward direction).
  • the wiring layer W 2 left between the two laser processed grooves M 1 and M 2 is removed together with the protective film W 3 by ablation, thereby forming the laser processed groove M having the width Mw as shown in FIG. 8 .
  • the wiring layer W 2 formed on the substrate W 1 is divided by the laser processed groove M. Further, a part of the wiring layer W 2 melted by the application of the laser beam adheres to the side walls of the laser processed groove M. This melted part of the wiring layer W 2 becomes debris G including Cu as shown in FIG. 8 .
  • the focusing means 121 shown in FIG. 6 is moved in the +Y direction to a position directly above the next street S adjacent to the predetermined street S where the laser processed groove M has been formed as mentioned above. Thereafter, the focusing means 121 is positioned with respect to the center line of this next street S in the Y direction in a manner similar to that mentioned above. Thereafter, the laser beam (wide beam) is applied to the wafer W as feeding the wafer W in the +X direction (backward direction) to thereby similarly form a laser processed groove M along this next street S.
  • this laser processing is similarly performed along all of the other streets S extending in the first direction to similarly form a laser processed groove M along each street S extending in the first direction.
  • the chuck table 11 is rotated 90 degrees to similarly perform this laser processing along all of the other streets S extending in the second direction perpendicular to the first direction to similarly form a laser processed groove M along each street S extending in the second direction.
  • the wiring layer W 2 is removed along all of the crossing streets S extending in the first and second directions to form the laser processed groove M along each street S.
  • a dry etching step is performed to dry-etch the laser processed groove M along each street S shown in FIG. 8 .
  • the silicon substrate W 1 exposed to the laser processed groove M along each street S is etched.
  • the dry etching step in this preferred embodiment is performed by using a plasma etching apparatus 9 shown in FIG. 9 .
  • the plasma etching apparatus 9 includes an electrostatic chuck (ESC) 90 for holding the wafer W, a gas discharge head 91 for discharging a gas, and a chamber 92 accommodating the electrostatic chuck 90 and the gas discharge head 91 .
  • ESC electrostatic chuck
  • the electrostatic chuck 90 is supported from its lower side by a support member 900 .
  • An electrode 901 is provided inside the electrostatic chuck 90 .
  • the electrode 901 is connected through a matching unit 94 a to a bias radio frequency (RF) source 95 a .
  • the bias RF source 95 a functions to apply a direct current (DC) voltage to the electrode 901 , thereby producing an electrostatic holding force on the upper surface (holding surface) of the electrostatic chuck 90 .
  • DC direct current
  • the gas discharge head 91 is vertically movably supported through a bearing 919 to the upper portion of the chamber 92 .
  • a gas diffusion space 910 is defined inside the gas discharge head 91 .
  • a gas inlet opening 911 is in communication with the upper portion of the gas diffusion space 910 , and a plurality of gas discharge openings 912 are in communication with the lower portion of the gas diffusion space 910 .
  • the lower ends of the gas discharge openings 912 are directed toward the electrostatic chuck 90 .
  • a gas supply unit 93 is connected through a gas pipe 913 to the gas inlet opening 911 .
  • the gas supply unit 93 includes a portion of storing an etching gas and a portion of storing a rare gas.
  • An RF source 95 is connected through a matching unit 94 to the gas discharge head 91 .
  • An RF power is supplied from the RF source 95 through the matching unit 94 to the gas discharge head 91 , thereby generating a plasma of the gas discharged from the gas discharge openings 912 .
  • An evacuation pipe 96 is connected to the lower portion of the chamber 92 , and an evacuation unit 97 is connected to the evacuation pipe 96 .
  • the side portion of the chamber 92 is provided with a load/unload opening 920 for loading and unloading the wafer W and a gate valve 921 for closing the load/unload opening 920 .
  • the plasma etching apparatus 9 includes a control unit 98 for controlling various conditions including the discharge amount and time for each gas and the RF power to be applied.
  • the gate valve 921 is opened to load the wafer W from the load/unload opening 920 . Thereafter, the wafer W is placed on the electrostatic chuck 90 in the condition where the adhesive tape T attached to the wafer W is oriented downward. In this condition, a DC voltage is applied from the RF source 95 a to the electrode 901 to produce an electrostatic holding force on the upper surface (holding surface) of the electrostatic chuck 90 . After closing the gate valve 921 , the chamber 92 is evacuated by the evacuation unit 97 to thereby reduce the pressure in the chamber 92 to 0.10 Pa to 0.15 Pa, for example.
  • the etching gas stored in the gas supply unit 93 is supplied through the gas pipe 913 and the gas inlet opening 911 to the gas diffusion space 910 and then discharged from the gas discharge openings 912 .
  • the ring frame F is not shown.
  • the etching gas is introduced into the chamber 92 .
  • the temperature of the electrostatic chuck 90 is set to 70° C. or lower, which is a temperature where no gas is generated from the adhesive tape T.
  • RF power is applied from the RF source 95 to the gas discharge head 91 , thereby producing an RF field between the gas discharge head 91 and the electrostatic chuck 90 to generate the plasma of the etching gas.
  • a fluorine-based gas such as SF 6 , CF 4 , C 2 F 6 , and C 2 F 4 may be used as the etching gas.
  • a rare gas such as Ar and He may be used as a plasma assisting gas.
  • RF power having a power of 3 kW and a frequency of 13.56 MHz may be applied.
  • a rare gas such as Ar functions to assist the generation of the plasma of the etching gas.
  • the supply of the rare gas into the chamber 92 may be conducted before the supply of the etching gas.
  • this etching step may be performed under the following specific condition A.
  • the debris G including Cu as generated in the laser processed groove forming step shown in FIG. 8 the debris G adhering to the side walls of the silicon substrate W 1 exposed to each laser processed groove M is essentially removed by this etching step.
  • this debris G may most possibly come into contact with the wiring layer W 2 including Cu.
  • the debris G itself adhering to the side walls of the silicon substrate W 1 is not etched, but the side walls of the silicon substrate W 1 are slightly etched in the lateral direction of each laser processed groove M (in the Y direction as viewed in FIG.
  • the debris G adheres to the side walls of the silicon substrate W 1 in a slight contact area. Accordingly, the debris G can be removed from the side walls of the silicon substrate W 1 by performing the etching step.
  • the isotropic shape of each laser processed groove M by the dry etching is maintained (i.e., the etching rate in the Y direction is equal to the etching rate in the Z direction), and the debris G adhering to the side walls of the silicon substrate W 1 can be essentially removed by the etching in the lateral direction (Y direction) in the isotropic etching.
  • the side walls of the silicon substrate W 1 are etched to such an extent that the debris G is removably bonded to the side walls of the silicon substrate W 1 in a slight contact area. Even in such a case that the debris G is not yet removed, there is no possibility that the debris G may react with the silicon substrate W 1 .
  • Etching gas SF 6 gas
  • Plasma assisting gas Ar gas
  • Etching gas supply rate 1500 cc/minute
  • Plasma assisting gas supply rate 1000 cc/minute
  • the protective film W 3 for protecting the wiring layer W 2 forming each device D is hardly etched by the etching gas, but only the area corresponding to each laser processed groove M formed on the front side W 2 a of the wafer W is isotropically etched by the etching gas. More specifically, the side walls (end surfaces) of the wiring layer W 2 including Cu exposed to each laser processed groove M are also etched. The side walls of the silicon substrate W 1 exposed to each laser processed groove M are laterally etched and the bottom of each laser processed groove M is also etched downward. As a result, the side walls of the silicon substrate W 1 exposed to each laser processed groove M are essentially etched to obtain a condition that the debris G can be easily removed.
  • the protective film forming step is performed before performing (1) the dry etching step as in this preferred embodiment, the protective film W 3 may be removed from the front side W 2 a of the wafer W after performing the dry etching step.
  • a water-soluble resin is used as the material of the protective film W 3 , so as to facilitate the formation and removal of the protective film W 3 . That is, after performing the dry etching step, the wafer W is cleaned with water, so that the protective film W 3 formed of a water-soluble resin can be easily removed.
  • a cutting step is performed in such a manner that a cutting blade 60 having a thickness smaller than the width Mw of each laser processed groove M is used to fully cut the wafer W along each laser processed groove M as shown in FIG. 11 .
  • the protective film W 3 is formed of a water-soluble resin, the protective film W 3 can be dissolved in a cutting water used in this cutting step, thus being removed from the wafer W.
  • FIG. 11 shows a cutting apparatus 2 to be used in this cutting step.
  • the cutting apparatus 2 essentially includes a chuck table 30 for holding the wafer W, cutting means 6 having the cutting blade 60 for cutting the wafer W held on the chuck table 30 , and alignment means 61 for detecting each laser processed groove M along which the cutting blade 60 is relatively moved to cut the wafer W held on the chuck table 30 .
  • the alignment means 61 includes imaging means 610 for imaging the front side W 2 a of the wafer W.
  • the alignment means 61 can detect each laser processed groove M according to an image obtained by the imaging means 610 .
  • the alignment means 61 and the cutting means 6 are united together, and they are movable together in the Y direction and the Z direction.
  • the chuck table 30 has a holding surface 30 a for holding the wafer W thereon under suction.
  • the chuck table 30 is rotatably supported by rotating means 30 b provided below the chuck table 30 . Further, the chuck table 30 is movable in the X direction by work feeding means (X moving means) (not shown).
  • the cutting means 6 further includes a spindle housing 62 and a spindle 63 rotatably stored in the spindle housing 62 .
  • the spindle 63 has a rotational axis extending in the direction (Y direction) perpendicular to the X direction in a horizontal plane.
  • the front end portion of the spindle 63 projects from the spindle housing 62 in the ⁇ Y direction.
  • the cutting blade 60 is coaxially fixed to the front end portion of the spindle 63 , so that the cutting blade 60 is rotatable together with the spindle 63 .
  • the spindle 63 is rotationally driven by a motor (not shown) to thereby allow high-speed rotation of the cutting blade 60 .
  • the cutting blade 60 has a thickness 60 w smaller than the width Mw of each laser processed groove M.
  • the wafer W supported through the adhesive tape T to the ring frame F (not shown in FIG. 11 ) is positioned in such a manner that the adhesive tape T attached to the back side W 1 b of the wafer W is opposed to the holding surface 30 a of the chuck table 30 .
  • the wafer W is placed on the chuck table 30 in the condition where the adhesive tape T is in contact with the holding surface 30 a of the chuck table 30 .
  • suction means (not shown) connected to the chuck table 30 is operated to hold the wafer W through the adhesive tape T on the chuck table 30 under suction.
  • a plurality of clamps are provided on the outer circumference of the chuck table 30 , and the ring frame F supporting the wafer W through the adhesive tape T is fixed by the clamps.
  • the X moving means (not shown) is operated to move the chuck table 30 holding the wafer W in the ⁇ X direction, and the imaging means 610 is operated to image the front side W 2 a of the wafer W, thereby detecting the position of each laser processed groove M to be cut.
  • the cutting means 6 is moved in the Y direction by indexing means (Y moving means) (not shown) to thereby position the cutting blade 60 in the Y direction with respect to a predetermined one of the laser processed grooves M extending in the first direction. This positioning of the cutting blade 60 is performed so that the center of the thickness 60 w of the cutting blade 60 coincides with the center of the width Mw of the predetermined laser processed groove M.
  • the X moving means (not shown) is operated again to move the chuck table 30 holding the wafer W in the ⁇ X direction, and the cutting means 6 is moved (lowered) in the ⁇ Z direction by cutter feeding means (Z moving means) (not shown).
  • the spindle 63 is rotated at a high speed by the motor (not shown) to thereby rotate the cutting blade 60 fixed to the spindle 63 . Accordingly, the cutting blade 60 being rotated at a high speed is lowered to cut into the wafer W, so that the bottom of the predetermined laser processed groove M is cut by the cutting blade 60 so as to fully cut the wafer W.
  • the feeding of the wafer W by the X moving means is once stopped.
  • the Z moving means is operated to raise the cutting blade 60 away from the wafer W.
  • the X moving means is operated again to move the wafer W in the +X direction until the wafer W is returned to the original position.
  • the Y moving means is operated to index the cutting blade 60 in the Y direction by the pitch of the laser processed grooves M.
  • the cutting operation is similarly performed along the next laser processed groove M adjacent to the predetermined laser processed groove M.
  • the cutting operation is similarly performed along all of the other laser processed grooves M extending in the first direction to thereby fully cut the wafer W along each laser processed groove M extending in the first direction.
  • the chuck table 30 holding the wafer W is rotated 90 degrees by the rotating means 30 b to similarly perform the cutting operation along all of the other laser processed grooves M extending in the second direction perpendicular to the first direction to thereby fully cut the wafer W along each laser processed groove M extending in the second direction.
  • the wafer W is fully cut along all of the crossing laser processed grooves M extending in the first and second directions, thereby obtaining individual device chips each corresponding to the devices D.
  • the wafer dividing method according to the present invention is a method of dividing the wafer W having the wiring layer W 2 including Cu on the front side W 2 a , the front side W 2 a of the wafer W being partitioned by the crossing streets S to define a plurality of separate regions where the plural devices D are formed.
  • the wafer dividing method includes the laser processed groove forming step of applying a laser beam having an absorption wavelength to the wafer W, to the wiring layer W 2 along each street S to thereby remove the wiring layer W 2 along each street S and form the laser processed groove M along each street S, the cutting step of using the cutting blade 60 having a thickness smaller than the width Mw of each laser processed groove M to fully cut the wafer W along each laser processed groove M after performing the laser processed groove forming step, and the dry etching step of dry-etching at least each laser processed groove M after performing the laser processed groove forming step (before performing the cutting step in this preferred embodiment).
  • the silicon substrate W 1 exposed to each laser processed groove M is dry-etched in an area where the debris G including Cu adheres, thereby removing the debris G including Cu from the silicon substrate W 1 .
  • the growth of the debris G including Cu in each laser processed groove M can be suppressed to thereby eliminate the possibility that the debris G may come into contact with the wiring layer W 2 of each device chip obtained by dividing the wafer W.
  • the wafer dividing method according to the present invention is not limited to the above preferred embodiment. Further, the size, shape, etc. of each component of the spin coater 40 , the laser processing apparatus 1 , the plasma etching apparatus 9 , and the cutting apparatus 2 shown in the attached drawings are merely illustrative and may be suitably changed within the scope where the effect of the present invention can be exhibited.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Optics & Photonics (AREA)
  • Mechanical Engineering (AREA)
  • Plasma & Fusion (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Electromagnetism (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Inorganic Chemistry (AREA)
  • Dicing (AREA)
  • Laser Beam Processing (AREA)
  • Drying Of Semiconductors (AREA)
US15/348,071 2015-11-16 2016-11-10 Wafer dividing method Active US10354919B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2015-223723 2015-11-16
JP2015223723A JP6587911B2 (ja) 2015-11-16 2015-11-16 ウエーハの分割方法

Publications (2)

Publication Number Publication Date
US20170140989A1 US20170140989A1 (en) 2017-05-18
US10354919B2 true US10354919B2 (en) 2019-07-16

Family

ID=58690792

Family Applications (1)

Application Number Title Priority Date Filing Date
US15/348,071 Active US10354919B2 (en) 2015-11-16 2016-11-10 Wafer dividing method

Country Status (5)

Country Link
US (1) US10354919B2 (ja)
JP (1) JP6587911B2 (ja)
KR (1) KR102493116B1 (ja)
CN (1) CN106847747B (ja)
TW (1) TWI732790B (ja)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017213628A (ja) * 2016-05-31 2017-12-07 株式会社ディスコ 切削装置
JP2018125479A (ja) * 2017-02-03 2018-08-09 株式会社ディスコ ウェーハの加工方法
CN107414309B (zh) * 2017-07-14 2019-12-17 北京中科镭特电子有限公司 一种激光加工晶圆的方法及装置
KR102492733B1 (ko) 2017-09-29 2023-01-27 삼성디스플레이 주식회사 구리 플라즈마 식각 방법 및 디스플레이 패널 제조 방법
JP7142236B2 (ja) * 2018-03-28 2022-09-27 パナソニックＩｐマネジメント株式会社 素子チップの製造方法
JP7068028B2 (ja) * 2018-05-09 2022-05-16 株式会社ディスコ ウェーハの分割方法
JP7109862B2 (ja) * 2018-07-10 2022-08-01 株式会社ディスコ 半導体ウェーハの加工方法
JP7072993B2 (ja) 2018-07-31 2022-05-23 株式会社ディスコ チップ製造方法
US10622272B1 (en) 2018-10-24 2020-04-14 Advanced Semiconductor Engineering, Inc. Semiconductor chip structure and semiconductor package
JP7193350B2 (ja) * 2019-01-07 2022-12-20 株式会社ディスコ ウェーハの加工方法
JP7325897B2 (ja) * 2019-04-18 2023-08-15 株式会社ディスコ 加工装置及び被加工物の加工方法
US11854888B2 (en) * 2020-06-22 2023-12-26 Applied Materials, Inc. Laser scribing trench opening control in wafer dicing using hybrid laser scribing and plasma etch approach
KR102529664B1 (ko) 2021-02-01 2023-05-04 동의대학교 산학협력단 식용 가능한 생분해성 숟가락 및 이의 제조방법
CN113644035A (zh) * 2021-08-06 2021-11-12 广东工业大学 一种半导体晶圆及其激光加工方法、系统

Citations (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6117347A (en) * 1996-07-10 2000-09-12 Nec Corporation Method of separating wafers into individual die
US6420245B1 (en) * 1999-06-08 2002-07-16 Kulicke & Soffa Investments, Inc. Method for singulating semiconductor wafers
US20030124771A1 (en) * 2002-01-03 2003-07-03 Maiz Jose A. Semiconductor wafer singulation method
US20030173333A1 (en) * 2000-03-27 2003-09-18 Applied Materials, Inc. Two-stage etching process
US20050101108A1 (en) * 2003-11-07 2005-05-12 Satoshi Genda Semiconductor wafer dividing method
US20050139962A1 (en) * 2003-12-30 2005-06-30 Dani Ashay A. Silicon wafer with soluable protective coating
JP2006190779A (ja) 2005-01-05 2006-07-20 Disco Abrasive Syst Ltd ウエーハの分割方法
US20060189099A1 (en) * 2005-02-18 2006-08-24 Lu Szu W Method of cutting integrated circuit chips from wafer by ablating with laser and cutting with saw blade
US20070028943A1 (en) * 2005-08-02 2007-02-08 Sawin Herbert H Method of using sulfur fluoride for removing surface deposits
JP2007069249A (ja) 2005-09-07 2007-03-22 Disco Abrasive Syst Ltd レーザー加工装置
US20090191690A1 (en) * 2004-11-01 2009-07-30 Xsil Technology Limited Increasing Die Strength by Etching During or After Dicing
US20120322234A1 (en) * 2011-06-15 2012-12-20 Applied Materials, Inc. In-situ deposited mask layer for device singulation by laser scribing and plasma etch
US20120329246A1 (en) * 2011-06-24 2012-12-27 Electro Scientific Industries, Inc. Etching a laser-cut semiconductor before dicing a die attach film (daf) or other material layer
US20140099777A1 (en) * 2012-10-09 2014-04-10 Infineon Technologies Ag Singulation Processes
US8993414B2 (en) * 2012-07-13 2015-03-31 Applied Materials, Inc. Laser scribing and plasma etch for high die break strength and clean sidewall
US20150214109A1 (en) * 2014-01-29 2015-07-30 Wei-Sheng Lei Wafer dicing using hybrid laser scribing and plasma etch approach with mask plasma treatment for improved mask etch resistance
US9355907B1 (en) * 2015-01-05 2016-05-31 Applied Materials, Inc. Hybrid wafer dicing approach using a line shaped laser beam profile laser scribing process and plasma etch process

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4571850B2 (ja) * 2004-11-12 2010-10-27 東京応化工業株式会社 レーザーダイシング用保護膜剤及び該保護膜剤を用いたウエーハの加工方法
JP2009021476A (ja) * 2007-07-13 2009-01-29 Disco Abrasive Syst Ltd ウエーハの分割方法
JP2012023085A (ja) * 2010-07-12 2012-02-02 Disco Abrasive Syst Ltd 光デバイスウエーハの加工方法
JP6113019B2 (ja) * 2013-08-07 2017-04-12 株式会社ディスコ ウエーハの分割方法
JP6162018B2 (ja) * 2013-10-15 2017-07-12 株式会社ディスコ ウエーハの加工方法
JP6302644B2 (ja) * 2013-11-11 2018-03-28 株式会社ディスコ ウェーハの加工方法
JP6223801B2 (ja) * 2013-12-05 2017-11-01 株式会社ディスコ 光デバイスウェーハの加工方法

Patent Citations (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6117347A (en) * 1996-07-10 2000-09-12 Nec Corporation Method of separating wafers into individual die
US6420245B1 (en) * 1999-06-08 2002-07-16 Kulicke & Soffa Investments, Inc. Method for singulating semiconductor wafers
US20030173333A1 (en) * 2000-03-27 2003-09-18 Applied Materials, Inc. Two-stage etching process
US20030124771A1 (en) * 2002-01-03 2003-07-03 Maiz Jose A. Semiconductor wafer singulation method
US6596562B1 (en) * 2002-01-03 2003-07-22 Intel Corporation Semiconductor wafer singulation method
US20050101108A1 (en) * 2003-11-07 2005-05-12 Satoshi Genda Semiconductor wafer dividing method
US20050139962A1 (en) * 2003-12-30 2005-06-30 Dani Ashay A. Silicon wafer with soluable protective coating
US20090191690A1 (en) * 2004-11-01 2009-07-30 Xsil Technology Limited Increasing Die Strength by Etching During or After Dicing
JP2006190779A (ja) 2005-01-05 2006-07-20 Disco Abrasive Syst Ltd ウエーハの分割方法
US20060189099A1 (en) * 2005-02-18 2006-08-24 Lu Szu W Method of cutting integrated circuit chips from wafer by ablating with laser and cutting with saw blade
US20070028943A1 (en) * 2005-08-02 2007-02-08 Sawin Herbert H Method of using sulfur fluoride for removing surface deposits
JP2007069249A (ja) 2005-09-07 2007-03-22 Disco Abrasive Syst Ltd レーザー加工装置
US20120322234A1 (en) * 2011-06-15 2012-12-20 Applied Materials, Inc. In-situ deposited mask layer for device singulation by laser scribing and plasma etch
US8598016B2 (en) * 2011-06-15 2013-12-03 Applied Materials, Inc. In-situ deposited mask layer for device singulation by laser scribing and plasma etch
US20120329246A1 (en) * 2011-06-24 2012-12-27 Electro Scientific Industries, Inc. Etching a laser-cut semiconductor before dicing a die attach film (daf) or other material layer
US8993414B2 (en) * 2012-07-13 2015-03-31 Applied Materials, Inc. Laser scribing and plasma etch for high die break strength and clean sidewall
US20140099777A1 (en) * 2012-10-09 2014-04-10 Infineon Technologies Ag Singulation Processes
US20150214109A1 (en) * 2014-01-29 2015-07-30 Wei-Sheng Lei Wafer dicing using hybrid laser scribing and plasma etch approach with mask plasma treatment for improved mask etch resistance
US9355907B1 (en) * 2015-01-05 2016-05-31 Applied Materials, Inc. Hybrid wafer dicing approach using a line shaped laser beam profile laser scribing process and plasma etch process

Also Published As

Publication number Publication date
KR102493116B1 (ko) 2023-01-27
TWI732790B (zh) 2021-07-11
CN106847747B (zh) 2021-12-28
KR20170057139A (ko) 2017-05-24
JP6587911B2 (ja) 2019-10-09
CN106847747A (zh) 2017-06-13
JP2017092363A (ja) 2017-05-25
TW201719746A (zh) 2017-06-01
US20170140989A1 (en) 2017-05-18

Similar Documents

Publication Publication Date Title
US10354919B2 (en) Wafer dividing method
US9379015B2 (en) Wafer processing method
US9768014B2 (en) Wafer coating
US7585751B2 (en) Wafer dividing method using laser beam with an annular spot
US9054179B2 (en) Wafer processing method
US20220375755A1 (en) Substrate processing system and substrate processing method
CN108231676B (zh) 晶片的加工方法
TWI698954B (zh) 切割晶圓背側上具有焊料凸塊的晶圓
US11133186B2 (en) Processing method of workpiece
JP2012023085A (ja) 光デバイスウエーハの加工方法
JP2008130818A (ja) レーザー加工装置
US20170033007A1 (en) Laser processing method
JP4666583B2 (ja) 保護被膜の被覆方法
JP7154697B2 (ja) 被加工物の加工方法
JP2011071289A (ja) ウエーハの加工方法
US20220102215A1 (en) Wafer processing method
US11456213B2 (en) Processing method of wafer
US20230377940A1 (en) Manufacturing method of chips
JP6899252B2 (ja) 加工方法
JP2023091896A (ja) デバイスチップの製造方法
JP2020113614A (ja) ウェーハの加工方法
JP2020038871A (ja) 被加工物の加工方法
JP2020017676A (ja) ウェーハの加工方法

Legal Events

Date Code Title Description
AS Assignment

Owner name: DISCO CORPORATION, JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:TABUCHI, TOMOTAKA;ODANAKA, KENTARO;KUMAZAWA, SATOSHI;AND OTHERS;REEL/FRAME:040276/0572

Effective date: 20161028

STPP Information on status: patent application and granting procedure in general

Free format text: NOTICE OF ALLOWANCE MAILED -- APPLICATION RECEIVED IN OFFICE OF PUBLICATIONS

STPP Information on status: patent application and granting procedure in general

Free format text: PUBLICATIONS -- ISSUE FEE PAYMENT VERIFIED

STCF Information on status: patent grant

Free format text: PATENTED CASE

MAFP Maintenance fee payment

Free format text: PAYMENT OF MAINTENANCE FEE, 4TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1551); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

Year of fee payment: 4